./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe016_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe016_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 149e6fd357219b88ef43dc04141f2ac073cb3fe9 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:22:21,073 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:22:21,074 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:22:21,082 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:22:21,083 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:22:21,084 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:22:21,085 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:22:21,086 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:22:21,088 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:22:21,089 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:22:21,090 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:22:21,090 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:22:21,091 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:22:21,091 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:22:21,092 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:22:21,093 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:22:21,093 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:22:21,094 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:22:21,095 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:22:21,096 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:22:21,098 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:22:21,098 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:22:21,099 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:22:21,099 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:22:21,101 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:22:21,101 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:22:21,101 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:22:21,102 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:22:21,102 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:22:21,102 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:22:21,103 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:22:21,103 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:22:21,104 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:22:21,104 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:22:21,105 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:22:21,105 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:22:21,106 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:22:21,106 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:22:21,106 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:22:21,107 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:22:21,107 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:22:21,108 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:22:21,121 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:22:21,121 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:22:21,122 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:22:21,122 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:22:21,122 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:22:21,122 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:22:21,123 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:22:21,123 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:22:21,123 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:22:21,123 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:22:21,123 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:22:21,123 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:22:21,124 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:22:21,124 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:22:21,124 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:22:21,125 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:22:21,125 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:22:21,125 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:22:21,125 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:22:21,125 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:22:21,125 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:22:21,126 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:22:21,126 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:22:21,126 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:22:21,126 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:22:21,126 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:22:21,127 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:22:21,127 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:22:21,127 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:22:21,127 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:22:21,127 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:22:21,127 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:22:21,128 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:22:21,128 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:22:21,128 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:22:21,128 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:22:21,128 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:22:21,128 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:22:21,129 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:22:21,129 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:22:21,129 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 149e6fd357219b88ef43dc04141f2ac073cb3fe9 [2019-12-07 19:22:21,243 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:22:21,252 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:22:21,255 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:22:21,256 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:22:21,256 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:22:21,256 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe016_rmo.oepc.i [2019-12-07 19:22:21,295 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/data/d2e40603d/2918f06af5a840838d847e7941a7008a/FLAGba311a3a5 [2019-12-07 19:22:21,671 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:22:21,671 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/sv-benchmarks/c/pthread-wmm/safe016_rmo.oepc.i [2019-12-07 19:22:21,682 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/data/d2e40603d/2918f06af5a840838d847e7941a7008a/FLAGba311a3a5 [2019-12-07 19:22:21,691 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/data/d2e40603d/2918f06af5a840838d847e7941a7008a [2019-12-07 19:22:21,693 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:22:21,694 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:22:21,694 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:22:21,694 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:22:21,697 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:22:21,697 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:22:21" (1/1) ... [2019-12-07 19:22:21,699 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:21, skipping insertion in model container [2019-12-07 19:22:21,699 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:22:21" (1/1) ... [2019-12-07 19:22:21,704 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:22:21,735 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:22:21,984 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:22:21,992 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:22:22,037 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:22:22,083 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:22:22,083 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22 WrapperNode [2019-12-07 19:22:22,083 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:22:22,084 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:22:22,084 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:22:22,084 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:22:22,089 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,104 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,124 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:22:22,125 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:22:22,125 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:22:22,125 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:22:22,131 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,131 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,135 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,136 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,144 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,148 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,151 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... [2019-12-07 19:22:22,154 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:22:22,155 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:22:22,155 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:22:22,155 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:22:22,155 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:22:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-07 19:22:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:22:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:22:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:22:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:22:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:22:22,195 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:22:22,195 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:22:22,196 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:22:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:22:22,196 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:22:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 19:22:22,196 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 19:22:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-07 19:22:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:22:22,196 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:22:22,196 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:22:22,197 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:22:22,641 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:22:22,641 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-07 19:22:22,642 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:22 BoogieIcfgContainer [2019-12-07 19:22:22,642 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:22:22,643 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:22:22,643 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:22:22,645 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:22:22,645 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:22:21" (1/3) ... [2019-12-07 19:22:22,646 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25ef9542 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:22:22, skipping insertion in model container [2019-12-07 19:22:22,646 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:22" (2/3) ... [2019-12-07 19:22:22,646 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25ef9542 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:22:22, skipping insertion in model container [2019-12-07 19:22:22,646 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:22" (3/3) ... [2019-12-07 19:22:22,648 INFO L109 eAbstractionObserver]: Analyzing ICFG safe016_rmo.oepc.i [2019-12-07 19:22:22,654 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:22:22,654 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:22:22,659 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 19:22:22,659 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:22:22,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,693 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,693 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,693 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,693 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,693 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,693 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,699 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,699 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,699 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,699 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,699 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,700 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,700 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,700 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,700 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,700 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,700 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,700 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,701 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,701 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,701 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,701 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,701 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,701 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,705 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,705 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,705 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,705 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,705 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,705 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,706 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,706 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,706 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,706 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,706 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,706 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,709 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,709 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,709 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,709 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,709 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,709 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,710 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,710 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,715 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,715 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,715 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,715 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,715 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,715 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,715 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~mem37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,716 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,716 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,716 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,716 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~mem37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,716 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,716 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,716 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,717 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,717 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,717 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,717 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,717 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,717 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,718 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,718 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,718 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,718 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,718 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,718 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,718 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,719 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,719 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,719 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,719 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,719 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:22,734 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 19:22:22,751 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:22:22,751 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:22:22,752 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:22:22,752 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:22:22,752 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:22:22,752 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:22:22,752 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:22:22,752 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:22:22,768 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 241 places, 292 transitions [2019-12-07 19:22:22,770 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 241 places, 292 transitions [2019-12-07 19:22:22,880 INFO L134 PetriNetUnfolder]: 64/288 cut-off events. [2019-12-07 19:22:22,880 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:22:22,898 INFO L76 FinitePrefix]: Finished finitePrefix Result has 301 conditions, 288 events. 64/288 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 891 event pairs. 12/235 useless extension candidates. Maximal degree in co-relation 239. Up to 2 conditions per place. [2019-12-07 19:22:22,932 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 241 places, 292 transitions [2019-12-07 19:22:22,998 INFO L134 PetriNetUnfolder]: 64/288 cut-off events. [2019-12-07 19:22:22,998 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:22:23,011 INFO L76 FinitePrefix]: Finished finitePrefix Result has 301 conditions, 288 events. 64/288 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 891 event pairs. 12/235 useless extension candidates. Maximal degree in co-relation 239. Up to 2 conditions per place. [2019-12-07 19:22:23,042 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 33294 [2019-12-07 19:22:23,043 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:22:26,937 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification that was a NOOP. DAG size: 114 [2019-12-07 19:22:27,039 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 110 [2019-12-07 19:22:27,404 WARN L192 SmtUtils]: Spent 345.00 ms on a formula simplification. DAG size of input: 142 DAG size of output: 138 [2019-12-07 19:22:27,563 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification that was a NOOP. DAG size: 136 [2019-12-07 19:22:27,597 INFO L206 etLargeBlockEncoding]: Checked pairs total: 201417 [2019-12-07 19:22:27,597 INFO L214 etLargeBlockEncoding]: Total number of compositions: 160 [2019-12-07 19:22:27,599 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 122 places, 141 transitions [2019-12-07 19:26:01,817 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 515000 states. [2019-12-07 19:26:01,819 INFO L276 IsEmpty]: Start isEmpty. Operand 515000 states. [2019-12-07 19:26:02,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 19:26:02,217 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:02,218 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:02,218 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:02,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:02,223 INFO L82 PathProgramCache]: Analyzing trace with hash -787887987, now seen corresponding path program 1 times [2019-12-07 19:26:02,230 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:02,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614245582] [2019-12-07 19:26:02,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:02,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:02,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:02,442 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614245582] [2019-12-07 19:26:02,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:02,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:26:02,443 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178217861] [2019-12-07 19:26:02,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:02,446 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:02,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:02,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:02,456 INFO L87 Difference]: Start difference. First operand 515000 states. Second operand 3 states. [2019-12-07 19:26:09,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:09,208 INFO L93 Difference]: Finished difference Result 504860 states and 2556922 transitions. [2019-12-07 19:26:09,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:09,209 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-12-07 19:26:09,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:11,294 INFO L225 Difference]: With dead ends: 504860 [2019-12-07 19:26:11,295 INFO L226 Difference]: Without dead ends: 493706 [2019-12-07 19:26:11,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:27:06,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 493706 states. [2019-12-07 19:27:13,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 493706 to 493706. [2019-12-07 19:27:13,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 493706 states. [2019-12-07 19:27:23,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493706 states to 493706 states and 2503349 transitions. [2019-12-07 19:27:23,414 INFO L78 Accepts]: Start accepts. Automaton has 493706 states and 2503349 transitions. Word has length 35 [2019-12-07 19:27:23,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:27:23,415 INFO L462 AbstractCegarLoop]: Abstraction has 493706 states and 2503349 transitions. [2019-12-07 19:27:23,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:27:23,415 INFO L276 IsEmpty]: Start isEmpty. Operand 493706 states and 2503349 transitions. [2019-12-07 19:27:23,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 19:27:23,779 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:27:23,779 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:27:23,779 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:27:23,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:27:23,779 INFO L82 PathProgramCache]: Analyzing trace with hash -1112490723, now seen corresponding path program 1 times [2019-12-07 19:27:23,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:27:23,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1149163966] [2019-12-07 19:27:23,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:27:23,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:27:23,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:27:23,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1149163966] [2019-12-07 19:27:23,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:27:23,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:27:23,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738788762] [2019-12-07 19:27:23,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:27:23,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:27:23,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:27:23,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:27:23,871 INFO L87 Difference]: Start difference. First operand 493706 states and 2503349 transitions. Second operand 4 states. [2019-12-07 19:27:27,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:27:27,602 INFO L93 Difference]: Finished difference Result 516014 states and 2599341 transitions. [2019-12-07 19:27:27,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:27:27,603 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-12-07 19:27:27,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:27:29,935 INFO L225 Difference]: With dead ends: 516014 [2019-12-07 19:27:29,935 INFO L226 Difference]: Without dead ends: 493706 [2019-12-07 19:27:29,936 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:28:19,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 493706 states. [2019-12-07 19:28:27,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 493706 to 493706. [2019-12-07 19:28:27,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 493706 states. [2019-12-07 19:28:29,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493706 states to 493706 states and 2492195 transitions. [2019-12-07 19:28:29,822 INFO L78 Accepts]: Start accepts. Automaton has 493706 states and 2492195 transitions. Word has length 35 [2019-12-07 19:28:29,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:28:29,822 INFO L462 AbstractCegarLoop]: Abstraction has 493706 states and 2492195 transitions. [2019-12-07 19:28:29,822 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:28:29,822 INFO L276 IsEmpty]: Start isEmpty. Operand 493706 states and 2492195 transitions. [2019-12-07 19:28:30,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 19:28:30,256 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:28:30,257 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:28:30,257 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:28:30,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:28:30,257 INFO L82 PathProgramCache]: Analyzing trace with hash -99032826, now seen corresponding path program 1 times [2019-12-07 19:28:30,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:28:30,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853702086] [2019-12-07 19:28:30,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:28:30,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:28:30,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:28:30,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853702086] [2019-12-07 19:28:30,326 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:28:30,326 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:28:30,326 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473790038] [2019-12-07 19:28:30,326 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:28:30,327 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:28:30,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:28:30,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:28:30,327 INFO L87 Difference]: Start difference. First operand 493706 states and 2492195 transitions. Second operand 4 states. [2019-12-07 19:28:40,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:28:40,000 INFO L93 Difference]: Finished difference Result 472412 states and 2366628 transitions. [2019-12-07 19:28:40,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:28:40,001 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-12-07 19:28:40,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:28:41,614 INFO L225 Difference]: With dead ends: 472412 [2019-12-07 19:28:41,614 INFO L226 Difference]: Without dead ends: 461258 [2019-12-07 19:28:41,615 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:22,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461258 states. [2019-12-07 19:29:29,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461258 to 461258. [2019-12-07 19:29:29,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 461258 states. [2019-12-07 19:29:32,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461258 states to 461258 states and 2318463 transitions. [2019-12-07 19:29:32,057 INFO L78 Accepts]: Start accepts. Automaton has 461258 states and 2318463 transitions. Word has length 37 [2019-12-07 19:29:32,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:32,057 INFO L462 AbstractCegarLoop]: Abstraction has 461258 states and 2318463 transitions. [2019-12-07 19:29:32,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:29:32,057 INFO L276 IsEmpty]: Start isEmpty. Operand 461258 states and 2318463 transitions. [2019-12-07 19:29:32,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 19:29:32,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:32,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:32,527 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:32,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:32,527 INFO L82 PathProgramCache]: Analyzing trace with hash 401792334, now seen corresponding path program 1 times [2019-12-07 19:29:32,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:32,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132564568] [2019-12-07 19:29:32,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:32,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:32,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:32,571 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132564568] [2019-12-07 19:29:32,571 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:32,571 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:29:32,571 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [22336369] [2019-12-07 19:29:32,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:29:32,572 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:32,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:29:32,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:29:32,572 INFO L87 Difference]: Start difference. First operand 461258 states and 2318463 transitions. Second operand 4 states. [2019-12-07 19:29:32,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:32,784 INFO L93 Difference]: Finished difference Result 57242 states and 208195 transitions. [2019-12-07 19:29:32,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:29:32,784 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2019-12-07 19:29:32,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:32,891 INFO L225 Difference]: With dead ends: 57242 [2019-12-07 19:29:32,891 INFO L226 Difference]: Without dead ends: 57242 [2019-12-07 19:29:32,892 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:29:33,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57242 states. [2019-12-07 19:29:34,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57242 to 57242. [2019-12-07 19:29:34,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57242 states. [2019-12-07 19:29:38,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57242 states to 57242 states and 208195 transitions. [2019-12-07 19:29:38,958 INFO L78 Accepts]: Start accepts. Automaton has 57242 states and 208195 transitions. Word has length 38 [2019-12-07 19:29:38,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:38,958 INFO L462 AbstractCegarLoop]: Abstraction has 57242 states and 208195 transitions. [2019-12-07 19:29:38,958 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:29:38,958 INFO L276 IsEmpty]: Start isEmpty. Operand 57242 states and 208195 transitions. [2019-12-07 19:29:38,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 19:29:38,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:38,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:38,998 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:38,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:38,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1478432930, now seen corresponding path program 1 times [2019-12-07 19:29:38,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:38,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647897688] [2019-12-07 19:29:38,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:39,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:39,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:39,065 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647897688] [2019-12-07 19:29:39,065 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:39,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:29:39,066 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084905379] [2019-12-07 19:29:39,066 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:29:39,066 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:39,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:29:39,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:39,067 INFO L87 Difference]: Start difference. First operand 57242 states and 208195 transitions. Second operand 5 states. [2019-12-07 19:29:39,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:39,778 INFO L93 Difference]: Finished difference Result 82266 states and 288732 transitions. [2019-12-07 19:29:39,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:29:39,779 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 48 [2019-12-07 19:29:39,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:39,919 INFO L225 Difference]: With dead ends: 82266 [2019-12-07 19:29:39,920 INFO L226 Difference]: Without dead ends: 82266 [2019-12-07 19:29:39,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:29:40,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82266 states. [2019-12-07 19:29:41,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82266 to 76207. [2019-12-07 19:29:41,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76207 states. [2019-12-07 19:29:41,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76207 states to 76207 states and 269281 transitions. [2019-12-07 19:29:41,754 INFO L78 Accepts]: Start accepts. Automaton has 76207 states and 269281 transitions. Word has length 48 [2019-12-07 19:29:41,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:41,755 INFO L462 AbstractCegarLoop]: Abstraction has 76207 states and 269281 transitions. [2019-12-07 19:29:41,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:29:41,755 INFO L276 IsEmpty]: Start isEmpty. Operand 76207 states and 269281 transitions. [2019-12-07 19:29:41,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 19:29:41,816 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:41,816 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:41,816 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:41,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:41,816 INFO L82 PathProgramCache]: Analyzing trace with hash -215823750, now seen corresponding path program 1 times [2019-12-07 19:29:41,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:41,817 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100476617] [2019-12-07 19:29:41,817 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:41,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:41,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:41,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100476617] [2019-12-07 19:29:41,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:41,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:29:41,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941652192] [2019-12-07 19:29:41,871 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:29:41,871 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:41,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:29:41,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:29:41,871 INFO L87 Difference]: Start difference. First operand 76207 states and 269281 transitions. Second operand 4 states. [2019-12-07 19:29:42,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:42,345 INFO L93 Difference]: Finished difference Result 93307 states and 323038 transitions. [2019-12-07 19:29:42,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:29:42,346 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2019-12-07 19:29:42,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:42,503 INFO L225 Difference]: With dead ends: 93307 [2019-12-07 19:29:42,503 INFO L226 Difference]: Without dead ends: 93307 [2019-12-07 19:29:42,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:43,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93307 states. [2019-12-07 19:29:44,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93307 to 85186. [2019-12-07 19:29:44,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85186 states. [2019-12-07 19:29:44,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85186 states to 85186 states and 298529 transitions. [2019-12-07 19:29:44,487 INFO L78 Accepts]: Start accepts. Automaton has 85186 states and 298529 transitions. Word has length 49 [2019-12-07 19:29:44,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:44,488 INFO L462 AbstractCegarLoop]: Abstraction has 85186 states and 298529 transitions. [2019-12-07 19:29:44,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:29:44,488 INFO L276 IsEmpty]: Start isEmpty. Operand 85186 states and 298529 transitions. [2019-12-07 19:29:44,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 19:29:44,559 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:44,559 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:44,559 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:44,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:44,559 INFO L82 PathProgramCache]: Analyzing trace with hash 122585592, now seen corresponding path program 1 times [2019-12-07 19:29:44,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:44,560 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144537455] [2019-12-07 19:29:44,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:44,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:44,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:44,616 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144537455] [2019-12-07 19:29:44,616 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:44,616 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:29:44,617 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1336861620] [2019-12-07 19:29:44,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:29:44,617 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:44,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:29:44,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:44,618 INFO L87 Difference]: Start difference. First operand 85186 states and 298529 transitions. Second operand 5 states. [2019-12-07 19:29:44,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:44,714 INFO L93 Difference]: Finished difference Result 20195 states and 68912 transitions. [2019-12-07 19:29:44,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:29:44,714 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2019-12-07 19:29:44,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:44,742 INFO L225 Difference]: With dead ends: 20195 [2019-12-07 19:29:44,742 INFO L226 Difference]: Without dead ends: 20195 [2019-12-07 19:29:44,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:44,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20195 states. [2019-12-07 19:29:45,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20195 to 20195. [2019-12-07 19:29:45,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20195 states. [2019-12-07 19:29:45,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20195 states to 20195 states and 68912 transitions. [2019-12-07 19:29:45,053 INFO L78 Accepts]: Start accepts. Automaton has 20195 states and 68912 transitions. Word has length 50 [2019-12-07 19:29:45,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:45,053 INFO L462 AbstractCegarLoop]: Abstraction has 20195 states and 68912 transitions. [2019-12-07 19:29:45,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:29:45,053 INFO L276 IsEmpty]: Start isEmpty. Operand 20195 states and 68912 transitions. [2019-12-07 19:29:45,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:29:45,073 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:45,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:45,074 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:45,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:45,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1549010778, now seen corresponding path program 1 times [2019-12-07 19:29:45,074 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:45,074 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [657585753] [2019-12-07 19:29:45,074 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:45,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:45,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:45,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [657585753] [2019-12-07 19:29:45,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:45,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:29:45,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076871158] [2019-12-07 19:29:45,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:29:45,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:45,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:29:45,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:29:45,131 INFO L87 Difference]: Start difference. First operand 20195 states and 68912 transitions. Second operand 6 states. [2019-12-07 19:29:45,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:45,232 INFO L93 Difference]: Finished difference Result 17177 states and 61447 transitions. [2019-12-07 19:29:45,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:29:45,233 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 19:29:45,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:45,262 INFO L225 Difference]: With dead ends: 17177 [2019-12-07 19:29:45,263 INFO L226 Difference]: Without dead ends: 17177 [2019-12-07 19:29:45,263 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:29:45,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17177 states. [2019-12-07 19:29:45,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17177 to 15881. [2019-12-07 19:29:45,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15881 states. [2019-12-07 19:29:45,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15881 states to 15881 states and 57151 transitions. [2019-12-07 19:29:45,546 INFO L78 Accepts]: Start accepts. Automaton has 15881 states and 57151 transitions. Word has length 60 [2019-12-07 19:29:45,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:45,546 INFO L462 AbstractCegarLoop]: Abstraction has 15881 states and 57151 transitions. [2019-12-07 19:29:45,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:29:45,546 INFO L276 IsEmpty]: Start isEmpty. Operand 15881 states and 57151 transitions. [2019-12-07 19:29:45,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 19:29:45,563 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:45,563 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:45,563 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:45,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:45,564 INFO L82 PathProgramCache]: Analyzing trace with hash -777285767, now seen corresponding path program 1 times [2019-12-07 19:29:45,564 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:45,564 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000134823] [2019-12-07 19:29:45,564 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:45,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:45,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:45,610 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000134823] [2019-12-07 19:29:45,611 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:45,611 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:29:45,611 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [615702946] [2019-12-07 19:29:45,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:29:45,611 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:45,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:29:45,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:29:45,612 INFO L87 Difference]: Start difference. First operand 15881 states and 57151 transitions. Second operand 4 states. [2019-12-07 19:29:45,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:45,681 INFO L93 Difference]: Finished difference Result 16241 states and 57824 transitions. [2019-12-07 19:29:45,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:29:45,682 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 74 [2019-12-07 19:29:45,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:45,694 INFO L225 Difference]: With dead ends: 16241 [2019-12-07 19:29:45,694 INFO L226 Difference]: Without dead ends: 8311 [2019-12-07 19:29:45,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:45,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8311 states. [2019-12-07 19:29:45,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8311 to 8311. [2019-12-07 19:29:45,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8311 states. [2019-12-07 19:29:45,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8311 states to 8311 states and 25660 transitions. [2019-12-07 19:29:45,815 INFO L78 Accepts]: Start accepts. Automaton has 8311 states and 25660 transitions. Word has length 74 [2019-12-07 19:29:45,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:45,815 INFO L462 AbstractCegarLoop]: Abstraction has 8311 states and 25660 transitions. [2019-12-07 19:29:45,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:29:45,815 INFO L276 IsEmpty]: Start isEmpty. Operand 8311 states and 25660 transitions. [2019-12-07 19:29:45,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 19:29:45,822 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:45,822 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:45,822 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:45,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:45,822 INFO L82 PathProgramCache]: Analyzing trace with hash -1265664349, now seen corresponding path program 2 times [2019-12-07 19:29:45,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:45,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518713402] [2019-12-07 19:29:45,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:45,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:45,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:45,862 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518713402] [2019-12-07 19:29:45,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:45,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:29:45,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [319952289] [2019-12-07 19:29:45,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:29:45,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:45,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:29:45,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:29:45,863 INFO L87 Difference]: Start difference. First operand 8311 states and 25660 transitions. Second operand 4 states. [2019-12-07 19:29:46,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:46,004 INFO L93 Difference]: Finished difference Result 11232 states and 34338 transitions. [2019-12-07 19:29:46,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:29:46,004 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 74 [2019-12-07 19:29:46,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:46,016 INFO L225 Difference]: With dead ends: 11232 [2019-12-07 19:29:46,016 INFO L226 Difference]: Without dead ends: 11232 [2019-12-07 19:29:46,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:46,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11232 states. [2019-12-07 19:29:46,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11232 to 9179. [2019-12-07 19:29:46,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9179 states. [2019-12-07 19:29:46,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9179 states to 9179 states and 28316 transitions. [2019-12-07 19:29:46,161 INFO L78 Accepts]: Start accepts. Automaton has 9179 states and 28316 transitions. Word has length 74 [2019-12-07 19:29:46,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:46,161 INFO L462 AbstractCegarLoop]: Abstraction has 9179 states and 28316 transitions. [2019-12-07 19:29:46,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:29:46,161 INFO L276 IsEmpty]: Start isEmpty. Operand 9179 states and 28316 transitions. [2019-12-07 19:29:46,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-12-07 19:29:46,168 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:46,169 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:46,169 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:46,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:46,169 INFO L82 PathProgramCache]: Analyzing trace with hash -39904701, now seen corresponding path program 1 times [2019-12-07 19:29:46,169 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:46,169 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786482219] [2019-12-07 19:29:46,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:46,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:46,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:46,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786482219] [2019-12-07 19:29:46,230 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:46,230 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:29:46,230 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18007665] [2019-12-07 19:29:46,230 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:29:46,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:46,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:29:46,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:29:46,231 INFO L87 Difference]: Start difference. First operand 9179 states and 28316 transitions. Second operand 3 states. [2019-12-07 19:29:46,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:46,267 INFO L93 Difference]: Finished difference Result 8918 states and 27257 transitions. [2019-12-07 19:29:46,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:29:46,267 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 75 [2019-12-07 19:29:46,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:46,279 INFO L225 Difference]: With dead ends: 8918 [2019-12-07 19:29:46,280 INFO L226 Difference]: Without dead ends: 8918 [2019-12-07 19:29:46,280 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:29:46,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8918 states. [2019-12-07 19:29:46,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8918 to 8542. [2019-12-07 19:29:46,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8542 states. [2019-12-07 19:29:46,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8542 states to 8542 states and 26165 transitions. [2019-12-07 19:29:46,443 INFO L78 Accepts]: Start accepts. Automaton has 8542 states and 26165 transitions. Word has length 75 [2019-12-07 19:29:46,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:46,443 INFO L462 AbstractCegarLoop]: Abstraction has 8542 states and 26165 transitions. [2019-12-07 19:29:46,443 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:29:46,443 INFO L276 IsEmpty]: Start isEmpty. Operand 8542 states and 26165 transitions. [2019-12-07 19:29:46,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 19:29:46,450 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:46,450 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:46,450 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:46,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:46,450 INFO L82 PathProgramCache]: Analyzing trace with hash 836538087, now seen corresponding path program 1 times [2019-12-07 19:29:46,450 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:46,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854436591] [2019-12-07 19:29:46,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:46,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:46,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:46,576 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1854436591] [2019-12-07 19:29:46,576 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:46,576 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:29:46,576 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [527631546] [2019-12-07 19:29:46,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:29:46,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:46,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:29:46,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:29:46,577 INFO L87 Difference]: Start difference. First operand 8542 states and 26165 transitions. Second operand 11 states. [2019-12-07 19:29:46,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:46,849 INFO L93 Difference]: Finished difference Result 9157 states and 27551 transitions. [2019-12-07 19:29:46,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:29:46,849 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 76 [2019-12-07 19:29:46,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:46,858 INFO L225 Difference]: With dead ends: 9157 [2019-12-07 19:29:46,858 INFO L226 Difference]: Without dead ends: 9126 [2019-12-07 19:29:46,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=271, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:29:46,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9126 states. [2019-12-07 19:29:46,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9126 to 8964. [2019-12-07 19:29:46,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8964 states. [2019-12-07 19:29:46,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8964 states to 8964 states and 27183 transitions. [2019-12-07 19:29:46,994 INFO L78 Accepts]: Start accepts. Automaton has 8964 states and 27183 transitions. Word has length 76 [2019-12-07 19:29:46,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:46,994 INFO L462 AbstractCegarLoop]: Abstraction has 8964 states and 27183 transitions. [2019-12-07 19:29:46,994 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:29:46,994 INFO L276 IsEmpty]: Start isEmpty. Operand 8964 states and 27183 transitions. [2019-12-07 19:29:47,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 19:29:47,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:47,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:47,002 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:47,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:47,002 INFO L82 PathProgramCache]: Analyzing trace with hash 34435911, now seen corresponding path program 1 times [2019-12-07 19:29:47,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:47,002 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2044931328] [2019-12-07 19:29:47,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:47,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:47,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:47,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2044931328] [2019-12-07 19:29:47,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:47,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:29:47,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011555908] [2019-12-07 19:29:47,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:29:47,058 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:47,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:29:47,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:47,058 INFO L87 Difference]: Start difference. First operand 8964 states and 27183 transitions. Second operand 5 states. [2019-12-07 19:29:47,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:47,264 INFO L93 Difference]: Finished difference Result 12853 states and 38348 transitions. [2019-12-07 19:29:47,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:29:47,264 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2019-12-07 19:29:47,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:47,277 INFO L225 Difference]: With dead ends: 12853 [2019-12-07 19:29:47,277 INFO L226 Difference]: Without dead ends: 12853 [2019-12-07 19:29:47,278 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:29:47,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12853 states. [2019-12-07 19:29:47,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12853 to 10146. [2019-12-07 19:29:47,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10146 states. [2019-12-07 19:29:47,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10146 states to 10146 states and 30669 transitions. [2019-12-07 19:29:47,434 INFO L78 Accepts]: Start accepts. Automaton has 10146 states and 30669 transitions. Word has length 76 [2019-12-07 19:29:47,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:47,434 INFO L462 AbstractCegarLoop]: Abstraction has 10146 states and 30669 transitions. [2019-12-07 19:29:47,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:29:47,434 INFO L276 IsEmpty]: Start isEmpty. Operand 10146 states and 30669 transitions. [2019-12-07 19:29:47,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 19:29:47,442 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:47,442 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:47,442 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:47,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:47,443 INFO L82 PathProgramCache]: Analyzing trace with hash 23401167, now seen corresponding path program 2 times [2019-12-07 19:29:47,443 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:47,443 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115957421] [2019-12-07 19:29:47,443 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:47,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:47,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:47,490 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115957421] [2019-12-07 19:29:47,490 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:47,490 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:29:47,491 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362868255] [2019-12-07 19:29:47,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:29:47,491 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:47,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:29:47,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:47,491 INFO L87 Difference]: Start difference. First operand 10146 states and 30669 transitions. Second operand 5 states. [2019-12-07 19:29:47,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:47,701 INFO L93 Difference]: Finished difference Result 13930 states and 41584 transitions. [2019-12-07 19:29:47,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:29:47,701 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2019-12-07 19:29:47,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:47,717 INFO L225 Difference]: With dead ends: 13930 [2019-12-07 19:29:47,717 INFO L226 Difference]: Without dead ends: 13930 [2019-12-07 19:29:47,717 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:29:47,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13930 states. [2019-12-07 19:29:47,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13930 to 10092. [2019-12-07 19:29:47,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10092 states. [2019-12-07 19:29:47,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10092 states to 10092 states and 30496 transitions. [2019-12-07 19:29:47,881 INFO L78 Accepts]: Start accepts. Automaton has 10092 states and 30496 transitions. Word has length 76 [2019-12-07 19:29:47,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:47,881 INFO L462 AbstractCegarLoop]: Abstraction has 10092 states and 30496 transitions. [2019-12-07 19:29:47,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:29:47,882 INFO L276 IsEmpty]: Start isEmpty. Operand 10092 states and 30496 transitions. [2019-12-07 19:29:47,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 19:29:47,890 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:47,890 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:47,890 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:47,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:47,890 INFO L82 PathProgramCache]: Analyzing trace with hash 540363675, now seen corresponding path program 3 times [2019-12-07 19:29:47,890 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:47,890 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649628455] [2019-12-07 19:29:47,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:47,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:47,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:47,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649628455] [2019-12-07 19:29:47,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:47,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:29:47,983 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362853961] [2019-12-07 19:29:47,983 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:29:47,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:47,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:29:47,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:29:47,984 INFO L87 Difference]: Start difference. First operand 10092 states and 30496 transitions. Second operand 10 states. [2019-12-07 19:29:48,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:48,186 INFO L93 Difference]: Finished difference Result 10134 states and 30549 transitions. [2019-12-07 19:29:48,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 19:29:48,187 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 76 [2019-12-07 19:29:48,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:48,197 INFO L225 Difference]: With dead ends: 10134 [2019-12-07 19:29:48,198 INFO L226 Difference]: Without dead ends: 10103 [2019-12-07 19:29:48,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:29:48,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10103 states. [2019-12-07 19:29:48,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10103 to 9621. [2019-12-07 19:29:48,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9621 states. [2019-12-07 19:29:48,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9621 states to 9621 states and 29342 transitions. [2019-12-07 19:29:48,349 INFO L78 Accepts]: Start accepts. Automaton has 9621 states and 29342 transitions. Word has length 76 [2019-12-07 19:29:48,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:48,349 INFO L462 AbstractCegarLoop]: Abstraction has 9621 states and 29342 transitions. [2019-12-07 19:29:48,349 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:29:48,349 INFO L276 IsEmpty]: Start isEmpty. Operand 9621 states and 29342 transitions. [2019-12-07 19:29:48,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 19:29:48,358 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:48,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:48,358 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:48,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:48,358 INFO L82 PathProgramCache]: Analyzing trace with hash 600891797, now seen corresponding path program 1 times [2019-12-07 19:29:48,358 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:48,358 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999273298] [2019-12-07 19:29:48,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:48,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:48,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:48,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999273298] [2019-12-07 19:29:48,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:48,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:29:48,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393792273] [2019-12-07 19:29:48,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:29:48,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:48,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:29:48,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:29:48,429 INFO L87 Difference]: Start difference. First operand 9621 states and 29342 transitions. Second operand 6 states. [2019-12-07 19:29:48,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:48,486 INFO L93 Difference]: Finished difference Result 10302 states and 30917 transitions. [2019-12-07 19:29:48,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:29:48,486 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2019-12-07 19:29:48,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:48,487 INFO L225 Difference]: With dead ends: 10302 [2019-12-07 19:29:48,487 INFO L226 Difference]: Without dead ends: 1547 [2019-12-07 19:29:48,488 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:29:48,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1547 states. [2019-12-07 19:29:48,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1547 to 1547. [2019-12-07 19:29:48,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1547 states. [2019-12-07 19:29:48,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1547 states to 1547 states and 3475 transitions. [2019-12-07 19:29:48,500 INFO L78 Accepts]: Start accepts. Automaton has 1547 states and 3475 transitions. Word has length 77 [2019-12-07 19:29:48,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:48,500 INFO L462 AbstractCegarLoop]: Abstraction has 1547 states and 3475 transitions. [2019-12-07 19:29:48,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:29:48,500 INFO L276 IsEmpty]: Start isEmpty. Operand 1547 states and 3475 transitions. [2019-12-07 19:29:48,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 19:29:48,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:48,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:48,502 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:48,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:48,502 INFO L82 PathProgramCache]: Analyzing trace with hash 1163451053, now seen corresponding path program 2 times [2019-12-07 19:29:48,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:48,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331081575] [2019-12-07 19:29:48,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:48,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:48,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:48,714 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1331081575] [2019-12-07 19:29:48,714 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:48,714 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 19:29:48,714 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395961106] [2019-12-07 19:29:48,714 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:29:48,714 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:48,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:29:48,715 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:29:48,715 INFO L87 Difference]: Start difference. First operand 1547 states and 3475 transitions. Second operand 13 states. [2019-12-07 19:29:49,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:49,034 INFO L93 Difference]: Finished difference Result 2159 states and 4888 transitions. [2019-12-07 19:29:49,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 19:29:49,034 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 77 [2019-12-07 19:29:49,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:49,036 INFO L225 Difference]: With dead ends: 2159 [2019-12-07 19:29:49,036 INFO L226 Difference]: Without dead ends: 2128 [2019-12-07 19:29:49,036 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=392, Unknown=0, NotChecked=0, Total=462 [2019-12-07 19:29:49,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2128 states. [2019-12-07 19:29:49,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2128 to 1926. [2019-12-07 19:29:49,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1926 states. [2019-12-07 19:29:49,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1926 states to 1926 states and 4377 transitions. [2019-12-07 19:29:49,054 INFO L78 Accepts]: Start accepts. Automaton has 1926 states and 4377 transitions. Word has length 77 [2019-12-07 19:29:49,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:49,054 INFO L462 AbstractCegarLoop]: Abstraction has 1926 states and 4377 transitions. [2019-12-07 19:29:49,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:29:49,054 INFO L276 IsEmpty]: Start isEmpty. Operand 1926 states and 4377 transitions. [2019-12-07 19:29:49,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 19:29:49,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:49,055 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:49,055 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:49,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:49,056 INFO L82 PathProgramCache]: Analyzing trace with hash -1960046477, now seen corresponding path program 1 times [2019-12-07 19:29:49,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:49,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270544040] [2019-12-07 19:29:49,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:49,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:29:49,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:29:49,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270544040] [2019-12-07 19:29:49,112 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:29:49,112 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:29:49,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [885932912] [2019-12-07 19:29:49,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:29:49,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:29:49,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:29:49,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:29:49,113 INFO L87 Difference]: Start difference. First operand 1926 states and 4377 transitions. Second operand 5 states. [2019-12-07 19:29:49,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:29:49,213 INFO L93 Difference]: Finished difference Result 1935 states and 4385 transitions. [2019-12-07 19:29:49,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:29:49,213 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 77 [2019-12-07 19:29:49,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:29:49,214 INFO L225 Difference]: With dead ends: 1935 [2019-12-07 19:29:49,214 INFO L226 Difference]: Without dead ends: 1926 [2019-12-07 19:29:49,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:29:49,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1926 states. [2019-12-07 19:29:49,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1926 to 1428. [2019-12-07 19:29:49,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1428 states. [2019-12-07 19:29:49,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1428 states to 1428 states and 3235 transitions. [2019-12-07 19:29:49,228 INFO L78 Accepts]: Start accepts. Automaton has 1428 states and 3235 transitions. Word has length 77 [2019-12-07 19:29:49,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:29:49,228 INFO L462 AbstractCegarLoop]: Abstraction has 1428 states and 3235 transitions. [2019-12-07 19:29:49,228 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:29:49,228 INFO L276 IsEmpty]: Start isEmpty. Operand 1428 states and 3235 transitions. [2019-12-07 19:29:49,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 19:29:49,229 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:29:49,229 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:29:49,229 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:29:49,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:29:49,230 INFO L82 PathProgramCache]: Analyzing trace with hash 27619453, now seen corresponding path program 3 times [2019-12-07 19:29:49,230 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:29:49,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715153672] [2019-12-07 19:29:49,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:29:49,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:29:49,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:29:49,361 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:29:49,362 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:29:49,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1151] [1151] ULTIMATE.startENTRY-->L838: Formula: (let ((.cse1 (store |v_#valid_88| 0 0))) (let ((.cse0 (store .cse1 |v_~#y~0.base_279| 1))) (and (= 0 v_~__unbuffered_p0_EAX$w_buff0_used~0_8) (< |v_#StackHeapBarrier_26| |v_ULTIMATE.start_main_~#t2161~0.base_23|) (= 0 v_~weak$$choice1~0_31) (= v_~y$r_buff0_thd1~0_280 0) (= v_~x~0_58 0) (= 0 v_~y$read_delayed_var~0.offset_8) (= v_~y$flush_delayed~0_130 0) (= |v_#valid_86| (store .cse0 |v_ULTIMATE.start_main_~#t2161~0.base_23| 1)) (= v_~y$w_buff1_used~0_463 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd2~0_6) (= 0 v_~__unbuffered_p0_EAX$read_delayed~0_80) (= |v_ULTIMATE.start_main_~#t2161~0.offset_17| 0) (= 0 v_~y$w_buff0~0_135) (= 0 v_~__unbuffered_p0_EAX$w_buff1_used~0_8) (= 0 v_~__unbuffered_p0_EAX$read_delayed_var~0.base_75) (= (store |v_#memory_int_430| |v_ULTIMATE.start_main_~#t2161~0.base_23| (store (select |v_#memory_int_430| |v_ULTIMATE.start_main_~#t2161~0.base_23|) |v_ULTIMATE.start_main_~#t2161~0.offset_17| 0)) |v_#memory_int_429|) (= v_~y$w_buff0_used~0_799 0) (= v_~y$r_buff1_thd1~0_198 0) (= v_~y$r_buff0_thd3~0_69 0) (= v_~main$tmp_guard0~0_36 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd0~0_7) (= 0 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd4~0_7) (= v_~y$w_buff1~0_196 0) (= 0 v_~__unbuffered_p0_EAX$w_buff1~0_8) (= v_~__unbuffered_p0_EAX$mem_tmp~0_7 0) (= (select (select |v_#memory_int_430| |v_~#y~0.base_279|) |v_~#y~0.offset_279|) 0) (= 0 v_~__unbuffered_p0_EAX$w_buff0~0_8) (= (store (store |v_#length_45| |v_~#y~0.base_279| 4) |v_ULTIMATE.start_main_~#t2161~0.base_23| 4) |v_#length_44|) (= v_~__unbuffered_p0_EAX$flush_delayed~0_6 0) (= v_~y$r_buff1_thd0~0_207 0) (= 0 |v_~#y~0.offset_279|) (= 0 v_~__unbuffered_p0_EAX~0_98) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd4~0_8) (= v_~weak$$choice2~0_132 0) (= v_~y$read_delayed~0_7 0) (< 0 |v_#StackHeapBarrier_26|) (= v_~y$r_buff0_thd0~0_310 0) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd1~0_7) (= v_~y$r_buff0_thd2~0_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2161~0.base_23|) 0) (= 0 v_~y$r_buff1_thd4~0_47) (= 0 v_~weak$$choice0~0_73) (< |v_#StackHeapBarrier_26| |v_~#y~0.base_279|) (= 0 |v_#NULL.base_4|) (= v_~y$mem_tmp~0_92 0) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd3~0_8) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd0~0_7) (= v_~__unbuffered_cnt~0_105 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd3~0_6) (= v_~main$tmp_guard1~0_32 0) (= |v_#NULL.offset_4| 0) (= 0 (select .cse1 |v_~#y~0.base_279|)) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd1~0_6) (= 0 v_~y$read_delayed_var~0.base_8) (= v_~y$r_buff1_thd2~0_7 0) (= v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_75 0) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7) (= 0 v_~y$r_buff1_thd3~0_68) (= v_~y$r_buff0_thd4~0_75 0)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_26|, #valid=|v_#valid_88|, #memory_int=|v_#memory_int_430|, #length=|v_#length_45|} OutVars{ULTIMATE.start_main_#t~nondet55=|v_ULTIMATE.start_main_#t~nondet55_52|, ULTIMATE.start_main_~#t2162~0.offset=|v_ULTIMATE.start_main_~#t2162~0.offset_19|, ~__unbuffered_p0_EAX$r_buff0_thd1~0=v_~__unbuffered_p0_EAX$r_buff0_thd1~0_6, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_101|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_36|, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_30|, ~y$mem_tmp~0=v_~y$mem_tmp~0_92, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_280, ~__unbuffered_p0_EAX$r_buff0_thd4~0=v_~__unbuffered_p0_EAX$r_buff0_thd4~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_130, ULTIMATE.start_main_#t~nondet47=|v_ULTIMATE.start_main_#t~nondet47_32|, ~__unbuffered_p0_EAX$w_buff1~0=v_~__unbuffered_p0_EAX$w_buff1~0_8, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_62|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_40|, ~__unbuffered_p0_EAX$r_buff1_thd2~0=v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_73, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_57|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_47, ULTIMATE.start_main_#t~mem85=|v_ULTIMATE.start_main_#t~mem85_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_105, ~__unbuffered_p0_EAX$w_buff0~0=v_~__unbuffered_p0_EAX$w_buff0~0_8, ~#y~0.base=|v_~#y~0.base_279|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_32|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_41|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_30|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_198, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_208|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_39|, ULTIMATE.start_main_~#t2164~0.offset=|v_ULTIMATE.start_main_~#t2164~0.offset_31|, ~__unbuffered_p0_EAX$flush_delayed~0=v_~__unbuffered_p0_EAX$flush_delayed~0_6, ~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_80, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_9|, ~__unbuffered_p0_EAX$w_buff0_used~0=v_~__unbuffered_p0_EAX$w_buff0_used~0_8, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_31|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_75, ~__unbuffered_p0_EAX$r_buff1_thd0~0=v_~__unbuffered_p0_EAX$r_buff1_thd0~0_7, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_58|, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_75, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_30|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_86|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ULTIMATE.start_main_~#t2161~0.base=|v_ULTIMATE.start_main_~#t2161~0.base_23|, ULTIMATE.start_main_#t~mem48=|v_ULTIMATE.start_main_#t~mem48_41|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_463, ULTIMATE.start_main_#t~short84=|v_ULTIMATE.start_main_#t~short84_75|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_36|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_33|, ~__unbuffered_p0_EAX$r_buff1_thd3~0=v_~__unbuffered_p0_EAX$r_buff1_thd3~0_8, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_67|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_246|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ~weak$$choice1~0=v_~weak$$choice1~0_31, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_98, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_68, #length=|v_#length_44|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ULTIMATE.start_main_#t~mem58=|v_ULTIMATE.start_main_#t~mem58_22|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~__unbuffered_p0_EAX$r_buff0_thd0~0=v_~__unbuffered_p0_EAX$r_buff0_thd0~0_7, ~__unbuffered_p0_EAX$w_buff1_used~0=v_~__unbuffered_p0_EAX$w_buff1_used~0_8, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_31|, ULTIMATE.start_main_~#t2163~0.base=|v_ULTIMATE.start_main_~#t2163~0.base_28|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_74|, #StackHeapBarrier=|v_#StackHeapBarrier_26|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_26|, ~y$w_buff1~0=v_~y$w_buff1~0_196, ~__unbuffered_p0_EAX$mem_tmp~0=v_~__unbuffered_p0_EAX$mem_tmp~0_7, ULTIMATE.start_main_~#t2164~0.base=|v_ULTIMATE.start_main_~#t2164~0.base_34|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t2163~0.offset=|v_ULTIMATE.start_main_~#t2163~0.offset_21|, ~__unbuffered_p0_EAX$r_buff0_thd3~0=v_~__unbuffered_p0_EAX$r_buff0_thd3~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ULTIMATE.start_main_#t~mem83=|v_ULTIMATE.start_main_#t~mem83_36|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_207, ~x~0=v_~x~0_58, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~#y~0.offset=|v_~#y~0.offset_279|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_799, ULTIMATE.start_main_#t~nondet79=|v_ULTIMATE.start_main_#t~nondet79_28|, ULTIMATE.start_main_#t~nondet56=|v_ULTIMATE.start_main_#t~nondet56_52|, ULTIMATE.start_main_~#t2162~0.base=|v_ULTIMATE.start_main_~#t2162~0.base_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_43|, ~__unbuffered_p0_EAX$r_buff1_thd1~0=v_~__unbuffered_p0_EAX$r_buff1_thd1~0_7, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_75|, ~__unbuffered_p0_EAX$r_buff1_thd4~0=v_~__unbuffered_p0_EAX$r_buff1_thd4~0_8, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_36|, ~y$w_buff0~0=v_~y$w_buff0~0_135, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_69, ULTIMATE.start_main_~#t2161~0.offset=|v_ULTIMATE.start_main_~#t2161~0.offset_17|, ULTIMATE.start_main_#t~mem57=|v_ULTIMATE.start_main_#t~mem57_30|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~__unbuffered_p0_EAX$r_buff0_thd2~0=v_~__unbuffered_p0_EAX$r_buff0_thd2~0_6, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_22|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_36|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_40|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_32|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_310, #memory_int=|v_#memory_int_429|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_75} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet55, ULTIMATE.start_main_~#t2162~0.offset, ~__unbuffered_p0_EAX$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite73, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~__unbuffered_p0_EAX$r_buff0_thd4~0, ~y$flush_delayed~0, ULTIMATE.start_main_#t~nondet47, ~__unbuffered_p0_EAX$w_buff1~0, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_#t~ite77, ~__unbuffered_p0_EAX$r_buff1_thd2~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ~y$r_buff1_thd4~0, ULTIMATE.start_main_#t~mem85, ~__unbuffered_cnt~0, ~__unbuffered_p0_EAX$w_buff0~0, ~#y~0.base, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite86, ULTIMATE.start_main_#t~ite74, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite70, ULTIMATE.start_main_~#t2164~0.offset, ~__unbuffered_p0_EAX$flush_delayed~0, ~__unbuffered_p0_EAX$read_delayed~0, ULTIMATE.start_main_#t~nondet46, ~__unbuffered_p0_EAX$w_buff0_used~0, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite78, ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite62, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#res, #valid, ~weak$$choice2~0, ULTIMATE.start_main_~#t2161~0.base, ULTIMATE.start_main_#t~mem48, ~y$w_buff1_used~0, ULTIMATE.start_main_#t~short84, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite68, ~__unbuffered_p0_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite64, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_#t~ite71, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~mem58, ULTIMATE.start_main_#t~nondet45, ~__unbuffered_p0_EAX$r_buff0_thd0~0, ~__unbuffered_p0_EAX$w_buff1_used~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_~#t2163~0.base, ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~ite82, ~y$w_buff1~0, ~__unbuffered_p0_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2164~0.base, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t2163~0.offset, ~__unbuffered_p0_EAX$r_buff0_thd3~0, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~mem83, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~#y~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~nondet79, ULTIMATE.start_main_#t~nondet56, ULTIMATE.start_main_~#t2162~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ~__unbuffered_p0_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite65, ~__unbuffered_p0_EAX$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite72, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t2161~0.offset, ULTIMATE.start_main_#t~mem57, ULTIMATE.start_main_#t~nondet44, ~__unbuffered_p0_EAX$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite76, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~mem80, ~y$r_buff0_thd0~0, #memory_int, ~__unbuffered_p0_EAX$read_delayed_var~0.offset] because there is no mapped edge [2019-12-07 19:29:49,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1111] [1111] L838-1-->L840: Formula: (and (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t2162~0.base_12|)) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2162~0.base_12|) (= |v_#memory_int_329| (store |v_#memory_int_330| |v_ULTIMATE.start_main_~#t2162~0.base_12| (store (select |v_#memory_int_330| |v_ULTIMATE.start_main_~#t2162~0.base_12|) |v_ULTIMATE.start_main_~#t2162~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t2162~0.base_12|)) (= (store |v_#valid_53| |v_ULTIMATE.start_main_~#t2162~0.base_12| 1) |v_#valid_52|) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t2162~0.base_12| 4)) (= |v_ULTIMATE.start_main_~#t2162~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_330|, #length=|v_#length_30|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, ULTIMATE.start_main_~#t2162~0.offset=|v_ULTIMATE.start_main_~#t2162~0.offset_11|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_329|, ULTIMATE.start_main_~#t2162~0.base=|v_ULTIMATE.start_main_~#t2162~0.base_12|, #length=|v_#length_29|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t2162~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t2162~0.base, #length] because there is no mapped edge [2019-12-07 19:29:49,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1098] [1098] L840-1-->L842: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2163~0.base_10|) (= |v_#memory_int_257| (store |v_#memory_int_258| |v_ULTIMATE.start_main_~#t2163~0.base_10| (store (select |v_#memory_int_258| |v_ULTIMATE.start_main_~#t2163~0.base_10|) |v_ULTIMATE.start_main_~#t2163~0.offset_8| 2))) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t2163~0.base_10|) 0) (= |v_ULTIMATE.start_main_~#t2163~0.offset_8| 0) (not (= |v_ULTIMATE.start_main_~#t2163~0.base_10| 0)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2163~0.base_10| 4)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t2163~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_258|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t2163~0.offset=|v_ULTIMATE.start_main_~#t2163~0.offset_8|, #valid=|v_#valid_46|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_257|, #length=|v_#length_23|, ULTIMATE.start_main_~#t2163~0.base=|v_ULTIMATE.start_main_~#t2163~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2163~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t2163~0.base] because there is no mapped edge [2019-12-07 19:29:49,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1094] [1094] L842-1-->L844: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2164~0.offset_23|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t2164~0.base_24| 1)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t2164~0.base_24|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t2164~0.base_24|) (not (= 0 |v_ULTIMATE.start_main_~#t2164~0.base_24|)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2164~0.base_24| 4)) (= |v_#memory_int_247| (store |v_#memory_int_248| |v_ULTIMATE.start_main_~#t2164~0.base_24| (store (select |v_#memory_int_248| |v_ULTIMATE.start_main_~#t2164~0.base_24|) |v_ULTIMATE.start_main_~#t2164~0.offset_23| 3)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_248|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ULTIMATE.start_main_~#t2164~0.base=|v_ULTIMATE.start_main_~#t2164~0.base_24|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_247|, ULTIMATE.start_main_~#t2164~0.offset=|v_ULTIMATE.start_main_~#t2164~0.offset_23|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t2164~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2164~0.offset, #length] because there is no mapped edge [2019-12-07 19:29:49,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] L815-2-->L815-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In424096405 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In424096405 256)))) (or (and (= |P3Thread1of1ForFork1_#t~mem37_In424096405| |P3Thread1of1ForFork1_#t~mem37_Out424096405|) (not .cse0) (not .cse1) (= |P3Thread1of1ForFork1_#t~ite38_Out424096405| ~y$w_buff1~0_In424096405)) (and (= |P3Thread1of1ForFork1_#t~mem37_Out424096405| |P3Thread1of1ForFork1_#t~ite38_Out424096405|) (= |P3Thread1of1ForFork1_#t~mem37_Out424096405| (select (select |#memory_int_In424096405| |~#y~0.base_In424096405|) |~#y~0.offset_In424096405|)) (or .cse1 .cse0)))) InVars {P3Thread1of1ForFork1_#t~mem37=|P3Thread1of1ForFork1_#t~mem37_In424096405|, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In424096405, ~#y~0.offset=|~#y~0.offset_In424096405|, ~y$w_buff1~0=~y$w_buff1~0_In424096405, #memory_int=|#memory_int_In424096405|, ~#y~0.base=|~#y~0.base_In424096405|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In424096405} OutVars{P3Thread1of1ForFork1_#t~mem37=|P3Thread1of1ForFork1_#t~mem37_Out424096405|, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In424096405, ~#y~0.offset=|~#y~0.offset_In424096405|, ~y$w_buff1~0=~y$w_buff1~0_In424096405, P3Thread1of1ForFork1_#t~ite38=|P3Thread1of1ForFork1_#t~ite38_Out424096405|, #memory_int=|#memory_int_In424096405|, ~#y~0.base=|~#y~0.base_In424096405|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In424096405} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~mem37, P3Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 19:29:49,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1043] [1043] L759-->L760: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_112 256))) (= v_~y$r_buff0_thd1~0_149 v_~y$r_buff0_thd1~0_148)) InVars {~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_149, ~weak$$choice2~0=v_~weak$$choice2~0_112} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_112, P0Thread1of1ForFork2_#t~ite23=|v_P0Thread1of1ForFork2_#t~ite23_8|, P0Thread1of1ForFork2_#t~ite22=|v_P0Thread1of1ForFork2_#t~ite22_12|, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_15|} AuxVars[] AssignedVars[~y$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite23, P0Thread1of1ForFork2_#t~ite22, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 19:29:49,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1046] [1046] L764-->L764-2: Formula: (let ((.cse0 (= (mod ~y$flush_delayed~0_In-603916287 256) 0))) (or (and (= (select (select |#memory_int_In-603916287| |~#y~0.base_In-603916287|) |~#y~0.offset_In-603916287|) |P0Thread1of1ForFork2_#t~mem28_Out-603916287|) (= |P0Thread1of1ForFork2_#t~mem28_Out-603916287| |P0Thread1of1ForFork2_#t~ite29_Out-603916287|) .cse0) (and (= ~y$mem_tmp~0_In-603916287 |P0Thread1of1ForFork2_#t~ite29_Out-603916287|) (not .cse0) (= |P0Thread1of1ForFork2_#t~mem28_In-603916287| |P0Thread1of1ForFork2_#t~mem28_Out-603916287|)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In-603916287, ~#y~0.offset=|~#y~0.offset_In-603916287|, P0Thread1of1ForFork2_#t~mem28=|P0Thread1of1ForFork2_#t~mem28_In-603916287|, ~y$flush_delayed~0=~y$flush_delayed~0_In-603916287, #memory_int=|#memory_int_In-603916287|, ~#y~0.base=|~#y~0.base_In-603916287|} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In-603916287, P0Thread1of1ForFork2_#t~mem28=|P0Thread1of1ForFork2_#t~mem28_Out-603916287|, ~#y~0.offset=|~#y~0.offset_In-603916287|, ~y$flush_delayed~0=~y$flush_delayed~0_In-603916287, P0Thread1of1ForFork2_#t~ite29=|P0Thread1of1ForFork2_#t~ite29_Out-603916287|, #memory_int=|#memory_int_In-603916287|, ~#y~0.base=|~#y~0.base_In-603916287|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~mem28, P0Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 19:29:49,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1087] [1087] L764-2-->P0EXIT: Formula: (and (= v_~x~0_22 1) (= v_~__unbuffered_cnt~0_34 (+ v_~__unbuffered_cnt~0_35 1)) (= |v_#memory_int_235| (store |v_#memory_int_236| |v_~#y~0.base_159| (store (select |v_#memory_int_236| |v_~#y~0.base_159|) |v_~#y~0.offset_159| |v_P0Thread1of1ForFork2_#t~ite29_22|))) (= 0 v_~y$flush_delayed~0_82) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~#y~0.offset=|v_~#y~0.offset_159|, P0Thread1of1ForFork2_#t~ite29=|v_P0Thread1of1ForFork2_#t~ite29_22|, #memory_int=|v_#memory_int_236|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~#y~0.base=|v_~#y~0.base_159|} OutVars{P0Thread1of1ForFork2_#t~mem28=|v_P0Thread1of1ForFork2_#t~mem28_11|, ~#y~0.offset=|v_~#y~0.offset_159|, P0Thread1of1ForFork2_#t~ite29=|v_P0Thread1of1ForFork2_#t~ite29_21|, ~y$flush_delayed~0=v_~y$flush_delayed~0_82, #memory_int=|v_#memory_int_235|, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~#y~0.base=|v_~#y~0.base_159|, ~x~0=v_~x~0_22} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~mem28, P0Thread1of1ForFork2_#t~ite29, ~y$flush_delayed~0, #memory_int, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~x~0] because there is no mapped edge [2019-12-07 19:29:49,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1106] [1106] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork3_~arg.offset_4 |v_P1Thread1of1ForFork3_#in~arg.offset_6|) (= v_P1Thread1of1ForFork3_~arg.base_4 |v_P1Thread1of1ForFork3_#in~arg.base_6|) (= v_~x~0_28 2) (= 0 |v_P1Thread1of1ForFork3_#res.offset_3|) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= 0 |v_P1Thread1of1ForFork3_#res.base_3|)) InVars {P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_6|} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_3|, P1Thread1of1ForFork3_~arg.offset=v_P1Thread1of1ForFork3_~arg.offset_4, P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_6|, P1Thread1of1ForFork3_~arg.base=v_P1Thread1of1ForFork3_~arg.base_4, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_6|, ~x~0=v_~x~0_28} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, P1Thread1of1ForFork3_~arg.offset, P1Thread1of1ForFork3_~arg.base, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 19:29:49,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [983] [983] L815-4-->L816: Formula: (= (store |v_#memory_int_58| |v_~#y~0.base_33| (store (select |v_#memory_int_58| |v_~#y~0.base_33|) |v_~#y~0.offset_33| |v_P3Thread1of1ForFork1_#t~ite38_12|)) |v_#memory_int_57|) InVars {~#y~0.offset=|v_~#y~0.offset_33|, P3Thread1of1ForFork1_#t~ite38=|v_P3Thread1of1ForFork1_#t~ite38_12|, #memory_int=|v_#memory_int_58|, ~#y~0.base=|v_~#y~0.base_33|} OutVars{P3Thread1of1ForFork1_#t~mem37=|v_P3Thread1of1ForFork1_#t~mem37_7|, ~#y~0.offset=|v_~#y~0.offset_33|, P3Thread1of1ForFork1_#t~ite39=|v_P3Thread1of1ForFork1_#t~ite39_11|, P3Thread1of1ForFork1_#t~ite38=|v_P3Thread1of1ForFork1_#t~ite38_11|, #memory_int=|v_#memory_int_57|, ~#y~0.base=|v_~#y~0.base_33|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~mem37, P3Thread1of1ForFork1_#t~ite39, P3Thread1of1ForFork1_#t~ite38, #memory_int] because there is no mapped edge [2019-12-07 19:29:49,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1045] [1045] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-1636077853 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1636077853 256) 0))) (or (and (= |P3Thread1of1ForFork1_#t~ite40_Out-1636077853| ~y$w_buff0_used~0_In-1636077853) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P3Thread1of1ForFork1_#t~ite40_Out-1636077853|) (not .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1636077853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1636077853} OutVars{P3Thread1of1ForFork1_#t~ite40=|P3Thread1of1ForFork1_#t~ite40_Out-1636077853|, ~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1636077853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1636077853} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 19:29:49,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1060] [1060] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd4~0_In-1606023061 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1606023061 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1606023061 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd4~0_In-1606023061 256)))) (or (and (= |P3Thread1of1ForFork1_#t~ite41_Out-1606023061| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1606023061 |P3Thread1of1ForFork1_#t~ite41_Out-1606023061|) (or .cse2 .cse3)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1606023061, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1606023061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1606023061, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1606023061} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1606023061, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1606023061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1606023061, P3Thread1of1ForFork1_#t~ite41=|P3Thread1of1ForFork1_#t~ite41_Out-1606023061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1606023061} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 19:29:49,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1044] [1044] L798-2-->L798-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1567400104 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1567400104 256)))) (or (and (= (select (select |#memory_int_In-1567400104| |~#y~0.base_In-1567400104|) |~#y~0.offset_In-1567400104|) |P2Thread1of1ForFork0_#t~mem30_Out-1567400104|) (= |P2Thread1of1ForFork0_#t~mem30_Out-1567400104| |P2Thread1of1ForFork0_#t~ite31_Out-1567400104|) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~mem30_In-1567400104| |P2Thread1of1ForFork0_#t~mem30_Out-1567400104|) (= ~y$w_buff1~0_In-1567400104 |P2Thread1of1ForFork0_#t~ite31_Out-1567400104|) (not .cse0)))) InVars {~#y~0.offset=|~#y~0.offset_In-1567400104|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1567400104, ~y$w_buff1~0=~y$w_buff1~0_In-1567400104, #memory_int=|#memory_int_In-1567400104|, ~#y~0.base=|~#y~0.base_In-1567400104|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1567400104, P2Thread1of1ForFork0_#t~mem30=|P2Thread1of1ForFork0_#t~mem30_In-1567400104|} OutVars{~#y~0.offset=|~#y~0.offset_In-1567400104|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1567400104, ~y$w_buff1~0=~y$w_buff1~0_In-1567400104, #memory_int=|#memory_int_In-1567400104|, P2Thread1of1ForFork0_#t~ite31=|P2Thread1of1ForFork0_#t~ite31_Out-1567400104|, ~#y~0.base=|~#y~0.base_In-1567400104|, P2Thread1of1ForFork0_#t~mem30=|P2Thread1of1ForFork0_#t~mem30_Out-1567400104|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1567400104} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~mem30] because there is no mapped edge [2019-12-07 19:29:49,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [993] [993] L798-4-->L799: Formula: (= (store |v_#memory_int_86| |v_~#y~0.base_51| (store (select |v_#memory_int_86| |v_~#y~0.base_51|) |v_~#y~0.offset_51| |v_P2Thread1of1ForFork0_#t~ite31_8|)) |v_#memory_int_85|) InVars {~#y~0.offset=|v_~#y~0.offset_51|, #memory_int=|v_#memory_int_86|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_8|, ~#y~0.base=|v_~#y~0.base_51|} OutVars{~#y~0.offset=|v_~#y~0.offset_51|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_11|, #memory_int=|v_#memory_int_85|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_7|, ~#y~0.base=|v_~#y~0.base_51|, P2Thread1of1ForFork0_#t~mem30=|v_P2Thread1of1ForFork0_#t~mem30_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite32, #memory_int, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~mem30] because there is no mapped edge [2019-12-07 19:29:49,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1054] [1054] L818-->L819: Formula: (let ((.cse1 (= ~y$r_buff0_thd4~0_Out-84817455 ~y$r_buff0_thd4~0_In-84817455)) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-84817455 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-84817455 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= ~y$r_buff0_thd4~0_Out-84817455 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-84817455, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84817455} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_Out-84817455, P3Thread1of1ForFork1_#t~ite42=|P3Thread1of1ForFork1_#t~ite42_Out-84817455|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84817455} AuxVars[] AssignedVars[~y$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 19:29:49,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1064] [1064] L819-->L819-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1368071811 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-1368071811 256))) (.cse3 (= (mod ~y$r_buff0_thd4~0_In-1368071811 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1368071811 256)))) (or (and (= |P3Thread1of1ForFork1_#t~ite43_Out-1368071811| ~y$r_buff1_thd4~0_In-1368071811) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P3Thread1of1ForFork1_#t~ite43_Out-1368071811| 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1368071811, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1368071811, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1368071811, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1368071811} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1368071811, P3Thread1of1ForFork1_#t~ite43=|P3Thread1of1ForFork1_#t~ite43_Out-1368071811|, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1368071811, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1368071811, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1368071811} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 19:29:49,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1114] [1114] L819-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork1_#t~ite43_26| v_~y$r_buff1_thd4~0_41) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {P3Thread1of1ForFork1_#t~ite43=|v_P3Thread1of1ForFork1_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P3Thread1of1ForFork1_#t~ite43=|v_P3Thread1of1ForFork1_#t~ite43_25|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_41, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite43, ~y$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 19:29:49,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1055] [1055] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-615407435 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-615407435 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite33_Out-615407435| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite33_Out-615407435| ~y$w_buff0_used~0_In-615407435)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-615407435, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-615407435} OutVars{P2Thread1of1ForFork0_#t~ite33=|P2Thread1of1ForFork0_#t~ite33_Out-615407435|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-615407435, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-615407435} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 19:29:49,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1067] [1067] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd3~0_In1890517225 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1890517225 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1890517225 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1890517225 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite34_Out1890517225| ~y$w_buff1_used~0_In1890517225) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite34_Out1890517225|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1890517225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1890517225, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1890517225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1890517225} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1890517225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1890517225, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1890517225, P2Thread1of1ForFork0_#t~ite34=|P2Thread1of1ForFork0_#t~ite34_Out1890517225|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1890517225} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 19:29:49,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1048] [1048] L801-->L802: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In834966249 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In834966249 256))) (.cse1 (= ~y$r_buff0_thd3~0_In834966249 ~y$r_buff0_thd3~0_Out834966249))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out834966249)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In834966249, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In834966249} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In834966249, P2Thread1of1ForFork0_#t~ite35=|P2Thread1of1ForFork0_#t~ite35_Out834966249|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out834966249} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite35, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 19:29:49,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1073] [1073] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1137819855 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In1137819855 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In1137819855 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1137819855 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd3~0_In1137819855 |P2Thread1of1ForFork0_#t~ite36_Out1137819855|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite36_Out1137819855| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1137819855, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1137819855, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1137819855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1137819855} OutVars{P2Thread1of1ForFork0_#t~ite36=|P2Thread1of1ForFork0_#t~ite36_Out1137819855|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1137819855, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1137819855, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1137819855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1137819855} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 19:29:49,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1101] [1101] L802-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_20| v_~y$r_buff1_thd3~0_34) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_19|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_34, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:29:49,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1036] [1036] L844-1-->L850: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_24) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet47=|v_ULTIMATE.start_main_#t~nondet47_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet47, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:29:49,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1057] [1057] L850-2-->L850-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite50_Out1732488618| |ULTIMATE.start_main_#t~ite49_Out1732488618|)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1732488618 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1732488618 256) 0))) (or (and .cse0 (= ~y$w_buff1~0_In1732488618 |ULTIMATE.start_main_#t~ite49_Out1732488618|) (= |ULTIMATE.start_main_#t~mem48_In1732488618| |ULTIMATE.start_main_#t~mem48_Out1732488618|) (not .cse1) (not .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~mem48_Out1732488618| |ULTIMATE.start_main_#t~ite49_Out1732488618|) (= (select (select |#memory_int_In1732488618| |~#y~0.base_In1732488618|) |~#y~0.offset_In1732488618|) |ULTIMATE.start_main_#t~mem48_Out1732488618|) (or .cse1 .cse2)))) InVars {~#y~0.offset=|~#y~0.offset_In1732488618|, ~y$w_buff1~0=~y$w_buff1~0_In1732488618, #memory_int=|#memory_int_In1732488618|, ~#y~0.base=|~#y~0.base_In1732488618|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1732488618, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1732488618, ULTIMATE.start_main_#t~mem48=|ULTIMATE.start_main_#t~mem48_In1732488618|} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1732488618|, ~#y~0.offset=|~#y~0.offset_In1732488618|, ~y$w_buff1~0=~y$w_buff1~0_In1732488618, #memory_int=|#memory_int_In1732488618|, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1732488618|, ~#y~0.base=|~#y~0.base_In1732488618|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1732488618, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1732488618, ULTIMATE.start_main_#t~mem48=|ULTIMATE.start_main_#t~mem48_Out1732488618|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~mem48] because there is no mapped edge [2019-12-07 19:29:49,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1071] [1071] L851-->L851-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In236068549 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In236068549 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out236068549| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out236068549| ~y$w_buff0_used~0_In236068549) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In236068549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In236068549} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out236068549|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In236068549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In236068549} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:29:49,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1072] [1072] L852-->L852-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In-2144004908 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2144004908 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-2144004908 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2144004908 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-2144004908| ~y$w_buff1_used~0_In-2144004908)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out-2144004908| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2144004908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2144004908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2144004908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2144004908} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2144004908|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2144004908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2144004908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2144004908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2144004908} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:29:49,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1074] [1074] L853-->L854: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-410758959 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-410758959 256))) (.cse2 (= ~y$r_buff0_thd0~0_In-410758959 ~y$r_buff0_thd0~0_Out-410758959))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd0~0_Out-410758959 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-410758959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-410758959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-410758959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_Out-410758959, ULTIMATE.start_main_#t~ite53=|ULTIMATE.start_main_#t~ite53_Out-410758959|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite53] because there is no mapped edge [2019-12-07 19:29:49,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1061] [1061] L854-->L854-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd0~0_In1862051223 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1862051223 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1862051223 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1862051223 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite54_Out1862051223|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$r_buff1_thd0~0_In1862051223 |ULTIMATE.start_main_#t~ite54_Out1862051223|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1862051223, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1862051223, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1862051223, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1862051223} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1862051223, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1862051223, ULTIMATE.start_main_#t~ite54=|ULTIMATE.start_main_#t~ite54_Out1862051223|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1862051223, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1862051223} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite54] because there is no mapped edge [2019-12-07 19:29:49,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [998] [998] L866-->L867: Formula: (and (= v_~y$r_buff0_thd0~0_89 v_~y$r_buff0_thd0~0_90) (not (= 0 (mod v_~weak$$choice2~0_59 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_90, ~weak$$choice2~0=v_~weak$$choice2~0_59} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_8|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_89, ~weak$$choice2~0=v_~weak$$choice2~0_59, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite75] because there is no mapped edge [2019-12-07 19:29:49,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L867-->L869: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_95 256))) (= |v_ULTIMATE.start_main_#t~nondet79_6| v_~weak$$choice1~0_8) (= v_~y$r_buff1_thd0~0_103 v_~y$r_buff1_thd0~0_102)) InVars {ULTIMATE.start_main_#t~nondet79=|v_ULTIMATE.start_main_#t~nondet79_6|, ~weak$$choice2~0=v_~weak$$choice2~0_95, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_103} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_8, ULTIMATE.start_main_#t~nondet79=|v_ULTIMATE.start_main_#t~nondet79_5|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_12|, ~weak$$choice2~0=v_~weak$$choice2~0_95, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_10|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_102, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_13|} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite78, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite76] because there is no mapped edge [2019-12-07 19:29:49,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1059] [1059] L869-->L869-3: Formula: (let ((.cse0 (= (mod ~weak$$choice1~0_In-1771793884 256) 0)) (.cse1 (not (= 0 (mod ~__unbuffered_p0_EAX$read_delayed~0_In-1771793884 256))))) (or (and (not .cse0) .cse1 (= (select (select |#memory_int_In-1771793884| ~__unbuffered_p0_EAX$read_delayed_var~0.base_In-1771793884) ~__unbuffered_p0_EAX$read_delayed_var~0.offset_In-1771793884) |ULTIMATE.start_main_#t~mem80_Out-1771793884|) (= |ULTIMATE.start_main_#t~mem80_Out-1771793884| |ULTIMATE.start_main_#t~ite81_Out-1771793884|)) (and .cse0 .cse1 (= |ULTIMATE.start_main_#t~ite81_Out-1771793884| ~__unbuffered_p0_EAX~0_In-1771793884) (= |ULTIMATE.start_main_#t~mem80_In-1771793884| |ULTIMATE.start_main_#t~mem80_Out-1771793884|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-1771793884, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In-1771793884, ULTIMATE.start_main_#t~mem80=|ULTIMATE.start_main_#t~mem80_In-1771793884|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In-1771793884, #memory_int=|#memory_int_In-1771793884|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In-1771793884, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In-1771793884} OutVars{~weak$$choice1~0=~weak$$choice1~0_In-1771793884, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In-1771793884, ULTIMATE.start_main_#t~ite81=|ULTIMATE.start_main_#t~ite81_Out-1771793884|, ULTIMATE.start_main_#t~mem80=|ULTIMATE.start_main_#t~mem80_Out-1771793884|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In-1771793884, #memory_int=|#memory_int_In-1771793884|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In-1771793884, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In-1771793884} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80] because there is no mapped edge [2019-12-07 19:29:49,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1000] [1000] L869-3-->L870: Formula: (let ((.cse1 (= |v_ULTIMATE.start_main_#t~ite81_10| v_~__unbuffered_p0_EAX~0_15)) (.cse0 (= 2 v_~x~0_9))) (or (and |v_ULTIMATE.start_main_#t~short84_31| .cse0 .cse1) (and .cse1 (not |v_ULTIMATE.start_main_#t~short84_31|) (not .cse0)))) InVars {ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_10|, ~x~0=v_~x~0_9} OutVars{ULTIMATE.start_main_#t~short84=|v_ULTIMATE.start_main_#t~short84_31|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_15, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_7|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_9|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_6|, ~x~0=v_~x~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~short84, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80] because there is no mapped edge [2019-12-07 19:29:49,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1069] [1069] L871-->L871-2: Formula: (let ((.cse0 (= (mod ~y$flush_delayed~0_In203525051 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite86_Out203525051| ~y$mem_tmp~0_In203525051) (= |ULTIMATE.start_main_#t~mem85_In203525051| |ULTIMATE.start_main_#t~mem85_Out203525051|)) (and .cse0 (= |ULTIMATE.start_main_#t~ite86_Out203525051| |ULTIMATE.start_main_#t~mem85_Out203525051|) (= |ULTIMATE.start_main_#t~mem85_Out203525051| (select (select |#memory_int_In203525051| |~#y~0.base_In203525051|) |~#y~0.offset_In203525051|))))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In203525051, ~#y~0.offset=|~#y~0.offset_In203525051|, ~y$flush_delayed~0=~y$flush_delayed~0_In203525051, #memory_int=|#memory_int_In203525051|, ULTIMATE.start_main_#t~mem85=|ULTIMATE.start_main_#t~mem85_In203525051|, ~#y~0.base=|~#y~0.base_In203525051|} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In203525051, ~#y~0.offset=|~#y~0.offset_In203525051|, ~y$flush_delayed~0=~y$flush_delayed~0_In203525051, #memory_int=|#memory_int_In203525051|, ULTIMATE.start_main_#t~mem85=|ULTIMATE.start_main_#t~mem85_Out203525051|, ~#y~0.base=|~#y~0.base_In203525051|, ULTIMATE.start_main_#t~ite86=|ULTIMATE.start_main_#t~ite86_Out203525051|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem85, ULTIMATE.start_main_#t~ite86] because there is no mapped edge [2019-12-07 19:29:49,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1091] [1091] L871-2-->L874-1: Formula: (and (= |v_#memory_int_243| (store |v_#memory_int_244| |v_~#y~0.base_164| (store (select |v_#memory_int_244| |v_~#y~0.base_164|) |v_~#y~0.offset_164| |v_ULTIMATE.start_main_#t~ite86_24|))) (= 0 v_~y$flush_delayed~0_87) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_10 256))) InVars {~#y~0.offset=|v_~#y~0.offset_164|, #memory_int=|v_#memory_int_244|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~#y~0.base=|v_~#y~0.base_164|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_24|} OutVars{~#y~0.offset=|v_~#y~0.offset_164|, ~y$flush_delayed~0=v_~y$flush_delayed~0_87, #memory_int=|v_#memory_int_243|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ULTIMATE.start_main_#t~mem85=|v_ULTIMATE.start_main_#t~mem85_13|, ~#y~0.base=|v_~#y~0.base_164|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_23|} AuxVars[] AssignedVars[~y$flush_delayed~0, #memory_int, ULTIMATE.start_main_#t~mem85, ULTIMATE.start___VERIFIER_assert_#in~expression, ULTIMATE.start_main_#t~ite86] because there is no mapped edge [2019-12-07 19:29:49,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1103] [1103] L874-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:29:49,465 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:29:49 BasicIcfg [2019-12-07 19:29:49,465 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:29:49,466 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:29:49,466 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:29:49,466 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:29:49,466 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:22" (3/4) ... [2019-12-07 19:29:49,468 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:29:49,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1151] [1151] ULTIMATE.startENTRY-->L838: Formula: (let ((.cse1 (store |v_#valid_88| 0 0))) (let ((.cse0 (store .cse1 |v_~#y~0.base_279| 1))) (and (= 0 v_~__unbuffered_p0_EAX$w_buff0_used~0_8) (< |v_#StackHeapBarrier_26| |v_ULTIMATE.start_main_~#t2161~0.base_23|) (= 0 v_~weak$$choice1~0_31) (= v_~y$r_buff0_thd1~0_280 0) (= v_~x~0_58 0) (= 0 v_~y$read_delayed_var~0.offset_8) (= v_~y$flush_delayed~0_130 0) (= |v_#valid_86| (store .cse0 |v_ULTIMATE.start_main_~#t2161~0.base_23| 1)) (= v_~y$w_buff1_used~0_463 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd2~0_6) (= 0 v_~__unbuffered_p0_EAX$read_delayed~0_80) (= |v_ULTIMATE.start_main_~#t2161~0.offset_17| 0) (= 0 v_~y$w_buff0~0_135) (= 0 v_~__unbuffered_p0_EAX$w_buff1_used~0_8) (= 0 v_~__unbuffered_p0_EAX$read_delayed_var~0.base_75) (= (store |v_#memory_int_430| |v_ULTIMATE.start_main_~#t2161~0.base_23| (store (select |v_#memory_int_430| |v_ULTIMATE.start_main_~#t2161~0.base_23|) |v_ULTIMATE.start_main_~#t2161~0.offset_17| 0)) |v_#memory_int_429|) (= v_~y$w_buff0_used~0_799 0) (= v_~y$r_buff1_thd1~0_198 0) (= v_~y$r_buff0_thd3~0_69 0) (= v_~main$tmp_guard0~0_36 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd0~0_7) (= 0 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd4~0_7) (= v_~y$w_buff1~0_196 0) (= 0 v_~__unbuffered_p0_EAX$w_buff1~0_8) (= v_~__unbuffered_p0_EAX$mem_tmp~0_7 0) (= (select (select |v_#memory_int_430| |v_~#y~0.base_279|) |v_~#y~0.offset_279|) 0) (= 0 v_~__unbuffered_p0_EAX$w_buff0~0_8) (= (store (store |v_#length_45| |v_~#y~0.base_279| 4) |v_ULTIMATE.start_main_~#t2161~0.base_23| 4) |v_#length_44|) (= v_~__unbuffered_p0_EAX$flush_delayed~0_6 0) (= v_~y$r_buff1_thd0~0_207 0) (= 0 |v_~#y~0.offset_279|) (= 0 v_~__unbuffered_p0_EAX~0_98) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd4~0_8) (= v_~weak$$choice2~0_132 0) (= v_~y$read_delayed~0_7 0) (< 0 |v_#StackHeapBarrier_26|) (= v_~y$r_buff0_thd0~0_310 0) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd1~0_7) (= v_~y$r_buff0_thd2~0_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2161~0.base_23|) 0) (= 0 v_~y$r_buff1_thd4~0_47) (= 0 v_~weak$$choice0~0_73) (< |v_#StackHeapBarrier_26| |v_~#y~0.base_279|) (= 0 |v_#NULL.base_4|) (= v_~y$mem_tmp~0_92 0) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd3~0_8) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd0~0_7) (= v_~__unbuffered_cnt~0_105 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd3~0_6) (= v_~main$tmp_guard1~0_32 0) (= |v_#NULL.offset_4| 0) (= 0 (select .cse1 |v_~#y~0.base_279|)) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd1~0_6) (= 0 v_~y$read_delayed_var~0.base_8) (= v_~y$r_buff1_thd2~0_7 0) (= v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_75 0) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7) (= 0 v_~y$r_buff1_thd3~0_68) (= v_~y$r_buff0_thd4~0_75 0)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_26|, #valid=|v_#valid_88|, #memory_int=|v_#memory_int_430|, #length=|v_#length_45|} OutVars{ULTIMATE.start_main_#t~nondet55=|v_ULTIMATE.start_main_#t~nondet55_52|, ULTIMATE.start_main_~#t2162~0.offset=|v_ULTIMATE.start_main_~#t2162~0.offset_19|, ~__unbuffered_p0_EAX$r_buff0_thd1~0=v_~__unbuffered_p0_EAX$r_buff0_thd1~0_6, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_101|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_36|, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_30|, ~y$mem_tmp~0=v_~y$mem_tmp~0_92, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_280, ~__unbuffered_p0_EAX$r_buff0_thd4~0=v_~__unbuffered_p0_EAX$r_buff0_thd4~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_130, ULTIMATE.start_main_#t~nondet47=|v_ULTIMATE.start_main_#t~nondet47_32|, ~__unbuffered_p0_EAX$w_buff1~0=v_~__unbuffered_p0_EAX$w_buff1~0_8, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_62|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_40|, ~__unbuffered_p0_EAX$r_buff1_thd2~0=v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_73, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_57|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_47, ULTIMATE.start_main_#t~mem85=|v_ULTIMATE.start_main_#t~mem85_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_105, ~__unbuffered_p0_EAX$w_buff0~0=v_~__unbuffered_p0_EAX$w_buff0~0_8, ~#y~0.base=|v_~#y~0.base_279|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_32|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_41|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_30|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_198, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_208|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_39|, ULTIMATE.start_main_~#t2164~0.offset=|v_ULTIMATE.start_main_~#t2164~0.offset_31|, ~__unbuffered_p0_EAX$flush_delayed~0=v_~__unbuffered_p0_EAX$flush_delayed~0_6, ~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_80, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_9|, ~__unbuffered_p0_EAX$w_buff0_used~0=v_~__unbuffered_p0_EAX$w_buff0_used~0_8, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_31|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_75, ~__unbuffered_p0_EAX$r_buff1_thd0~0=v_~__unbuffered_p0_EAX$r_buff1_thd0~0_7, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_58|, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_75, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_30|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_86|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ULTIMATE.start_main_~#t2161~0.base=|v_ULTIMATE.start_main_~#t2161~0.base_23|, ULTIMATE.start_main_#t~mem48=|v_ULTIMATE.start_main_#t~mem48_41|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_463, ULTIMATE.start_main_#t~short84=|v_ULTIMATE.start_main_#t~short84_75|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_36|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_33|, ~__unbuffered_p0_EAX$r_buff1_thd3~0=v_~__unbuffered_p0_EAX$r_buff1_thd3~0_8, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_67|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_246|, ULTIMATE.start_main_#t~ite71=|v_ULTIMATE.start_main_#t~ite71_32|, ~weak$$choice1~0=v_~weak$$choice1~0_31, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_98, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_68, #length=|v_#length_44|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ULTIMATE.start_main_#t~mem58=|v_ULTIMATE.start_main_#t~mem58_22|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~__unbuffered_p0_EAX$r_buff0_thd0~0=v_~__unbuffered_p0_EAX$r_buff0_thd0~0_7, ~__unbuffered_p0_EAX$w_buff1_used~0=v_~__unbuffered_p0_EAX$w_buff1_used~0_8, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_31|, ULTIMATE.start_main_~#t2163~0.base=|v_ULTIMATE.start_main_~#t2163~0.base_28|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_74|, #StackHeapBarrier=|v_#StackHeapBarrier_26|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_26|, ~y$w_buff1~0=v_~y$w_buff1~0_196, ~__unbuffered_p0_EAX$mem_tmp~0=v_~__unbuffered_p0_EAX$mem_tmp~0_7, ULTIMATE.start_main_~#t2164~0.base=|v_ULTIMATE.start_main_~#t2164~0.base_34|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t2163~0.offset=|v_ULTIMATE.start_main_~#t2163~0.offset_21|, ~__unbuffered_p0_EAX$r_buff0_thd3~0=v_~__unbuffered_p0_EAX$r_buff0_thd3~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ULTIMATE.start_main_#t~mem83=|v_ULTIMATE.start_main_#t~mem83_36|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_207, ~x~0=v_~x~0_58, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~#y~0.offset=|v_~#y~0.offset_279|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_799, ULTIMATE.start_main_#t~nondet79=|v_ULTIMATE.start_main_#t~nondet79_28|, ULTIMATE.start_main_#t~nondet56=|v_ULTIMATE.start_main_#t~nondet56_52|, ULTIMATE.start_main_~#t2162~0.base=|v_ULTIMATE.start_main_~#t2162~0.base_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_43|, ~__unbuffered_p0_EAX$r_buff1_thd1~0=v_~__unbuffered_p0_EAX$r_buff1_thd1~0_7, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_75|, ~__unbuffered_p0_EAX$r_buff1_thd4~0=v_~__unbuffered_p0_EAX$r_buff1_thd4~0_8, ULTIMATE.start_main_#t~ite72=|v_ULTIMATE.start_main_#t~ite72_36|, ~y$w_buff0~0=v_~y$w_buff0~0_135, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_69, ULTIMATE.start_main_~#t2161~0.offset=|v_ULTIMATE.start_main_~#t2161~0.offset_17|, ULTIMATE.start_main_#t~mem57=|v_ULTIMATE.start_main_#t~mem57_30|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~__unbuffered_p0_EAX$r_buff0_thd2~0=v_~__unbuffered_p0_EAX$r_buff0_thd2~0_6, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_22|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_36|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_40|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_32|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_310, #memory_int=|v_#memory_int_429|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_75} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet55, ULTIMATE.start_main_~#t2162~0.offset, ~__unbuffered_p0_EAX$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite73, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~__unbuffered_p0_EAX$r_buff0_thd4~0, ~y$flush_delayed~0, ULTIMATE.start_main_#t~nondet47, ~__unbuffered_p0_EAX$w_buff1~0, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_#t~ite77, ~__unbuffered_p0_EAX$r_buff1_thd2~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ~y$r_buff1_thd4~0, ULTIMATE.start_main_#t~mem85, ~__unbuffered_cnt~0, ~__unbuffered_p0_EAX$w_buff0~0, ~#y~0.base, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite86, ULTIMATE.start_main_#t~ite74, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite70, ULTIMATE.start_main_~#t2164~0.offset, ~__unbuffered_p0_EAX$flush_delayed~0, ~__unbuffered_p0_EAX$read_delayed~0, ULTIMATE.start_main_#t~nondet46, ~__unbuffered_p0_EAX$w_buff0_used~0, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite78, ~__unbuffered_p0_EAX$read_delayed_var~0.base, ~__unbuffered_p0_EAX$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite62, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#res, #valid, ~weak$$choice2~0, ULTIMATE.start_main_~#t2161~0.base, ULTIMATE.start_main_#t~mem48, ~y$w_buff1_used~0, ULTIMATE.start_main_#t~short84, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite68, ~__unbuffered_p0_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite64, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_#t~ite71, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~mem58, ULTIMATE.start_main_#t~nondet45, ~__unbuffered_p0_EAX$r_buff0_thd0~0, ~__unbuffered_p0_EAX$w_buff1_used~0, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_~#t2163~0.base, ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~ite82, ~y$w_buff1~0, ~__unbuffered_p0_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2164~0.base, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t2163~0.offset, ~__unbuffered_p0_EAX$r_buff0_thd3~0, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~mem83, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~#y~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~nondet79, ULTIMATE.start_main_#t~nondet56, ULTIMATE.start_main_~#t2162~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ~__unbuffered_p0_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite65, ~__unbuffered_p0_EAX$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite72, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t2161~0.offset, ULTIMATE.start_main_#t~mem57, ULTIMATE.start_main_#t~nondet44, ~__unbuffered_p0_EAX$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite76, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~mem80, ~y$r_buff0_thd0~0, #memory_int, ~__unbuffered_p0_EAX$read_delayed_var~0.offset] because there is no mapped edge [2019-12-07 19:29:49,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1111] [1111] L838-1-->L840: Formula: (and (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t2162~0.base_12|)) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2162~0.base_12|) (= |v_#memory_int_329| (store |v_#memory_int_330| |v_ULTIMATE.start_main_~#t2162~0.base_12| (store (select |v_#memory_int_330| |v_ULTIMATE.start_main_~#t2162~0.base_12|) |v_ULTIMATE.start_main_~#t2162~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t2162~0.base_12|)) (= (store |v_#valid_53| |v_ULTIMATE.start_main_~#t2162~0.base_12| 1) |v_#valid_52|) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t2162~0.base_12| 4)) (= |v_ULTIMATE.start_main_~#t2162~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_330|, #length=|v_#length_30|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, ULTIMATE.start_main_~#t2162~0.offset=|v_ULTIMATE.start_main_~#t2162~0.offset_11|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_329|, ULTIMATE.start_main_~#t2162~0.base=|v_ULTIMATE.start_main_~#t2162~0.base_12|, #length=|v_#length_29|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t2162~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t2162~0.base, #length] because there is no mapped edge [2019-12-07 19:29:49,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1098] [1098] L840-1-->L842: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2163~0.base_10|) (= |v_#memory_int_257| (store |v_#memory_int_258| |v_ULTIMATE.start_main_~#t2163~0.base_10| (store (select |v_#memory_int_258| |v_ULTIMATE.start_main_~#t2163~0.base_10|) |v_ULTIMATE.start_main_~#t2163~0.offset_8| 2))) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t2163~0.base_10|) 0) (= |v_ULTIMATE.start_main_~#t2163~0.offset_8| 0) (not (= |v_ULTIMATE.start_main_~#t2163~0.base_10| 0)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2163~0.base_10| 4)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t2163~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_258|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t2163~0.offset=|v_ULTIMATE.start_main_~#t2163~0.offset_8|, #valid=|v_#valid_46|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_257|, #length=|v_#length_23|, ULTIMATE.start_main_~#t2163~0.base=|v_ULTIMATE.start_main_~#t2163~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2163~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t2163~0.base] because there is no mapped edge [2019-12-07 19:29:49,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1094] [1094] L842-1-->L844: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2164~0.offset_23|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t2164~0.base_24| 1)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t2164~0.base_24|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t2164~0.base_24|) (not (= 0 |v_ULTIMATE.start_main_~#t2164~0.base_24|)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2164~0.base_24| 4)) (= |v_#memory_int_247| (store |v_#memory_int_248| |v_ULTIMATE.start_main_~#t2164~0.base_24| (store (select |v_#memory_int_248| |v_ULTIMATE.start_main_~#t2164~0.base_24|) |v_ULTIMATE.start_main_~#t2164~0.offset_23| 3)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_248|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ULTIMATE.start_main_~#t2164~0.base=|v_ULTIMATE.start_main_~#t2164~0.base_24|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_247|, ULTIMATE.start_main_~#t2164~0.offset=|v_ULTIMATE.start_main_~#t2164~0.offset_23|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t2164~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2164~0.offset, #length] because there is no mapped edge [2019-12-07 19:29:49,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] L815-2-->L815-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In424096405 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In424096405 256)))) (or (and (= |P3Thread1of1ForFork1_#t~mem37_In424096405| |P3Thread1of1ForFork1_#t~mem37_Out424096405|) (not .cse0) (not .cse1) (= |P3Thread1of1ForFork1_#t~ite38_Out424096405| ~y$w_buff1~0_In424096405)) (and (= |P3Thread1of1ForFork1_#t~mem37_Out424096405| |P3Thread1of1ForFork1_#t~ite38_Out424096405|) (= |P3Thread1of1ForFork1_#t~mem37_Out424096405| (select (select |#memory_int_In424096405| |~#y~0.base_In424096405|) |~#y~0.offset_In424096405|)) (or .cse1 .cse0)))) InVars {P3Thread1of1ForFork1_#t~mem37=|P3Thread1of1ForFork1_#t~mem37_In424096405|, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In424096405, ~#y~0.offset=|~#y~0.offset_In424096405|, ~y$w_buff1~0=~y$w_buff1~0_In424096405, #memory_int=|#memory_int_In424096405|, ~#y~0.base=|~#y~0.base_In424096405|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In424096405} OutVars{P3Thread1of1ForFork1_#t~mem37=|P3Thread1of1ForFork1_#t~mem37_Out424096405|, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In424096405, ~#y~0.offset=|~#y~0.offset_In424096405|, ~y$w_buff1~0=~y$w_buff1~0_In424096405, P3Thread1of1ForFork1_#t~ite38=|P3Thread1of1ForFork1_#t~ite38_Out424096405|, #memory_int=|#memory_int_In424096405|, ~#y~0.base=|~#y~0.base_In424096405|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In424096405} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~mem37, P3Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 19:29:49,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1043] [1043] L759-->L760: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_112 256))) (= v_~y$r_buff0_thd1~0_149 v_~y$r_buff0_thd1~0_148)) InVars {~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_149, ~weak$$choice2~0=v_~weak$$choice2~0_112} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_112, P0Thread1of1ForFork2_#t~ite23=|v_P0Thread1of1ForFork2_#t~ite23_8|, P0Thread1of1ForFork2_#t~ite22=|v_P0Thread1of1ForFork2_#t~ite22_12|, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_15|} AuxVars[] AssignedVars[~y$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite23, P0Thread1of1ForFork2_#t~ite22, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 19:29:49,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1046] [1046] L764-->L764-2: Formula: (let ((.cse0 (= (mod ~y$flush_delayed~0_In-603916287 256) 0))) (or (and (= (select (select |#memory_int_In-603916287| |~#y~0.base_In-603916287|) |~#y~0.offset_In-603916287|) |P0Thread1of1ForFork2_#t~mem28_Out-603916287|) (= |P0Thread1of1ForFork2_#t~mem28_Out-603916287| |P0Thread1of1ForFork2_#t~ite29_Out-603916287|) .cse0) (and (= ~y$mem_tmp~0_In-603916287 |P0Thread1of1ForFork2_#t~ite29_Out-603916287|) (not .cse0) (= |P0Thread1of1ForFork2_#t~mem28_In-603916287| |P0Thread1of1ForFork2_#t~mem28_Out-603916287|)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In-603916287, ~#y~0.offset=|~#y~0.offset_In-603916287|, P0Thread1of1ForFork2_#t~mem28=|P0Thread1of1ForFork2_#t~mem28_In-603916287|, ~y$flush_delayed~0=~y$flush_delayed~0_In-603916287, #memory_int=|#memory_int_In-603916287|, ~#y~0.base=|~#y~0.base_In-603916287|} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In-603916287, P0Thread1of1ForFork2_#t~mem28=|P0Thread1of1ForFork2_#t~mem28_Out-603916287|, ~#y~0.offset=|~#y~0.offset_In-603916287|, ~y$flush_delayed~0=~y$flush_delayed~0_In-603916287, P0Thread1of1ForFork2_#t~ite29=|P0Thread1of1ForFork2_#t~ite29_Out-603916287|, #memory_int=|#memory_int_In-603916287|, ~#y~0.base=|~#y~0.base_In-603916287|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~mem28, P0Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 19:29:49,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1087] [1087] L764-2-->P0EXIT: Formula: (and (= v_~x~0_22 1) (= v_~__unbuffered_cnt~0_34 (+ v_~__unbuffered_cnt~0_35 1)) (= |v_#memory_int_235| (store |v_#memory_int_236| |v_~#y~0.base_159| (store (select |v_#memory_int_236| |v_~#y~0.base_159|) |v_~#y~0.offset_159| |v_P0Thread1of1ForFork2_#t~ite29_22|))) (= 0 v_~y$flush_delayed~0_82) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~#y~0.offset=|v_~#y~0.offset_159|, P0Thread1of1ForFork2_#t~ite29=|v_P0Thread1of1ForFork2_#t~ite29_22|, #memory_int=|v_#memory_int_236|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~#y~0.base=|v_~#y~0.base_159|} OutVars{P0Thread1of1ForFork2_#t~mem28=|v_P0Thread1of1ForFork2_#t~mem28_11|, ~#y~0.offset=|v_~#y~0.offset_159|, P0Thread1of1ForFork2_#t~ite29=|v_P0Thread1of1ForFork2_#t~ite29_21|, ~y$flush_delayed~0=v_~y$flush_delayed~0_82, #memory_int=|v_#memory_int_235|, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~#y~0.base=|v_~#y~0.base_159|, ~x~0=v_~x~0_22} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~mem28, P0Thread1of1ForFork2_#t~ite29, ~y$flush_delayed~0, #memory_int, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~x~0] because there is no mapped edge [2019-12-07 19:29:49,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1106] [1106] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork3_~arg.offset_4 |v_P1Thread1of1ForFork3_#in~arg.offset_6|) (= v_P1Thread1of1ForFork3_~arg.base_4 |v_P1Thread1of1ForFork3_#in~arg.base_6|) (= v_~x~0_28 2) (= 0 |v_P1Thread1of1ForFork3_#res.offset_3|) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= 0 |v_P1Thread1of1ForFork3_#res.base_3|)) InVars {P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_6|} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_3|, P1Thread1of1ForFork3_~arg.offset=v_P1Thread1of1ForFork3_~arg.offset_4, P1Thread1of1ForFork3_#in~arg.base=|v_P1Thread1of1ForFork3_#in~arg.base_6|, P1Thread1of1ForFork3_~arg.base=v_P1Thread1of1ForFork3_~arg.base_4, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork3_#in~arg.offset=|v_P1Thread1of1ForFork3_#in~arg.offset_6|, ~x~0=v_~x~0_28} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, P1Thread1of1ForFork3_~arg.offset, P1Thread1of1ForFork3_~arg.base, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 19:29:49,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [983] [983] L815-4-->L816: Formula: (= (store |v_#memory_int_58| |v_~#y~0.base_33| (store (select |v_#memory_int_58| |v_~#y~0.base_33|) |v_~#y~0.offset_33| |v_P3Thread1of1ForFork1_#t~ite38_12|)) |v_#memory_int_57|) InVars {~#y~0.offset=|v_~#y~0.offset_33|, P3Thread1of1ForFork1_#t~ite38=|v_P3Thread1of1ForFork1_#t~ite38_12|, #memory_int=|v_#memory_int_58|, ~#y~0.base=|v_~#y~0.base_33|} OutVars{P3Thread1of1ForFork1_#t~mem37=|v_P3Thread1of1ForFork1_#t~mem37_7|, ~#y~0.offset=|v_~#y~0.offset_33|, P3Thread1of1ForFork1_#t~ite39=|v_P3Thread1of1ForFork1_#t~ite39_11|, P3Thread1of1ForFork1_#t~ite38=|v_P3Thread1of1ForFork1_#t~ite38_11|, #memory_int=|v_#memory_int_57|, ~#y~0.base=|v_~#y~0.base_33|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~mem37, P3Thread1of1ForFork1_#t~ite39, P3Thread1of1ForFork1_#t~ite38, #memory_int] because there is no mapped edge [2019-12-07 19:29:49,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1045] [1045] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-1636077853 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1636077853 256) 0))) (or (and (= |P3Thread1of1ForFork1_#t~ite40_Out-1636077853| ~y$w_buff0_used~0_In-1636077853) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P3Thread1of1ForFork1_#t~ite40_Out-1636077853|) (not .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1636077853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1636077853} OutVars{P3Thread1of1ForFork1_#t~ite40=|P3Thread1of1ForFork1_#t~ite40_Out-1636077853|, ~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1636077853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1636077853} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 19:29:49,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1060] [1060] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd4~0_In-1606023061 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1606023061 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1606023061 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd4~0_In-1606023061 256)))) (or (and (= |P3Thread1of1ForFork1_#t~ite41_Out-1606023061| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1606023061 |P3Thread1of1ForFork1_#t~ite41_Out-1606023061|) (or .cse2 .cse3)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1606023061, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1606023061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1606023061, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1606023061} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1606023061, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1606023061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1606023061, P3Thread1of1ForFork1_#t~ite41=|P3Thread1of1ForFork1_#t~ite41_Out-1606023061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1606023061} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 19:29:49,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1044] [1044] L798-2-->L798-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1567400104 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1567400104 256)))) (or (and (= (select (select |#memory_int_In-1567400104| |~#y~0.base_In-1567400104|) |~#y~0.offset_In-1567400104|) |P2Thread1of1ForFork0_#t~mem30_Out-1567400104|) (= |P2Thread1of1ForFork0_#t~mem30_Out-1567400104| |P2Thread1of1ForFork0_#t~ite31_Out-1567400104|) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~mem30_In-1567400104| |P2Thread1of1ForFork0_#t~mem30_Out-1567400104|) (= ~y$w_buff1~0_In-1567400104 |P2Thread1of1ForFork0_#t~ite31_Out-1567400104|) (not .cse0)))) InVars {~#y~0.offset=|~#y~0.offset_In-1567400104|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1567400104, ~y$w_buff1~0=~y$w_buff1~0_In-1567400104, #memory_int=|#memory_int_In-1567400104|, ~#y~0.base=|~#y~0.base_In-1567400104|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1567400104, P2Thread1of1ForFork0_#t~mem30=|P2Thread1of1ForFork0_#t~mem30_In-1567400104|} OutVars{~#y~0.offset=|~#y~0.offset_In-1567400104|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1567400104, ~y$w_buff1~0=~y$w_buff1~0_In-1567400104, #memory_int=|#memory_int_In-1567400104|, P2Thread1of1ForFork0_#t~ite31=|P2Thread1of1ForFork0_#t~ite31_Out-1567400104|, ~#y~0.base=|~#y~0.base_In-1567400104|, P2Thread1of1ForFork0_#t~mem30=|P2Thread1of1ForFork0_#t~mem30_Out-1567400104|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1567400104} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~mem30] because there is no mapped edge [2019-12-07 19:29:49,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [993] [993] L798-4-->L799: Formula: (= (store |v_#memory_int_86| |v_~#y~0.base_51| (store (select |v_#memory_int_86| |v_~#y~0.base_51|) |v_~#y~0.offset_51| |v_P2Thread1of1ForFork0_#t~ite31_8|)) |v_#memory_int_85|) InVars {~#y~0.offset=|v_~#y~0.offset_51|, #memory_int=|v_#memory_int_86|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_8|, ~#y~0.base=|v_~#y~0.base_51|} OutVars{~#y~0.offset=|v_~#y~0.offset_51|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_11|, #memory_int=|v_#memory_int_85|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_7|, ~#y~0.base=|v_~#y~0.base_51|, P2Thread1of1ForFork0_#t~mem30=|v_P2Thread1of1ForFork0_#t~mem30_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite32, #memory_int, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~mem30] because there is no mapped edge [2019-12-07 19:29:49,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1054] [1054] L818-->L819: Formula: (let ((.cse1 (= ~y$r_buff0_thd4~0_Out-84817455 ~y$r_buff0_thd4~0_In-84817455)) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-84817455 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-84817455 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= ~y$r_buff0_thd4~0_Out-84817455 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-84817455, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84817455} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_Out-84817455, P3Thread1of1ForFork1_#t~ite42=|P3Thread1of1ForFork1_#t~ite42_Out-84817455|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84817455} AuxVars[] AssignedVars[~y$r_buff0_thd4~0, P3Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 19:29:49,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1064] [1064] L819-->L819-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1368071811 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-1368071811 256))) (.cse3 (= (mod ~y$r_buff0_thd4~0_In-1368071811 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1368071811 256)))) (or (and (= |P3Thread1of1ForFork1_#t~ite43_Out-1368071811| ~y$r_buff1_thd4~0_In-1368071811) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P3Thread1of1ForFork1_#t~ite43_Out-1368071811| 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1368071811, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1368071811, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1368071811, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1368071811} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1368071811, P3Thread1of1ForFork1_#t~ite43=|P3Thread1of1ForFork1_#t~ite43_Out-1368071811|, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1368071811, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1368071811, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1368071811} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 19:29:49,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1114] [1114] L819-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork1_#t~ite43_26| v_~y$r_buff1_thd4~0_41) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {P3Thread1of1ForFork1_#t~ite43=|v_P3Thread1of1ForFork1_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P3Thread1of1ForFork1_#t~ite43=|v_P3Thread1of1ForFork1_#t~ite43_25|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_41, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite43, ~y$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 19:29:49,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1055] [1055] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-615407435 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-615407435 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite33_Out-615407435| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite33_Out-615407435| ~y$w_buff0_used~0_In-615407435)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-615407435, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-615407435} OutVars{P2Thread1of1ForFork0_#t~ite33=|P2Thread1of1ForFork0_#t~ite33_Out-615407435|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-615407435, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-615407435} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 19:29:49,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1067] [1067] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd3~0_In1890517225 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1890517225 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1890517225 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1890517225 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite34_Out1890517225| ~y$w_buff1_used~0_In1890517225) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite34_Out1890517225|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1890517225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1890517225, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1890517225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1890517225} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1890517225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1890517225, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1890517225, P2Thread1of1ForFork0_#t~ite34=|P2Thread1of1ForFork0_#t~ite34_Out1890517225|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1890517225} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 19:29:49,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1048] [1048] L801-->L802: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In834966249 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In834966249 256))) (.cse1 (= ~y$r_buff0_thd3~0_In834966249 ~y$r_buff0_thd3~0_Out834966249))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out834966249)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In834966249, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In834966249} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In834966249, P2Thread1of1ForFork0_#t~ite35=|P2Thread1of1ForFork0_#t~ite35_Out834966249|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out834966249} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite35, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 19:29:49,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1073] [1073] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1137819855 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In1137819855 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In1137819855 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1137819855 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd3~0_In1137819855 |P2Thread1of1ForFork0_#t~ite36_Out1137819855|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite36_Out1137819855| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1137819855, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1137819855, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1137819855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1137819855} OutVars{P2Thread1of1ForFork0_#t~ite36=|P2Thread1of1ForFork0_#t~ite36_Out1137819855|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1137819855, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1137819855, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1137819855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1137819855} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 19:29:49,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1101] [1101] L802-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_20| v_~y$r_buff1_thd3~0_34) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_19|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_34, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:29:49,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1036] [1036] L844-1-->L850: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_24) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet47=|v_ULTIMATE.start_main_#t~nondet47_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet47, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:29:49,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1057] [1057] L850-2-->L850-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite50_Out1732488618| |ULTIMATE.start_main_#t~ite49_Out1732488618|)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1732488618 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1732488618 256) 0))) (or (and .cse0 (= ~y$w_buff1~0_In1732488618 |ULTIMATE.start_main_#t~ite49_Out1732488618|) (= |ULTIMATE.start_main_#t~mem48_In1732488618| |ULTIMATE.start_main_#t~mem48_Out1732488618|) (not .cse1) (not .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~mem48_Out1732488618| |ULTIMATE.start_main_#t~ite49_Out1732488618|) (= (select (select |#memory_int_In1732488618| |~#y~0.base_In1732488618|) |~#y~0.offset_In1732488618|) |ULTIMATE.start_main_#t~mem48_Out1732488618|) (or .cse1 .cse2)))) InVars {~#y~0.offset=|~#y~0.offset_In1732488618|, ~y$w_buff1~0=~y$w_buff1~0_In1732488618, #memory_int=|#memory_int_In1732488618|, ~#y~0.base=|~#y~0.base_In1732488618|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1732488618, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1732488618, ULTIMATE.start_main_#t~mem48=|ULTIMATE.start_main_#t~mem48_In1732488618|} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1732488618|, ~#y~0.offset=|~#y~0.offset_In1732488618|, ~y$w_buff1~0=~y$w_buff1~0_In1732488618, #memory_int=|#memory_int_In1732488618|, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1732488618|, ~#y~0.base=|~#y~0.base_In1732488618|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1732488618, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1732488618, ULTIMATE.start_main_#t~mem48=|ULTIMATE.start_main_#t~mem48_Out1732488618|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~mem48] because there is no mapped edge [2019-12-07 19:29:49,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1071] [1071] L851-->L851-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In236068549 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In236068549 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out236068549| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out236068549| ~y$w_buff0_used~0_In236068549) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In236068549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In236068549} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out236068549|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In236068549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In236068549} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:29:49,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1072] [1072] L852-->L852-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In-2144004908 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2144004908 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-2144004908 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-2144004908 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-2144004908| ~y$w_buff1_used~0_In-2144004908)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out-2144004908| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2144004908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2144004908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2144004908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2144004908} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2144004908|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2144004908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2144004908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2144004908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2144004908} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:29:49,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1074] [1074] L853-->L854: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-410758959 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-410758959 256))) (.cse2 (= ~y$r_buff0_thd0~0_In-410758959 ~y$r_buff0_thd0~0_Out-410758959))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd0~0_Out-410758959 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-410758959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-410758959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-410758959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_Out-410758959, ULTIMATE.start_main_#t~ite53=|ULTIMATE.start_main_#t~ite53_Out-410758959|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite53] because there is no mapped edge [2019-12-07 19:29:49,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1061] [1061] L854-->L854-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd0~0_In1862051223 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1862051223 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1862051223 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1862051223 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite54_Out1862051223|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$r_buff1_thd0~0_In1862051223 |ULTIMATE.start_main_#t~ite54_Out1862051223|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1862051223, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1862051223, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1862051223, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1862051223} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1862051223, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1862051223, ULTIMATE.start_main_#t~ite54=|ULTIMATE.start_main_#t~ite54_Out1862051223|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1862051223, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1862051223} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite54] because there is no mapped edge [2019-12-07 19:29:49,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [998] [998] L866-->L867: Formula: (and (= v_~y$r_buff0_thd0~0_89 v_~y$r_buff0_thd0~0_90) (not (= 0 (mod v_~weak$$choice2~0_59 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_90, ~weak$$choice2~0=v_~weak$$choice2~0_59} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_8|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_89, ~weak$$choice2~0=v_~weak$$choice2~0_59, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite75] because there is no mapped edge [2019-12-07 19:29:49,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L867-->L869: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_95 256))) (= |v_ULTIMATE.start_main_#t~nondet79_6| v_~weak$$choice1~0_8) (= v_~y$r_buff1_thd0~0_103 v_~y$r_buff1_thd0~0_102)) InVars {ULTIMATE.start_main_#t~nondet79=|v_ULTIMATE.start_main_#t~nondet79_6|, ~weak$$choice2~0=v_~weak$$choice2~0_95, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_103} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_8, ULTIMATE.start_main_#t~nondet79=|v_ULTIMATE.start_main_#t~nondet79_5|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_12|, ~weak$$choice2~0=v_~weak$$choice2~0_95, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_10|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_102, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_13|} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite78, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite76] because there is no mapped edge [2019-12-07 19:29:49,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1059] [1059] L869-->L869-3: Formula: (let ((.cse0 (= (mod ~weak$$choice1~0_In-1771793884 256) 0)) (.cse1 (not (= 0 (mod ~__unbuffered_p0_EAX$read_delayed~0_In-1771793884 256))))) (or (and (not .cse0) .cse1 (= (select (select |#memory_int_In-1771793884| ~__unbuffered_p0_EAX$read_delayed_var~0.base_In-1771793884) ~__unbuffered_p0_EAX$read_delayed_var~0.offset_In-1771793884) |ULTIMATE.start_main_#t~mem80_Out-1771793884|) (= |ULTIMATE.start_main_#t~mem80_Out-1771793884| |ULTIMATE.start_main_#t~ite81_Out-1771793884|)) (and .cse0 .cse1 (= |ULTIMATE.start_main_#t~ite81_Out-1771793884| ~__unbuffered_p0_EAX~0_In-1771793884) (= |ULTIMATE.start_main_#t~mem80_In-1771793884| |ULTIMATE.start_main_#t~mem80_Out-1771793884|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-1771793884, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In-1771793884, ULTIMATE.start_main_#t~mem80=|ULTIMATE.start_main_#t~mem80_In-1771793884|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In-1771793884, #memory_int=|#memory_int_In-1771793884|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In-1771793884, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In-1771793884} OutVars{~weak$$choice1~0=~weak$$choice1~0_In-1771793884, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In-1771793884, ULTIMATE.start_main_#t~ite81=|ULTIMATE.start_main_#t~ite81_Out-1771793884|, ULTIMATE.start_main_#t~mem80=|ULTIMATE.start_main_#t~mem80_Out-1771793884|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In-1771793884, #memory_int=|#memory_int_In-1771793884|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In-1771793884, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In-1771793884} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80] because there is no mapped edge [2019-12-07 19:29:49,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1000] [1000] L869-3-->L870: Formula: (let ((.cse1 (= |v_ULTIMATE.start_main_#t~ite81_10| v_~__unbuffered_p0_EAX~0_15)) (.cse0 (= 2 v_~x~0_9))) (or (and |v_ULTIMATE.start_main_#t~short84_31| .cse0 .cse1) (and .cse1 (not |v_ULTIMATE.start_main_#t~short84_31|) (not .cse0)))) InVars {ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_10|, ~x~0=v_~x~0_9} OutVars{ULTIMATE.start_main_#t~short84=|v_ULTIMATE.start_main_#t~short84_31|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_15, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_7|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_9|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_6|, ~x~0=v_~x~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~short84, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80] because there is no mapped edge [2019-12-07 19:29:49,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1069] [1069] L871-->L871-2: Formula: (let ((.cse0 (= (mod ~y$flush_delayed~0_In203525051 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite86_Out203525051| ~y$mem_tmp~0_In203525051) (= |ULTIMATE.start_main_#t~mem85_In203525051| |ULTIMATE.start_main_#t~mem85_Out203525051|)) (and .cse0 (= |ULTIMATE.start_main_#t~ite86_Out203525051| |ULTIMATE.start_main_#t~mem85_Out203525051|) (= |ULTIMATE.start_main_#t~mem85_Out203525051| (select (select |#memory_int_In203525051| |~#y~0.base_In203525051|) |~#y~0.offset_In203525051|))))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In203525051, ~#y~0.offset=|~#y~0.offset_In203525051|, ~y$flush_delayed~0=~y$flush_delayed~0_In203525051, #memory_int=|#memory_int_In203525051|, ULTIMATE.start_main_#t~mem85=|ULTIMATE.start_main_#t~mem85_In203525051|, ~#y~0.base=|~#y~0.base_In203525051|} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In203525051, ~#y~0.offset=|~#y~0.offset_In203525051|, ~y$flush_delayed~0=~y$flush_delayed~0_In203525051, #memory_int=|#memory_int_In203525051|, ULTIMATE.start_main_#t~mem85=|ULTIMATE.start_main_#t~mem85_Out203525051|, ~#y~0.base=|~#y~0.base_In203525051|, ULTIMATE.start_main_#t~ite86=|ULTIMATE.start_main_#t~ite86_Out203525051|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem85, ULTIMATE.start_main_#t~ite86] because there is no mapped edge [2019-12-07 19:29:49,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1091] [1091] L871-2-->L874-1: Formula: (and (= |v_#memory_int_243| (store |v_#memory_int_244| |v_~#y~0.base_164| (store (select |v_#memory_int_244| |v_~#y~0.base_164|) |v_~#y~0.offset_164| |v_ULTIMATE.start_main_#t~ite86_24|))) (= 0 v_~y$flush_delayed~0_87) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_10 256))) InVars {~#y~0.offset=|v_~#y~0.offset_164|, #memory_int=|v_#memory_int_244|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~#y~0.base=|v_~#y~0.base_164|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_24|} OutVars{~#y~0.offset=|v_~#y~0.offset_164|, ~y$flush_delayed~0=v_~y$flush_delayed~0_87, #memory_int=|v_#memory_int_243|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ULTIMATE.start_main_#t~mem85=|v_ULTIMATE.start_main_#t~mem85_13|, ~#y~0.base=|v_~#y~0.base_164|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_23|} AuxVars[] AssignedVars[~y$flush_delayed~0, #memory_int, ULTIMATE.start_main_#t~mem85, ULTIMATE.start___VERIFIER_assert_#in~expression, ULTIMATE.start_main_#t~ite86] because there is no mapped edge [2019-12-07 19:29:49,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1103] [1103] L874-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:29:49,568 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b940dd3e-3ef6-41df-a237-60d932914348/bin/utaipan/witness.graphml [2019-12-07 19:29:49,568 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:29:49,569 INFO L168 Benchmark]: Toolchain (without parser) took 447875.10 ms. Allocated memory was 1.0 GB in the beginning and 11.5 GB in the end (delta: 10.4 GB). Free memory was 939.8 MB in the beginning and 6.9 GB in the end (delta: -6.0 GB). Peak memory consumption was 5.9 GB. Max. memory is 11.5 GB. [2019-12-07 19:29:49,569 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:29:49,569 INFO L168 Benchmark]: CACSL2BoogieTranslator took 389.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -120.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 19:29:49,569 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:29:49,569 INFO L168 Benchmark]: Boogie Preprocessor took 29.91 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:29:49,570 INFO L168 Benchmark]: RCFGBuilder took 487.27 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 983.1 MB in the end (delta: 71.3 MB). Peak memory consumption was 71.3 MB. Max. memory is 11.5 GB. [2019-12-07 19:29:49,570 INFO L168 Benchmark]: TraceAbstraction took 446822.95 ms. Allocated memory was 1.1 GB in the beginning and 10.0 GB in the end (delta: 8.9 GB). Free memory was 983.1 MB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. [2019-12-07 19:29:49,570 INFO L168 Benchmark]: Witness Printer took 102.04 ms. Allocated memory was 10.0 GB in the beginning and 11.5 GB in the end (delta: 1.4 GB). Free memory was 4.1 GB in the beginning and 6.9 GB in the end (delta: -2.8 GB). Peak memory consumption was 8.2 kB. Max. memory is 11.5 GB. [2019-12-07 19:29:49,571 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 389.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -120.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 29.91 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 487.27 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 983.1 MB in the end (delta: 71.3 MB). Peak memory consumption was 71.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 446822.95 ms. Allocated memory was 1.1 GB in the beginning and 10.0 GB in the end (delta: 8.9 GB). Free memory was 983.1 MB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. * Witness Printer took 102.04 ms. Allocated memory was 10.0 GB in the beginning and 11.5 GB in the end (delta: 1.4 GB). Free memory was 4.1 GB in the beginning and 6.9 GB in the end (delta: -2.8 GB). Peak memory consumption was 8.2 kB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.8s, 241 ProgramPointsBefore, 122 ProgramPointsAfterwards, 292 TransitionsBefore, 141 TransitionsAfterwards, 33294 CoEnabledTransitionPairs, 9 FixpointIterations, 53 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 60 ConcurrentYvCompositions, 37 ChoiceCompositions, 13635 VarBasedMoverChecksPositive, 278 VarBasedMoverChecksNegative, 20 SemBasedMoverChecksPositive, 362 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 201417 CheckedPairsTotal, 160 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L838] FCALL, FORK 0 pthread_create(&t2161, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L750] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L751] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L752] 1 y$flush_delayed = weak$$choice2 [L753] EXPR 1 \read(y) [L753] 1 y$mem_tmp = y [L754] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L754] EXPR 1 \read(y) [L754] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L754] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L840] FCALL, FORK 0 pthread_create(&t2162, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L842] FCALL, FORK 0 pthread_create(&t2163, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L844] FCALL, FORK 0 pthread_create(&t2164, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L756] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L757] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L812] 4 y = 2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L815] 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L758] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [\read(y)=2, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y=2] [L758] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L760] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [\read(y)=2, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y=2] [L760] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L761] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L762] 1 __unbuffered_p0_EAX$read_delayed_var = &y [L763] EXPR 1 \read(y) [L763] 1 __unbuffered_p0_EAX = y [L792] 3 __unbuffered_p2_EAX = x [L795] 3 y = 1 VAL [\read(y)=2, \result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y=2] [L816] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L817] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L798] 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L800] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L850] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L850] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L851] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L852] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L854] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L857] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L858] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L859] 0 y$flush_delayed = weak$$choice2 [L860] EXPR 0 \read(y) [L860] 0 y$mem_tmp = y [L861] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L861] EXPR 0 \read(y) [L861] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L861] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L862] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L862] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L863] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L863] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L864] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L864] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L865] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L865] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L870] EXPR 0 x == 2 && y == 2 [L870] EXPR 0 \read(y) [L870] EXPR 0 x == 2 && y == 2 VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={6:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x=2, y={6:0}, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L870] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p0_EAX == 2 && __unbuffered_p2_EAX == 2) - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 229 locations, 1 error locations. Result: UNSAFE, OverallTime: 446.6s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 29.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3147 SDtfs, 3268 SDslu, 7746 SDs, 0 SdLazy, 2414 SolverSat, 114 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 153 GetRequests, 32 SyntacticMatches, 13 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=515000occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 193.9s AutomataMinimizationTime, 18 MinimizatonAttempts, 25794 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 1187 NumberOfCodeBlocks, 1187 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 1092 ConstructedInterpolants, 0 QuantifiedInterpolants, 295752 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...