./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe017_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe017_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1cc00d91a541289138f2f75d8b0086a71097655d .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:11:24,435 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:11:24,437 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:11:24,445 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:11:24,446 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:11:24,446 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:11:24,447 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:11:24,449 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:11:24,451 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:11:24,452 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:11:24,452 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:11:24,453 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:11:24,454 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:11:24,455 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:11:24,455 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:11:24,457 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:11:24,457 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:11:24,458 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:11:24,460 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:11:24,462 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:11:24,463 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:11:24,464 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:11:24,465 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:11:24,466 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:11:24,468 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:11:24,468 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:11:24,468 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:11:24,469 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:11:24,469 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:11:24,470 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:11:24,470 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:11:24,471 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:11:24,471 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:11:24,472 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:11:24,472 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:11:24,473 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:11:24,473 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:11:24,473 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:11:24,473 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:11:24,474 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:11:24,475 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:11:24,475 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 14:11:24,487 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:11:24,487 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:11:24,488 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 14:11:24,488 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 14:11:24,488 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 14:11:24,488 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 14:11:24,488 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 14:11:24,488 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 14:11:24,488 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 14:11:24,488 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 14:11:24,489 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 14:11:24,489 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 14:11:24,489 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 14:11:24,489 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 14:11:24,489 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 14:11:24,490 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:11:24,490 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:11:24,490 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:11:24,490 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:11:24,490 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:11:24,491 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:11:24,492 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:11:24,492 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:11:24,492 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:11:24,492 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:11:24,492 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 14:11:24,493 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1cc00d91a541289138f2f75d8b0086a71097655d [2019-12-07 14:11:24,602 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:11:24,612 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:11:24,615 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:11:24,616 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:11:24,617 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:11:24,617 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe017_pso.oepc.i [2019-12-07 14:11:24,653 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/data/dc769e0a6/37d88cecd6fb40f088005ef465739dbb/FLAG63b8d4fb1 [2019-12-07 14:11:25,123 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:11:25,124 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/sv-benchmarks/c/pthread-wmm/safe017_pso.oepc.i [2019-12-07 14:11:25,135 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/data/dc769e0a6/37d88cecd6fb40f088005ef465739dbb/FLAG63b8d4fb1 [2019-12-07 14:11:25,638 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/data/dc769e0a6/37d88cecd6fb40f088005ef465739dbb [2019-12-07 14:11:25,641 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:11:25,642 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:11:25,643 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:11:25,643 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:11:25,645 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:11:25,646 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:11:25" (1/1) ... [2019-12-07 14:11:25,648 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4060fd46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:25, skipping insertion in model container [2019-12-07 14:11:25,648 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:11:25" (1/1) ... [2019-12-07 14:11:25,653 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:11:25,681 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:11:25,926 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:11:25,934 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:11:25,978 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:11:26,025 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:11:26,025 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26 WrapperNode [2019-12-07 14:11:26,025 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:11:26,026 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:11:26,026 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:11:26,026 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:11:26,032 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,046 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,068 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:11:26,068 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:11:26,068 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:11:26,068 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:11:26,075 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,075 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,078 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,078 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,085 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,088 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,091 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... [2019-12-07 14:11:26,094 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:11:26,094 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:11:26,094 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:11:26,095 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:11:26,095 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:11:26,138 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:11:26,138 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:11:26,138 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:11:26,138 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:11:26,138 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:11:26,138 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:11:26,138 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:11:26,138 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:11:26,138 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:11:26,139 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:11:26,139 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:11:26,139 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:11:26,139 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:11:26,140 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:11:26,500 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:11:26,500 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:11:26,501 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:11:26 BoogieIcfgContainer [2019-12-07 14:11:26,501 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:11:26,502 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:11:26,502 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:11:26,504 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:11:26,504 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:11:25" (1/3) ... [2019-12-07 14:11:26,505 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@32c94f6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:11:26, skipping insertion in model container [2019-12-07 14:11:26,505 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:11:26" (2/3) ... [2019-12-07 14:11:26,505 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@32c94f6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:11:26, skipping insertion in model container [2019-12-07 14:11:26,505 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:11:26" (3/3) ... [2019-12-07 14:11:26,506 INFO L109 eAbstractionObserver]: Analyzing ICFG safe017_pso.oepc.i [2019-12-07 14:11:26,513 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:11:26,513 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:11:26,519 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:11:26,520 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:11:26,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,547 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,547 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,547 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,547 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,548 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,552 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,553 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,553 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,553 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,558 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,558 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:11:26,577 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:11:26,590 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:11:26,591 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:11:26,591 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:11:26,591 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:11:26,591 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:11:26,591 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:11:26,591 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:11:26,591 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:11:26,604 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 173 places, 210 transitions [2019-12-07 14:11:26,605 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 14:11:26,658 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 14:11:26,658 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:11:26,668 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:11:26,683 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 14:11:26,710 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 14:11:26,710 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:11:26,715 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:11:26,728 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 14:11:26,729 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:11:29,531 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 14:11:29,612 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78185 [2019-12-07 14:11:29,612 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 14:11:29,615 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 14:11:42,383 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 112926 states. [2019-12-07 14:11:42,384 INFO L276 IsEmpty]: Start isEmpty. Operand 112926 states. [2019-12-07 14:11:42,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:11:42,388 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:11:42,388 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:11:42,389 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:11:42,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:11:42,393 INFO L82 PathProgramCache]: Analyzing trace with hash 844394, now seen corresponding path program 1 times [2019-12-07 14:11:42,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:11:42,398 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174564339] [2019-12-07 14:11:42,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:11:42,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:11:42,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:11:42,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [174564339] [2019-12-07 14:11:42,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:11:42,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:11:42,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1767934354] [2019-12-07 14:11:42,543 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:11:42,543 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:11:42,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:11:42,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:11:42,554 INFO L87 Difference]: Start difference. First operand 112926 states. Second operand 3 states. [2019-12-07 14:11:43,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:11:43,254 INFO L93 Difference]: Finished difference Result 112536 states and 479624 transitions. [2019-12-07 14:11:43,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:11:43,255 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:11:43,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:11:43,781 INFO L225 Difference]: With dead ends: 112536 [2019-12-07 14:11:43,781 INFO L226 Difference]: Without dead ends: 110184 [2019-12-07 14:11:43,782 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:11:48,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110184 states. [2019-12-07 14:11:49,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110184 to 110184. [2019-12-07 14:11:49,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110184 states. [2019-12-07 14:11:50,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110184 states to 110184 states and 470020 transitions. [2019-12-07 14:11:50,461 INFO L78 Accepts]: Start accepts. Automaton has 110184 states and 470020 transitions. Word has length 3 [2019-12-07 14:11:50,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:11:50,462 INFO L462 AbstractCegarLoop]: Abstraction has 110184 states and 470020 transitions. [2019-12-07 14:11:50,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:11:50,462 INFO L276 IsEmpty]: Start isEmpty. Operand 110184 states and 470020 transitions. [2019-12-07 14:11:50,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:11:50,465 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:11:50,465 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:11:50,465 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:11:50,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:11:50,466 INFO L82 PathProgramCache]: Analyzing trace with hash -418531443, now seen corresponding path program 1 times [2019-12-07 14:11:50,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:11:50,466 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744985401] [2019-12-07 14:11:50,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:11:50,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:11:50,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:11:50,526 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744985401] [2019-12-07 14:11:50,526 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:11:50,526 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:11:50,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990185524] [2019-12-07 14:11:50,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:11:50,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:11:50,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:11:50,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:11:50,528 INFO L87 Difference]: Start difference. First operand 110184 states and 470020 transitions. Second operand 4 states. [2019-12-07 14:11:51,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:11:51,408 INFO L93 Difference]: Finished difference Result 172298 states and 706272 transitions. [2019-12-07 14:11:51,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:11:51,409 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:11:51,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:11:51,834 INFO L225 Difference]: With dead ends: 172298 [2019-12-07 14:11:51,834 INFO L226 Difference]: Without dead ends: 172249 [2019-12-07 14:11:51,835 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:11:56,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172249 states. [2019-12-07 14:11:59,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172249 to 156321. [2019-12-07 14:11:59,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156321 states. [2019-12-07 14:12:00,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156321 states to 156321 states and 647667 transitions. [2019-12-07 14:12:00,279 INFO L78 Accepts]: Start accepts. Automaton has 156321 states and 647667 transitions. Word has length 11 [2019-12-07 14:12:00,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:12:00,279 INFO L462 AbstractCegarLoop]: Abstraction has 156321 states and 647667 transitions. [2019-12-07 14:12:00,280 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:12:00,280 INFO L276 IsEmpty]: Start isEmpty. Operand 156321 states and 647667 transitions. [2019-12-07 14:12:00,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:12:00,283 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:12:00,283 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:12:00,284 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:12:00,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:12:00,284 INFO L82 PathProgramCache]: Analyzing trace with hash -986312255, now seen corresponding path program 1 times [2019-12-07 14:12:00,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:12:00,284 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884400489] [2019-12-07 14:12:00,284 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:12:00,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:12:00,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:12:00,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884400489] [2019-12-07 14:12:00,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:12:00,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:12:00,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535836076] [2019-12-07 14:12:00,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:12:00,334 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:12:00,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:12:00,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:12:00,334 INFO L87 Difference]: Start difference. First operand 156321 states and 647667 transitions. Second operand 4 states. [2019-12-07 14:12:01,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:12:01,534 INFO L93 Difference]: Finished difference Result 198223 states and 807102 transitions. [2019-12-07 14:12:01,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:12:01,535 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:12:01,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:12:02,032 INFO L225 Difference]: With dead ends: 198223 [2019-12-07 14:12:02,033 INFO L226 Difference]: Without dead ends: 198223 [2019-12-07 14:12:02,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:12:06,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198223 states. [2019-12-07 14:12:09,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198223 to 177721. [2019-12-07 14:12:09,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177721 states. [2019-12-07 14:12:09,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177721 states to 177721 states and 730453 transitions. [2019-12-07 14:12:09,743 INFO L78 Accepts]: Start accepts. Automaton has 177721 states and 730453 transitions. Word has length 13 [2019-12-07 14:12:09,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:12:09,744 INFO L462 AbstractCegarLoop]: Abstraction has 177721 states and 730453 transitions. [2019-12-07 14:12:09,744 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:12:09,744 INFO L276 IsEmpty]: Start isEmpty. Operand 177721 states and 730453 transitions. [2019-12-07 14:12:09,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:12:09,746 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:12:09,746 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:12:09,746 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:12:09,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:12:09,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1176456771, now seen corresponding path program 1 times [2019-12-07 14:12:09,747 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:12:09,747 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1848071454] [2019-12-07 14:12:09,747 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:12:09,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:12:09,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:12:09,792 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1848071454] [2019-12-07 14:12:09,792 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:12:09,792 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:12:09,792 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494764471] [2019-12-07 14:12:09,792 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:12:09,792 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:12:09,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:12:09,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:12:09,793 INFO L87 Difference]: Start difference. First operand 177721 states and 730453 transitions. Second operand 4 states. [2019-12-07 14:12:10,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:12:10,942 INFO L93 Difference]: Finished difference Result 245470 states and 990922 transitions. [2019-12-07 14:12:10,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:12:10,943 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:12:10,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:12:11,546 INFO L225 Difference]: With dead ends: 245470 [2019-12-07 14:12:11,546 INFO L226 Difference]: Without dead ends: 245407 [2019-12-07 14:12:11,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:12:18,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245407 states. [2019-12-07 14:12:21,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245407 to 199120. [2019-12-07 14:12:21,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199120 states. [2019-12-07 14:12:22,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199120 states to 199120 states and 817885 transitions. [2019-12-07 14:12:22,209 INFO L78 Accepts]: Start accepts. Automaton has 199120 states and 817885 transitions. Word has length 13 [2019-12-07 14:12:22,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:12:22,209 INFO L462 AbstractCegarLoop]: Abstraction has 199120 states and 817885 transitions. [2019-12-07 14:12:22,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:12:22,209 INFO L276 IsEmpty]: Start isEmpty. Operand 199120 states and 817885 transitions. [2019-12-07 14:12:22,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:12:22,227 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:12:22,228 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:12:22,228 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:12:22,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:12:22,228 INFO L82 PathProgramCache]: Analyzing trace with hash -1822366328, now seen corresponding path program 1 times [2019-12-07 14:12:22,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:12:22,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193357264] [2019-12-07 14:12:22,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:12:22,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:12:22,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:12:22,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193357264] [2019-12-07 14:12:22,279 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:12:22,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:12:22,279 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847510593] [2019-12-07 14:12:22,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:12:22,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:12:22,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:12:22,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:12:22,280 INFO L87 Difference]: Start difference. First operand 199120 states and 817885 transitions. Second operand 5 states. [2019-12-07 14:12:24,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:12:24,124 INFO L93 Difference]: Finished difference Result 293007 states and 1175742 transitions. [2019-12-07 14:12:24,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:12:24,125 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:12:24,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:12:24,846 INFO L225 Difference]: With dead ends: 293007 [2019-12-07 14:12:24,846 INFO L226 Difference]: Without dead ends: 292944 [2019-12-07 14:12:24,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:12:30,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292944 states. [2019-12-07 14:12:36,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292944 to 209496. [2019-12-07 14:12:36,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209496 states. [2019-12-07 14:12:37,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209496 states to 209496 states and 856138 transitions. [2019-12-07 14:12:37,264 INFO L78 Accepts]: Start accepts. Automaton has 209496 states and 856138 transitions. Word has length 19 [2019-12-07 14:12:37,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:12:37,264 INFO L462 AbstractCegarLoop]: Abstraction has 209496 states and 856138 transitions. [2019-12-07 14:12:37,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:12:37,264 INFO L276 IsEmpty]: Start isEmpty. Operand 209496 states and 856138 transitions. [2019-12-07 14:12:37,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:12:37,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:12:37,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:12:37,276 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:12:37,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:12:37,276 INFO L82 PathProgramCache]: Analyzing trace with hash -2012510844, now seen corresponding path program 1 times [2019-12-07 14:12:37,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:12:37,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337375774] [2019-12-07 14:12:37,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:12:37,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:12:37,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:12:37,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1337375774] [2019-12-07 14:12:37,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:12:37,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:12:37,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602739438] [2019-12-07 14:12:37,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:12:37,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:12:37,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:12:37,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:12:37,330 INFO L87 Difference]: Start difference. First operand 209496 states and 856138 transitions. Second operand 5 states. [2019-12-07 14:12:38,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:12:38,878 INFO L93 Difference]: Finished difference Result 317773 states and 1271331 transitions. [2019-12-07 14:12:38,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:12:38,879 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:12:38,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:12:40,201 INFO L225 Difference]: With dead ends: 317773 [2019-12-07 14:12:40,201 INFO L226 Difference]: Without dead ends: 317626 [2019-12-07 14:12:40,201 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:12:46,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317626 states. [2019-12-07 14:12:49,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317626 to 221774. [2019-12-07 14:12:49,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221774 states. [2019-12-07 14:12:50,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221774 states to 221774 states and 905581 transitions. [2019-12-07 14:12:50,314 INFO L78 Accepts]: Start accepts. Automaton has 221774 states and 905581 transitions. Word has length 19 [2019-12-07 14:12:50,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:12:50,314 INFO L462 AbstractCegarLoop]: Abstraction has 221774 states and 905581 transitions. [2019-12-07 14:12:50,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:12:50,314 INFO L276 IsEmpty]: Start isEmpty. Operand 221774 states and 905581 transitions. [2019-12-07 14:12:50,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:12:50,327 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:12:50,327 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:12:50,327 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:12:50,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:12:50,327 INFO L82 PathProgramCache]: Analyzing trace with hash 582667357, now seen corresponding path program 1 times [2019-12-07 14:12:50,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:12:50,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896981730] [2019-12-07 14:12:50,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:12:50,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:12:50,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:12:50,370 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896981730] [2019-12-07 14:12:50,370 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:12:50,370 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:12:50,370 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134423875] [2019-12-07 14:12:50,371 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:12:50,371 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:12:50,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:12:50,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:12:50,371 INFO L87 Difference]: Start difference. First operand 221774 states and 905581 transitions. Second operand 5 states. [2019-12-07 14:12:54,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:12:54,353 INFO L93 Difference]: Finished difference Result 321222 states and 1287889 transitions. [2019-12-07 14:12:54,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:12:54,354 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:12:54,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:12:55,168 INFO L225 Difference]: With dead ends: 321222 [2019-12-07 14:12:55,168 INFO L226 Difference]: Without dead ends: 321159 [2019-12-07 14:12:55,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:13:01,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321159 states. [2019-12-07 14:13:04,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321159 to 239204. [2019-12-07 14:13:04,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239204 states. [2019-12-07 14:13:05,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239204 states to 239204 states and 975197 transitions. [2019-12-07 14:13:05,432 INFO L78 Accepts]: Start accepts. Automaton has 239204 states and 975197 transitions. Word has length 19 [2019-12-07 14:13:05,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:05,432 INFO L462 AbstractCegarLoop]: Abstraction has 239204 states and 975197 transitions. [2019-12-07 14:13:05,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:13:05,432 INFO L276 IsEmpty]: Start isEmpty. Operand 239204 states and 975197 transitions. [2019-12-07 14:13:05,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:13:05,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:05,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:05,488 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:05,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:05,488 INFO L82 PathProgramCache]: Analyzing trace with hash 187920100, now seen corresponding path program 1 times [2019-12-07 14:13:05,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:05,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47229706] [2019-12-07 14:13:05,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:05,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:05,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:05,514 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47229706] [2019-12-07 14:13:05,514 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:05,515 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:13:05,515 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591649767] [2019-12-07 14:13:05,515 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:13:05,515 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:05,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:13:05,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:05,516 INFO L87 Difference]: Start difference. First operand 239204 states and 975197 transitions. Second operand 3 states. [2019-12-07 14:13:05,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:05,636 INFO L93 Difference]: Finished difference Result 43905 states and 139903 transitions. [2019-12-07 14:13:05,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:13:05,636 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 14:13:05,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:05,695 INFO L225 Difference]: With dead ends: 43905 [2019-12-07 14:13:05,695 INFO L226 Difference]: Without dead ends: 43905 [2019-12-07 14:13:05,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:05,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43905 states. [2019-12-07 14:13:06,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43905 to 43905. [2019-12-07 14:13:06,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43905 states. [2019-12-07 14:13:06,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43905 states to 43905 states and 139903 transitions. [2019-12-07 14:13:06,335 INFO L78 Accepts]: Start accepts. Automaton has 43905 states and 139903 transitions. Word has length 25 [2019-12-07 14:13:06,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:06,335 INFO L462 AbstractCegarLoop]: Abstraction has 43905 states and 139903 transitions. [2019-12-07 14:13:06,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:13:06,336 INFO L276 IsEmpty]: Start isEmpty. Operand 43905 states and 139903 transitions. [2019-12-07 14:13:06,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 14:13:06,348 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:06,348 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:06,348 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:06,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:06,349 INFO L82 PathProgramCache]: Analyzing trace with hash 2059164286, now seen corresponding path program 1 times [2019-12-07 14:13:06,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:06,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565551973] [2019-12-07 14:13:06,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:06,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:06,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:06,402 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565551973] [2019-12-07 14:13:06,402 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:06,402 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:13:06,402 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [408315199] [2019-12-07 14:13:06,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:13:06,403 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:06,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:13:06,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:13:06,403 INFO L87 Difference]: Start difference. First operand 43905 states and 139903 transitions. Second operand 6 states. [2019-12-07 14:13:07,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:07,042 INFO L93 Difference]: Finished difference Result 54323 states and 170954 transitions. [2019-12-07 14:13:07,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 14:13:07,042 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 14:13:07,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:07,120 INFO L225 Difference]: With dead ends: 54323 [2019-12-07 14:13:07,120 INFO L226 Difference]: Without dead ends: 54310 [2019-12-07 14:13:07,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:13:07,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54310 states. [2019-12-07 14:13:08,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54310 to 40605. [2019-12-07 14:13:08,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40605 states. [2019-12-07 14:13:08,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40605 states to 40605 states and 130023 transitions. [2019-12-07 14:13:08,170 INFO L78 Accepts]: Start accepts. Automaton has 40605 states and 130023 transitions. Word has length 31 [2019-12-07 14:13:08,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:08,170 INFO L462 AbstractCegarLoop]: Abstraction has 40605 states and 130023 transitions. [2019-12-07 14:13:08,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:13:08,170 INFO L276 IsEmpty]: Start isEmpty. Operand 40605 states and 130023 transitions. [2019-12-07 14:13:08,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 14:13:08,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:08,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:08,188 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:08,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:08,188 INFO L82 PathProgramCache]: Analyzing trace with hash 1388376233, now seen corresponding path program 1 times [2019-12-07 14:13:08,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:08,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001460822] [2019-12-07 14:13:08,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:08,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:08,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:08,258 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001460822] [2019-12-07 14:13:08,258 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:08,258 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:13:08,258 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828498902] [2019-12-07 14:13:08,259 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:13:08,259 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:08,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:13:08,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:13:08,259 INFO L87 Difference]: Start difference. First operand 40605 states and 130023 transitions. Second operand 7 states. [2019-12-07 14:13:08,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:08,773 INFO L93 Difference]: Finished difference Result 58436 states and 183037 transitions. [2019-12-07 14:13:08,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:13:08,774 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 14:13:08,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:08,853 INFO L225 Difference]: With dead ends: 58436 [2019-12-07 14:13:08,853 INFO L226 Difference]: Without dead ends: 58408 [2019-12-07 14:13:08,853 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:13:09,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58408 states. [2019-12-07 14:13:09,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58408 to 51886. [2019-12-07 14:13:09,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51886 states. [2019-12-07 14:13:09,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51886 states to 51886 states and 163749 transitions. [2019-12-07 14:13:09,684 INFO L78 Accepts]: Start accepts. Automaton has 51886 states and 163749 transitions. Word has length 39 [2019-12-07 14:13:09,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:09,684 INFO L462 AbstractCegarLoop]: Abstraction has 51886 states and 163749 transitions. [2019-12-07 14:13:09,684 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:13:09,684 INFO L276 IsEmpty]: Start isEmpty. Operand 51886 states and 163749 transitions. [2019-12-07 14:13:09,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 14:13:09,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:09,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:09,705 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:09,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:09,705 INFO L82 PathProgramCache]: Analyzing trace with hash -1127558066, now seen corresponding path program 1 times [2019-12-07 14:13:09,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:09,705 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154323566] [2019-12-07 14:13:09,705 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:09,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:09,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:09,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154323566] [2019-12-07 14:13:09,760 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:09,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:13:09,760 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [918211836] [2019-12-07 14:13:09,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:13:09,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:09,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:13:09,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:13:09,760 INFO L87 Difference]: Start difference. First operand 51886 states and 163749 transitions. Second operand 7 states. [2019-12-07 14:13:10,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:10,798 INFO L93 Difference]: Finished difference Result 70067 states and 218058 transitions. [2019-12-07 14:13:10,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:13:10,799 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 14:13:10,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:10,890 INFO L225 Difference]: With dead ends: 70067 [2019-12-07 14:13:10,890 INFO L226 Difference]: Without dead ends: 70039 [2019-12-07 14:13:10,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:13:11,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70039 states. [2019-12-07 14:13:11,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70039 to 55777. [2019-12-07 14:13:11,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55777 states. [2019-12-07 14:13:11,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55777 states to 55777 states and 175822 transitions. [2019-12-07 14:13:11,814 INFO L78 Accepts]: Start accepts. Automaton has 55777 states and 175822 transitions. Word has length 39 [2019-12-07 14:13:11,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:11,815 INFO L462 AbstractCegarLoop]: Abstraction has 55777 states and 175822 transitions. [2019-12-07 14:13:11,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:13:11,815 INFO L276 IsEmpty]: Start isEmpty. Operand 55777 states and 175822 transitions. [2019-12-07 14:13:11,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 14:13:11,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:11,847 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:11,847 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:11,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:11,847 INFO L82 PathProgramCache]: Analyzing trace with hash -305557997, now seen corresponding path program 1 times [2019-12-07 14:13:11,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:11,847 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690079309] [2019-12-07 14:13:11,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:11,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:11,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:11,876 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690079309] [2019-12-07 14:13:11,876 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:11,876 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:13:11,876 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613273627] [2019-12-07 14:13:11,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:13:11,876 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:11,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:13:11,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:11,877 INFO L87 Difference]: Start difference. First operand 55777 states and 175822 transitions. Second operand 3 states. [2019-12-07 14:13:12,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:12,075 INFO L93 Difference]: Finished difference Result 66297 states and 209748 transitions. [2019-12-07 14:13:12,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:13:12,076 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 14:13:12,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:12,173 INFO L225 Difference]: With dead ends: 66297 [2019-12-07 14:13:12,173 INFO L226 Difference]: Without dead ends: 66297 [2019-12-07 14:13:12,173 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:12,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66297 states. [2019-12-07 14:13:13,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66297 to 57725. [2019-12-07 14:13:13,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57725 states. [2019-12-07 14:13:13,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57725 states to 57725 states and 183852 transitions. [2019-12-07 14:13:13,159 INFO L78 Accepts]: Start accepts. Automaton has 57725 states and 183852 transitions. Word has length 43 [2019-12-07 14:13:13,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:13,160 INFO L462 AbstractCegarLoop]: Abstraction has 57725 states and 183852 transitions. [2019-12-07 14:13:13,160 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:13:13,160 INFO L276 IsEmpty]: Start isEmpty. Operand 57725 states and 183852 transitions. [2019-12-07 14:13:13,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 14:13:13,190 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:13,190 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:13,190 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:13,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:13,190 INFO L82 PathProgramCache]: Analyzing trace with hash 152559268, now seen corresponding path program 1 times [2019-12-07 14:13:13,191 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:13,191 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110363843] [2019-12-07 14:13:13,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:13,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:13,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:13,250 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110363843] [2019-12-07 14:13:13,250 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:13,250 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:13:13,250 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486950979] [2019-12-07 14:13:13,251 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:13:13,251 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:13,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:13:13,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:13:13,251 INFO L87 Difference]: Start difference. First operand 57725 states and 183852 transitions. Second operand 5 states. [2019-12-07 14:13:13,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:13,760 INFO L93 Difference]: Finished difference Result 77492 states and 244109 transitions. [2019-12-07 14:13:13,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:13:13,760 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-12-07 14:13:13,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:13,863 INFO L225 Difference]: With dead ends: 77492 [2019-12-07 14:13:13,864 INFO L226 Difference]: Without dead ends: 77492 [2019-12-07 14:13:13,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:13:14,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77492 states. [2019-12-07 14:13:14,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77492 to 68509. [2019-12-07 14:13:14,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68509 states. [2019-12-07 14:13:14,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68509 states to 68509 states and 217346 transitions. [2019-12-07 14:13:14,959 INFO L78 Accepts]: Start accepts. Automaton has 68509 states and 217346 transitions. Word has length 43 [2019-12-07 14:13:14,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:14,960 INFO L462 AbstractCegarLoop]: Abstraction has 68509 states and 217346 transitions. [2019-12-07 14:13:14,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:13:14,960 INFO L276 IsEmpty]: Start isEmpty. Operand 68509 states and 217346 transitions. [2019-12-07 14:13:14,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 14:13:15,000 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:15,000 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:15,000 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:15,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:15,000 INFO L82 PathProgramCache]: Analyzing trace with hash 1796258473, now seen corresponding path program 1 times [2019-12-07 14:13:15,000 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:15,001 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1946971093] [2019-12-07 14:13:15,001 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:15,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:15,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:15,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1946971093] [2019-12-07 14:13:15,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:15,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:13:15,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013101584] [2019-12-07 14:13:15,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:13:15,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:15,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:13:15,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:13:15,054 INFO L87 Difference]: Start difference. First operand 68509 states and 217346 transitions. Second operand 5 states. [2019-12-07 14:13:15,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:15,505 INFO L93 Difference]: Finished difference Result 120171 states and 382213 transitions. [2019-12-07 14:13:15,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 14:13:15,505 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-07 14:13:15,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:15,592 INFO L225 Difference]: With dead ends: 120171 [2019-12-07 14:13:15,593 INFO L226 Difference]: Without dead ends: 59654 [2019-12-07 14:13:15,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:13:15,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59654 states. [2019-12-07 14:13:16,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59654 to 58171. [2019-12-07 14:13:16,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58171 states. [2019-12-07 14:13:16,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58171 states to 58171 states and 182293 transitions. [2019-12-07 14:13:16,441 INFO L78 Accepts]: Start accepts. Automaton has 58171 states and 182293 transitions. Word has length 44 [2019-12-07 14:13:16,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:16,441 INFO L462 AbstractCegarLoop]: Abstraction has 58171 states and 182293 transitions. [2019-12-07 14:13:16,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:13:16,441 INFO L276 IsEmpty]: Start isEmpty. Operand 58171 states and 182293 transitions. [2019-12-07 14:13:16,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 14:13:16,476 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:16,476 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:16,476 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:16,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:16,476 INFO L82 PathProgramCache]: Analyzing trace with hash -939306024, now seen corresponding path program 1 times [2019-12-07 14:13:16,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:16,476 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910497311] [2019-12-07 14:13:16,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:16,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:16,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:16,533 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910497311] [2019-12-07 14:13:16,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:16,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:13:16,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736443554] [2019-12-07 14:13:16,533 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:13:16,533 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:16,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:13:16,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:13:16,534 INFO L87 Difference]: Start difference. First operand 58171 states and 182293 transitions. Second operand 5 states. [2019-12-07 14:13:16,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:16,722 INFO L93 Difference]: Finished difference Result 59212 states and 185441 transitions. [2019-12-07 14:13:16,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 14:13:16,722 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-07 14:13:16,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:16,803 INFO L225 Difference]: With dead ends: 59212 [2019-12-07 14:13:16,803 INFO L226 Difference]: Without dead ends: 58090 [2019-12-07 14:13:16,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:13:17,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58090 states. [2019-12-07 14:13:17,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58090 to 58071. [2019-12-07 14:13:17,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58071 states. [2019-12-07 14:13:17,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58071 states to 58071 states and 181899 transitions. [2019-12-07 14:13:17,668 INFO L78 Accepts]: Start accepts. Automaton has 58071 states and 181899 transitions. Word has length 44 [2019-12-07 14:13:17,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:17,668 INFO L462 AbstractCegarLoop]: Abstraction has 58071 states and 181899 transitions. [2019-12-07 14:13:17,668 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:13:17,668 INFO L276 IsEmpty]: Start isEmpty. Operand 58071 states and 181899 transitions. [2019-12-07 14:13:17,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 14:13:17,823 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:17,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:17,823 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:17,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:17,823 INFO L82 PathProgramCache]: Analyzing trace with hash -1987614456, now seen corresponding path program 1 times [2019-12-07 14:13:17,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:17,824 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430534720] [2019-12-07 14:13:17,824 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:17,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:17,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:17,898 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430534720] [2019-12-07 14:13:17,898 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:17,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:13:17,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435447428] [2019-12-07 14:13:17,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:13:17,899 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:17,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:13:17,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:13:17,900 INFO L87 Difference]: Start difference. First operand 58071 states and 181899 transitions. Second operand 6 states. [2019-12-07 14:13:18,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:18,211 INFO L93 Difference]: Finished difference Result 67780 states and 214385 transitions. [2019-12-07 14:13:18,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:13:18,212 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-07 14:13:18,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:18,306 INFO L225 Difference]: With dead ends: 67780 [2019-12-07 14:13:18,306 INFO L226 Difference]: Without dead ends: 65834 [2019-12-07 14:13:18,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=85, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:13:18,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65834 states. [2019-12-07 14:13:19,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65834 to 61626. [2019-12-07 14:13:19,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61626 states. [2019-12-07 14:13:19,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61626 states to 61626 states and 194418 transitions. [2019-12-07 14:13:19,248 INFO L78 Accepts]: Start accepts. Automaton has 61626 states and 194418 transitions. Word has length 44 [2019-12-07 14:13:19,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:19,248 INFO L462 AbstractCegarLoop]: Abstraction has 61626 states and 194418 transitions. [2019-12-07 14:13:19,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:13:19,248 INFO L276 IsEmpty]: Start isEmpty. Operand 61626 states and 194418 transitions. [2019-12-07 14:13:19,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 14:13:19,287 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:19,288 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:19,288 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:19,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:19,288 INFO L82 PathProgramCache]: Analyzing trace with hash -1769339363, now seen corresponding path program 1 times [2019-12-07 14:13:19,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:19,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964684944] [2019-12-07 14:13:19,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:19,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:19,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:19,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1964684944] [2019-12-07 14:13:19,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:19,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:13:19,321 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [989278407] [2019-12-07 14:13:19,321 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:13:19,321 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:19,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:13:19,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:19,321 INFO L87 Difference]: Start difference. First operand 61626 states and 194418 transitions. Second operand 3 states. [2019-12-07 14:13:19,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:19,498 INFO L93 Difference]: Finished difference Result 61626 states and 193801 transitions. [2019-12-07 14:13:19,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:13:19,499 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2019-12-07 14:13:19,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:19,580 INFO L225 Difference]: With dead ends: 61626 [2019-12-07 14:13:19,580 INFO L226 Difference]: Without dead ends: 61626 [2019-12-07 14:13:19,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:19,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61626 states. [2019-12-07 14:13:20,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61626 to 60360. [2019-12-07 14:13:20,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60360 states. [2019-12-07 14:13:20,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60360 states to 60360 states and 190065 transitions. [2019-12-07 14:13:20,612 INFO L78 Accepts]: Start accepts. Automaton has 60360 states and 190065 transitions. Word has length 45 [2019-12-07 14:13:20,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:20,612 INFO L462 AbstractCegarLoop]: Abstraction has 60360 states and 190065 transitions. [2019-12-07 14:13:20,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:13:20,612 INFO L276 IsEmpty]: Start isEmpty. Operand 60360 states and 190065 transitions. [2019-12-07 14:13:20,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 14:13:20,643 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:20,643 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:20,643 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:20,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:20,643 INFO L82 PathProgramCache]: Analyzing trace with hash 126218501, now seen corresponding path program 1 times [2019-12-07 14:13:20,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:20,643 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302123359] [2019-12-07 14:13:20,643 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:20,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:20,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:20,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302123359] [2019-12-07 14:13:20,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:20,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:13:20,703 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2136949469] [2019-12-07 14:13:20,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 14:13:20,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:20,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 14:13:20,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:13:20,704 INFO L87 Difference]: Start difference. First operand 60360 states and 190065 transitions. Second operand 8 states. [2019-12-07 14:13:21,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:21,654 INFO L93 Difference]: Finished difference Result 74451 states and 230488 transitions. [2019-12-07 14:13:21,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 14:13:21,655 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 45 [2019-12-07 14:13:21,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:21,755 INFO L225 Difference]: With dead ends: 74451 [2019-12-07 14:13:21,755 INFO L226 Difference]: Without dead ends: 74251 [2019-12-07 14:13:21,756 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=165, Invalid=705, Unknown=0, NotChecked=0, Total=870 [2019-12-07 14:13:21,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74251 states. [2019-12-07 14:13:22,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74251 to 55269. [2019-12-07 14:13:22,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55269 states. [2019-12-07 14:13:22,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55269 states to 55269 states and 175329 transitions. [2019-12-07 14:13:22,709 INFO L78 Accepts]: Start accepts. Automaton has 55269 states and 175329 transitions. Word has length 45 [2019-12-07 14:13:22,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:22,709 INFO L462 AbstractCegarLoop]: Abstraction has 55269 states and 175329 transitions. [2019-12-07 14:13:22,709 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 14:13:22,709 INFO L276 IsEmpty]: Start isEmpty. Operand 55269 states and 175329 transitions. [2019-12-07 14:13:22,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-12-07 14:13:22,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:22,744 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:22,744 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:22,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:22,745 INFO L82 PathProgramCache]: Analyzing trace with hash 834705038, now seen corresponding path program 1 times [2019-12-07 14:13:22,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:22,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085574215] [2019-12-07 14:13:22,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:22,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:22,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:22,812 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085574215] [2019-12-07 14:13:22,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:22,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:13:22,812 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2102252987] [2019-12-07 14:13:22,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:13:22,813 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:22,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:13:22,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:13:22,813 INFO L87 Difference]: Start difference. First operand 55269 states and 175329 transitions. Second operand 7 states. [2019-12-07 14:13:23,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:23,153 INFO L93 Difference]: Finished difference Result 73307 states and 234781 transitions. [2019-12-07 14:13:23,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 14:13:23,154 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 46 [2019-12-07 14:13:23,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:23,248 INFO L225 Difference]: With dead ends: 73307 [2019-12-07 14:13:23,248 INFO L226 Difference]: Without dead ends: 65145 [2019-12-07 14:13:23,248 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:13:23,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65145 states. [2019-12-07 14:13:24,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65145 to 59117. [2019-12-07 14:13:24,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59117 states. [2019-12-07 14:13:24,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59117 states to 59117 states and 188330 transitions. [2019-12-07 14:13:24,211 INFO L78 Accepts]: Start accepts. Automaton has 59117 states and 188330 transitions. Word has length 46 [2019-12-07 14:13:24,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:24,211 INFO L462 AbstractCegarLoop]: Abstraction has 59117 states and 188330 transitions. [2019-12-07 14:13:24,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:13:24,211 INFO L276 IsEmpty]: Start isEmpty. Operand 59117 states and 188330 transitions. [2019-12-07 14:13:24,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-12-07 14:13:24,249 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:24,249 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:24,249 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:24,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:24,250 INFO L82 PathProgramCache]: Analyzing trace with hash 994373084, now seen corresponding path program 2 times [2019-12-07 14:13:24,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:24,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1579839289] [2019-12-07 14:13:24,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:24,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:24,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:24,277 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1579839289] [2019-12-07 14:13:24,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:24,278 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:13:24,278 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064316444] [2019-12-07 14:13:24,278 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:13:24,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:24,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:13:24,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:13:24,278 INFO L87 Difference]: Start difference. First operand 59117 states and 188330 transitions. Second operand 4 states. [2019-12-07 14:13:24,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:24,306 INFO L93 Difference]: Finished difference Result 9129 states and 23869 transitions. [2019-12-07 14:13:24,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:13:24,307 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 46 [2019-12-07 14:13:24,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:24,315 INFO L225 Difference]: With dead ends: 9129 [2019-12-07 14:13:24,315 INFO L226 Difference]: Without dead ends: 9129 [2019-12-07 14:13:24,315 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:13:24,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9129 states. [2019-12-07 14:13:24,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9129 to 9066. [2019-12-07 14:13:24,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9066 states. [2019-12-07 14:13:24,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9066 states to 9066 states and 23717 transitions. [2019-12-07 14:13:24,413 INFO L78 Accepts]: Start accepts. Automaton has 9066 states and 23717 transitions. Word has length 46 [2019-12-07 14:13:24,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:24,414 INFO L462 AbstractCegarLoop]: Abstraction has 9066 states and 23717 transitions. [2019-12-07 14:13:24,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:13:24,414 INFO L276 IsEmpty]: Start isEmpty. Operand 9066 states and 23717 transitions. [2019-12-07 14:13:24,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:13:24,420 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:24,420 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:24,420 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:24,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:24,420 INFO L82 PathProgramCache]: Analyzing trace with hash 823061780, now seen corresponding path program 1 times [2019-12-07 14:13:24,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:24,421 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559686381] [2019-12-07 14:13:24,421 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:24,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:24,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:24,452 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1559686381] [2019-12-07 14:13:24,452 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:24,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:13:24,452 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572751809] [2019-12-07 14:13:24,452 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:13:24,452 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:24,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:13:24,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:13:24,453 INFO L87 Difference]: Start difference. First operand 9066 states and 23717 transitions. Second operand 5 states. [2019-12-07 14:13:24,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:24,483 INFO L93 Difference]: Finished difference Result 5810 states and 16318 transitions. [2019-12-07 14:13:24,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:13:24,484 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-12-07 14:13:24,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:24,490 INFO L225 Difference]: With dead ends: 5810 [2019-12-07 14:13:24,490 INFO L226 Difference]: Without dead ends: 5252 [2019-12-07 14:13:24,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:13:24,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5252 states. [2019-12-07 14:13:24,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5252 to 4420. [2019-12-07 14:13:24,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4420 states. [2019-12-07 14:13:24,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4420 states to 4420 states and 12717 transitions. [2019-12-07 14:13:24,555 INFO L78 Accepts]: Start accepts. Automaton has 4420 states and 12717 transitions. Word has length 56 [2019-12-07 14:13:24,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:24,555 INFO L462 AbstractCegarLoop]: Abstraction has 4420 states and 12717 transitions. [2019-12-07 14:13:24,555 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:13:24,555 INFO L276 IsEmpty]: Start isEmpty. Operand 4420 states and 12717 transitions. [2019-12-07 14:13:24,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:13:24,558 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:24,558 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:24,558 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:24,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:24,558 INFO L82 PathProgramCache]: Analyzing trace with hash -1193924167, now seen corresponding path program 1 times [2019-12-07 14:13:24,558 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:24,558 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060142790] [2019-12-07 14:13:24,559 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:24,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:24,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:24,619 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060142790] [2019-12-07 14:13:24,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:24,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:13:24,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356256908] [2019-12-07 14:13:24,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:13:24,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:24,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:13:24,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:13:24,619 INFO L87 Difference]: Start difference. First operand 4420 states and 12717 transitions. Second operand 6 states. [2019-12-07 14:13:24,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:24,946 INFO L93 Difference]: Finished difference Result 7371 states and 21063 transitions. [2019-12-07 14:13:24,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 14:13:24,946 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 14:13:24,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:24,953 INFO L225 Difference]: With dead ends: 7371 [2019-12-07 14:13:24,953 INFO L226 Difference]: Without dead ends: 7371 [2019-12-07 14:13:24,953 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:13:24,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7371 states. [2019-12-07 14:13:25,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7371 to 4830. [2019-12-07 14:13:25,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4830 states. [2019-12-07 14:13:25,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4830 states to 4830 states and 13972 transitions. [2019-12-07 14:13:25,025 INFO L78 Accepts]: Start accepts. Automaton has 4830 states and 13972 transitions. Word has length 66 [2019-12-07 14:13:25,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:25,025 INFO L462 AbstractCegarLoop]: Abstraction has 4830 states and 13972 transitions. [2019-12-07 14:13:25,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:13:25,025 INFO L276 IsEmpty]: Start isEmpty. Operand 4830 states and 13972 transitions. [2019-12-07 14:13:25,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:13:25,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:25,029 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:25,029 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:25,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:25,029 INFO L82 PathProgramCache]: Analyzing trace with hash -655270585, now seen corresponding path program 2 times [2019-12-07 14:13:25,029 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:25,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39993018] [2019-12-07 14:13:25,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:25,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:25,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:25,064 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [39993018] [2019-12-07 14:13:25,064 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:25,064 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:13:25,064 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [578304131] [2019-12-07 14:13:25,064 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:13:25,064 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:25,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:13:25,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:25,065 INFO L87 Difference]: Start difference. First operand 4830 states and 13972 transitions. Second operand 3 states. [2019-12-07 14:13:25,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:25,079 INFO L93 Difference]: Finished difference Result 4120 states and 11598 transitions. [2019-12-07 14:13:25,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:13:25,079 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:13:25,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:25,083 INFO L225 Difference]: With dead ends: 4120 [2019-12-07 14:13:25,083 INFO L226 Difference]: Without dead ends: 4120 [2019-12-07 14:13:25,083 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:25,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4120 states. [2019-12-07 14:13:25,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4120 to 3872. [2019-12-07 14:13:25,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3872 states. [2019-12-07 14:13:25,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3872 states to 3872 states and 10900 transitions. [2019-12-07 14:13:25,129 INFO L78 Accepts]: Start accepts. Automaton has 3872 states and 10900 transitions. Word has length 66 [2019-12-07 14:13:25,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:25,129 INFO L462 AbstractCegarLoop]: Abstraction has 3872 states and 10900 transitions. [2019-12-07 14:13:25,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:13:25,130 INFO L276 IsEmpty]: Start isEmpty. Operand 3872 states and 10900 transitions. [2019-12-07 14:13:25,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:13:25,132 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:25,132 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:25,132 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:25,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:25,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1492386830, now seen corresponding path program 1 times [2019-12-07 14:13:25,133 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:25,133 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257164548] [2019-12-07 14:13:25,133 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:25,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:25,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:25,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257164548] [2019-12-07 14:13:25,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:25,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:13:25,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1170728282] [2019-12-07 14:13:25,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:13:25,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:25,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:13:25,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:25,170 INFO L87 Difference]: Start difference. First operand 3872 states and 10900 transitions. Second operand 3 states. [2019-12-07 14:13:25,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:25,187 INFO L93 Difference]: Finished difference Result 3728 states and 10297 transitions. [2019-12-07 14:13:25,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:13:25,187 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 14:13:25,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:25,191 INFO L225 Difference]: With dead ends: 3728 [2019-12-07 14:13:25,191 INFO L226 Difference]: Without dead ends: 3728 [2019-12-07 14:13:25,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:13:25,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3728 states. [2019-12-07 14:13:25,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3728 to 3242. [2019-12-07 14:13:25,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3242 states. [2019-12-07 14:13:25,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3242 states to 3242 states and 8947 transitions. [2019-12-07 14:13:25,241 INFO L78 Accepts]: Start accepts. Automaton has 3242 states and 8947 transitions. Word has length 67 [2019-12-07 14:13:25,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:25,242 INFO L462 AbstractCegarLoop]: Abstraction has 3242 states and 8947 transitions. [2019-12-07 14:13:25,242 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:13:25,242 INFO L276 IsEmpty]: Start isEmpty. Operand 3242 states and 8947 transitions. [2019-12-07 14:13:25,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:13:25,244 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:25,244 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:25,244 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:25,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:25,244 INFO L82 PathProgramCache]: Analyzing trace with hash -1149441136, now seen corresponding path program 1 times [2019-12-07 14:13:25,245 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:25,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172496068] [2019-12-07 14:13:25,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:25,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:13:25,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:13:25,420 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172496068] [2019-12-07 14:13:25,420 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:13:25,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 14:13:25,421 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551274231] [2019-12-07 14:13:25,421 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 14:13:25,421 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:13:25,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 14:13:25,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 14:13:25,421 INFO L87 Difference]: Start difference. First operand 3242 states and 8947 transitions. Second operand 14 states. [2019-12-07 14:13:25,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:13:25,825 INFO L93 Difference]: Finished difference Result 4991 states and 13791 transitions. [2019-12-07 14:13:25,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 14:13:25,825 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 68 [2019-12-07 14:13:25,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:13:25,829 INFO L225 Difference]: With dead ends: 4991 [2019-12-07 14:13:25,829 INFO L226 Difference]: Without dead ends: 4959 [2019-12-07 14:13:25,829 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=149, Invalid=553, Unknown=0, NotChecked=0, Total=702 [2019-12-07 14:13:25,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4959 states. [2019-12-07 14:13:25,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4959 to 4295. [2019-12-07 14:13:25,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4295 states. [2019-12-07 14:13:25,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4295 states to 4295 states and 11813 transitions. [2019-12-07 14:13:25,882 INFO L78 Accepts]: Start accepts. Automaton has 4295 states and 11813 transitions. Word has length 68 [2019-12-07 14:13:25,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:13:25,882 INFO L462 AbstractCegarLoop]: Abstraction has 4295 states and 11813 transitions. [2019-12-07 14:13:25,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 14:13:25,882 INFO L276 IsEmpty]: Start isEmpty. Operand 4295 states and 11813 transitions. [2019-12-07 14:13:25,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:13:25,885 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:13:25,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:13:25,885 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:13:25,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:13:25,885 INFO L82 PathProgramCache]: Analyzing trace with hash 15770806, now seen corresponding path program 2 times [2019-12-07 14:13:25,885 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:13:25,885 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513381762] [2019-12-07 14:13:25,885 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:13:25,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:13:25,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:13:25,965 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 14:13:25,966 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:13:25,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2183~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2183~0.base_27|) |v_ULTIMATE.start_main_~#t2183~0.offset_20| 0)) |v_#memory_int_21|) (= 0 v_~y$r_buff0_thd3~0_110) (= (store .cse0 |v_ULTIMATE.start_main_~#t2183~0.base_27| 1) |v_#valid_63|) (= v_~main$tmp_guard0~0_18 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (= 0 |v_ULTIMATE.start_main_~#t2183~0.offset_20|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2183~0.base_27| 4)) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= 0 v_~y$r_buff0_thd2~0_114) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2183~0.base_27|)) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2183~0.base_27|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_~#t2185~0.offset=|v_ULTIMATE.start_main_~#t2185~0.offset_16|, ULTIMATE.start_main_~#t2185~0.base=|v_ULTIMATE.start_main_~#t2185~0.base_19|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_~#t2183~0.offset=|v_ULTIMATE.start_main_~#t2183~0.offset_20|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ULTIMATE.start_main_~#t2183~0.base=|v_ULTIMATE.start_main_~#t2183~0.base_27|, ~y~0=v_~y~0_170, ULTIMATE.start_main_~#t2184~0.offset=|v_ULTIMATE.start_main_~#t2184~0.offset_18|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_~#t2184~0.base=|v_ULTIMATE.start_main_~#t2184~0.base_23|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_~#t2185~0.offset, ULTIMATE.start_main_~#t2185~0.base, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2183~0.offset, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t2183~0.base, ~y~0, ULTIMATE.start_main_~#t2184~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2184~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:13:25,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:13:25,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2184~0.base_11|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2184~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2184~0.base_11|) |v_ULTIMATE.start_main_~#t2184~0.offset_10| 1)) |v_#memory_int_11|) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2184~0.base_11| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2184~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t2184~0.offset_10|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2184~0.base_11| 4) |v_#length_15|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2184~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t2184~0.base=|v_ULTIMATE.start_main_~#t2184~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2184~0.offset=|v_ULTIMATE.start_main_~#t2184~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2184~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2184~0.offset] because there is no mapped edge [2019-12-07 14:13:25,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2185~0.base_13| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2185~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2185~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2185~0.base_13|) |v_ULTIMATE.start_main_~#t2185~0.offset_11| 2)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t2185~0.offset_11|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2185~0.base_13|) 0) (not (= |v_ULTIMATE.start_main_~#t2185~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2185~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2185~0.offset=|v_ULTIMATE.start_main_~#t2185~0.offset_11|, ULTIMATE.start_main_~#t2185~0.base=|v_ULTIMATE.start_main_~#t2185~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2185~0.offset, ULTIMATE.start_main_~#t2185~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 14:13:25,970 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1869186406 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In1869186406 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1869186406| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1869186406| ~y$w_buff0_used~0_In1869186406)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1869186406, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1869186406} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1869186406|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1869186406, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1869186406} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:13:25,970 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-114989022 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-114989022 256) 0))) (or (and (= ~y~0_In-114989022 |P1Thread1of1ForFork1_#t~ite9_Out-114989022|) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-114989022 |P1Thread1of1ForFork1_#t~ite9_Out-114989022|) (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-114989022, ~y$w_buff1~0=~y$w_buff1~0_In-114989022, ~y~0=~y~0_In-114989022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-114989022} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-114989022, ~y$w_buff1~0=~y$w_buff1~0_In-114989022, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-114989022|, ~y~0=~y~0_In-114989022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-114989022} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 14:13:25,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In371872638 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In371872638 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In371872638 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In371872638 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out371872638|)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out371872638| ~y$w_buff1_used~0_In371872638) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In371872638, ~y$w_buff0_used~0=~y$w_buff0_used~0_In371872638, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In371872638, ~y$w_buff1_used~0=~y$w_buff1_used~0_In371872638} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out371872638|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In371872638, ~y$w_buff0_used~0=~y$w_buff0_used~0_In371872638, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In371872638, ~y$w_buff1_used~0=~y$w_buff1_used~0_In371872638} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:13:25,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1853412543 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1853412543 256) 0)) (.cse2 (= ~y$r_buff0_thd1~0_Out-1853412543 ~y$r_buff0_thd1~0_In-1853412543))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd1~0_Out-1853412543 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1853412543, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1853412543} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1853412543, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1853412543|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1853412543} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:13:25,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd1~0_In806541293 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In806541293 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In806541293 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In806541293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out806541293| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In806541293 |P0Thread1of1ForFork0_#t~ite8_Out806541293|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In806541293, ~y$w_buff0_used~0=~y$w_buff0_used~0_In806541293, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In806541293, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806541293} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In806541293, ~y$w_buff0_used~0=~y$w_buff0_used~0_In806541293, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out806541293|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In806541293, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806541293} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:13:25,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:13:25,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-1214206207 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1214206207 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1214206207| ~y~0_In-1214206207) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-1214206207| ~y$w_buff1~0_In-1214206207)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1214206207, ~y$w_buff1~0=~y$w_buff1~0_In-1214206207, ~y~0=~y~0_In-1214206207, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1214206207} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1214206207, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1214206207|, ~y$w_buff1~0=~y$w_buff1~0_In-1214206207, ~y~0=~y~0_In-1214206207, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1214206207} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:13:25,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 14:13:25,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 14:13:25,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1775929542 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1775929542 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1775929542| ~y$w_buff0_used~0_In-1775929542) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1775929542|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775929542, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1775929542} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775929542, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1775929542, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1775929542|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:13:25,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1968579520 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1968579520 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1968579520 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-1968579520 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-1968579520| 0)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite12_Out-1968579520| ~y$w_buff1_used~0_In-1968579520) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1968579520, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1968579520, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1968579520, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1968579520} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1968579520, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1968579520, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1968579520, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1968579520|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1968579520} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:13:25,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-569797560 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-569797560 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In-569797560 |P1Thread1of1ForFork1_#t~ite13_Out-569797560|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-569797560|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-569797560, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-569797560} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-569797560, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-569797560, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-569797560|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 14:13:25,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-2109234030 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2109234030 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2109234030 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-2109234030 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In-2109234030 |P1Thread1of1ForFork1_#t~ite14_Out-2109234030|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-2109234030|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2109234030, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2109234030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2109234030, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2109234030} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2109234030, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2109234030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2109234030, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-2109234030|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2109234030} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:13:25,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2006630356 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-2006630356 256)))) (or (and (= ~y$w_buff0_used~0_In-2006630356 |P2Thread1of1ForFork2_#t~ite17_Out-2006630356|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-2006630356|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2006630356, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2006630356} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2006630356, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2006630356, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-2006630356|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:13:25,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In102577670 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In102577670 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In102577670 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In102577670 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In102577670 |P2Thread1of1ForFork2_#t~ite18_Out102577670|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite18_Out102577670|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In102577670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In102577670, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In102577670, ~y$w_buff1_used~0=~y$w_buff1_used~0_In102577670} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In102577670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In102577670, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In102577670, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out102577670|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In102577670} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:13:25,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:13:25,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1130806625 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1130806625 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite19_Out1130806625| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out1130806625| ~y$r_buff0_thd3~0_In1130806625)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1130806625, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1130806625} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1130806625, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1130806625, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1130806625|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:13:25,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In-1202398972 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-1202398972 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1202398972 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1202398972 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-1202398972| ~y$r_buff1_thd3~0_In-1202398972)) (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1202398972| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1202398972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1202398972, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1202398972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1202398972} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1202398972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1202398972, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1202398972|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1202398972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1202398972} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:13:25,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:13:25,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:13:25,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-1171329992| |ULTIMATE.start_main_#t~ite24_Out-1171329992|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-1171329992 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-1171329992 256) 0))) (or (and (= ~y$w_buff1~0_In-1171329992 |ULTIMATE.start_main_#t~ite24_Out-1171329992|) .cse0 (not .cse1) (not .cse2)) (and (= ~y~0_In-1171329992 |ULTIMATE.start_main_#t~ite24_Out-1171329992|) .cse0 (or .cse1 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1171329992, ~y~0=~y~0_In-1171329992, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1171329992, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1171329992} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1171329992, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1171329992|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1171329992|, ~y~0=~y~0_In-1171329992, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1171329992, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1171329992} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:13:25,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1758071815 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1758071815 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite26_Out-1758071815|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-1758071815 |ULTIMATE.start_main_#t~ite26_Out-1758071815|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1758071815, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1758071815} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1758071815, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1758071815, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1758071815|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:13:25,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-779481959 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-779481959 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-779481959 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-779481959 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-779481959|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-779481959 |ULTIMATE.start_main_#t~ite27_Out-779481959|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-779481959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-779481959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779481959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779481959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-779481959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-779481959, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-779481959|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779481959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779481959} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:13:25,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In936031390 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In936031390 256) 0))) (or (and (= ~y$r_buff0_thd0~0_In936031390 |ULTIMATE.start_main_#t~ite28_Out936031390|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out936031390|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In936031390, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In936031390} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out936031390|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In936031390, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In936031390} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:13:25,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-1724015069 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1724015069 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1724015069 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1724015069 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out-1724015069| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite29_Out-1724015069| ~y$r_buff1_thd0~0_In-1724015069) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1724015069, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1724015069, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1724015069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1724015069} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1724015069, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1724015069|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1724015069, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1724015069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1724015069} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:13:25,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2057042204 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In2057042204| |ULTIMATE.start_main_#t~ite38_Out2057042204|) (= ~y$w_buff1~0_In2057042204 |ULTIMATE.start_main_#t~ite39_Out2057042204|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2057042204 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In2057042204 256) 0) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In2057042204 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In2057042204 256) 0))) .cse0 (= |ULTIMATE.start_main_#t~ite38_Out2057042204| |ULTIMATE.start_main_#t~ite39_Out2057042204|) (= |ULTIMATE.start_main_#t~ite38_Out2057042204| ~y$w_buff1~0_In2057042204)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2057042204, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2057042204, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2057042204, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In2057042204|, ~weak$$choice2~0=~weak$$choice2~0_In2057042204, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2057042204, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2057042204} OutVars{~y$w_buff1~0=~y$w_buff1~0_In2057042204, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2057042204, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out2057042204|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2057042204, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out2057042204|, ~weak$$choice2~0=~weak$$choice2~0_In2057042204, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2057042204, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2057042204} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 14:13:25,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1642224048 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite42_Out1642224048| |ULTIMATE.start_main_#t~ite41_Out1642224048|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1642224048 256)))) (or (and .cse0 (= (mod ~y$w_buff1_used~0_In1642224048 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In1642224048 256)) (and .cse0 (= (mod ~y$r_buff1_thd0~0_In1642224048 256) 0)))) .cse1 (= ~y$w_buff0_used~0_In1642224048 |ULTIMATE.start_main_#t~ite41_Out1642224048|)) (and (= ~y$w_buff0_used~0_In1642224048 |ULTIMATE.start_main_#t~ite42_Out1642224048|) (= |ULTIMATE.start_main_#t~ite41_In1642224048| |ULTIMATE.start_main_#t~ite41_Out1642224048|) (not .cse1)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In1642224048|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1642224048, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1642224048, ~weak$$choice2~0=~weak$$choice2~0_In1642224048, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1642224048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1642224048} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1642224048|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1642224048, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1642224048, ~weak$$choice2~0=~weak$$choice2~0_In1642224048, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1642224048|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1642224048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1642224048} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:13:25,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:13:25,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:13:25,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:13:26,031 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:13:26 BasicIcfg [2019-12-07 14:13:26,031 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:13:26,032 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:13:26,032 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:13:26,032 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:13:26,032 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:11:26" (3/4) ... [2019-12-07 14:13:26,033 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:13:26,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2183~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2183~0.base_27|) |v_ULTIMATE.start_main_~#t2183~0.offset_20| 0)) |v_#memory_int_21|) (= 0 v_~y$r_buff0_thd3~0_110) (= (store .cse0 |v_ULTIMATE.start_main_~#t2183~0.base_27| 1) |v_#valid_63|) (= v_~main$tmp_guard0~0_18 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (= 0 |v_ULTIMATE.start_main_~#t2183~0.offset_20|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2183~0.base_27| 4)) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= 0 v_~y$r_buff0_thd2~0_114) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2183~0.base_27|)) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2183~0.base_27|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_~#t2185~0.offset=|v_ULTIMATE.start_main_~#t2185~0.offset_16|, ULTIMATE.start_main_~#t2185~0.base=|v_ULTIMATE.start_main_~#t2185~0.base_19|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_~#t2183~0.offset=|v_ULTIMATE.start_main_~#t2183~0.offset_20|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ULTIMATE.start_main_~#t2183~0.base=|v_ULTIMATE.start_main_~#t2183~0.base_27|, ~y~0=v_~y~0_170, ULTIMATE.start_main_~#t2184~0.offset=|v_ULTIMATE.start_main_~#t2184~0.offset_18|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_~#t2184~0.base=|v_ULTIMATE.start_main_~#t2184~0.base_23|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_~#t2185~0.offset, ULTIMATE.start_main_~#t2185~0.base, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2183~0.offset, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t2183~0.base, ~y~0, ULTIMATE.start_main_~#t2184~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2184~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:13:26,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:13:26,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2184~0.base_11|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2184~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2184~0.base_11|) |v_ULTIMATE.start_main_~#t2184~0.offset_10| 1)) |v_#memory_int_11|) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2184~0.base_11| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2184~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t2184~0.offset_10|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2184~0.base_11| 4) |v_#length_15|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2184~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t2184~0.base=|v_ULTIMATE.start_main_~#t2184~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2184~0.offset=|v_ULTIMATE.start_main_~#t2184~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2184~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2184~0.offset] because there is no mapped edge [2019-12-07 14:13:26,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2185~0.base_13| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2185~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2185~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2185~0.base_13|) |v_ULTIMATE.start_main_~#t2185~0.offset_11| 2)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t2185~0.offset_11|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2185~0.base_13|) 0) (not (= |v_ULTIMATE.start_main_~#t2185~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2185~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2185~0.offset=|v_ULTIMATE.start_main_~#t2185~0.offset_11|, ULTIMATE.start_main_~#t2185~0.base=|v_ULTIMATE.start_main_~#t2185~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2185~0.offset, ULTIMATE.start_main_~#t2185~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 14:13:26,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1869186406 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In1869186406 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1869186406| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1869186406| ~y$w_buff0_used~0_In1869186406)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1869186406, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1869186406} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1869186406|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1869186406, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1869186406} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:13:26,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-114989022 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-114989022 256) 0))) (or (and (= ~y~0_In-114989022 |P1Thread1of1ForFork1_#t~ite9_Out-114989022|) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-114989022 |P1Thread1of1ForFork1_#t~ite9_Out-114989022|) (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-114989022, ~y$w_buff1~0=~y$w_buff1~0_In-114989022, ~y~0=~y~0_In-114989022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-114989022} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-114989022, ~y$w_buff1~0=~y$w_buff1~0_In-114989022, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-114989022|, ~y~0=~y~0_In-114989022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-114989022} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 14:13:26,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In371872638 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In371872638 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In371872638 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In371872638 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out371872638|)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out371872638| ~y$w_buff1_used~0_In371872638) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In371872638, ~y$w_buff0_used~0=~y$w_buff0_used~0_In371872638, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In371872638, ~y$w_buff1_used~0=~y$w_buff1_used~0_In371872638} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out371872638|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In371872638, ~y$w_buff0_used~0=~y$w_buff0_used~0_In371872638, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In371872638, ~y$w_buff1_used~0=~y$w_buff1_used~0_In371872638} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:13:26,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1853412543 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1853412543 256) 0)) (.cse2 (= ~y$r_buff0_thd1~0_Out-1853412543 ~y$r_buff0_thd1~0_In-1853412543))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd1~0_Out-1853412543 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1853412543, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1853412543} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1853412543, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1853412543|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1853412543} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:13:26,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd1~0_In806541293 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In806541293 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In806541293 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In806541293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out806541293| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In806541293 |P0Thread1of1ForFork0_#t~ite8_Out806541293|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In806541293, ~y$w_buff0_used~0=~y$w_buff0_used~0_In806541293, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In806541293, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806541293} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In806541293, ~y$w_buff0_used~0=~y$w_buff0_used~0_In806541293, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out806541293|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In806541293, ~y$w_buff1_used~0=~y$w_buff1_used~0_In806541293} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:13:26,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:13:26,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-1214206207 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1214206207 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1214206207| ~y~0_In-1214206207) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-1214206207| ~y$w_buff1~0_In-1214206207)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1214206207, ~y$w_buff1~0=~y$w_buff1~0_In-1214206207, ~y~0=~y~0_In-1214206207, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1214206207} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1214206207, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1214206207|, ~y$w_buff1~0=~y$w_buff1~0_In-1214206207, ~y~0=~y~0_In-1214206207, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1214206207} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:13:26,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 14:13:26,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 14:13:26,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1775929542 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1775929542 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1775929542| ~y$w_buff0_used~0_In-1775929542) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1775929542|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775929542, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1775929542} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1775929542, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1775929542, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1775929542|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:13:26,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1968579520 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1968579520 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1968579520 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-1968579520 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-1968579520| 0)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite12_Out-1968579520| ~y$w_buff1_used~0_In-1968579520) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1968579520, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1968579520, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1968579520, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1968579520} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1968579520, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1968579520, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1968579520, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1968579520|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1968579520} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:13:26,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-569797560 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-569797560 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In-569797560 |P1Thread1of1ForFork1_#t~ite13_Out-569797560|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-569797560|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-569797560, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-569797560} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-569797560, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-569797560, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-569797560|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 14:13:26,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-2109234030 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2109234030 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2109234030 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-2109234030 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In-2109234030 |P1Thread1of1ForFork1_#t~ite14_Out-2109234030|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-2109234030|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2109234030, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2109234030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2109234030, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2109234030} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2109234030, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2109234030, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2109234030, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-2109234030|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2109234030} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:13:26,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2006630356 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-2006630356 256)))) (or (and (= ~y$w_buff0_used~0_In-2006630356 |P2Thread1of1ForFork2_#t~ite17_Out-2006630356|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-2006630356|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2006630356, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2006630356} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2006630356, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2006630356, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-2006630356|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:13:26,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In102577670 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In102577670 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In102577670 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In102577670 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In102577670 |P2Thread1of1ForFork2_#t~ite18_Out102577670|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite18_Out102577670|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In102577670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In102577670, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In102577670, ~y$w_buff1_used~0=~y$w_buff1_used~0_In102577670} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In102577670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In102577670, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In102577670, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out102577670|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In102577670} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:13:26,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:13:26,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1130806625 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1130806625 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite19_Out1130806625| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out1130806625| ~y$r_buff0_thd3~0_In1130806625)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1130806625, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1130806625} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1130806625, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1130806625, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1130806625|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:13:26,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In-1202398972 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-1202398972 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1202398972 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1202398972 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-1202398972| ~y$r_buff1_thd3~0_In-1202398972)) (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1202398972| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1202398972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1202398972, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1202398972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1202398972} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1202398972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1202398972, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1202398972|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1202398972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1202398972} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:13:26,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:13:26,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:13:26,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-1171329992| |ULTIMATE.start_main_#t~ite24_Out-1171329992|)) (.cse1 (= (mod ~y$w_buff1_used~0_In-1171329992 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-1171329992 256) 0))) (or (and (= ~y$w_buff1~0_In-1171329992 |ULTIMATE.start_main_#t~ite24_Out-1171329992|) .cse0 (not .cse1) (not .cse2)) (and (= ~y~0_In-1171329992 |ULTIMATE.start_main_#t~ite24_Out-1171329992|) .cse0 (or .cse1 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1171329992, ~y~0=~y~0_In-1171329992, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1171329992, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1171329992} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1171329992, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1171329992|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1171329992|, ~y~0=~y~0_In-1171329992, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1171329992, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1171329992} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:13:26,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1758071815 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1758071815 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite26_Out-1758071815|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-1758071815 |ULTIMATE.start_main_#t~ite26_Out-1758071815|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1758071815, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1758071815} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1758071815, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1758071815, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1758071815|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:13:26,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-779481959 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-779481959 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-779481959 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-779481959 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-779481959|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-779481959 |ULTIMATE.start_main_#t~ite27_Out-779481959|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-779481959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-779481959, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779481959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779481959} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-779481959, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-779481959, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-779481959|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779481959, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779481959} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:13:26,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In936031390 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In936031390 256) 0))) (or (and (= ~y$r_buff0_thd0~0_In936031390 |ULTIMATE.start_main_#t~ite28_Out936031390|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out936031390|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In936031390, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In936031390} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out936031390|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In936031390, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In936031390} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:13:26,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-1724015069 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1724015069 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1724015069 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1724015069 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out-1724015069| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite29_Out-1724015069| ~y$r_buff1_thd0~0_In-1724015069) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1724015069, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1724015069, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1724015069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1724015069} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1724015069, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1724015069|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1724015069, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1724015069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1724015069} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:13:26,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2057042204 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In2057042204| |ULTIMATE.start_main_#t~ite38_Out2057042204|) (= ~y$w_buff1~0_In2057042204 |ULTIMATE.start_main_#t~ite39_Out2057042204|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2057042204 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In2057042204 256) 0) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In2057042204 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In2057042204 256) 0))) .cse0 (= |ULTIMATE.start_main_#t~ite38_Out2057042204| |ULTIMATE.start_main_#t~ite39_Out2057042204|) (= |ULTIMATE.start_main_#t~ite38_Out2057042204| ~y$w_buff1~0_In2057042204)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2057042204, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2057042204, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2057042204, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In2057042204|, ~weak$$choice2~0=~weak$$choice2~0_In2057042204, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2057042204, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2057042204} OutVars{~y$w_buff1~0=~y$w_buff1~0_In2057042204, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2057042204, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out2057042204|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2057042204, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out2057042204|, ~weak$$choice2~0=~weak$$choice2~0_In2057042204, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2057042204, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2057042204} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 14:13:26,042 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1642224048 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite42_Out1642224048| |ULTIMATE.start_main_#t~ite41_Out1642224048|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1642224048 256)))) (or (and .cse0 (= (mod ~y$w_buff1_used~0_In1642224048 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In1642224048 256)) (and .cse0 (= (mod ~y$r_buff1_thd0~0_In1642224048 256) 0)))) .cse1 (= ~y$w_buff0_used~0_In1642224048 |ULTIMATE.start_main_#t~ite41_Out1642224048|)) (and (= ~y$w_buff0_used~0_In1642224048 |ULTIMATE.start_main_#t~ite42_Out1642224048|) (= |ULTIMATE.start_main_#t~ite41_In1642224048| |ULTIMATE.start_main_#t~ite41_Out1642224048|) (not .cse1)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In1642224048|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1642224048, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1642224048, ~weak$$choice2~0=~weak$$choice2~0_In1642224048, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1642224048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1642224048} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1642224048|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1642224048, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1642224048, ~weak$$choice2~0=~weak$$choice2~0_In1642224048, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1642224048|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1642224048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1642224048} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:13:26,042 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:13:26,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:13:26,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:13:26,096 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_d45ade76-79e8-4d88-8658-6e9a556356bb/bin/utaipan/witness.graphml [2019-12-07 14:13:26,097 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:13:26,098 INFO L168 Benchmark]: Toolchain (without parser) took 120455.94 ms. Allocated memory was 1.0 GB in the beginning and 7.7 GB in the end (delta: 6.6 GB). Free memory was 931.4 MB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 14:13:26,098 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:13:26,098 INFO L168 Benchmark]: CACSL2BoogieTranslator took 382.95 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 931.4 MB in the beginning and 1.1 GB in the end (delta: -133.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:13:26,098 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:13:26,099 INFO L168 Benchmark]: Boogie Preprocessor took 26.07 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:13:26,099 INFO L168 Benchmark]: RCFGBuilder took 407.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 14:13:26,099 INFO L168 Benchmark]: TraceAbstraction took 119529.25 ms. Allocated memory was 1.1 GB in the beginning and 7.7 GB in the end (delta: 6.5 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 14:13:26,099 INFO L168 Benchmark]: Witness Printer took 65.15 ms. Allocated memory is still 7.7 GB. Free memory was 3.2 GB in the beginning and 3.2 GB in the end (delta: 12.4 MB). Peak memory consumption was 12.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:13:26,101 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 382.95 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 931.4 MB in the beginning and 1.1 GB in the end (delta: -133.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.07 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 407.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 119529.25 ms. Allocated memory was 1.1 GB in the beginning and 7.7 GB in the end (delta: 6.5 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 65.15 ms. Allocated memory is still 7.7 GB. Free memory was 3.2 GB in the beginning and 3.2 GB in the end (delta: 12.4 MB). Peak memory consumption was 12.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 173 ProgramPointsBefore, 94 ProgramPointsAfterwards, 210 TransitionsBefore, 104 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 31 ChoiceCompositions, 5882 VarBasedMoverChecksPositive, 246 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 253 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 78185 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L800] FCALL, FORK 0 pthread_create(&t2183, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L730] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L731] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L732] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L733] 1 y$r_buff1_thd3 = y$r_buff0_thd3 [L734] 1 y$r_buff0_thd1 = (_Bool)1 [L737] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] FCALL, FORK 0 pthread_create(&t2184, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L804] FCALL, FORK 0 pthread_create(&t2185, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 2 x = 2 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L742] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L771] 3 __unbuffered_p2_EAX = x [L774] 3 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L777] 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L758] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L759] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L760] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L778] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L779] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L780] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L810] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L811] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L812] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L813] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L814] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L817] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L818] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L819] 0 y$flush_delayed = weak$$choice2 [L820] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L822] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L822] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L823] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L824] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L825] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L827] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L827] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L828] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 164 locations, 2 error locations. Result: UNSAFE, OverallTime: 119.3s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 23.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5430 SDtfs, 4956 SDslu, 12401 SDs, 0 SdLazy, 5897 SolverSat, 271 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 221 GetRequests, 39 SyntacticMatches, 13 SemanticMatches, 169 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 414 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=239204occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 77.7s AutomataMinimizationTime, 25 MinimizatonAttempts, 432836 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 1022 NumberOfCodeBlocks, 1022 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 929 ConstructedInterpolants, 0 QuantifiedInterpolants, 144007 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...