./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe020_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe020_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e33fbd04ff9ea1c388b4ec7c1e87900d631855b7 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:50:56,643 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:50:56,644 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:50:56,652 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:50:56,652 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:50:56,653 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:50:56,654 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:50:56,655 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:50:56,656 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:50:56,657 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:50:56,658 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:50:56,658 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:50:56,659 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:50:56,659 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:50:56,660 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:50:56,661 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:50:56,661 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:50:56,662 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:50:56,663 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:50:56,664 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:50:56,666 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:50:56,667 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:50:56,668 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:50:56,668 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:50:56,670 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:50:56,670 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:50:56,670 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:50:56,671 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:50:56,671 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:50:56,672 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:50:56,672 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:50:56,672 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:50:56,673 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:50:56,673 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:50:56,674 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:50:56,674 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:50:56,675 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:50:56,675 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:50:56,675 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:50:56,676 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:50:56,677 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:50:56,677 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 15:50:56,690 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:50:56,690 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:50:56,691 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 15:50:56,691 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 15:50:56,691 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 15:50:56,692 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 15:50:56,692 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 15:50:56,692 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 15:50:56,692 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 15:50:56,692 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 15:50:56,693 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 15:50:56,693 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 15:50:56,693 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 15:50:56,693 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 15:50:56,693 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 15:50:56,694 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:50:56,694 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:50:56,694 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:50:56,694 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:50:56,694 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:50:56,694 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:50:56,694 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:50:56,695 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:50:56,695 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:50:56,696 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 15:50:56,696 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e33fbd04ff9ea1c388b4ec7c1e87900d631855b7 [2019-12-07 15:50:56,794 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:50:56,804 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:50:56,807 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:50:56,808 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:50:56,808 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:50:56,809 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe020_rmo.opt.i [2019-12-07 15:50:56,850 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/data/f4c839b34/5e3de7a6d87a47c995fac5fb1d83f6db/FLAGf333fd308 [2019-12-07 15:50:57,310 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:50:57,311 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/sv-benchmarks/c/pthread-wmm/safe020_rmo.opt.i [2019-12-07 15:50:57,324 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/data/f4c839b34/5e3de7a6d87a47c995fac5fb1d83f6db/FLAGf333fd308 [2019-12-07 15:50:57,333 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/data/f4c839b34/5e3de7a6d87a47c995fac5fb1d83f6db [2019-12-07 15:50:57,335 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:50:57,336 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:50:57,337 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:50:57,337 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:50:57,339 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:50:57,339 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,341 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57, skipping insertion in model container [2019-12-07 15:50:57,341 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,346 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:50:57,375 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:50:57,624 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:50:57,631 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:50:57,675 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:50:57,721 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:50:57,721 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57 WrapperNode [2019-12-07 15:50:57,721 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:50:57,722 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:50:57,722 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:50:57,722 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:50:57,727 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,742 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,759 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:50:57,759 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:50:57,760 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:50:57,760 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:50:57,766 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,766 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,770 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,770 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,779 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,782 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,784 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... [2019-12-07 15:50:57,788 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:50:57,788 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:50:57,788 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:50:57,788 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:50:57,789 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:50:57,829 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-07 15:50:57,829 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:50:57,829 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:50:57,829 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:50:57,829 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:50:57,829 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:50:57,830 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:50:57,830 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:50:57,830 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:50:57,830 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:50:57,830 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:50:57,830 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-07 15:50:57,830 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:50:57,830 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:50:57,830 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:50:57,831 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:50:58,244 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:50:58,244 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-07 15:50:58,245 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:50:58 BoogieIcfgContainer [2019-12-07 15:50:58,245 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:50:58,246 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:50:58,246 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:50:58,247 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:50:58,248 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:50:57" (1/3) ... [2019-12-07 15:50:58,248 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9f719ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:50:58, skipping insertion in model container [2019-12-07 15:50:58,248 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:50:57" (2/3) ... [2019-12-07 15:50:58,249 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9f719ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:50:58, skipping insertion in model container [2019-12-07 15:50:58,249 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:50:58" (3/3) ... [2019-12-07 15:50:58,250 INFO L109 eAbstractionObserver]: Analyzing ICFG safe020_rmo.opt.i [2019-12-07 15:50:58,256 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:50:58,256 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:50:58,261 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 15:50:58,262 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:50:58,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,295 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,296 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,305 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,308 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,308 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,310 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,311 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,311 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,311 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,311 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,311 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,316 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,317 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:50:58,334 INFO L249 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2019-12-07 15:50:58,347 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:50:58,347 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:50:58,347 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:50:58,347 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:50:58,347 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:50:58,347 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:50:58,347 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:50:58,347 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:50:58,359 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 222 places, 275 transitions [2019-12-07 15:50:58,360 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 222 places, 275 transitions [2019-12-07 15:50:58,438 INFO L134 PetriNetUnfolder]: 63/272 cut-off events. [2019-12-07 15:50:58,438 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:50:58,452 INFO L76 FinitePrefix]: Finished finitePrefix Result has 282 conditions, 272 events. 63/272 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 16. Compared 1059 event pairs. 9/217 useless extension candidates. Maximal degree in co-relation 225. Up to 2 conditions per place. [2019-12-07 15:50:58,481 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 222 places, 275 transitions [2019-12-07 15:50:58,530 INFO L134 PetriNetUnfolder]: 63/272 cut-off events. [2019-12-07 15:50:58,530 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:50:58,541 INFO L76 FinitePrefix]: Finished finitePrefix Result has 282 conditions, 272 events. 63/272 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 16. Compared 1059 event pairs. 9/217 useless extension candidates. Maximal degree in co-relation 225. Up to 2 conditions per place. [2019-12-07 15:50:58,574 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 32976 [2019-12-07 15:50:58,574 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:51:02,269 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 124 [2019-12-07 15:51:02,391 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification that was a NOOP. DAG size: 120 [2019-12-07 15:51:02,725 WARN L192 SmtUtils]: Spent 315.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 130 [2019-12-07 15:51:02,875 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2019-12-07 15:51:02,906 INFO L206 etLargeBlockEncoding]: Checked pairs total: 195223 [2019-12-07 15:51:02,906 INFO L214 etLargeBlockEncoding]: Total number of compositions: 147 [2019-12-07 15:51:02,908 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 120 places, 143 transitions [2019-12-07 15:53:05,038 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 339084 states. [2019-12-07 15:53:05,039 INFO L276 IsEmpty]: Start isEmpty. Operand 339084 states. [2019-12-07 15:53:05,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 15:53:05,085 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:05,085 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:05,086 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:05,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:05,089 INFO L82 PathProgramCache]: Analyzing trace with hash -442381049, now seen corresponding path program 1 times [2019-12-07 15:53:05,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:05,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272045595] [2019-12-07 15:53:05,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:05,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:05,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:05,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272045595] [2019-12-07 15:53:05,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:05,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:53:05,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176363360] [2019-12-07 15:53:05,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:53:05,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:05,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:53:05,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:53:05,302 INFO L87 Difference]: Start difference. First operand 339084 states. Second operand 3 states. [2019-12-07 15:53:10,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:10,418 INFO L93 Difference]: Finished difference Result 327916 states and 1522358 transitions. [2019-12-07 15:53:10,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:53:10,419 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 15:53:10,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:11,584 INFO L225 Difference]: With dead ends: 327916 [2019-12-07 15:53:11,584 INFO L226 Difference]: Without dead ends: 308026 [2019-12-07 15:53:11,585 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:53:43,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308026 states. [2019-12-07 15:53:48,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308026 to 308026. [2019-12-07 15:53:48,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308026 states. [2019-12-07 15:53:50,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308026 states to 308026 states and 1430617 transitions. [2019-12-07 15:53:50,411 INFO L78 Accepts]: Start accepts. Automaton has 308026 states and 1430617 transitions. Word has length 17 [2019-12-07 15:53:50,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:50,412 INFO L462 AbstractCegarLoop]: Abstraction has 308026 states and 1430617 transitions. [2019-12-07 15:53:50,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:53:50,413 INFO L276 IsEmpty]: Start isEmpty. Operand 308026 states and 1430617 transitions. [2019-12-07 15:53:50,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:53:50,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:50,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:50,430 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:50,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:50,430 INFO L82 PathProgramCache]: Analyzing trace with hash -1635746170, now seen corresponding path program 1 times [2019-12-07 15:53:50,431 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:50,431 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247318314] [2019-12-07 15:53:50,431 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:50,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:50,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:50,507 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247318314] [2019-12-07 15:53:50,507 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:50,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:53:50,508 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1301261315] [2019-12-07 15:53:50,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:53:50,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:50,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:53:50,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:53:50,509 INFO L87 Difference]: Start difference. First operand 308026 states and 1430617 transitions. Second operand 4 states. [2019-12-07 15:53:56,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:56,814 INFO L93 Difference]: Finished difference Result 327032 states and 1499036 transitions. [2019-12-07 15:53:56,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:53:56,815 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 15:53:56,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:57,807 INFO L225 Difference]: With dead ends: 327032 [2019-12-07 15:53:57,807 INFO L226 Difference]: Without dead ends: 307142 [2019-12-07 15:53:57,808 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:54:27,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307142 states. [2019-12-07 15:54:32,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307142 to 307142. [2019-12-07 15:54:32,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307142 states. [2019-12-07 15:54:33,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307142 states to 307142 states and 1426301 transitions. [2019-12-07 15:54:33,786 INFO L78 Accepts]: Start accepts. Automaton has 307142 states and 1426301 transitions. Word has length 18 [2019-12-07 15:54:33,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:33,787 INFO L462 AbstractCegarLoop]: Abstraction has 307142 states and 1426301 transitions. [2019-12-07 15:54:33,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:54:33,787 INFO L276 IsEmpty]: Start isEmpty. Operand 307142 states and 1426301 transitions. [2019-12-07 15:54:38,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:54:38,062 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:38,062 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:38,062 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:38,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:38,062 INFO L82 PathProgramCache]: Analyzing trace with hash -67752106, now seen corresponding path program 1 times [2019-12-07 15:54:38,062 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:38,063 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395810313] [2019-12-07 15:54:38,063 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:38,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:38,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:38,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395810313] [2019-12-07 15:54:38,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:38,122 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:54:38,122 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [75870198] [2019-12-07 15:54:38,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:54:38,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:38,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:54:38,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:54:38,122 INFO L87 Difference]: Start difference. First operand 307142 states and 1426301 transitions. Second operand 4 states. [2019-12-07 15:54:38,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:38,445 INFO L93 Difference]: Finished difference Result 74748 states and 285827 transitions. [2019-12-07 15:54:38,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:54:38,445 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 15:54:38,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:38,573 INFO L225 Difference]: With dead ends: 74748 [2019-12-07 15:54:38,574 INFO L226 Difference]: Without dead ends: 56258 [2019-12-07 15:54:38,574 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:54:39,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56258 states. [2019-12-07 15:54:39,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56258 to 56258. [2019-12-07 15:54:39,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56258 states. [2019-12-07 15:54:39,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56258 states to 56258 states and 203921 transitions. [2019-12-07 15:54:39,922 INFO L78 Accepts]: Start accepts. Automaton has 56258 states and 203921 transitions. Word has length 19 [2019-12-07 15:54:39,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:39,922 INFO L462 AbstractCegarLoop]: Abstraction has 56258 states and 203921 transitions. [2019-12-07 15:54:39,922 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:54:39,922 INFO L276 IsEmpty]: Start isEmpty. Operand 56258 states and 203921 transitions. [2019-12-07 15:54:39,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:54:39,943 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:39,943 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:39,943 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:39,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:39,943 INFO L82 PathProgramCache]: Analyzing trace with hash 1583819726, now seen corresponding path program 1 times [2019-12-07 15:54:39,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:39,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632197581] [2019-12-07 15:54:39,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:39,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:40,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:40,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632197581] [2019-12-07 15:54:40,029 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:40,029 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:54:40,029 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204441029] [2019-12-07 15:54:40,029 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:54:40,029 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:40,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:54:40,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:54:40,030 INFO L87 Difference]: Start difference. First operand 56258 states and 203921 transitions. Second operand 6 states. [2019-12-07 15:54:40,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:40,691 INFO L93 Difference]: Finished difference Result 75758 states and 264484 transitions. [2019-12-07 15:54:40,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:54:40,692 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2019-12-07 15:54:40,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:40,824 INFO L225 Difference]: With dead ends: 75758 [2019-12-07 15:54:40,824 INFO L226 Difference]: Without dead ends: 75758 [2019-12-07 15:54:40,824 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:54:41,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75758 states. [2019-12-07 15:54:42,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75758 to 73556. [2019-12-07 15:54:42,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73556 states. [2019-12-07 15:54:42,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73556 states to 73556 states and 258256 transitions. [2019-12-07 15:54:42,474 INFO L78 Accepts]: Start accepts. Automaton has 73556 states and 258256 transitions. Word has length 29 [2019-12-07 15:54:42,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:42,475 INFO L462 AbstractCegarLoop]: Abstraction has 73556 states and 258256 transitions. [2019-12-07 15:54:42,475 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:54:42,475 INFO L276 IsEmpty]: Start isEmpty. Operand 73556 states and 258256 transitions. [2019-12-07 15:54:42,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 15:54:42,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:42,498 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:42,498 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:42,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:42,498 INFO L82 PathProgramCache]: Analyzing trace with hash 1046935711, now seen corresponding path program 1 times [2019-12-07 15:54:42,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:42,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717176759] [2019-12-07 15:54:42,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:42,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:42,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:42,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1717176759] [2019-12-07 15:54:42,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:42,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:54:42,555 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181228807] [2019-12-07 15:54:42,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:54:42,555 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:42,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:54:42,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:54:42,556 INFO L87 Difference]: Start difference. First operand 73556 states and 258256 transitions. Second operand 5 states. [2019-12-07 15:54:42,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:42,866 INFO L93 Difference]: Finished difference Result 77044 states and 267300 transitions. [2019-12-07 15:54:42,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:54:42,866 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 15:54:42,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:43,163 INFO L225 Difference]: With dead ends: 77044 [2019-12-07 15:54:43,164 INFO L226 Difference]: Without dead ends: 71878 [2019-12-07 15:54:43,164 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:54:43,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71878 states. [2019-12-07 15:54:44,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71878 to 71878. [2019-12-07 15:54:44,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71878 states. [2019-12-07 15:54:44,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71878 states to 71878 states and 250574 transitions. [2019-12-07 15:54:44,666 INFO L78 Accepts]: Start accepts. Automaton has 71878 states and 250574 transitions. Word has length 30 [2019-12-07 15:54:44,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:44,666 INFO L462 AbstractCegarLoop]: Abstraction has 71878 states and 250574 transitions. [2019-12-07 15:54:44,667 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:54:44,667 INFO L276 IsEmpty]: Start isEmpty. Operand 71878 states and 250574 transitions. [2019-12-07 15:54:44,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 15:54:44,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:44,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:44,693 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:44,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:44,693 INFO L82 PathProgramCache]: Analyzing trace with hash -1906011848, now seen corresponding path program 1 times [2019-12-07 15:54:44,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:44,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770583564] [2019-12-07 15:54:44,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:44,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:44,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:44,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770583564] [2019-12-07 15:54:44,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:44,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:54:44,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251376184] [2019-12-07 15:54:44,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:54:44,744 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:44,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:54:44,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:44,745 INFO L87 Difference]: Start difference. First operand 71878 states and 250574 transitions. Second operand 3 states. [2019-12-07 15:54:44,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:44,972 INFO L93 Difference]: Finished difference Result 66908 states and 232684 transitions. [2019-12-07 15:54:44,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:54:44,973 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-12-07 15:54:44,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:45,091 INFO L225 Difference]: With dead ends: 66908 [2019-12-07 15:54:45,091 INFO L226 Difference]: Without dead ends: 66908 [2019-12-07 15:54:45,092 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:45,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66908 states. [2019-12-07 15:54:46,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66908 to 66908. [2019-12-07 15:54:46,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66908 states. [2019-12-07 15:54:46,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66908 states to 66908 states and 232684 transitions. [2019-12-07 15:54:46,617 INFO L78 Accepts]: Start accepts. Automaton has 66908 states and 232684 transitions. Word has length 31 [2019-12-07 15:54:46,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:46,617 INFO L462 AbstractCegarLoop]: Abstraction has 66908 states and 232684 transitions. [2019-12-07 15:54:46,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:54:46,617 INFO L276 IsEmpty]: Start isEmpty. Operand 66908 states and 232684 transitions. [2019-12-07 15:54:46,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 15:54:46,674 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:46,674 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:46,674 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:46,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:46,674 INFO L82 PathProgramCache]: Analyzing trace with hash -98686875, now seen corresponding path program 1 times [2019-12-07 15:54:46,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:46,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273697211] [2019-12-07 15:54:46,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:46,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:46,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:46,742 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273697211] [2019-12-07 15:54:46,742 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:46,742 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:54:46,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [252242390] [2019-12-07 15:54:46,742 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:54:46,743 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:46,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:54:46,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:54:46,743 INFO L87 Difference]: Start difference. First operand 66908 states and 232684 transitions. Second operand 5 states. [2019-12-07 15:54:47,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:47,508 INFO L93 Difference]: Finished difference Result 92866 states and 317341 transitions. [2019-12-07 15:54:47,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:54:47,508 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 15:54:47,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:47,664 INFO L225 Difference]: With dead ends: 92866 [2019-12-07 15:54:47,664 INFO L226 Difference]: Without dead ends: 92866 [2019-12-07 15:54:47,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:54:48,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92866 states. [2019-12-07 15:54:49,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92866 to 70121. [2019-12-07 15:54:49,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70121 states. [2019-12-07 15:54:49,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70121 states to 70121 states and 244048 transitions. [2019-12-07 15:54:49,417 INFO L78 Accepts]: Start accepts. Automaton has 70121 states and 244048 transitions. Word has length 42 [2019-12-07 15:54:49,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:49,417 INFO L462 AbstractCegarLoop]: Abstraction has 70121 states and 244048 transitions. [2019-12-07 15:54:49,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:54:49,417 INFO L276 IsEmpty]: Start isEmpty. Operand 70121 states and 244048 transitions. [2019-12-07 15:54:49,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 15:54:49,475 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:49,475 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:49,475 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:49,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:49,476 INFO L82 PathProgramCache]: Analyzing trace with hash -972984348, now seen corresponding path program 1 times [2019-12-07 15:54:49,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:49,476 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093317931] [2019-12-07 15:54:49,476 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:49,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:49,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:49,516 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093317931] [2019-12-07 15:54:49,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:49,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:54:49,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1778351551] [2019-12-07 15:54:49,517 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:54:49,517 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:49,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:54:49,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:49,518 INFO L87 Difference]: Start difference. First operand 70121 states and 244048 transitions. Second operand 3 states. [2019-12-07 15:54:49,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:49,776 INFO L93 Difference]: Finished difference Result 70121 states and 242788 transitions. [2019-12-07 15:54:49,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:54:49,776 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-12-07 15:54:49,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:49,901 INFO L225 Difference]: With dead ends: 70121 [2019-12-07 15:54:49,901 INFO L226 Difference]: Without dead ends: 70121 [2019-12-07 15:54:49,902 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:50,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70121 states. [2019-12-07 15:54:51,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70121 to 69305. [2019-12-07 15:54:51,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69305 states. [2019-12-07 15:54:51,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69305 states to 69305 states and 240439 transitions. [2019-12-07 15:54:51,463 INFO L78 Accepts]: Start accepts. Automaton has 69305 states and 240439 transitions. Word has length 42 [2019-12-07 15:54:51,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:51,463 INFO L462 AbstractCegarLoop]: Abstraction has 69305 states and 240439 transitions. [2019-12-07 15:54:51,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:54:51,463 INFO L276 IsEmpty]: Start isEmpty. Operand 69305 states and 240439 transitions. [2019-12-07 15:54:51,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 15:54:51,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:51,520 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:51,520 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:51,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:51,520 INFO L82 PathProgramCache]: Analyzing trace with hash -820934450, now seen corresponding path program 1 times [2019-12-07 15:54:51,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:51,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826892729] [2019-12-07 15:54:51,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:51,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:51,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:51,560 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826892729] [2019-12-07 15:54:51,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:51,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:54:51,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387951770] [2019-12-07 15:54:51,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:54:51,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:51,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:54:51,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:51,561 INFO L87 Difference]: Start difference. First operand 69305 states and 240439 transitions. Second operand 3 states. [2019-12-07 15:54:51,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:51,774 INFO L93 Difference]: Finished difference Result 66756 states and 229408 transitions. [2019-12-07 15:54:51,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:54:51,775 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 15:54:51,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:51,888 INFO L225 Difference]: With dead ends: 66756 [2019-12-07 15:54:51,888 INFO L226 Difference]: Without dead ends: 66756 [2019-12-07 15:54:51,889 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:52,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66756 states. [2019-12-07 15:54:53,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66756 to 65253. [2019-12-07 15:54:53,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65253 states. [2019-12-07 15:54:53,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65253 states to 65253 states and 224969 transitions. [2019-12-07 15:54:53,259 INFO L78 Accepts]: Start accepts. Automaton has 65253 states and 224969 transitions. Word has length 43 [2019-12-07 15:54:53,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:53,259 INFO L462 AbstractCegarLoop]: Abstraction has 65253 states and 224969 transitions. [2019-12-07 15:54:53,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:54:53,259 INFO L276 IsEmpty]: Start isEmpty. Operand 65253 states and 224969 transitions. [2019-12-07 15:54:53,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 15:54:53,309 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:53,309 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:53,309 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:53,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:53,309 INFO L82 PathProgramCache]: Analyzing trace with hash 428838632, now seen corresponding path program 1 times [2019-12-07 15:54:53,310 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:53,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035304862] [2019-12-07 15:54:53,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:53,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:53,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:53,343 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035304862] [2019-12-07 15:54:53,344 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:53,344 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:54:53,344 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041694179] [2019-12-07 15:54:53,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:54:53,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:53,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:54:53,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:53,344 INFO L87 Difference]: Start difference. First operand 65253 states and 224969 transitions. Second operand 3 states. [2019-12-07 15:54:53,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:53,637 INFO L93 Difference]: Finished difference Result 64019 states and 219702 transitions. [2019-12-07 15:54:53,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:54:53,637 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 15:54:53,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:53,752 INFO L225 Difference]: With dead ends: 64019 [2019-12-07 15:54:53,752 INFO L226 Difference]: Without dead ends: 64019 [2019-12-07 15:54:53,752 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:54,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64019 states. [2019-12-07 15:54:54,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64019 to 64019. [2019-12-07 15:54:54,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64019 states. [2019-12-07 15:54:55,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64019 states to 64019 states and 219702 transitions. [2019-12-07 15:54:55,084 INFO L78 Accepts]: Start accepts. Automaton has 64019 states and 219702 transitions. Word has length 43 [2019-12-07 15:54:55,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:55,084 INFO L462 AbstractCegarLoop]: Abstraction has 64019 states and 219702 transitions. [2019-12-07 15:54:55,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:54:55,085 INFO L276 IsEmpty]: Start isEmpty. Operand 64019 states and 219702 transitions. [2019-12-07 15:54:55,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 15:54:55,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:55,137 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:55,137 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:55,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:55,137 INFO L82 PathProgramCache]: Analyzing trace with hash 407815183, now seen corresponding path program 1 times [2019-12-07 15:54:55,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:55,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429562818] [2019-12-07 15:54:55,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:55,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:55,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:55,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1429562818] [2019-12-07 15:54:55,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:55,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:54:55,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722666896] [2019-12-07 15:54:55,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:54:55,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:55,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:54:55,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:54:55,206 INFO L87 Difference]: Start difference. First operand 64019 states and 219702 transitions. Second operand 5 states. [2019-12-07 15:54:55,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:55,346 INFO L93 Difference]: Finished difference Result 32066 states and 108120 transitions. [2019-12-07 15:54:55,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:54:55,346 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-07 15:54:55,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:55,390 INFO L225 Difference]: With dead ends: 32066 [2019-12-07 15:54:55,390 INFO L226 Difference]: Without dead ends: 28355 [2019-12-07 15:54:55,391 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:54:55,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28355 states. [2019-12-07 15:54:55,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28355 to 28355. [2019-12-07 15:54:55,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28355 states. [2019-12-07 15:54:55,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28355 states to 28355 states and 95613 transitions. [2019-12-07 15:54:55,953 INFO L78 Accepts]: Start accepts. Automaton has 28355 states and 95613 transitions. Word has length 44 [2019-12-07 15:54:55,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:55,953 INFO L462 AbstractCegarLoop]: Abstraction has 28355 states and 95613 transitions. [2019-12-07 15:54:55,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:54:55,953 INFO L276 IsEmpty]: Start isEmpty. Operand 28355 states and 95613 transitions. [2019-12-07 15:54:55,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 15:54:55,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:55,985 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:55,985 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:55,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:55,986 INFO L82 PathProgramCache]: Analyzing trace with hash 661905784, now seen corresponding path program 1 times [2019-12-07 15:54:55,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:55,986 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [729651617] [2019-12-07 15:54:55,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:56,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:56,153 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification that was a NOOP. DAG size: 3 [2019-12-07 15:54:56,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:56,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [729651617] [2019-12-07 15:54:56,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:56,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:54:56,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [461968914] [2019-12-07 15:54:56,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:54:56,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:56,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:54:56,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:54:56,204 INFO L87 Difference]: Start difference. First operand 28355 states and 95613 transitions. Second operand 6 states. [2019-12-07 15:54:56,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:56,326 INFO L93 Difference]: Finished difference Result 27176 states and 92880 transitions. [2019-12-07 15:54:56,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:54:56,327 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 15:54:56,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:56,368 INFO L225 Difference]: With dead ends: 27176 [2019-12-07 15:54:56,368 INFO L226 Difference]: Without dead ends: 27034 [2019-12-07 15:54:56,369 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:54:56,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27034 states. [2019-12-07 15:54:56,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27034 to 27034. [2019-12-07 15:54:56,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27034 states. [2019-12-07 15:54:56,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27034 states to 27034 states and 92560 transitions. [2019-12-07 15:54:56,918 INFO L78 Accepts]: Start accepts. Automaton has 27034 states and 92560 transitions. Word has length 55 [2019-12-07 15:54:56,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:56,919 INFO L462 AbstractCegarLoop]: Abstraction has 27034 states and 92560 transitions. [2019-12-07 15:54:56,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:54:56,919 INFO L276 IsEmpty]: Start isEmpty. Operand 27034 states and 92560 transitions. [2019-12-07 15:54:56,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 15:54:56,950 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:56,950 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:56,950 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:56,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:56,951 INFO L82 PathProgramCache]: Analyzing trace with hash 1561682762, now seen corresponding path program 1 times [2019-12-07 15:54:56,951 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:56,951 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410015669] [2019-12-07 15:54:56,951 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:56,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:57,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:57,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410015669] [2019-12-07 15:54:57,021 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:57,021 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:54:57,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1537905891] [2019-12-07 15:54:57,021 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:54:57,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:57,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:54:57,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:57,022 INFO L87 Difference]: Start difference. First operand 27034 states and 92560 transitions. Second operand 3 states. [2019-12-07 15:54:57,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:57,092 INFO L93 Difference]: Finished difference Result 24377 states and 81891 transitions. [2019-12-07 15:54:57,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:54:57,093 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 71 [2019-12-07 15:54:57,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:57,128 INFO L225 Difference]: With dead ends: 24377 [2019-12-07 15:54:57,128 INFO L226 Difference]: Without dead ends: 24377 [2019-12-07 15:54:57,129 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:54:57,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24377 states. [2019-12-07 15:54:57,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24377 to 24377. [2019-12-07 15:54:57,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24377 states. [2019-12-07 15:54:57,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24377 states to 24377 states and 81891 transitions. [2019-12-07 15:54:57,598 INFO L78 Accepts]: Start accepts. Automaton has 24377 states and 81891 transitions. Word has length 71 [2019-12-07 15:54:57,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:57,598 INFO L462 AbstractCegarLoop]: Abstraction has 24377 states and 81891 transitions. [2019-12-07 15:54:57,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:54:57,599 INFO L276 IsEmpty]: Start isEmpty. Operand 24377 states and 81891 transitions. [2019-12-07 15:54:57,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:54:57,622 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:57,622 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:57,623 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:57,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:57,623 INFO L82 PathProgramCache]: Analyzing trace with hash -1260270511, now seen corresponding path program 1 times [2019-12-07 15:54:57,623 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:57,623 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126365025] [2019-12-07 15:54:57,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:57,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:57,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:57,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126365025] [2019-12-07 15:54:57,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:57,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:54:57,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1336195687] [2019-12-07 15:54:57,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:54:57,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:57,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:54:57,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:54:57,695 INFO L87 Difference]: Start difference. First operand 24377 states and 81891 transitions. Second operand 4 states. [2019-12-07 15:54:57,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:57,794 INFO L93 Difference]: Finished difference Result 30692 states and 101581 transitions. [2019-12-07 15:54:57,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:54:57,795 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2019-12-07 15:54:57,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:57,803 INFO L225 Difference]: With dead ends: 30692 [2019-12-07 15:54:57,803 INFO L226 Difference]: Without dead ends: 6999 [2019-12-07 15:54:57,804 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:54:57,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6999 states. [2019-12-07 15:54:57,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6999 to 6999. [2019-12-07 15:54:57,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6999 states. [2019-12-07 15:54:57,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6999 states to 6999 states and 21308 transitions. [2019-12-07 15:54:57,905 INFO L78 Accepts]: Start accepts. Automaton has 6999 states and 21308 transitions. Word has length 72 [2019-12-07 15:54:57,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:57,906 INFO L462 AbstractCegarLoop]: Abstraction has 6999 states and 21308 transitions. [2019-12-07 15:54:57,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:54:57,906 INFO L276 IsEmpty]: Start isEmpty. Operand 6999 states and 21308 transitions. [2019-12-07 15:54:57,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:54:57,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:57,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:57,912 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:57,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:57,912 INFO L82 PathProgramCache]: Analyzing trace with hash 368265025, now seen corresponding path program 2 times [2019-12-07 15:54:57,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:57,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633028107] [2019-12-07 15:54:57,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:57,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:54:58,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:54:58,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633028107] [2019-12-07 15:54:58,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:54:58,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:54:58,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160696167] [2019-12-07 15:54:58,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:54:58,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:54:58,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:54:58,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=350, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:54:58,383 INFO L87 Difference]: Start difference. First operand 6999 states and 21308 transitions. Second operand 21 states. [2019-12-07 15:54:59,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:54:59,545 INFO L93 Difference]: Finished difference Result 21789 states and 67630 transitions. [2019-12-07 15:54:59,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 15:54:59,545 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 72 [2019-12-07 15:54:59,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:54:59,568 INFO L225 Difference]: With dead ends: 21789 [2019-12-07 15:54:59,568 INFO L226 Difference]: Without dead ends: 21633 [2019-12-07 15:54:59,569 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 239 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=188, Invalid=1002, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 15:54:59,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21633 states. [2019-12-07 15:54:59,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21633 to 13834. [2019-12-07 15:54:59,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13834 states. [2019-12-07 15:54:59,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13834 states to 13834 states and 43081 transitions. [2019-12-07 15:54:59,824 INFO L78 Accepts]: Start accepts. Automaton has 13834 states and 43081 transitions. Word has length 72 [2019-12-07 15:54:59,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:54:59,824 INFO L462 AbstractCegarLoop]: Abstraction has 13834 states and 43081 transitions. [2019-12-07 15:54:59,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:54:59,824 INFO L276 IsEmpty]: Start isEmpty. Operand 13834 states and 43081 transitions. [2019-12-07 15:54:59,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:54:59,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:54:59,838 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:54:59,838 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:54:59,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:54:59,838 INFO L82 PathProgramCache]: Analyzing trace with hash -735221709, now seen corresponding path program 3 times [2019-12-07 15:54:59,838 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:54:59,838 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788689455] [2019-12-07 15:54:59,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:54:59,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:00,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:00,346 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788689455] [2019-12-07 15:55:00,346 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:00,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:55:00,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067733031] [2019-12-07 15:55:00,346 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:55:00,346 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:00,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:55:00,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:55:00,347 INFO L87 Difference]: Start difference. First operand 13834 states and 43081 transitions. Second operand 18 states. [2019-12-07 15:55:03,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:03,501 INFO L93 Difference]: Finished difference Result 53065 states and 168495 transitions. [2019-12-07 15:55:03,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 15:55:03,501 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:55:03,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:03,576 INFO L225 Difference]: With dead ends: 53065 [2019-12-07 15:55:03,576 INFO L226 Difference]: Without dead ends: 51617 [2019-12-07 15:55:03,578 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1587 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=862, Invalid=4540, Unknown=0, NotChecked=0, Total=5402 [2019-12-07 15:55:03,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51617 states. [2019-12-07 15:55:04,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51617 to 20412. [2019-12-07 15:55:04,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20412 states. [2019-12-07 15:55:04,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20412 states to 20412 states and 63684 transitions. [2019-12-07 15:55:04,102 INFO L78 Accepts]: Start accepts. Automaton has 20412 states and 63684 transitions. Word has length 72 [2019-12-07 15:55:04,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:04,102 INFO L462 AbstractCegarLoop]: Abstraction has 20412 states and 63684 transitions. [2019-12-07 15:55:04,102 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:55:04,102 INFO L276 IsEmpty]: Start isEmpty. Operand 20412 states and 63684 transitions. [2019-12-07 15:55:04,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:04,121 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:04,122 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:04,122 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:04,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:04,122 INFO L82 PathProgramCache]: Analyzing trace with hash -52307533, now seen corresponding path program 4 times [2019-12-07 15:55:04,122 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:04,122 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535970965] [2019-12-07 15:55:04,122 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:04,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:05,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:05,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1535970965] [2019-12-07 15:55:05,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:05,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:55:05,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021264756] [2019-12-07 15:55:05,428 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:55:05,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:05,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:55:05,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=583, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:55:05,429 INFO L87 Difference]: Start difference. First operand 20412 states and 63684 transitions. Second operand 26 states. [2019-12-07 15:55:12,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:12,718 INFO L93 Difference]: Finished difference Result 25669 states and 79436 transitions. [2019-12-07 15:55:12,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 15:55:12,718 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:55:12,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:12,749 INFO L225 Difference]: With dead ends: 25669 [2019-12-07 15:55:12,749 INFO L226 Difference]: Without dead ends: 24861 [2019-12-07 15:55:12,750 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 5 SyntacticMatches, 5 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 513 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=263, Invalid=2187, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:55:12,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24861 states. [2019-12-07 15:55:13,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24861 to 22122. [2019-12-07 15:55:13,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22122 states. [2019-12-07 15:55:13,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22122 states to 22122 states and 68892 transitions. [2019-12-07 15:55:13,104 INFO L78 Accepts]: Start accepts. Automaton has 22122 states and 68892 transitions. Word has length 72 [2019-12-07 15:55:13,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:13,105 INFO L462 AbstractCegarLoop]: Abstraction has 22122 states and 68892 transitions. [2019-12-07 15:55:13,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:55:13,105 INFO L276 IsEmpty]: Start isEmpty. Operand 22122 states and 68892 transitions. [2019-12-07 15:55:13,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:13,126 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:13,126 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:13,126 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:13,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:13,126 INFO L82 PathProgramCache]: Analyzing trace with hash -240961381, now seen corresponding path program 5 times [2019-12-07 15:55:13,126 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:13,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973059063] [2019-12-07 15:55:13,127 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:13,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:13,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:13,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973059063] [2019-12-07 15:55:13,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:13,453 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:55:13,453 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141817118] [2019-12-07 15:55:13,453 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:55:13,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:13,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:55:13,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:55:13,454 INFO L87 Difference]: Start difference. First operand 22122 states and 68892 transitions. Second operand 19 states. [2019-12-07 15:55:15,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:15,682 INFO L93 Difference]: Finished difference Result 33190 states and 102813 transitions. [2019-12-07 15:55:15,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 15:55:15,683 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:55:15,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:15,715 INFO L225 Difference]: With dead ends: 33190 [2019-12-07 15:55:15,715 INFO L226 Difference]: Without dead ends: 24623 [2019-12-07 15:55:15,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 275 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=194, Invalid=1138, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 15:55:15,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24623 states. [2019-12-07 15:55:16,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24623 to 21766. [2019-12-07 15:55:16,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21766 states. [2019-12-07 15:55:16,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21766 states to 21766 states and 67226 transitions. [2019-12-07 15:55:16,055 INFO L78 Accepts]: Start accepts. Automaton has 21766 states and 67226 transitions. Word has length 72 [2019-12-07 15:55:16,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:16,055 INFO L462 AbstractCegarLoop]: Abstraction has 21766 states and 67226 transitions. [2019-12-07 15:55:16,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:55:16,055 INFO L276 IsEmpty]: Start isEmpty. Operand 21766 states and 67226 transitions. [2019-12-07 15:55:16,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:16,075 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:16,075 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:16,075 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:16,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:16,076 INFO L82 PathProgramCache]: Analyzing trace with hash -2133396665, now seen corresponding path program 6 times [2019-12-07 15:55:16,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:16,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73802687] [2019-12-07 15:55:16,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:16,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:16,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:16,334 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73802687] [2019-12-07 15:55:16,334 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:16,334 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:55:16,334 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444789295] [2019-12-07 15:55:16,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:55:16,334 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:16,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:55:16,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:55:16,335 INFO L87 Difference]: Start difference. First operand 21766 states and 67226 transitions. Second operand 15 states. [2019-12-07 15:55:17,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:17,836 INFO L93 Difference]: Finished difference Result 45178 states and 140011 transitions. [2019-12-07 15:55:17,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 15:55:17,836 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:55:17,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:17,878 INFO L225 Difference]: With dead ends: 45178 [2019-12-07 15:55:17,879 INFO L226 Difference]: Without dead ends: 32768 [2019-12-07 15:55:17,880 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 618 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=460, Invalid=1990, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:55:17,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32768 states. [2019-12-07 15:55:18,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32768 to 22836. [2019-12-07 15:55:18,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22836 states. [2019-12-07 15:55:18,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22836 states to 22836 states and 70413 transitions. [2019-12-07 15:55:18,316 INFO L78 Accepts]: Start accepts. Automaton has 22836 states and 70413 transitions. Word has length 72 [2019-12-07 15:55:18,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:18,316 INFO L462 AbstractCegarLoop]: Abstraction has 22836 states and 70413 transitions. [2019-12-07 15:55:18,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:55:18,317 INFO L276 IsEmpty]: Start isEmpty. Operand 22836 states and 70413 transitions. [2019-12-07 15:55:18,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:18,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:18,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:18,340 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:18,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:18,341 INFO L82 PathProgramCache]: Analyzing trace with hash -443250659, now seen corresponding path program 7 times [2019-12-07 15:55:18,341 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:18,341 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481287408] [2019-12-07 15:55:18,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:18,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:18,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:18,730 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481287408] [2019-12-07 15:55:18,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:18,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:55:18,730 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1158849084] [2019-12-07 15:55:18,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:55:18,731 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:18,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:55:18,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=399, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:55:18,731 INFO L87 Difference]: Start difference. First operand 22836 states and 70413 transitions. Second operand 22 states. [2019-12-07 15:55:20,277 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 22 [2019-12-07 15:55:21,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:21,427 INFO L93 Difference]: Finished difference Result 39898 states and 121508 transitions. [2019-12-07 15:55:21,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 15:55:21,427 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:55:21,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:21,468 INFO L225 Difference]: With dead ends: 39898 [2019-12-07 15:55:21,468 INFO L226 Difference]: Without dead ends: 33347 [2019-12-07 15:55:21,469 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 445 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=263, Invalid=1629, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 15:55:21,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33347 states. [2019-12-07 15:55:21,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33347 to 17966. [2019-12-07 15:55:21,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17966 states. [2019-12-07 15:55:21,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17966 states to 17966 states and 54443 transitions. [2019-12-07 15:55:21,839 INFO L78 Accepts]: Start accepts. Automaton has 17966 states and 54443 transitions. Word has length 72 [2019-12-07 15:55:21,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:21,839 INFO L462 AbstractCegarLoop]: Abstraction has 17966 states and 54443 transitions. [2019-12-07 15:55:21,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:55:21,839 INFO L276 IsEmpty]: Start isEmpty. Operand 17966 states and 54443 transitions. [2019-12-07 15:55:21,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:21,856 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:21,856 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:21,857 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:21,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:21,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1714085891, now seen corresponding path program 8 times [2019-12-07 15:55:21,857 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:21,857 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161256877] [2019-12-07 15:55:21,857 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:21,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:22,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:22,207 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161256877] [2019-12-07 15:55:22,207 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:22,208 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:55:22,208 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293411649] [2019-12-07 15:55:22,208 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:55:22,208 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:22,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:55:22,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:55:22,208 INFO L87 Difference]: Start difference. First operand 17966 states and 54443 transitions. Second operand 19 states. [2019-12-07 15:55:23,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:23,564 INFO L93 Difference]: Finished difference Result 25605 states and 77562 transitions. [2019-12-07 15:55:23,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:55:23,564 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:55:23,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:23,596 INFO L225 Difference]: With dead ends: 25605 [2019-12-07 15:55:23,596 INFO L226 Difference]: Without dead ends: 25217 [2019-12-07 15:55:23,597 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 224 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=168, Invalid=954, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 15:55:23,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25217 states. [2019-12-07 15:55:23,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25217 to 20017. [2019-12-07 15:55:23,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20017 states. [2019-12-07 15:55:23,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20017 states to 20017 states and 60864 transitions. [2019-12-07 15:55:23,919 INFO L78 Accepts]: Start accepts. Automaton has 20017 states and 60864 transitions. Word has length 72 [2019-12-07 15:55:23,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:23,919 INFO L462 AbstractCegarLoop]: Abstraction has 20017 states and 60864 transitions. [2019-12-07 15:55:23,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:55:23,919 INFO L276 IsEmpty]: Start isEmpty. Operand 20017 states and 60864 transitions. [2019-12-07 15:55:23,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:23,938 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:23,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:23,939 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:23,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:23,939 INFO L82 PathProgramCache]: Analyzing trace with hash -2134658449, now seen corresponding path program 9 times [2019-12-07 15:55:23,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:23,939 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094123635] [2019-12-07 15:55:23,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:23,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:24,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:24,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094123635] [2019-12-07 15:55:24,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:24,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:55:24,354 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799509485] [2019-12-07 15:55:24,354 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:55:24,354 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:24,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:55:24,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:55:24,355 INFO L87 Difference]: Start difference. First operand 20017 states and 60864 transitions. Second operand 18 states. [2019-12-07 15:55:27,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:27,724 INFO L93 Difference]: Finished difference Result 48942 states and 151659 transitions. [2019-12-07 15:55:27,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2019-12-07 15:55:27,725 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:55:27,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:27,794 INFO L225 Difference]: With dead ends: 48942 [2019-12-07 15:55:27,794 INFO L226 Difference]: Without dead ends: 42251 [2019-12-07 15:55:27,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1209 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=646, Invalid=3644, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 15:55:27,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42251 states. [2019-12-07 15:55:28,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42251 to 18119. [2019-12-07 15:55:28,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18119 states. [2019-12-07 15:55:28,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18119 states to 18119 states and 54731 transitions. [2019-12-07 15:55:28,231 INFO L78 Accepts]: Start accepts. Automaton has 18119 states and 54731 transitions. Word has length 72 [2019-12-07 15:55:28,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:28,231 INFO L462 AbstractCegarLoop]: Abstraction has 18119 states and 54731 transitions. [2019-12-07 15:55:28,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:55:28,232 INFO L276 IsEmpty]: Start isEmpty. Operand 18119 states and 54731 transitions. [2019-12-07 15:55:28,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:28,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:28,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:28,248 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:28,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:28,249 INFO L82 PathProgramCache]: Analyzing trace with hash -14995437, now seen corresponding path program 10 times [2019-12-07 15:55:28,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:28,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992501931] [2019-12-07 15:55:28,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:28,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:28,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:28,875 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1992501931] [2019-12-07 15:55:28,875 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:28,875 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:55:28,875 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995714040] [2019-12-07 15:55:28,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:55:28,876 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:28,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:55:28,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=408, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:55:28,876 INFO L87 Difference]: Start difference. First operand 18119 states and 54731 transitions. Second operand 22 states. [2019-12-07 15:55:31,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:31,496 INFO L93 Difference]: Finished difference Result 25380 states and 76604 transitions. [2019-12-07 15:55:31,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:55:31,496 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:55:31,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:31,528 INFO L225 Difference]: With dead ends: 25380 [2019-12-07 15:55:31,528 INFO L226 Difference]: Without dead ends: 24992 [2019-12-07 15:55:31,529 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 359 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=241, Invalid=1565, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 15:55:31,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24992 states. [2019-12-07 15:55:31,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24992 to 20439. [2019-12-07 15:55:31,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20439 states. [2019-12-07 15:55:31,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20439 states to 20439 states and 61666 transitions. [2019-12-07 15:55:31,848 INFO L78 Accepts]: Start accepts. Automaton has 20439 states and 61666 transitions. Word has length 72 [2019-12-07 15:55:31,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:31,848 INFO L462 AbstractCegarLoop]: Abstraction has 20439 states and 61666 transitions. [2019-12-07 15:55:31,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:55:31,849 INFO L276 IsEmpty]: Start isEmpty. Operand 20439 states and 61666 transitions. [2019-12-07 15:55:31,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:31,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:31,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:31,867 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:31,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:31,867 INFO L82 PathProgramCache]: Analyzing trace with hash -435567995, now seen corresponding path program 11 times [2019-12-07 15:55:31,867 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:31,867 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531042210] [2019-12-07 15:55:31,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:31,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:32,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:32,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531042210] [2019-12-07 15:55:32,279 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:32,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:55:32,279 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866767594] [2019-12-07 15:55:32,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:55:32,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:32,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:55:32,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:55:32,280 INFO L87 Difference]: Start difference. First operand 20439 states and 61666 transitions. Second operand 22 states. [2019-12-07 15:55:33,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:33,892 INFO L93 Difference]: Finished difference Result 44334 states and 134926 transitions. [2019-12-07 15:55:33,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 15:55:33,893 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:55:33,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:33,935 INFO L225 Difference]: With dead ends: 44334 [2019-12-07 15:55:33,935 INFO L226 Difference]: Without dead ends: 38199 [2019-12-07 15:55:33,936 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 462 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=281, Invalid=1699, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 15:55:34,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38199 states. [2019-12-07 15:55:34,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38199 to 20093. [2019-12-07 15:55:34,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20093 states. [2019-12-07 15:55:34,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20093 states to 20093 states and 60861 transitions. [2019-12-07 15:55:34,324 INFO L78 Accepts]: Start accepts. Automaton has 20093 states and 60861 transitions. Word has length 72 [2019-12-07 15:55:34,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:34,324 INFO L462 AbstractCegarLoop]: Abstraction has 20093 states and 60861 transitions. [2019-12-07 15:55:34,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:55:34,324 INFO L276 IsEmpty]: Start isEmpty. Operand 20093 states and 60861 transitions. [2019-12-07 15:55:34,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:34,342 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:34,342 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:34,342 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:34,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:34,343 INFO L82 PathProgramCache]: Analyzing trace with hash -1411887721, now seen corresponding path program 12 times [2019-12-07 15:55:34,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:34,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904464826] [2019-12-07 15:55:34,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:34,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:34,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:34,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [904464826] [2019-12-07 15:55:34,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:34,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:55:34,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1337193946] [2019-12-07 15:55:34,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:55:34,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:34,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:55:34,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:55:34,701 INFO L87 Difference]: Start difference. First operand 20093 states and 60861 transitions. Second operand 20 states. [2019-12-07 15:55:39,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:39,691 INFO L93 Difference]: Finished difference Result 34011 states and 102758 transitions. [2019-12-07 15:55:39,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:55:39,692 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:55:39,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:39,733 INFO L225 Difference]: With dead ends: 34011 [2019-12-07 15:55:39,733 INFO L226 Difference]: Without dead ends: 24576 [2019-12-07 15:55:39,734 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 314 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=202, Invalid=1280, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 15:55:39,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24576 states. [2019-12-07 15:55:40,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24576 to 18500. [2019-12-07 15:55:40,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18500 states. [2019-12-07 15:55:40,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18500 states to 18500 states and 56056 transitions. [2019-12-07 15:55:40,046 INFO L78 Accepts]: Start accepts. Automaton has 18500 states and 56056 transitions. Word has length 72 [2019-12-07 15:55:40,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:40,046 INFO L462 AbstractCegarLoop]: Abstraction has 18500 states and 56056 transitions. [2019-12-07 15:55:40,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:55:40,046 INFO L276 IsEmpty]: Start isEmpty. Operand 18500 states and 56056 transitions. [2019-12-07 15:55:40,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:40,064 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:40,064 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:40,064 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:40,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:40,064 INFO L82 PathProgramCache]: Analyzing trace with hash -1727785529, now seen corresponding path program 13 times [2019-12-07 15:55:40,064 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:40,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241769976] [2019-12-07 15:55:40,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:40,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:40,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:40,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241769976] [2019-12-07 15:55:40,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:40,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:55:40,406 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206255982] [2019-12-07 15:55:40,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:55:40,407 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:40,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:55:40,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:55:40,407 INFO L87 Difference]: Start difference. First operand 18500 states and 56056 transitions. Second operand 17 states. [2019-12-07 15:55:43,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:43,030 INFO L93 Difference]: Finished difference Result 39556 states and 120954 transitions. [2019-12-07 15:55:43,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 15:55:43,030 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:55:43,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:43,073 INFO L225 Difference]: With dead ends: 39556 [2019-12-07 15:55:43,073 INFO L226 Difference]: Without dead ends: 33438 [2019-12-07 15:55:43,074 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 628 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=470, Invalid=2182, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 15:55:43,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33438 states. [2019-12-07 15:55:43,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33438 to 19635. [2019-12-07 15:55:43,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19635 states. [2019-12-07 15:55:43,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19635 states to 19635 states and 59138 transitions. [2019-12-07 15:55:43,457 INFO L78 Accepts]: Start accepts. Automaton has 19635 states and 59138 transitions. Word has length 72 [2019-12-07 15:55:43,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:43,458 INFO L462 AbstractCegarLoop]: Abstraction has 19635 states and 59138 transitions. [2019-12-07 15:55:43,458 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:55:43,458 INFO L276 IsEmpty]: Start isEmpty. Operand 19635 states and 59138 transitions. [2019-12-07 15:55:43,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:43,477 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:43,477 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:43,477 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:43,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:43,477 INFO L82 PathProgramCache]: Analyzing trace with hash -307244833, now seen corresponding path program 14 times [2019-12-07 15:55:43,477 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:43,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809708402] [2019-12-07 15:55:43,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:43,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:43,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:43,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809708402] [2019-12-07 15:55:43,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:43,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:55:43,872 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251636259] [2019-12-07 15:55:43,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:55:43,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:43,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:55:43,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:55:43,873 INFO L87 Difference]: Start difference. First operand 19635 states and 59138 transitions. Second operand 18 states. [2019-12-07 15:55:47,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:47,951 INFO L93 Difference]: Finished difference Result 42878 states and 131551 transitions. [2019-12-07 15:55:47,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2019-12-07 15:55:47,952 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:55:47,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:48,015 INFO L225 Difference]: With dead ends: 42878 [2019-12-07 15:55:48,015 INFO L226 Difference]: Without dead ends: 38444 [2019-12-07 15:55:48,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1069 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=686, Invalid=3346, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 15:55:48,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38444 states. [2019-12-07 15:55:48,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38444 to 15119. [2019-12-07 15:55:48,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15119 states. [2019-12-07 15:55:48,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15119 states to 15119 states and 45009 transitions. [2019-12-07 15:55:48,399 INFO L78 Accepts]: Start accepts. Automaton has 15119 states and 45009 transitions. Word has length 72 [2019-12-07 15:55:48,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:48,399 INFO L462 AbstractCegarLoop]: Abstraction has 15119 states and 45009 transitions. [2019-12-07 15:55:48,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:55:48,399 INFO L276 IsEmpty]: Start isEmpty. Operand 15119 states and 45009 transitions. [2019-12-07 15:55:48,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:48,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:48,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:48,413 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:48,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:48,414 INFO L82 PathProgramCache]: Analyzing trace with hash -804148023, now seen corresponding path program 15 times [2019-12-07 15:55:48,414 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:48,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645656165] [2019-12-07 15:55:48,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:48,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:48,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:48,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645656165] [2019-12-07 15:55:48,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:48,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:55:48,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884882306] [2019-12-07 15:55:48,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:55:48,558 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:48,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:55:48,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:55:48,558 INFO L87 Difference]: Start difference. First operand 15119 states and 45009 transitions. Second operand 9 states. [2019-12-07 15:55:49,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:49,019 INFO L93 Difference]: Finished difference Result 26868 states and 80641 transitions. [2019-12-07 15:55:49,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 15:55:49,019 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 72 [2019-12-07 15:55:49,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:49,047 INFO L225 Difference]: With dead ends: 26868 [2019-12-07 15:55:49,047 INFO L226 Difference]: Without dead ends: 24103 [2019-12-07 15:55:49,047 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=236, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:55:49,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24103 states. [2019-12-07 15:55:49,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24103 to 16122. [2019-12-07 15:55:49,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16122 states. [2019-12-07 15:55:49,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16122 states to 16122 states and 47706 transitions. [2019-12-07 15:55:49,335 INFO L78 Accepts]: Start accepts. Automaton has 16122 states and 47706 transitions. Word has length 72 [2019-12-07 15:55:49,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:49,335 INFO L462 AbstractCegarLoop]: Abstraction has 16122 states and 47706 transitions. [2019-12-07 15:55:49,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:55:49,335 INFO L276 IsEmpty]: Start isEmpty. Operand 16122 states and 47706 transitions. [2019-12-07 15:55:49,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:49,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:49,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:49,350 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:49,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:49,350 INFO L82 PathProgramCache]: Analyzing trace with hash -1716647631, now seen corresponding path program 16 times [2019-12-07 15:55:49,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:49,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624630586] [2019-12-07 15:55:49,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:49,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:49,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:49,513 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624630586] [2019-12-07 15:55:49,513 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:49,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:55:49,514 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349159317] [2019-12-07 15:55:49,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:55:49,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:49,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:55:49,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:55:49,514 INFO L87 Difference]: Start difference. First operand 16122 states and 47706 transitions. Second operand 10 states. [2019-12-07 15:55:50,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:50,126 INFO L93 Difference]: Finished difference Result 27504 states and 81913 transitions. [2019-12-07 15:55:50,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 15:55:50,126 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 72 [2019-12-07 15:55:50,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:50,158 INFO L225 Difference]: With dead ends: 27504 [2019-12-07 15:55:50,158 INFO L226 Difference]: Without dead ends: 24806 [2019-12-07 15:55:50,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=105, Invalid=401, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:55:50,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24806 states. [2019-12-07 15:55:50,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24806 to 16242. [2019-12-07 15:55:50,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16242 states. [2019-12-07 15:55:50,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16242 states to 16242 states and 48023 transitions. [2019-12-07 15:55:50,451 INFO L78 Accepts]: Start accepts. Automaton has 16242 states and 48023 transitions. Word has length 72 [2019-12-07 15:55:50,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:50,452 INFO L462 AbstractCegarLoop]: Abstraction has 16242 states and 48023 transitions. [2019-12-07 15:55:50,452 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:55:50,452 INFO L276 IsEmpty]: Start isEmpty. Operand 16242 states and 48023 transitions. [2019-12-07 15:55:50,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:50,467 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:50,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:50,467 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:50,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:50,467 INFO L82 PathProgramCache]: Analyzing trace with hash 1155901649, now seen corresponding path program 17 times [2019-12-07 15:55:50,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:50,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946341053] [2019-12-07 15:55:50,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:50,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:51,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:51,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [946341053] [2019-12-07 15:55:51,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:51,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 15:55:51,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561566019] [2019-12-07 15:55:51,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 15:55:51,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:51,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 15:55:51,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=536, Unknown=0, NotChecked=0, Total=600 [2019-12-07 15:55:51,672 INFO L87 Difference]: Start difference. First operand 16242 states and 48023 transitions. Second operand 25 states. [2019-12-07 15:55:55,473 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 15:55:56,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:55:56,533 INFO L93 Difference]: Finished difference Result 23815 states and 70372 transitions. [2019-12-07 15:55:56,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 15:55:56,533 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 72 [2019-12-07 15:55:56,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:55:56,561 INFO L225 Difference]: With dead ends: 23815 [2019-12-07 15:55:56,562 INFO L226 Difference]: Without dead ends: 23727 [2019-12-07 15:55:56,562 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 5 SyntacticMatches, 5 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 450 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=284, Invalid=2166, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:55:56,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23727 states. [2019-12-07 15:55:56,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23727 to 18054. [2019-12-07 15:55:56,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18054 states. [2019-12-07 15:55:56,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18054 states to 18054 states and 53462 transitions. [2019-12-07 15:55:56,877 INFO L78 Accepts]: Start accepts. Automaton has 18054 states and 53462 transitions. Word has length 72 [2019-12-07 15:55:56,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:55:56,878 INFO L462 AbstractCegarLoop]: Abstraction has 18054 states and 53462 transitions. [2019-12-07 15:55:56,878 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 15:55:56,878 INFO L276 IsEmpty]: Start isEmpty. Operand 18054 states and 53462 transitions. [2019-12-07 15:55:56,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:55:56,894 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:55:56,894 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:55:56,895 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:55:56,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:55:56,895 INFO L82 PathProgramCache]: Analyzing trace with hash -636396771, now seen corresponding path program 18 times [2019-12-07 15:55:56,895 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:55:56,895 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032411943] [2019-12-07 15:55:56,895 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:55:56,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:55:57,984 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 22 [2019-12-07 15:55:58,375 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 23 [2019-12-07 15:55:58,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:55:58,572 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032411943] [2019-12-07 15:55:58,572 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:55:58,572 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:55:58,572 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1163085168] [2019-12-07 15:55:58,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:55:58,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:55:58,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:55:58,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=578, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:55:58,573 INFO L87 Difference]: Start difference. First operand 18054 states and 53462 transitions. Second operand 26 states. [2019-12-07 15:56:02,626 WARN L192 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 29 [2019-12-07 15:56:03,129 WARN L192 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 32 [2019-12-07 15:56:04,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:04,314 INFO L93 Difference]: Finished difference Result 24872 states and 73514 transitions. [2019-12-07 15:56:04,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:56:04,315 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:56:04,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:04,339 INFO L225 Difference]: With dead ends: 24872 [2019-12-07 15:56:04,339 INFO L226 Difference]: Without dead ends: 22155 [2019-12-07 15:56:04,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=187, Invalid=1535, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:56:04,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22155 states. [2019-12-07 15:56:04,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22155 to 18970. [2019-12-07 15:56:04,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18970 states. [2019-12-07 15:56:04,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18970 states to 18970 states and 56257 transitions. [2019-12-07 15:56:04,630 INFO L78 Accepts]: Start accepts. Automaton has 18970 states and 56257 transitions. Word has length 72 [2019-12-07 15:56:04,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:04,631 INFO L462 AbstractCegarLoop]: Abstraction has 18970 states and 56257 transitions. [2019-12-07 15:56:04,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:56:04,631 INFO L276 IsEmpty]: Start isEmpty. Operand 18970 states and 56257 transitions. [2019-12-07 15:56:04,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:04,649 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:04,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:04,649 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:04,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:04,650 INFO L82 PathProgramCache]: Analyzing trace with hash 243402041, now seen corresponding path program 19 times [2019-12-07 15:56:04,650 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:04,650 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869416306] [2019-12-07 15:56:04,650 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:04,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:04,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:04,794 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869416306] [2019-12-07 15:56:04,794 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:04,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 15:56:04,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1368321004] [2019-12-07 15:56:04,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 15:56:04,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:04,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 15:56:04,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:56:04,795 INFO L87 Difference]: Start difference. First operand 18970 states and 56257 transitions. Second operand 13 states. [2019-12-07 15:56:05,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:05,468 INFO L93 Difference]: Finished difference Result 26935 states and 80046 transitions. [2019-12-07 15:56:05,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 15:56:05,468 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 72 [2019-12-07 15:56:05,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:05,490 INFO L225 Difference]: With dead ends: 26935 [2019-12-07 15:56:05,490 INFO L226 Difference]: Without dead ends: 23399 [2019-12-07 15:56:05,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=69, Invalid=311, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:56:05,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23399 states. [2019-12-07 15:56:05,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23399 to 18305. [2019-12-07 15:56:05,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18305 states. [2019-12-07 15:56:05,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18305 states to 18305 states and 54501 transitions. [2019-12-07 15:56:05,761 INFO L78 Accepts]: Start accepts. Automaton has 18305 states and 54501 transitions. Word has length 72 [2019-12-07 15:56:05,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:05,761 INFO L462 AbstractCegarLoop]: Abstraction has 18305 states and 54501 transitions. [2019-12-07 15:56:05,761 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 15:56:05,761 INFO L276 IsEmpty]: Start isEmpty. Operand 18305 states and 54501 transitions. [2019-12-07 15:56:05,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:05,778 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:05,778 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:05,778 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:05,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:05,779 INFO L82 PathProgramCache]: Analyzing trace with hash 1573372845, now seen corresponding path program 20 times [2019-12-07 15:56:05,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:05,779 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224408457] [2019-12-07 15:56:05,779 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:05,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:06,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:06,251 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224408457] [2019-12-07 15:56:06,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:06,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:56:06,252 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [197998144] [2019-12-07 15:56:06,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:56:06,252 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:06,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:56:06,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:56:06,253 INFO L87 Difference]: Start difference. First operand 18305 states and 54501 transitions. Second operand 19 states. [2019-12-07 15:56:07,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:07,826 INFO L93 Difference]: Finished difference Result 27387 states and 80916 transitions. [2019-12-07 15:56:07,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 15:56:07,826 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:56:07,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:07,853 INFO L225 Difference]: With dead ends: 27387 [2019-12-07 15:56:07,853 INFO L226 Difference]: Without dead ends: 24569 [2019-12-07 15:56:07,854 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=193, Invalid=1213, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 15:56:07,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24569 states. [2019-12-07 15:56:08,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24569 to 17236. [2019-12-07 15:56:08,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17236 states. [2019-12-07 15:56:08,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17236 states to 17236 states and 51046 transitions. [2019-12-07 15:56:08,146 INFO L78 Accepts]: Start accepts. Automaton has 17236 states and 51046 transitions. Word has length 72 [2019-12-07 15:56:08,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:08,146 INFO L462 AbstractCegarLoop]: Abstraction has 17236 states and 51046 transitions. [2019-12-07 15:56:08,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:56:08,146 INFO L276 IsEmpty]: Start isEmpty. Operand 17236 states and 51046 transitions. [2019-12-07 15:56:08,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:08,162 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:08,162 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:08,163 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:08,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:08,163 INFO L82 PathProgramCache]: Analyzing trace with hash 660873237, now seen corresponding path program 21 times [2019-12-07 15:56:08,163 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:08,163 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [635982849] [2019-12-07 15:56:08,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:08,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:08,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:08,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [635982849] [2019-12-07 15:56:08,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:08,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 15:56:08,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092283226] [2019-12-07 15:56:08,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 15:56:08,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:08,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 15:56:08,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:56:08,390 INFO L87 Difference]: Start difference. First operand 17236 states and 51046 transitions. Second operand 13 states. [2019-12-07 15:56:10,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:10,159 INFO L93 Difference]: Finished difference Result 29615 states and 88469 transitions. [2019-12-07 15:56:10,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 15:56:10,160 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 72 [2019-12-07 15:56:10,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:10,202 INFO L225 Difference]: With dead ends: 29615 [2019-12-07 15:56:10,202 INFO L226 Difference]: Without dead ends: 26885 [2019-12-07 15:56:10,202 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=161, Invalid=651, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:56:10,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26885 states. [2019-12-07 15:56:10,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26885 to 17262. [2019-12-07 15:56:10,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17262 states. [2019-12-07 15:56:10,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17262 states to 17262 states and 51127 transitions. [2019-12-07 15:56:10,530 INFO L78 Accepts]: Start accepts. Automaton has 17262 states and 51127 transitions. Word has length 72 [2019-12-07 15:56:10,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:10,530 INFO L462 AbstractCegarLoop]: Abstraction has 17262 states and 51127 transitions. [2019-12-07 15:56:10,530 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 15:56:10,530 INFO L276 IsEmpty]: Start isEmpty. Operand 17262 states and 51127 transitions. [2019-12-07 15:56:10,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:10,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:10,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:10,545 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:10,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:10,545 INFO L82 PathProgramCache]: Analyzing trace with hash 282845289, now seen corresponding path program 22 times [2019-12-07 15:56:10,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:10,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1975905708] [2019-12-07 15:56:10,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:10,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:10,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:10,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1975905708] [2019-12-07 15:56:10,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:10,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:56:10,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2113556349] [2019-12-07 15:56:10,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:56:10,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:10,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:56:10,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:56:10,985 INFO L87 Difference]: Start difference. First operand 17262 states and 51127 transitions. Second operand 15 states. [2019-12-07 15:56:12,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:12,457 INFO L93 Difference]: Finished difference Result 29621 states and 87609 transitions. [2019-12-07 15:56:12,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:56:12,457 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:56:12,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:12,490 INFO L225 Difference]: With dead ends: 29621 [2019-12-07 15:56:12,491 INFO L226 Difference]: Without dead ends: 27067 [2019-12-07 15:56:12,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 310 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=234, Invalid=1248, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 15:56:12,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27067 states. [2019-12-07 15:56:12,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27067 to 17477. [2019-12-07 15:56:12,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17477 states. [2019-12-07 15:56:12,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17477 states to 17477 states and 51775 transitions. [2019-12-07 15:56:12,802 INFO L78 Accepts]: Start accepts. Automaton has 17477 states and 51775 transitions. Word has length 72 [2019-12-07 15:56:12,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:12,802 INFO L462 AbstractCegarLoop]: Abstraction has 17477 states and 51775 transitions. [2019-12-07 15:56:12,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:56:12,802 INFO L276 IsEmpty]: Start isEmpty. Operand 17477 states and 51775 transitions. [2019-12-07 15:56:12,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:12,818 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:12,818 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:12,818 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:12,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:12,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1183327495, now seen corresponding path program 23 times [2019-12-07 15:56:12,818 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:12,818 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501541262] [2019-12-07 15:56:12,819 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:12,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:13,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:13,117 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501541262] [2019-12-07 15:56:13,117 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:13,117 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:56:13,117 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1528279090] [2019-12-07 15:56:13,118 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:56:13,118 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:13,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:56:13,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:56:13,118 INFO L87 Difference]: Start difference. First operand 17477 states and 51775 transitions. Second operand 18 states. [2019-12-07 15:56:16,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:16,819 INFO L93 Difference]: Finished difference Result 33685 states and 99771 transitions. [2019-12-07 15:56:16,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 15:56:16,820 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:56:16,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:16,854 INFO L225 Difference]: With dead ends: 33685 [2019-12-07 15:56:16,854 INFO L226 Difference]: Without dead ends: 28368 [2019-12-07 15:56:16,855 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=381, Invalid=1971, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 15:56:16,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28368 states. [2019-12-07 15:56:17,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28368 to 18574. [2019-12-07 15:56:17,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18574 states. [2019-12-07 15:56:17,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18574 states to 18574 states and 54783 transitions. [2019-12-07 15:56:17,190 INFO L78 Accepts]: Start accepts. Automaton has 18574 states and 54783 transitions. Word has length 72 [2019-12-07 15:56:17,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:17,190 INFO L462 AbstractCegarLoop]: Abstraction has 18574 states and 54783 transitions. [2019-12-07 15:56:17,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:56:17,190 INFO L276 IsEmpty]: Start isEmpty. Operand 18574 states and 54783 transitions. [2019-12-07 15:56:17,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:17,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:17,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:17,207 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:17,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:17,207 INFO L82 PathProgramCache]: Analyzing trace with hash 785187331, now seen corresponding path program 24 times [2019-12-07 15:56:17,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:17,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481327139] [2019-12-07 15:56:17,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:17,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:17,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:17,675 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481327139] [2019-12-07 15:56:17,675 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:17,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:56:17,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184777249] [2019-12-07 15:56:17,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:56:17,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:17,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:56:17,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:56:17,676 INFO L87 Difference]: Start difference. First operand 18574 states and 54783 transitions. Second operand 18 states. [2019-12-07 15:56:19,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:19,835 INFO L93 Difference]: Finished difference Result 38337 states and 115549 transitions. [2019-12-07 15:56:19,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:56:19,836 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:56:19,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:19,880 INFO L225 Difference]: With dead ends: 38337 [2019-12-07 15:56:19,880 INFO L226 Difference]: Without dead ends: 35957 [2019-12-07 15:56:19,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 383 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=313, Invalid=1579, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 15:56:19,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35957 states. [2019-12-07 15:56:20,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35957 to 19304. [2019-12-07 15:56:20,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19304 states. [2019-12-07 15:56:20,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19304 states to 19304 states and 56934 transitions. [2019-12-07 15:56:20,275 INFO L78 Accepts]: Start accepts. Automaton has 19304 states and 56934 transitions. Word has length 72 [2019-12-07 15:56:20,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:20,275 INFO L462 AbstractCegarLoop]: Abstraction has 19304 states and 56934 transitions. [2019-12-07 15:56:20,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:56:20,275 INFO L276 IsEmpty]: Start isEmpty. Operand 19304 states and 56934 transitions. [2019-12-07 15:56:20,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:20,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:20,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:20,293 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:20,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:20,294 INFO L82 PathProgramCache]: Analyzing trace with hash 722700575, now seen corresponding path program 25 times [2019-12-07 15:56:20,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:20,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499547662] [2019-12-07 15:56:20,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:20,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:20,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:20,692 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1499547662] [2019-12-07 15:56:20,692 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:20,692 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:56:20,692 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062567458] [2019-12-07 15:56:20,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:56:20,692 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:20,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:56:20,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:56:20,693 INFO L87 Difference]: Start difference. First operand 19304 states and 56934 transitions. Second operand 21 states. [2019-12-07 15:56:24,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:24,782 INFO L93 Difference]: Finished difference Result 28789 states and 83834 transitions. [2019-12-07 15:56:24,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 15:56:24,782 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 72 [2019-12-07 15:56:24,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:24,812 INFO L225 Difference]: With dead ends: 28789 [2019-12-07 15:56:24,813 INFO L226 Difference]: Without dead ends: 27821 [2019-12-07 15:56:24,814 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1021 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=572, Invalid=3588, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 15:56:24,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27821 states. [2019-12-07 15:56:25,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27821 to 19970. [2019-12-07 15:56:25,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19970 states. [2019-12-07 15:56:25,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19970 states to 19970 states and 58894 transitions. [2019-12-07 15:56:25,148 INFO L78 Accepts]: Start accepts. Automaton has 19970 states and 58894 transitions. Word has length 72 [2019-12-07 15:56:25,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:25,148 INFO L462 AbstractCegarLoop]: Abstraction has 19970 states and 58894 transitions. [2019-12-07 15:56:25,149 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:56:25,149 INFO L276 IsEmpty]: Start isEmpty. Operand 19970 states and 58894 transitions. [2019-12-07 15:56:25,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:25,168 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:25,168 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:25,168 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:25,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:25,168 INFO L82 PathProgramCache]: Analyzing trace with hash 1652567909, now seen corresponding path program 26 times [2019-12-07 15:56:25,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:25,168 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418611240] [2019-12-07 15:56:25,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:25,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:25,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:25,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418611240] [2019-12-07 15:56:25,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:25,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:56:25,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [928669971] [2019-12-07 15:56:25,664 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:56:25,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:25,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:56:25,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:56:25,664 INFO L87 Difference]: Start difference. First operand 19970 states and 58894 transitions. Second operand 18 states. [2019-12-07 15:56:28,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:28,523 INFO L93 Difference]: Finished difference Result 31602 states and 92970 transitions. [2019-12-07 15:56:28,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 15:56:28,524 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:56:28,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:28,557 INFO L225 Difference]: With dead ends: 31602 [2019-12-07 15:56:28,558 INFO L226 Difference]: Without dead ends: 27830 [2019-12-07 15:56:28,559 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 486 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=366, Invalid=1796, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 15:56:28,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27830 states. [2019-12-07 15:56:28,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27830 to 19602. [2019-12-07 15:56:28,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19602 states. [2019-12-07 15:56:28,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19602 states to 19602 states and 57693 transitions. [2019-12-07 15:56:28,899 INFO L78 Accepts]: Start accepts. Automaton has 19602 states and 57693 transitions. Word has length 72 [2019-12-07 15:56:28,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:28,899 INFO L462 AbstractCegarLoop]: Abstraction has 19602 states and 57693 transitions. [2019-12-07 15:56:28,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:56:28,899 INFO L276 IsEmpty]: Start isEmpty. Operand 19602 states and 57693 transitions. [2019-12-07 15:56:28,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:28,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:28,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:28,918 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:28,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:28,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1963709559, now seen corresponding path program 27 times [2019-12-07 15:56:28,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:28,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447629662] [2019-12-07 15:56:28,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:28,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:29,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:29,212 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447629662] [2019-12-07 15:56:29,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:29,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:56:29,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065413647] [2019-12-07 15:56:29,213 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:56:29,213 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:29,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:56:29,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:56:29,213 INFO L87 Difference]: Start difference. First operand 19602 states and 57693 transitions. Second operand 15 states. [2019-12-07 15:56:30,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:30,258 INFO L93 Difference]: Finished difference Result 26653 states and 78322 transitions. [2019-12-07 15:56:30,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 15:56:30,258 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:56:30,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:30,288 INFO L225 Difference]: With dead ends: 26653 [2019-12-07 15:56:30,288 INFO L226 Difference]: Without dead ends: 25681 [2019-12-07 15:56:30,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 217 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=206, Invalid=916, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 15:56:30,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25681 states. [2019-12-07 15:56:30,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25681 to 19597. [2019-12-07 15:56:30,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19597 states. [2019-12-07 15:56:30,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19597 states to 19597 states and 57674 transitions. [2019-12-07 15:56:30,603 INFO L78 Accepts]: Start accepts. Automaton has 19597 states and 57674 transitions. Word has length 72 [2019-12-07 15:56:30,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:30,603 INFO L462 AbstractCegarLoop]: Abstraction has 19597 states and 57674 transitions. [2019-12-07 15:56:30,603 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:56:30,603 INFO L276 IsEmpty]: Start isEmpty. Operand 19597 states and 57674 transitions. [2019-12-07 15:56:30,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:30,622 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:30,622 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:30,622 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:30,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:30,622 INFO L82 PathProgramCache]: Analyzing trace with hash 890617937, now seen corresponding path program 28 times [2019-12-07 15:56:30,622 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:30,622 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274660652] [2019-12-07 15:56:30,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:30,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:31,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:31,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274660652] [2019-12-07 15:56:31,115 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:31,115 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:56:31,115 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2101342716] [2019-12-07 15:56:31,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:56:31,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:31,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:56:31,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:56:31,116 INFO L87 Difference]: Start difference. First operand 19597 states and 57674 transitions. Second operand 17 states. [2019-12-07 15:56:34,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:34,610 INFO L93 Difference]: Finished difference Result 35736 states and 106777 transitions. [2019-12-07 15:56:34,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:56:34,611 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:56:34,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:34,661 INFO L225 Difference]: With dead ends: 35736 [2019-12-07 15:56:34,661 INFO L226 Difference]: Without dead ends: 34033 [2019-12-07 15:56:34,661 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 343 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=264, Invalid=1376, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 15:56:34,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34033 states. [2019-12-07 15:56:35,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34033 to 18707. [2019-12-07 15:56:35,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18707 states. [2019-12-07 15:56:35,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18707 states to 18707 states and 55185 transitions. [2019-12-07 15:56:35,039 INFO L78 Accepts]: Start accepts. Automaton has 18707 states and 55185 transitions. Word has length 72 [2019-12-07 15:56:35,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:35,039 INFO L462 AbstractCegarLoop]: Abstraction has 18707 states and 55185 transitions. [2019-12-07 15:56:35,040 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:56:35,040 INFO L276 IsEmpty]: Start isEmpty. Operand 18707 states and 55185 transitions. [2019-12-07 15:56:35,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:35,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:35,058 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:35,058 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:35,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:35,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1559250949, now seen corresponding path program 29 times [2019-12-07 15:56:35,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:35,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157434259] [2019-12-07 15:56:35,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:35,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:35,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:35,616 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157434259] [2019-12-07 15:56:35,616 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:35,616 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:56:35,616 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1534456547] [2019-12-07 15:56:35,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:56:35,617 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:35,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:56:35,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=577, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:56:35,617 INFO L87 Difference]: Start difference. First operand 18707 states and 55185 transitions. Second operand 26 states. [2019-12-07 15:56:38,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:38,800 INFO L93 Difference]: Finished difference Result 33378 states and 99027 transitions. [2019-12-07 15:56:38,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 15:56:38,800 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:56:38,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:38,837 INFO L225 Difference]: With dead ends: 33378 [2019-12-07 15:56:38,837 INFO L226 Difference]: Without dead ends: 30754 [2019-12-07 15:56:38,837 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 781 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=371, Invalid=2821, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 15:56:38,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30754 states. [2019-12-07 15:56:39,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30754 to 19983. [2019-12-07 15:56:39,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19983 states. [2019-12-07 15:56:39,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19983 states to 19983 states and 58959 transitions. [2019-12-07 15:56:39,195 INFO L78 Accepts]: Start accepts. Automaton has 19983 states and 58959 transitions. Word has length 72 [2019-12-07 15:56:39,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:39,195 INFO L462 AbstractCegarLoop]: Abstraction has 19983 states and 58959 transitions. [2019-12-07 15:56:39,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:56:39,195 INFO L276 IsEmpty]: Start isEmpty. Operand 19983 states and 58959 transitions. [2019-12-07 15:56:39,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:39,214 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:39,214 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:39,214 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:39,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:39,214 INFO L82 PathProgramCache]: Analyzing trace with hash 929197899, now seen corresponding path program 30 times [2019-12-07 15:56:39,214 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:39,215 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949725903] [2019-12-07 15:56:39,215 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:39,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:40,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:40,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949725903] [2019-12-07 15:56:40,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:40,233 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:56:40,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2083667876] [2019-12-07 15:56:40,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:56:40,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:40,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:56:40,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=408, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:56:40,234 INFO L87 Difference]: Start difference. First operand 19983 states and 58959 transitions. Second operand 22 states. [2019-12-07 15:56:41,295 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 28 [2019-12-07 15:56:41,856 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:56:45,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:45,516 INFO L93 Difference]: Finished difference Result 27140 states and 79319 transitions. [2019-12-07 15:56:45,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 15:56:45,517 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:56:45,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:45,549 INFO L225 Difference]: With dead ends: 27140 [2019-12-07 15:56:45,549 INFO L226 Difference]: Without dead ends: 26852 [2019-12-07 15:56:45,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 463 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=337, Invalid=2015, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 15:56:45,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26852 states. [2019-12-07 15:56:45,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26852 to 20129. [2019-12-07 15:56:45,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20129 states. [2019-12-07 15:56:45,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20129 states to 20129 states and 59293 transitions. [2019-12-07 15:56:45,884 INFO L78 Accepts]: Start accepts. Automaton has 20129 states and 59293 transitions. Word has length 72 [2019-12-07 15:56:45,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:45,885 INFO L462 AbstractCegarLoop]: Abstraction has 20129 states and 59293 transitions. [2019-12-07 15:56:45,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:56:45,885 INFO L276 IsEmpty]: Start isEmpty. Operand 20129 states and 59293 transitions. [2019-12-07 15:56:45,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:45,903 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:45,903 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:45,903 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:45,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:45,903 INFO L82 PathProgramCache]: Analyzing trace with hash 483432761, now seen corresponding path program 31 times [2019-12-07 15:56:45,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:45,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588848465] [2019-12-07 15:56:45,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:45,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:46,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:46,258 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588848465] [2019-12-07 15:56:46,258 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:46,258 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:56:46,258 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1321136025] [2019-12-07 15:56:46,259 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:56:46,259 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:46,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:56:46,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:56:46,259 INFO L87 Difference]: Start difference. First operand 20129 states and 59293 transitions. Second operand 21 states. [2019-12-07 15:56:48,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:48,791 INFO L93 Difference]: Finished difference Result 25911 states and 75707 transitions. [2019-12-07 15:56:48,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 15:56:48,791 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 72 [2019-12-07 15:56:48,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:48,823 INFO L225 Difference]: With dead ends: 25911 [2019-12-07 15:56:48,823 INFO L226 Difference]: Without dead ends: 25785 [2019-12-07 15:56:48,823 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 558 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=364, Invalid=2288, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 15:56:48,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25785 states. [2019-12-07 15:56:49,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25785 to 20075. [2019-12-07 15:56:49,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20075 states. [2019-12-07 15:56:49,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20075 states to 20075 states and 59188 transitions. [2019-12-07 15:56:49,155 INFO L78 Accepts]: Start accepts. Automaton has 20075 states and 59188 transitions. Word has length 72 [2019-12-07 15:56:49,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:49,156 INFO L462 AbstractCegarLoop]: Abstraction has 20075 states and 59188 transitions. [2019-12-07 15:56:49,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:56:49,156 INFO L276 IsEmpty]: Start isEmpty. Operand 20075 states and 59188 transitions. [2019-12-07 15:56:49,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:49,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:49,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:49,174 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:49,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:49,174 INFO L82 PathProgramCache]: Analyzing trace with hash -150340087, now seen corresponding path program 32 times [2019-12-07 15:56:49,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:49,174 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273911846] [2019-12-07 15:56:49,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:49,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:50,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:50,013 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273911846] [2019-12-07 15:56:50,013 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:50,013 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:56:50,013 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985864072] [2019-12-07 15:56:50,013 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:56:50,013 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:50,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:56:50,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:56:50,014 INFO L87 Difference]: Start difference. First operand 20075 states and 59188 transitions. Second operand 22 states. [2019-12-07 15:56:52,679 WARN L192 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 35 [2019-12-07 15:56:55,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:56:55,441 INFO L93 Difference]: Finished difference Result 27460 states and 80355 transitions. [2019-12-07 15:56:55,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 15:56:55,441 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:56:55,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:56:55,473 INFO L225 Difference]: With dead ends: 27460 [2019-12-07 15:56:55,473 INFO L226 Difference]: Without dead ends: 27166 [2019-12-07 15:56:55,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 491 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=353, Invalid=2097, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:56:55,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27166 states. [2019-12-07 15:56:55,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27166 to 20045. [2019-12-07 15:56:55,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20045 states. [2019-12-07 15:56:55,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20045 states to 20045 states and 59119 transitions. [2019-12-07 15:56:55,835 INFO L78 Accepts]: Start accepts. Automaton has 20045 states and 59119 transitions. Word has length 72 [2019-12-07 15:56:55,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:56:55,835 INFO L462 AbstractCegarLoop]: Abstraction has 20045 states and 59119 transitions. [2019-12-07 15:56:55,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:56:55,835 INFO L276 IsEmpty]: Start isEmpty. Operand 20045 states and 59119 transitions. [2019-12-07 15:56:55,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:56:55,861 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:56:55,861 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:56:55,862 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:56:55,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:56:55,862 INFO L82 PathProgramCache]: Analyzing trace with hash -958248101, now seen corresponding path program 33 times [2019-12-07 15:56:55,862 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:56:55,862 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703203025] [2019-12-07 15:56:55,862 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:56:55,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:56:56,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:56:56,173 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703203025] [2019-12-07 15:56:56,173 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:56:56,173 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:56:56,173 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [353537762] [2019-12-07 15:56:56,173 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:56:56,174 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:56:56,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:56:56,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:56:56,174 INFO L87 Difference]: Start difference. First operand 20045 states and 59119 transitions. Second operand 20 states. [2019-12-07 15:57:00,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:00,818 INFO L93 Difference]: Finished difference Result 25868 states and 75618 transitions. [2019-12-07 15:57:00,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 15:57:00,818 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:57:00,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:00,850 INFO L225 Difference]: With dead ends: 25868 [2019-12-07 15:57:00,851 INFO L226 Difference]: Without dead ends: 25609 [2019-12-07 15:57:00,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 498 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=326, Invalid=2026, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 15:57:00,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25609 states. [2019-12-07 15:57:01,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25609 to 20043. [2019-12-07 15:57:01,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20043 states. [2019-12-07 15:57:01,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20043 states to 20043 states and 59115 transitions. [2019-12-07 15:57:01,183 INFO L78 Accepts]: Start accepts. Automaton has 20043 states and 59115 transitions. Word has length 72 [2019-12-07 15:57:01,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:01,184 INFO L462 AbstractCegarLoop]: Abstraction has 20043 states and 59115 transitions. [2019-12-07 15:57:01,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:57:01,184 INFO L276 IsEmpty]: Start isEmpty. Operand 20043 states and 59115 transitions. [2019-12-07 15:57:01,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:01,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:01,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:01,202 INFO L410 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:01,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:01,202 INFO L82 PathProgramCache]: Analyzing trace with hash 1760348363, now seen corresponding path program 34 times [2019-12-07 15:57:01,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:01,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216020569] [2019-12-07 15:57:01,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:01,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:01,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:01,630 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216020569] [2019-12-07 15:57:01,630 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:01,630 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:57:01,630 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104442606] [2019-12-07 15:57:01,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:57:01,630 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:01,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:57:01,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:57:01,630 INFO L87 Difference]: Start difference. First operand 20043 states and 59115 transitions. Second operand 18 states. [2019-12-07 15:57:05,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:05,876 INFO L93 Difference]: Finished difference Result 29736 states and 87116 transitions. [2019-12-07 15:57:05,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 15:57:05,876 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:57:05,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:05,910 INFO L225 Difference]: With dead ends: 29736 [2019-12-07 15:57:05,910 INFO L226 Difference]: Without dead ends: 28369 [2019-12-07 15:57:05,910 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 555 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=386, Invalid=1966, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 15:57:05,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28369 states. [2019-12-07 15:57:06,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28369 to 19872. [2019-12-07 15:57:06,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19872 states. [2019-12-07 15:57:06,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19872 states to 19872 states and 58696 transitions. [2019-12-07 15:57:06,256 INFO L78 Accepts]: Start accepts. Automaton has 19872 states and 58696 transitions. Word has length 72 [2019-12-07 15:57:06,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:06,256 INFO L462 AbstractCegarLoop]: Abstraction has 19872 states and 58696 transitions. [2019-12-07 15:57:06,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:57:06,256 INFO L276 IsEmpty]: Start isEmpty. Operand 19872 states and 58696 transitions. [2019-12-07 15:57:06,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:06,273 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:06,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:06,274 INFO L410 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:06,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:06,274 INFO L82 PathProgramCache]: Analyzing trace with hash -466752735, now seen corresponding path program 35 times [2019-12-07 15:57:06,274 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:06,274 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577221256] [2019-12-07 15:57:06,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:06,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:06,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:06,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577221256] [2019-12-07 15:57:06,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:06,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 15:57:06,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774335752] [2019-12-07 15:57:06,549 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 15:57:06,549 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:06,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 15:57:06,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2019-12-07 15:57:06,549 INFO L87 Difference]: Start difference. First operand 19872 states and 58696 transitions. Second operand 14 states. [2019-12-07 15:57:07,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:07,612 INFO L93 Difference]: Finished difference Result 31589 states and 94158 transitions. [2019-12-07 15:57:07,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 15:57:07,612 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 72 [2019-12-07 15:57:07,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:07,693 INFO L225 Difference]: With dead ends: 31589 [2019-12-07 15:57:07,693 INFO L226 Difference]: Without dead ends: 28963 [2019-12-07 15:57:07,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=189, Invalid=741, Unknown=0, NotChecked=0, Total=930 [2019-12-07 15:57:07,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28963 states. [2019-12-07 15:57:07,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28963 to 19671. [2019-12-07 15:57:07,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19671 states. [2019-12-07 15:57:08,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19671 states to 19671 states and 58158 transitions. [2019-12-07 15:57:08,007 INFO L78 Accepts]: Start accepts. Automaton has 19671 states and 58158 transitions. Word has length 72 [2019-12-07 15:57:08,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:08,008 INFO L462 AbstractCegarLoop]: Abstraction has 19671 states and 58158 transitions. [2019-12-07 15:57:08,008 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 15:57:08,008 INFO L276 IsEmpty]: Start isEmpty. Operand 19671 states and 58158 transitions. [2019-12-07 15:57:08,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:08,025 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:08,025 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:08,025 INFO L410 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:08,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:08,025 INFO L82 PathProgramCache]: Analyzing trace with hash -1379252343, now seen corresponding path program 36 times [2019-12-07 15:57:08,026 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:08,026 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745949244] [2019-12-07 15:57:08,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:08,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:08,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:08,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745949244] [2019-12-07 15:57:08,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:08,962 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:57:08,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856070498] [2019-12-07 15:57:08,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:57:08,962 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:08,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:57:08,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=636, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:57:08,962 INFO L87 Difference]: Start difference. First operand 19671 states and 58158 transitions. Second operand 27 states. [2019-12-07 15:57:13,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:13,449 INFO L93 Difference]: Finished difference Result 27867 states and 82538 transitions. [2019-12-07 15:57:13,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 15:57:13,449 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:57:13,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:13,482 INFO L225 Difference]: With dead ends: 27867 [2019-12-07 15:57:13,482 INFO L226 Difference]: Without dead ends: 27835 [2019-12-07 15:57:13,482 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 624 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=381, Invalid=2811, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 15:57:13,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27835 states. [2019-12-07 15:57:13,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27835 to 20046. [2019-12-07 15:57:13,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20046 states. [2019-12-07 15:57:13,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20046 states to 20046 states and 59332 transitions. [2019-12-07 15:57:13,826 INFO L78 Accepts]: Start accepts. Automaton has 20046 states and 59332 transitions. Word has length 72 [2019-12-07 15:57:13,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:13,826 INFO L462 AbstractCegarLoop]: Abstraction has 20046 states and 59332 transitions. [2019-12-07 15:57:13,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:57:13,826 INFO L276 IsEmpty]: Start isEmpty. Operand 20046 states and 59332 transitions. [2019-12-07 15:57:13,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:13,844 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:13,844 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:13,844 INFO L410 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:13,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:13,844 INFO L82 PathProgramCache]: Analyzing trace with hash 1694911097, now seen corresponding path program 37 times [2019-12-07 15:57:13,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:13,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344958475] [2019-12-07 15:57:13,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:13,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:14,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:14,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344958475] [2019-12-07 15:57:14,136 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:14,136 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:57:14,137 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378268948] [2019-12-07 15:57:14,137 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:57:14,137 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:14,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:57:14,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:57:14,137 INFO L87 Difference]: Start difference. First operand 20046 states and 59332 transitions. Second operand 15 states. [2019-12-07 15:57:15,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:15,502 INFO L93 Difference]: Finished difference Result 30418 states and 90418 transitions. [2019-12-07 15:57:15,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 15:57:15,502 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:57:15,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:15,542 INFO L225 Difference]: With dead ends: 30418 [2019-12-07 15:57:15,543 INFO L226 Difference]: Without dead ends: 29102 [2019-12-07 15:57:15,543 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 309 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=272, Invalid=1210, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 15:57:15,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29102 states. [2019-12-07 15:57:15,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29102 to 19634. [2019-12-07 15:57:15,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19634 states. [2019-12-07 15:57:15,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19634 states to 19634 states and 58044 transitions. [2019-12-07 15:57:15,899 INFO L78 Accepts]: Start accepts. Automaton has 19634 states and 58044 transitions. Word has length 72 [2019-12-07 15:57:15,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:15,899 INFO L462 AbstractCegarLoop]: Abstraction has 19634 states and 58044 transitions. [2019-12-07 15:57:15,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:57:15,899 INFO L276 IsEmpty]: Start isEmpty. Operand 19634 states and 58044 transitions. [2019-12-07 15:57:15,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:15,917 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:15,917 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:15,917 INFO L410 AbstractCegarLoop]: === Iteration 51 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:15,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:15,917 INFO L82 PathProgramCache]: Analyzing trace with hash -555982389, now seen corresponding path program 38 times [2019-12-07 15:57:15,917 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:15,917 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461765008] [2019-12-07 15:57:15,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:15,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:16,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:16,148 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461765008] [2019-12-07 15:57:16,148 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:16,148 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:57:16,148 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677455885] [2019-12-07 15:57:16,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:57:16,148 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:16,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:57:16,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:57:16,149 INFO L87 Difference]: Start difference. First operand 19634 states and 58044 transitions. Second operand 18 states. [2019-12-07 15:57:18,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:18,208 INFO L93 Difference]: Finished difference Result 33208 states and 98134 transitions. [2019-12-07 15:57:18,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 15:57:18,209 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:57:18,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:18,248 INFO L225 Difference]: With dead ends: 33208 [2019-12-07 15:57:18,248 INFO L226 Difference]: Without dead ends: 28150 [2019-12-07 15:57:18,249 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 496 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=323, Invalid=1839, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 15:57:18,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28150 states. [2019-12-07 15:57:18,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28150 to 20107. [2019-12-07 15:57:18,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20107 states. [2019-12-07 15:57:18,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20107 states to 20107 states and 59438 transitions. [2019-12-07 15:57:18,590 INFO L78 Accepts]: Start accepts. Automaton has 20107 states and 59438 transitions. Word has length 72 [2019-12-07 15:57:18,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:18,590 INFO L462 AbstractCegarLoop]: Abstraction has 20107 states and 59438 transitions. [2019-12-07 15:57:18,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:57:18,590 INFO L276 IsEmpty]: Start isEmpty. Operand 20107 states and 59438 transitions. [2019-12-07 15:57:18,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:18,608 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:18,608 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:18,608 INFO L410 AbstractCegarLoop]: === Iteration 52 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:18,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:18,608 INFO L82 PathProgramCache]: Analyzing trace with hash -954122553, now seen corresponding path program 39 times [2019-12-07 15:57:18,608 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:18,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638198585] [2019-12-07 15:57:18,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:18,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:19,529 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 33 [2019-12-07 15:57:19,848 WARN L192 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 29 [2019-12-07 15:57:20,052 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 30 [2019-12-07 15:57:21,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:21,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638198585] [2019-12-07 15:57:21,155 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:21,155 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [33] imperfect sequences [] total 33 [2019-12-07 15:57:21,155 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1590670000] [2019-12-07 15:57:21,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 35 states [2019-12-07 15:57:21,155 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:21,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2019-12-07 15:57:21,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=1085, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 15:57:21,156 INFO L87 Difference]: Start difference. First operand 20107 states and 59438 transitions. Second operand 35 states. [2019-12-07 15:57:29,075 WARN L192 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 32 [2019-12-07 15:57:29,758 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2019-12-07 15:57:36,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:36,932 INFO L93 Difference]: Finished difference Result 27450 states and 80562 transitions. [2019-12-07 15:57:36,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2019-12-07 15:57:36,932 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 72 [2019-12-07 15:57:36,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:36,962 INFO L225 Difference]: With dead ends: 27450 [2019-12-07 15:57:36,962 INFO L226 Difference]: Without dead ends: 27376 [2019-12-07 15:57:36,963 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1621 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=719, Invalid=6421, Unknown=0, NotChecked=0, Total=7140 [2019-12-07 15:57:37,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27376 states. [2019-12-07 15:57:37,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27376 to 24847. [2019-12-07 15:57:37,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24847 states. [2019-12-07 15:57:37,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24847 states to 24847 states and 73509 transitions. [2019-12-07 15:57:37,352 INFO L78 Accepts]: Start accepts. Automaton has 24847 states and 73509 transitions. Word has length 72 [2019-12-07 15:57:37,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:37,353 INFO L462 AbstractCegarLoop]: Abstraction has 24847 states and 73509 transitions. [2019-12-07 15:57:37,353 INFO L463 AbstractCegarLoop]: Interpolant automaton has 35 states. [2019-12-07 15:57:37,353 INFO L276 IsEmpty]: Start isEmpty. Operand 24847 states and 73509 transitions. [2019-12-07 15:57:37,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:37,378 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:37,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:37,379 INFO L410 AbstractCegarLoop]: === Iteration 53 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:37,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:37,379 INFO L82 PathProgramCache]: Analyzing trace with hash 626619387, now seen corresponding path program 40 times [2019-12-07 15:57:37,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:37,379 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469115697] [2019-12-07 15:57:37,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:37,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:37,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:37,833 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469115697] [2019-12-07 15:57:37,833 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:37,833 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:57:37,833 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636224314] [2019-12-07 15:57:37,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:57:37,833 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:37,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:57:37,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:57:37,834 INFO L87 Difference]: Start difference. First operand 24847 states and 73509 transitions. Second operand 18 states. [2019-12-07 15:57:39,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:39,865 INFO L93 Difference]: Finished difference Result 46180 states and 139667 transitions. [2019-12-07 15:57:39,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:57:39,865 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:57:39,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:39,919 INFO L225 Difference]: With dead ends: 46180 [2019-12-07 15:57:39,919 INFO L226 Difference]: Without dead ends: 43807 [2019-12-07 15:57:39,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 376 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=293, Invalid=1513, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 15:57:40,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43807 states. [2019-12-07 15:57:40,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43807 to 24904. [2019-12-07 15:57:40,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24904 states. [2019-12-07 15:57:40,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24904 states to 24904 states and 73668 transitions. [2019-12-07 15:57:40,439 INFO L78 Accepts]: Start accepts. Automaton has 24904 states and 73668 transitions. Word has length 72 [2019-12-07 15:57:40,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:40,439 INFO L462 AbstractCegarLoop]: Abstraction has 24904 states and 73668 transitions. [2019-12-07 15:57:40,439 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:57:40,439 INFO L276 IsEmpty]: Start isEmpty. Operand 24904 states and 73668 transitions. [2019-12-07 15:57:40,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:40,465 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:40,465 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:40,465 INFO L410 AbstractCegarLoop]: === Iteration 54 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:40,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:40,465 INFO L82 PathProgramCache]: Analyzing trace with hash -1016609309, now seen corresponding path program 41 times [2019-12-07 15:57:40,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:40,466 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969378993] [2019-12-07 15:57:40,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:40,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:40,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:40,919 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969378993] [2019-12-07 15:57:40,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:40,920 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:57:40,920 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712170754] [2019-12-07 15:57:40,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:57:40,920 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:40,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:57:40,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:57:40,920 INFO L87 Difference]: Start difference. First operand 24904 states and 73668 transitions. Second operand 18 states. [2019-12-07 15:57:43,477 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 28 [2019-12-07 15:57:44,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:44,067 INFO L93 Difference]: Finished difference Result 43869 states and 132267 transitions. [2019-12-07 15:57:44,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:57:44,068 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:57:44,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:44,117 INFO L225 Difference]: With dead ends: 43869 [2019-12-07 15:57:44,117 INFO L226 Difference]: Without dead ends: 42730 [2019-12-07 15:57:44,118 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 353 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=285, Invalid=1437, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:57:44,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42730 states. [2019-12-07 15:57:44,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42730 to 24228. [2019-12-07 15:57:44,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24228 states. [2019-12-07 15:57:44,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24228 states to 24228 states and 71740 transitions. [2019-12-07 15:57:44,599 INFO L78 Accepts]: Start accepts. Automaton has 24228 states and 71740 transitions. Word has length 72 [2019-12-07 15:57:44,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:44,599 INFO L462 AbstractCegarLoop]: Abstraction has 24228 states and 71740 transitions. [2019-12-07 15:57:44,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:57:44,599 INFO L276 IsEmpty]: Start isEmpty. Operand 24228 states and 71740 transitions. [2019-12-07 15:57:44,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:44,621 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:44,621 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:44,621 INFO L410 AbstractCegarLoop]: === Iteration 55 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:44,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:44,621 INFO L82 PathProgramCache]: Analyzing trace with hash 266854769, now seen corresponding path program 42 times [2019-12-07 15:57:44,621 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:44,622 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707092475] [2019-12-07 15:57:44,622 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:44,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:45,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:45,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707092475] [2019-12-07 15:57:45,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:45,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2019-12-07 15:57:45,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511053210] [2019-12-07 15:57:45,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 15:57:45,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:45,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 15:57:45,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=678, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:57:45,831 INFO L87 Difference]: Start difference. First operand 24228 states and 71740 transitions. Second operand 28 states. [2019-12-07 15:57:48,846 WARN L192 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 15:57:49,431 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2019-12-07 15:57:49,844 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 30 [2019-12-07 15:57:53,808 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2019-12-07 15:57:55,080 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 34 [2019-12-07 15:57:58,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:58,209 INFO L93 Difference]: Finished difference Result 35060 states and 104133 transitions. [2019-12-07 15:57:58,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2019-12-07 15:57:58,209 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 72 [2019-12-07 15:57:58,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:58,251 INFO L225 Difference]: With dead ends: 35060 [2019-12-07 15:57:58,251 INFO L226 Difference]: Without dead ends: 34821 [2019-12-07 15:57:58,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1731 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=812, Invalid=5830, Unknown=0, NotChecked=0, Total=6642 [2019-12-07 15:57:58,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34821 states. [2019-12-07 15:57:58,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34821 to 26058. [2019-12-07 15:57:58,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26058 states. [2019-12-07 15:57:58,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26058 states to 26058 states and 77364 transitions. [2019-12-07 15:57:58,810 INFO L78 Accepts]: Start accepts. Automaton has 26058 states and 77364 transitions. Word has length 72 [2019-12-07 15:57:58,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:57:58,810 INFO L462 AbstractCegarLoop]: Abstraction has 26058 states and 77364 transitions. [2019-12-07 15:57:58,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 15:57:58,810 INFO L276 IsEmpty]: Start isEmpty. Operand 26058 states and 77364 transitions. [2019-12-07 15:57:58,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:57:58,835 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:58,835 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:57:58,835 INFO L410 AbstractCegarLoop]: === Iteration 56 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:58,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:58,836 INFO L82 PathProgramCache]: Analyzing trace with hash 1105322311, now seen corresponding path program 43 times [2019-12-07 15:57:58,836 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:57:58,836 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316664628] [2019-12-07 15:57:58,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:58,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:59,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:59,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316664628] [2019-12-07 15:57:59,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:59,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:57:59,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [7299269] [2019-12-07 15:57:59,102 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:57:59,102 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:57:59,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:57:59,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:57:59,103 INFO L87 Difference]: Start difference. First operand 26058 states and 77364 transitions. Second operand 19 states. [2019-12-07 15:58:01,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:01,891 INFO L93 Difference]: Finished difference Result 35394 states and 104366 transitions. [2019-12-07 15:58:01,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 15:58:01,892 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:58:01,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:01,946 INFO L225 Difference]: With dead ends: 35394 [2019-12-07 15:58:01,946 INFO L226 Difference]: Without dead ends: 33503 [2019-12-07 15:58:01,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 593 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=415, Invalid=2135, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 15:58:02,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33503 states. [2019-12-07 15:58:02,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33503 to 25674. [2019-12-07 15:58:02,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25674 states. [2019-12-07 15:58:02,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25674 states to 25674 states and 76212 transitions. [2019-12-07 15:58:02,386 INFO L78 Accepts]: Start accepts. Automaton has 25674 states and 76212 transitions. Word has length 72 [2019-12-07 15:58:02,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:02,386 INFO L462 AbstractCegarLoop]: Abstraction has 25674 states and 76212 transitions. [2019-12-07 15:58:02,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:58:02,386 INFO L276 IsEmpty]: Start isEmpty. Operand 25674 states and 76212 transitions. [2019-12-07 15:58:02,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:02,412 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:02,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:02,412 INFO L410 AbstractCegarLoop]: === Iteration 57 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:02,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:02,413 INFO L82 PathProgramCache]: Analyzing trace with hash 816827505, now seen corresponding path program 44 times [2019-12-07 15:58:02,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:02,413 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957763200] [2019-12-07 15:58:02,413 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:02,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:02,902 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 25 [2019-12-07 15:58:03,077 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 23 [2019-12-07 15:58:03,269 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 25 [2019-12-07 15:58:03,522 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 24 [2019-12-07 15:58:03,723 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 23 [2019-12-07 15:58:04,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:04,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957763200] [2019-12-07 15:58:04,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:04,908 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [29] imperfect sequences [] total 29 [2019-12-07 15:58:04,908 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88195374] [2019-12-07 15:58:04,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2019-12-07 15:58:04,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:04,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2019-12-07 15:58:04,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=847, Unknown=0, NotChecked=0, Total=930 [2019-12-07 15:58:04,908 INFO L87 Difference]: Start difference. First operand 25674 states and 76212 transitions. Second operand 31 states. [2019-12-07 15:58:09,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:09,427 INFO L93 Difference]: Finished difference Result 30284 states and 89602 transitions. [2019-12-07 15:58:09,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 15:58:09,427 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 72 [2019-12-07 15:58:09,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:09,463 INFO L225 Difference]: With dead ends: 30284 [2019-12-07 15:58:09,464 INFO L226 Difference]: Without dead ends: 30248 [2019-12-07 15:58:09,464 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 922 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=491, Invalid=3931, Unknown=0, NotChecked=0, Total=4422 [2019-12-07 15:58:09,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30248 states. [2019-12-07 15:58:09,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30248 to 25848. [2019-12-07 15:58:09,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25848 states. [2019-12-07 15:58:09,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25848 states to 25848 states and 76683 transitions. [2019-12-07 15:58:09,883 INFO L78 Accepts]: Start accepts. Automaton has 25848 states and 76683 transitions. Word has length 72 [2019-12-07 15:58:09,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:09,883 INFO L462 AbstractCegarLoop]: Abstraction has 25848 states and 76683 transitions. [2019-12-07 15:58:09,883 INFO L463 AbstractCegarLoop]: Interpolant automaton has 31 states. [2019-12-07 15:58:09,883 INFO L276 IsEmpty]: Start isEmpty. Operand 25848 states and 76683 transitions. [2019-12-07 15:58:09,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:09,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:09,968 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:09,968 INFO L410 AbstractCegarLoop]: === Iteration 58 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:09,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:09,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1655295047, now seen corresponding path program 45 times [2019-12-07 15:58:09,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:09,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899968491] [2019-12-07 15:58:09,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:09,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:10,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:10,582 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [899968491] [2019-12-07 15:58:10,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:10,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:58:10,583 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741847399] [2019-12-07 15:58:10,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:58:10,583 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:10,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:58:10,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=623, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:58:10,583 INFO L87 Difference]: Start difference. First operand 25848 states and 76683 transitions. Second operand 27 states. [2019-12-07 15:58:12,658 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 26 [2019-12-07 15:58:12,964 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 15:58:13,562 WARN L192 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 26 [2019-12-07 15:58:14,086 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 26 [2019-12-07 15:58:14,433 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 28 [2019-12-07 15:58:15,189 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 28 [2019-12-07 15:58:16,615 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 30 [2019-12-07 15:58:18,271 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 28 [2019-12-07 15:58:18,750 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 28 [2019-12-07 15:58:22,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:22,747 INFO L93 Difference]: Finished difference Result 43700 states and 129957 transitions. [2019-12-07 15:58:22,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2019-12-07 15:58:22,747 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:58:22,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:22,802 INFO L225 Difference]: With dead ends: 43700 [2019-12-07 15:58:22,803 INFO L226 Difference]: Without dead ends: 38255 [2019-12-07 15:58:22,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1426 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=665, Invalid=4737, Unknown=0, NotChecked=0, Total=5402 [2019-12-07 15:58:22,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38255 states. [2019-12-07 15:58:23,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38255 to 23775. [2019-12-07 15:58:23,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23775 states. [2019-12-07 15:58:23,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23775 states to 23775 states and 69721 transitions. [2019-12-07 15:58:23,260 INFO L78 Accepts]: Start accepts. Automaton has 23775 states and 69721 transitions. Word has length 72 [2019-12-07 15:58:23,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:23,260 INFO L462 AbstractCegarLoop]: Abstraction has 23775 states and 69721 transitions. [2019-12-07 15:58:23,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:58:23,260 INFO L276 IsEmpty]: Start isEmpty. Operand 23775 states and 69721 transitions. [2019-12-07 15:58:23,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:23,283 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:23,283 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:23,283 INFO L410 AbstractCegarLoop]: === Iteration 59 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:23,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:23,283 INFO L82 PathProgramCache]: Analyzing trace with hash 1447320773, now seen corresponding path program 46 times [2019-12-07 15:58:23,283 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:23,283 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096489310] [2019-12-07 15:58:23,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:23,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:23,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:23,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096489310] [2019-12-07 15:58:23,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:23,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:58:23,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860041506] [2019-12-07 15:58:23,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:58:23,774 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:23,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:58:23,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:58:23,775 INFO L87 Difference]: Start difference. First operand 23775 states and 69721 transitions. Second operand 19 states. [2019-12-07 15:58:26,119 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 31 [2019-12-07 15:58:26,306 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 31 [2019-12-07 15:58:27,155 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2019-12-07 15:58:28,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:28,872 INFO L93 Difference]: Finished difference Result 43308 states and 129835 transitions. [2019-12-07 15:58:28,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:58:28,872 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:58:28,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:28,930 INFO L225 Difference]: With dead ends: 43308 [2019-12-07 15:58:28,930 INFO L226 Difference]: Without dead ends: 42856 [2019-12-07 15:58:28,930 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 404 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=319, Invalid=1661, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 15:58:29,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42856 states. [2019-12-07 15:58:29,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42856 to 23695. [2019-12-07 15:58:29,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23695 states. [2019-12-07 15:58:29,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23695 states to 23695 states and 69328 transitions. [2019-12-07 15:58:29,456 INFO L78 Accepts]: Start accepts. Automaton has 23695 states and 69328 transitions. Word has length 72 [2019-12-07 15:58:29,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:29,456 INFO L462 AbstractCegarLoop]: Abstraction has 23695 states and 69328 transitions. [2019-12-07 15:58:29,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:58:29,457 INFO L276 IsEmpty]: Start isEmpty. Operand 23695 states and 69328 transitions. [2019-12-07 15:58:29,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:29,476 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:29,476 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:29,477 INFO L410 AbstractCegarLoop]: === Iteration 60 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:29,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:29,477 INFO L82 PathProgramCache]: Analyzing trace with hash 754340749, now seen corresponding path program 47 times [2019-12-07 15:58:29,477 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:29,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488811359] [2019-12-07 15:58:29,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:29,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:30,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:30,461 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488811359] [2019-12-07 15:58:30,461 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:30,461 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:58:30,461 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1517312437] [2019-12-07 15:58:30,461 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:58:30,461 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:30,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:58:30,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=627, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:58:30,462 INFO L87 Difference]: Start difference. First operand 23695 states and 69328 transitions. Second operand 27 states. [2019-12-07 15:58:33,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:33,611 INFO L93 Difference]: Finished difference Result 41449 states and 123280 transitions. [2019-12-07 15:58:33,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:58:33,612 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:58:33,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:33,660 INFO L225 Difference]: With dead ends: 41449 [2019-12-07 15:58:33,661 INFO L226 Difference]: Without dead ends: 40581 [2019-12-07 15:58:33,661 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 565 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=358, Invalid=2398, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 15:58:33,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40581 states. [2019-12-07 15:58:34,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40581 to 23363. [2019-12-07 15:58:34,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23363 states. [2019-12-07 15:58:34,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23363 states to 23363 states and 68420 transitions. [2019-12-07 15:58:34,119 INFO L78 Accepts]: Start accepts. Automaton has 23363 states and 68420 transitions. Word has length 72 [2019-12-07 15:58:34,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:34,119 INFO L462 AbstractCegarLoop]: Abstraction has 23363 states and 68420 transitions. [2019-12-07 15:58:34,119 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:58:34,119 INFO L276 IsEmpty]: Start isEmpty. Operand 23363 states and 68420 transitions. [2019-12-07 15:58:34,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:34,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:34,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:34,141 INFO L410 AbstractCegarLoop]: === Iteration 61 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:34,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:34,142 INFO L82 PathProgramCache]: Analyzing trace with hash 1234063041, now seen corresponding path program 48 times [2019-12-07 15:58:34,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:34,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037908673] [2019-12-07 15:58:34,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:34,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:34,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:34,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2037908673] [2019-12-07 15:58:34,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:34,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:58:34,530 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2123945598] [2019-12-07 15:58:34,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:58:34,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:34,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:58:34,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=411, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:58:34,530 INFO L87 Difference]: Start difference. First operand 23363 states and 68420 transitions. Second operand 22 states. [2019-12-07 15:58:36,370 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:58:40,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:40,538 INFO L93 Difference]: Finished difference Result 28327 states and 82578 transitions. [2019-12-07 15:58:40,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 15:58:40,538 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:58:40,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:40,569 INFO L225 Difference]: With dead ends: 28327 [2019-12-07 15:58:40,569 INFO L226 Difference]: Without dead ends: 28083 [2019-12-07 15:58:40,570 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 594 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=369, Invalid=2387, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 15:58:40,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28083 states. [2019-12-07 15:58:40,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28083 to 23441. [2019-12-07 15:58:40,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23441 states. [2019-12-07 15:58:40,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23441 states to 23441 states and 68585 transitions. [2019-12-07 15:58:40,932 INFO L78 Accepts]: Start accepts. Automaton has 23441 states and 68585 transitions. Word has length 72 [2019-12-07 15:58:40,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:40,932 INFO L462 AbstractCegarLoop]: Abstraction has 23441 states and 68585 transitions. [2019-12-07 15:58:40,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:58:40,932 INFO L276 IsEmpty]: Start isEmpty. Operand 23441 states and 68585 transitions. [2019-12-07 15:58:40,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:40,954 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:40,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:40,955 INFO L410 AbstractCegarLoop]: === Iteration 62 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:40,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:40,955 INFO L82 PathProgramCache]: Analyzing trace with hash -572455407, now seen corresponding path program 49 times [2019-12-07 15:58:40,955 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:40,955 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608307292] [2019-12-07 15:58:40,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:40,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:43,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:43,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608307292] [2019-12-07 15:58:43,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:43,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2019-12-07 15:58:43,089 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1471226131] [2019-12-07 15:58:43,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-12-07 15:58:43,089 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:43,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-12-07 15:58:43,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=730, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:58:43,090 INFO L87 Difference]: Start difference. First operand 23441 states and 68585 transitions. Second operand 29 states. [2019-12-07 15:58:47,557 WARN L192 SmtUtils]: Spent 213.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 38 [2019-12-07 15:58:49,169 WARN L192 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 32 [2019-12-07 15:58:50,136 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2019-12-07 15:58:50,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:50,607 INFO L93 Difference]: Finished difference Result 32843 states and 96196 transitions. [2019-12-07 15:58:50,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2019-12-07 15:58:50,607 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 72 [2019-12-07 15:58:50,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:50,645 INFO L225 Difference]: With dead ends: 32843 [2019-12-07 15:58:50,646 INFO L226 Difference]: Without dead ends: 32673 [2019-12-07 15:58:50,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1465 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=739, Invalid=5113, Unknown=0, NotChecked=0, Total=5852 [2019-12-07 15:58:50,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32673 states. [2019-12-07 15:58:51,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32673 to 23993. [2019-12-07 15:58:51,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23993 states. [2019-12-07 15:58:51,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23993 states to 23993 states and 70073 transitions. [2019-12-07 15:58:51,068 INFO L78 Accepts]: Start accepts. Automaton has 23993 states and 70073 transitions. Word has length 72 [2019-12-07 15:58:51,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:51,068 INFO L462 AbstractCegarLoop]: Abstraction has 23993 states and 70073 transitions. [2019-12-07 15:58:51,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-12-07 15:58:51,068 INFO L276 IsEmpty]: Start isEmpty. Operand 23993 states and 70073 transitions. [2019-12-07 15:58:51,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:51,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:51,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:51,092 INFO L410 AbstractCegarLoop]: === Iteration 63 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:51,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:51,092 INFO L82 PathProgramCache]: Analyzing trace with hash 365713797, now seen corresponding path program 50 times [2019-12-07 15:58:51,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:51,092 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581440641] [2019-12-07 15:58:51,092 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:51,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:51,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:51,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581440641] [2019-12-07 15:58:51,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:51,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:58:51,406 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073003510] [2019-12-07 15:58:51,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:58:51,406 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:51,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:58:51,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:58:51,407 INFO L87 Difference]: Start difference. First operand 23993 states and 70073 transitions. Second operand 21 states. [2019-12-07 15:58:57,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:57,442 INFO L93 Difference]: Finished difference Result 33137 states and 96525 transitions. [2019-12-07 15:58:57,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 15:58:57,443 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 72 [2019-12-07 15:58:57,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:57,499 INFO L225 Difference]: With dead ends: 33137 [2019-12-07 15:58:57,499 INFO L226 Difference]: Without dead ends: 32022 [2019-12-07 15:58:57,499 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 640 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=455, Invalid=2407, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 15:58:57,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32022 states. [2019-12-07 15:58:57,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32022 to 24083. [2019-12-07 15:58:57,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24083 states. [2019-12-07 15:58:57,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24083 states to 24083 states and 70348 transitions. [2019-12-07 15:58:57,974 INFO L78 Accepts]: Start accepts. Automaton has 24083 states and 70348 transitions. Word has length 72 [2019-12-07 15:58:57,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:57,974 INFO L462 AbstractCegarLoop]: Abstraction has 24083 states and 70348 transitions. [2019-12-07 15:58:57,974 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:58:57,974 INFO L276 IsEmpty]: Start isEmpty. Operand 24083 states and 70348 transitions. [2019-12-07 15:58:57,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:58:57,994 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:57,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:57,994 INFO L410 AbstractCegarLoop]: === Iteration 64 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:57,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:57,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1651993393, now seen corresponding path program 51 times [2019-12-07 15:58:57,995 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:58:57,995 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013932958] [2019-12-07 15:58:57,995 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:58,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:58,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:58,524 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013932958] [2019-12-07 15:58:58,524 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:58,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:58:58,524 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585584799] [2019-12-07 15:58:58,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:58:58,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:58:58,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:58:58,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:58:58,525 INFO L87 Difference]: Start difference. First operand 24083 states and 70348 transitions. Second operand 20 states. [2019-12-07 15:59:00,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:00,926 INFO L93 Difference]: Finished difference Result 43840 states and 131185 transitions. [2019-12-07 15:59:00,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 15:59:00,927 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:59:00,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:00,979 INFO L225 Difference]: With dead ends: 43840 [2019-12-07 15:59:00,979 INFO L226 Difference]: Without dead ends: 43072 [2019-12-07 15:59:00,979 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 477 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=343, Invalid=1913, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 15:59:01,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43072 states. [2019-12-07 15:59:01,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43072 to 23652. [2019-12-07 15:59:01,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23652 states. [2019-12-07 15:59:01,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23652 states to 23652 states and 69114 transitions. [2019-12-07 15:59:01,464 INFO L78 Accepts]: Start accepts. Automaton has 23652 states and 69114 transitions. Word has length 72 [2019-12-07 15:59:01,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:01,464 INFO L462 AbstractCegarLoop]: Abstraction has 23652 states and 69114 transitions. [2019-12-07 15:59:01,464 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:59:01,464 INFO L276 IsEmpty]: Start isEmpty. Operand 23652 states and 69114 transitions. [2019-12-07 15:59:01,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:01,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:01,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:01,486 INFO L410 AbstractCegarLoop]: === Iteration 65 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:01,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:01,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1835065889, now seen corresponding path program 52 times [2019-12-07 15:59:01,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:01,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211161201] [2019-12-07 15:59:01,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:01,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:01,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:01,807 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211161201] [2019-12-07 15:59:01,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:01,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:59:01,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249715631] [2019-12-07 15:59:01,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:59:01,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:01,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:59:01,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:59:01,808 INFO L87 Difference]: Start difference. First operand 23652 states and 69114 transitions. Second operand 21 states. [2019-12-07 15:59:03,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:03,941 INFO L93 Difference]: Finished difference Result 28749 states and 83638 transitions. [2019-12-07 15:59:03,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 15:59:03,942 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 72 [2019-12-07 15:59:03,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:03,976 INFO L225 Difference]: With dead ends: 28749 [2019-12-07 15:59:03,976 INFO L226 Difference]: Without dead ends: 28700 [2019-12-07 15:59:03,977 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 581 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=351, Invalid=2301, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 15:59:04,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28700 states. [2019-12-07 15:59:04,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28700 to 23660. [2019-12-07 15:59:04,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23660 states. [2019-12-07 15:59:04,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23660 states to 23660 states and 69151 transitions. [2019-12-07 15:59:04,350 INFO L78 Accepts]: Start accepts. Automaton has 23660 states and 69151 transitions. Word has length 72 [2019-12-07 15:59:04,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:04,350 INFO L462 AbstractCegarLoop]: Abstraction has 23660 states and 69151 transitions. [2019-12-07 15:59:04,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:59:04,350 INFO L276 IsEmpty]: Start isEmpty. Operand 23660 states and 69151 transitions. [2019-12-07 15:59:04,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:04,373 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:04,373 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:04,373 INFO L410 AbstractCegarLoop]: === Iteration 66 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:04,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:04,374 INFO L82 PathProgramCache]: Analyzing trace with hash 258695057, now seen corresponding path program 53 times [2019-12-07 15:59:04,374 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:04,374 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809847311] [2019-12-07 15:59:04,374 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:04,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:05,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:05,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809847311] [2019-12-07 15:59:05,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:05,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:59:05,374 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1820913496] [2019-12-07 15:59:05,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:59:05,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:05,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:59:05,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=628, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:59:05,374 INFO L87 Difference]: Start difference. First operand 23660 states and 69151 transitions. Second operand 27 states. [2019-12-07 15:59:08,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:08,376 INFO L93 Difference]: Finished difference Result 41186 states and 122723 transitions. [2019-12-07 15:59:08,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:59:08,376 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:59:08,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:08,425 INFO L225 Difference]: With dead ends: 41186 [2019-12-07 15:59:08,425 INFO L226 Difference]: Without dead ends: 41137 [2019-12-07 15:59:08,426 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 558 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=341, Invalid=2311, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 15:59:08,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41137 states. [2019-12-07 15:59:08,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41137 to 23672. [2019-12-07 15:59:08,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23672 states. [2019-12-07 15:59:08,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23672 states to 23672 states and 69187 transitions. [2019-12-07 15:59:08,889 INFO L78 Accepts]: Start accepts. Automaton has 23672 states and 69187 transitions. Word has length 72 [2019-12-07 15:59:08,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:08,889 INFO L462 AbstractCegarLoop]: Abstraction has 23672 states and 69187 transitions. [2019-12-07 15:59:08,889 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:59:08,889 INFO L276 IsEmpty]: Start isEmpty. Operand 23672 states and 69187 transitions. [2019-12-07 15:59:08,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:08,910 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:08,911 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:08,911 INFO L410 AbstractCegarLoop]: === Iteration 67 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:08,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:08,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1556518311, now seen corresponding path program 54 times [2019-12-07 15:59:08,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:08,911 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864227300] [2019-12-07 15:59:08,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:08,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:09,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:09,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864227300] [2019-12-07 15:59:09,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:09,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:59:09,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190137852] [2019-12-07 15:59:09,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:59:09,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:09,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:59:09,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:59:09,391 INFO L87 Difference]: Start difference. First operand 23672 states and 69187 transitions. Second operand 18 states. [2019-12-07 15:59:11,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:11,637 INFO L93 Difference]: Finished difference Result 33917 states and 99276 transitions. [2019-12-07 15:59:11,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 15:59:11,637 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:59:11,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:11,673 INFO L225 Difference]: With dead ends: 33917 [2019-12-07 15:59:11,673 INFO L226 Difference]: Without dead ends: 30932 [2019-12-07 15:59:11,673 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 728 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=413, Invalid=2343, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 15:59:11,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30932 states. [2019-12-07 15:59:12,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30932 to 23248. [2019-12-07 15:59:12,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23248 states. [2019-12-07 15:59:12,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23248 states to 23248 states and 67971 transitions. [2019-12-07 15:59:12,047 INFO L78 Accepts]: Start accepts. Automaton has 23248 states and 67971 transitions. Word has length 72 [2019-12-07 15:59:12,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:12,047 INFO L462 AbstractCegarLoop]: Abstraction has 23248 states and 67971 transitions. [2019-12-07 15:59:12,047 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:59:12,047 INFO L276 IsEmpty]: Start isEmpty. Operand 23248 states and 67971 transitions. [2019-12-07 15:59:12,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:12,067 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:12,067 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:12,067 INFO L410 AbstractCegarLoop]: === Iteration 68 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:12,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:12,067 INFO L82 PathProgramCache]: Analyzing trace with hash 1226307239, now seen corresponding path program 55 times [2019-12-07 15:59:12,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:12,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1997946946] [2019-12-07 15:59:12,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:12,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:13,170 WARN L192 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 29 [2019-12-07 15:59:13,610 WARN L192 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 30 [2019-12-07 15:59:14,029 WARN L192 SmtUtils]: Spent 211.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 27 [2019-12-07 15:59:14,342 WARN L192 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 29 [2019-12-07 15:59:15,029 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 28 [2019-12-07 15:59:15,305 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 26 [2019-12-07 15:59:15,584 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 27 [2019-12-07 15:59:15,919 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 21 [2019-12-07 15:59:16,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:16,391 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1997946946] [2019-12-07 15:59:16,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:16,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [31] imperfect sequences [] total 31 [2019-12-07 15:59:16,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963738274] [2019-12-07 15:59:16,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2019-12-07 15:59:16,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:16,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2019-12-07 15:59:16,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=958, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 15:59:16,392 INFO L87 Difference]: Start difference. First operand 23248 states and 67971 transitions. Second operand 33 states. [2019-12-07 15:59:20,185 WARN L192 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 34 [2019-12-07 15:59:30,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:30,389 INFO L93 Difference]: Finished difference Result 27149 states and 78850 transitions. [2019-12-07 15:59:30,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2019-12-07 15:59:30,389 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 72 [2019-12-07 15:59:30,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:30,420 INFO L225 Difference]: With dead ends: 27149 [2019-12-07 15:59:30,420 INFO L226 Difference]: Without dead ends: 27075 [2019-12-07 15:59:30,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 5 SyntacticMatches, 5 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1487 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=684, Invalid=6122, Unknown=0, NotChecked=0, Total=6806 [2019-12-07 15:59:30,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27075 states. [2019-12-07 15:59:30,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27075 to 24063. [2019-12-07 15:59:30,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24063 states. [2019-12-07 15:59:30,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24063 states to 24063 states and 70396 transitions. [2019-12-07 15:59:30,789 INFO L78 Accepts]: Start accepts. Automaton has 24063 states and 70396 transitions. Word has length 72 [2019-12-07 15:59:30,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:30,789 INFO L462 AbstractCegarLoop]: Abstraction has 24063 states and 70396 transitions. [2019-12-07 15:59:30,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 33 states. [2019-12-07 15:59:30,789 INFO L276 IsEmpty]: Start isEmpty. Operand 24063 states and 70396 transitions. [2019-12-07 15:59:30,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:30,810 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:30,810 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:30,810 INFO L410 AbstractCegarLoop]: === Iteration 69 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:30,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:30,810 INFO L82 PathProgramCache]: Analyzing trace with hash -1487918117, now seen corresponding path program 56 times [2019-12-07 15:59:30,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:30,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248345576] [2019-12-07 15:59:30,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:30,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:31,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:31,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248345576] [2019-12-07 15:59:31,529 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:31,529 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:59:31,530 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852992685] [2019-12-07 15:59:31,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:59:31,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:31,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:59:31,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=588, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:59:31,530 INFO L87 Difference]: Start difference. First operand 24063 states and 70396 transitions. Second operand 26 states. [2019-12-07 15:59:34,685 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 28 [2019-12-07 15:59:36,751 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 24 [2019-12-07 15:59:42,386 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:59:42,864 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 28 [2019-12-07 15:59:43,069 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 26 [2019-12-07 15:59:43,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:43,463 INFO L93 Difference]: Finished difference Result 44881 states and 131509 transitions. [2019-12-07 15:59:43,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 15:59:43,465 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:59:43,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:43,527 INFO L225 Difference]: With dead ends: 44881 [2019-12-07 15:59:43,527 INFO L226 Difference]: Without dead ends: 42911 [2019-12-07 15:59:43,527 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=487, Invalid=4205, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 15:59:43,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42911 states. [2019-12-07 15:59:43,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42911 to 24997. [2019-12-07 15:59:43,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24997 states. [2019-12-07 15:59:43,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24997 states to 24997 states and 73127 transitions. [2019-12-07 15:59:43,995 INFO L78 Accepts]: Start accepts. Automaton has 24997 states and 73127 transitions. Word has length 72 [2019-12-07 15:59:43,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:43,995 INFO L462 AbstractCegarLoop]: Abstraction has 24997 states and 73127 transitions. [2019-12-07 15:59:43,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:59:43,995 INFO L276 IsEmpty]: Start isEmpty. Operand 24997 states and 73127 transitions. [2019-12-07 15:59:44,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:44,020 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:44,020 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:44,020 INFO L410 AbstractCegarLoop]: === Iteration 70 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:44,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:44,021 INFO L82 PathProgramCache]: Analyzing trace with hash 774906387, now seen corresponding path program 57 times [2019-12-07 15:59:44,021 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:44,021 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846772983] [2019-12-07 15:59:44,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:44,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:45,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:45,026 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846772983] [2019-12-07 15:59:45,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:45,027 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:59:45,027 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [408564908] [2019-12-07 15:59:45,027 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:59:45,027 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:45,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:59:45,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=492, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:59:45,027 INFO L87 Difference]: Start difference. First operand 24997 states and 73127 transitions. Second operand 24 states. [2019-12-07 15:59:47,357 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:59:47,742 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 28 [2019-12-07 15:59:48,046 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 15:59:53,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:53,137 INFO L93 Difference]: Finished difference Result 44576 states and 131779 transitions. [2019-12-07 15:59:53,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 15:59:53,138 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:59:53,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:53,194 INFO L225 Difference]: With dead ends: 44576 [2019-12-07 15:59:53,194 INFO L226 Difference]: Without dead ends: 44513 [2019-12-07 15:59:53,194 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=319, Invalid=2543, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 15:59:53,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44513 states. [2019-12-07 15:59:53,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44513 to 27779. [2019-12-07 15:59:53,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27779 states. [2019-12-07 15:59:53,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27779 states to 27779 states and 81930 transitions. [2019-12-07 15:59:53,729 INFO L78 Accepts]: Start accepts. Automaton has 27779 states and 81930 transitions. Word has length 72 [2019-12-07 15:59:53,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:53,729 INFO L462 AbstractCegarLoop]: Abstraction has 27779 states and 81930 transitions. [2019-12-07 15:59:53,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:59:53,729 INFO L276 IsEmpty]: Start isEmpty. Operand 27779 states and 81930 transitions. [2019-12-07 15:59:53,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:53,757 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:53,757 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:53,757 INFO L410 AbstractCegarLoop]: === Iteration 71 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:53,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:53,757 INFO L82 PathProgramCache]: Analyzing trace with hash -445897469, now seen corresponding path program 58 times [2019-12-07 15:59:53,757 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:53,758 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2069888106] [2019-12-07 15:59:53,758 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:53,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:54,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:54,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2069888106] [2019-12-07 15:59:54,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:54,061 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:59:54,061 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [260120858] [2019-12-07 15:59:54,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:59:54,061 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:54,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:59:54,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:59:54,061 INFO L87 Difference]: Start difference. First operand 27779 states and 81930 transitions. Second operand 19 states. [2019-12-07 15:59:57,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:57,215 INFO L93 Difference]: Finished difference Result 35739 states and 105904 transitions. [2019-12-07 15:59:57,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 15:59:57,215 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:59:57,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:57,254 INFO L225 Difference]: With dead ends: 35739 [2019-12-07 15:59:57,254 INFO L226 Difference]: Without dead ends: 32439 [2019-12-07 15:59:57,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 585 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=394, Invalid=2258, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 15:59:57,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32439 states. [2019-12-07 15:59:57,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32439 to 27230. [2019-12-07 15:59:57,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27230 states. [2019-12-07 15:59:57,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27230 states to 27230 states and 80624 transitions. [2019-12-07 15:59:57,695 INFO L78 Accepts]: Start accepts. Automaton has 27230 states and 80624 transitions. Word has length 72 [2019-12-07 15:59:57,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:57,695 INFO L462 AbstractCegarLoop]: Abstraction has 27230 states and 80624 transitions. [2019-12-07 15:59:57,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:59:57,695 INFO L276 IsEmpty]: Start isEmpty. Operand 27230 states and 80624 transitions. [2019-12-07 15:59:57,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:59:57,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:57,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:57,723 INFO L410 AbstractCegarLoop]: === Iteration 72 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:57,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:57,723 INFO L82 PathProgramCache]: Analyzing trace with hash 264346551, now seen corresponding path program 59 times [2019-12-07 15:59:57,723 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:59:57,723 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045526782] [2019-12-07 15:59:57,723 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:57,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:58,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:58,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045526782] [2019-12-07 15:59:58,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:58,163 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:59:58,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543373074] [2019-12-07 15:59:58,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:59:58,164 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:59:58,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:59:58,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:59:58,164 INFO L87 Difference]: Start difference. First operand 27230 states and 80624 transitions. Second operand 18 states. [2019-12-07 15:59:59,008 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 28 [2019-12-07 15:59:59,786 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2019-12-07 16:00:00,052 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2019-12-07 16:00:03,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:00:03,847 INFO L93 Difference]: Finished difference Result 36095 states and 107657 transitions. [2019-12-07 16:00:03,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 16:00:03,849 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 16:00:03,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:00:03,903 INFO L225 Difference]: With dead ends: 36095 [2019-12-07 16:00:03,903 INFO L226 Difference]: Without dead ends: 33076 [2019-12-07 16:00:03,904 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 688 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=471, Invalid=2391, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 16:00:03,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33076 states. [2019-12-07 16:00:04,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33076 to 26731. [2019-12-07 16:00:04,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26731 states. [2019-12-07 16:00:04,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26731 states to 26731 states and 79090 transitions. [2019-12-07 16:00:04,354 INFO L78 Accepts]: Start accepts. Automaton has 26731 states and 79090 transitions. Word has length 72 [2019-12-07 16:00:04,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:00:04,355 INFO L462 AbstractCegarLoop]: Abstraction has 26731 states and 79090 transitions. [2019-12-07 16:00:04,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 16:00:04,355 INFO L276 IsEmpty]: Start isEmpty. Operand 26731 states and 79090 transitions. [2019-12-07 16:00:04,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:00:04,382 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:00:04,382 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:00:04,382 INFO L410 AbstractCegarLoop]: === Iteration 73 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:00:04,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:00:04,382 INFO L82 PathProgramCache]: Analyzing trace with hash 965017823, now seen corresponding path program 60 times [2019-12-07 16:00:04,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:00:04,382 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303561739] [2019-12-07 16:00:04,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:00:04,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:00:04,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:00:04,788 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303561739] [2019-12-07 16:00:04,788 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:00:04,788 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 16:00:04,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831066856] [2019-12-07 16:00:04,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 16:00:04,789 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:00:04,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 16:00:04,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:00:04,789 INFO L87 Difference]: Start difference. First operand 26731 states and 79090 transitions. Second operand 17 states. [2019-12-07 16:00:09,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:00:09,808 INFO L93 Difference]: Finished difference Result 53359 states and 162366 transitions. [2019-12-07 16:00:09,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 16:00:09,808 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 16:00:09,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:00:09,879 INFO L225 Difference]: With dead ends: 53359 [2019-12-07 16:00:09,879 INFO L226 Difference]: Without dead ends: 51275 [2019-12-07 16:00:09,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 492 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=385, Invalid=1871, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 16:00:10,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51275 states. [2019-12-07 16:00:10,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51275 to 26597. [2019-12-07 16:00:10,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26597 states. [2019-12-07 16:00:10,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26597 states to 26597 states and 78839 transitions. [2019-12-07 16:00:10,494 INFO L78 Accepts]: Start accepts. Automaton has 26597 states and 78839 transitions. Word has length 72 [2019-12-07 16:00:10,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:00:10,495 INFO L462 AbstractCegarLoop]: Abstraction has 26597 states and 78839 transitions. [2019-12-07 16:00:10,495 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 16:00:10,495 INFO L276 IsEmpty]: Start isEmpty. Operand 26597 states and 78839 transitions. [2019-12-07 16:00:10,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:00:10,523 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:00:10,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:00:10,523 INFO L410 AbstractCegarLoop]: === Iteration 74 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:00:10,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:00:10,524 INFO L82 PathProgramCache]: Analyzing trace with hash 623696671, now seen corresponding path program 61 times [2019-12-07 16:00:10,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:00:10,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23118395] [2019-12-07 16:00:10,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:00:10,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:00:10,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:00:10,945 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23118395] [2019-12-07 16:00:10,945 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:00:10,945 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 16:00:10,945 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799233296] [2019-12-07 16:00:10,946 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 16:00:10,946 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:00:10,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 16:00:10,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2019-12-07 16:00:10,946 INFO L87 Difference]: Start difference. First operand 26597 states and 78839 transitions. Second operand 18 states. [2019-12-07 16:00:14,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:00:14,341 INFO L93 Difference]: Finished difference Result 52670 states and 160288 transitions. [2019-12-07 16:00:14,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 16:00:14,342 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 16:00:14,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:00:14,417 INFO L225 Difference]: With dead ends: 52670 [2019-12-07 16:00:14,417 INFO L226 Difference]: Without dead ends: 50731 [2019-12-07 16:00:14,417 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 694 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=468, Invalid=2502, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 16:00:14,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50731 states. [2019-12-07 16:00:14,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50731 to 26608. [2019-12-07 16:00:14,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26608 states. [2019-12-07 16:00:14,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26608 states to 26608 states and 78887 transitions. [2019-12-07 16:00:14,995 INFO L78 Accepts]: Start accepts. Automaton has 26608 states and 78887 transitions. Word has length 72 [2019-12-07 16:00:14,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:00:14,995 INFO L462 AbstractCegarLoop]: Abstraction has 26608 states and 78887 transitions. [2019-12-07 16:00:14,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 16:00:14,995 INFO L276 IsEmpty]: Start isEmpty. Operand 26608 states and 78887 transitions. [2019-12-07 16:00:15,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:00:15,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:00:15,023 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:00:15,023 INFO L410 AbstractCegarLoop]: === Iteration 75 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:00:15,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:00:15,023 INFO L82 PathProgramCache]: Analyzing trace with hash 573046085, now seen corresponding path program 62 times [2019-12-07 16:00:15,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:00:15,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491079996] [2019-12-07 16:00:15,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:00:15,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:00:15,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:00:15,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491079996] [2019-12-07 16:00:15,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:00:15,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 16:00:15,415 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381893458] [2019-12-07 16:00:15,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 16:00:15,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:00:15,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 16:00:15,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:00:15,415 INFO L87 Difference]: Start difference. First operand 26608 states and 78887 transitions. Second operand 17 states. [2019-12-07 16:00:16,999 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 30 [2019-12-07 16:00:17,261 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 27 [2019-12-07 16:00:18,077 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 30 [2019-12-07 16:00:19,189 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 33 [2019-12-07 16:00:20,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:00:20,719 INFO L93 Difference]: Finished difference Result 54693 states and 164794 transitions. [2019-12-07 16:00:20,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 16:00:20,719 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 16:00:20,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:00:20,792 INFO L225 Difference]: With dead ends: 54693 [2019-12-07 16:00:20,792 INFO L226 Difference]: Without dead ends: 54422 [2019-12-07 16:00:20,793 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 436 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=363, Invalid=1707, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 16:00:20,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54422 states. [2019-12-07 16:00:21,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54422 to 26610. [2019-12-07 16:00:21,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26610 states. [2019-12-07 16:00:21,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26610 states to 26610 states and 78891 transitions. [2019-12-07 16:00:21,401 INFO L78 Accepts]: Start accepts. Automaton has 26610 states and 78891 transitions. Word has length 72 [2019-12-07 16:00:21,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:00:21,401 INFO L462 AbstractCegarLoop]: Abstraction has 26610 states and 78891 transitions. [2019-12-07 16:00:21,401 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 16:00:21,402 INFO L276 IsEmpty]: Start isEmpty. Operand 26610 states and 78891 transitions. [2019-12-07 16:00:21,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:00:21,428 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:00:21,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:00:21,429 INFO L410 AbstractCegarLoop]: === Iteration 76 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:00:21,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:00:21,429 INFO L82 PathProgramCache]: Analyzing trace with hash 1034081985, now seen corresponding path program 63 times [2019-12-07 16:00:21,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:00:21,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982215600] [2019-12-07 16:00:21,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:00:21,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:00:21,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:00:21,896 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982215600] [2019-12-07 16:00:21,896 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:00:21,896 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 16:00:21,897 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540731501] [2019-12-07 16:00:21,897 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 16:00:21,897 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:00:21,897 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 16:00:21,897 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:00:21,897 INFO L87 Difference]: Start difference. First operand 26610 states and 78891 transitions. Second operand 17 states. [2019-12-07 16:00:26,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:00:26,703 INFO L93 Difference]: Finished difference Result 53133 states and 160811 transitions. [2019-12-07 16:00:26,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 16:00:26,703 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 16:00:26,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:00:26,777 INFO L225 Difference]: With dead ends: 53133 [2019-12-07 16:00:26,777 INFO L226 Difference]: Without dead ends: 52881 [2019-12-07 16:00:26,777 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 593 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=398, Invalid=2152, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 16:00:26,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52881 states. [2019-12-07 16:00:27,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52881 to 26609. [2019-12-07 16:00:27,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26609 states. [2019-12-07 16:00:27,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26609 states to 26609 states and 78889 transitions. [2019-12-07 16:00:27,380 INFO L78 Accepts]: Start accepts. Automaton has 26609 states and 78889 transitions. Word has length 72 [2019-12-07 16:00:27,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:00:27,380 INFO L462 AbstractCegarLoop]: Abstraction has 26609 states and 78889 transitions. [2019-12-07 16:00:27,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 16:00:27,380 INFO L276 IsEmpty]: Start isEmpty. Operand 26609 states and 78889 transitions. [2019-12-07 16:00:27,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:00:27,407 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:00:27,407 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:00:27,407 INFO L410 AbstractCegarLoop]: === Iteration 77 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:00:27,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:00:27,407 INFO L82 PathProgramCache]: Analyzing trace with hash 1078152937, now seen corresponding path program 64 times [2019-12-07 16:00:27,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:00:27,408 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735223945] [2019-12-07 16:00:27,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:00:27,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:00:29,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:00:29,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1735223945] [2019-12-07 16:00:29,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:00:29,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [29] imperfect sequences [] total 29 [2019-12-07 16:00:29,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [46696933] [2019-12-07 16:00:29,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2019-12-07 16:00:29,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:00:29,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2019-12-07 16:00:29,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=845, Unknown=0, NotChecked=0, Total=930 [2019-12-07 16:00:29,128 INFO L87 Difference]: Start difference. First operand 26609 states and 78889 transitions. Second operand 31 states. [2019-12-07 16:00:31,954 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2019-12-07 16:00:32,572 WARN L192 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 36 [2019-12-07 16:00:33,100 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 34 [2019-12-07 16:00:33,656 WARN L192 SmtUtils]: Spent 204.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 38 [2019-12-07 16:00:34,185 WARN L192 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 39 [2019-12-07 16:00:34,452 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 36 [2019-12-07 16:00:34,747 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2019-12-07 16:00:36,056 WARN L192 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 41 [2019-12-07 16:00:37,094 WARN L192 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 41 [2019-12-07 16:00:37,684 WARN L192 SmtUtils]: Spent 291.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 45 [2019-12-07 16:00:38,034 WARN L192 SmtUtils]: Spent 234.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 45 [2019-12-07 16:00:38,625 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 41 [2019-12-07 16:00:39,146 WARN L192 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 39 [2019-12-07 16:00:39,965 WARN L192 SmtUtils]: Spent 319.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 47 [2019-12-07 16:00:42,763 WARN L192 SmtUtils]: Spent 248.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 43 [2019-12-07 16:00:43,202 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2019-12-07 16:00:44,150 WARN L192 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 41 [2019-12-07 16:00:44,664 WARN L192 SmtUtils]: Spent 312.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2019-12-07 16:00:45,000 WARN L192 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2019-12-07 16:00:45,877 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2019-12-07 16:00:51,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:00:51,886 INFO L93 Difference]: Finished difference Result 51442 states and 153895 transitions. [2019-12-07 16:00:51,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 107 states. [2019-12-07 16:00:51,887 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 72 [2019-12-07 16:00:51,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:00:51,955 INFO L225 Difference]: With dead ends: 51442 [2019-12-07 16:00:51,955 INFO L226 Difference]: Without dead ends: 51387 [2019-12-07 16:00:51,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 3 SyntacticMatches, 7 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4090 ImplicationChecksByTransitivity, 12.2s TimeCoverageRelationStatistics Valid=1311, Invalid=12495, Unknown=0, NotChecked=0, Total=13806 [2019-12-07 16:00:52,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51387 states. [2019-12-07 16:00:52,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51387 to 27927. [2019-12-07 16:00:52,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27927 states. [2019-12-07 16:00:52,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27927 states to 27927 states and 82842 transitions. [2019-12-07 16:00:52,532 INFO L78 Accepts]: Start accepts. Automaton has 27927 states and 82842 transitions. Word has length 72 [2019-12-07 16:00:52,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:00:52,532 INFO L462 AbstractCegarLoop]: Abstraction has 27927 states and 82842 transitions. [2019-12-07 16:00:52,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 31 states. [2019-12-07 16:00:52,532 INFO L276 IsEmpty]: Start isEmpty. Operand 27927 states and 82842 transitions. [2019-12-07 16:00:52,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:00:52,561 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:00:52,561 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:00:52,561 INFO L410 AbstractCegarLoop]: === Iteration 78 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:00:52,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:00:52,561 INFO L82 PathProgramCache]: Analyzing trace with hash -142650919, now seen corresponding path program 65 times [2019-12-07 16:00:52,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:00:52,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162378659] [2019-12-07 16:00:52,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:00:52,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:00:53,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:00:53,968 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162378659] [2019-12-07 16:00:53,969 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:00:53,969 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2019-12-07 16:00:53,969 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422802232] [2019-12-07 16:00:53,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-12-07 16:00:53,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:00:53,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-12-07 16:00:53,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=734, Unknown=0, NotChecked=0, Total=812 [2019-12-07 16:00:53,969 INFO L87 Difference]: Start difference. First operand 27927 states and 82842 transitions. Second operand 29 states. [2019-12-07 16:00:56,059 WARN L192 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2019-12-07 16:00:56,584 WARN L192 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 36 [2019-12-07 16:00:58,198 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 38 [2019-12-07 16:01:01,498 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 31 [2019-12-07 16:01:01,827 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2019-12-07 16:01:06,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:01:06,172 INFO L93 Difference]: Finished difference Result 52251 states and 158810 transitions. [2019-12-07 16:01:06,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2019-12-07 16:01:06,172 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 72 [2019-12-07 16:01:06,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:01:06,242 INFO L225 Difference]: With dead ends: 52251 [2019-12-07 16:01:06,243 INFO L226 Difference]: Without dead ends: 52207 [2019-12-07 16:01:06,243 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 6 SyntacticMatches, 4 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1298 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=606, Invalid=4796, Unknown=0, NotChecked=0, Total=5402 [2019-12-07 16:01:06,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52207 states. [2019-12-07 16:01:06,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52207 to 30404. [2019-12-07 16:01:06,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30404 states. [2019-12-07 16:01:06,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30404 states to 30404 states and 91205 transitions. [2019-12-07 16:01:06,869 INFO L78 Accepts]: Start accepts. Automaton has 30404 states and 91205 transitions. Word has length 72 [2019-12-07 16:01:06,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:01:06,870 INFO L462 AbstractCegarLoop]: Abstraction has 30404 states and 91205 transitions. [2019-12-07 16:01:06,870 INFO L463 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-12-07 16:01:06,870 INFO L276 IsEmpty]: Start isEmpty. Operand 30404 states and 91205 transitions. [2019-12-07 16:01:06,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:01:06,901 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:01:06,901 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:01:06,901 INFO L410 AbstractCegarLoop]: === Iteration 79 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:01:06,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:01:06,901 INFO L82 PathProgramCache]: Analyzing trace with hash 2000079873, now seen corresponding path program 66 times [2019-12-07 16:01:06,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:01:06,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267109295] [2019-12-07 16:01:06,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:01:06,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:01:07,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:01:07,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267109295] [2019-12-07 16:01:07,274 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:01:07,274 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2019-12-07 16:01:07,274 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496595103] [2019-12-07 16:01:07,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 16:01:07,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:01:07,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 16:01:07,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=441, Unknown=0, NotChecked=0, Total=506 [2019-12-07 16:01:07,275 INFO L87 Difference]: Start difference. First operand 30404 states and 91205 transitions. Second operand 23 states. [2019-12-07 16:01:16,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:01:16,103 INFO L93 Difference]: Finished difference Result 65187 states and 196156 transitions. [2019-12-07 16:01:16,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 16:01:16,104 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 72 [2019-12-07 16:01:16,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:01:16,197 INFO L225 Difference]: With dead ends: 65187 [2019-12-07 16:01:16,197 INFO L226 Difference]: Without dead ends: 56131 [2019-12-07 16:01:16,197 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1023 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=474, Invalid=3308, Unknown=0, NotChecked=0, Total=3782 [2019-12-07 16:01:16,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56131 states. [2019-12-07 16:01:16,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56131 to 27601. [2019-12-07 16:01:16,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27601 states. [2019-12-07 16:01:16,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27601 states to 27601 states and 81876 transitions. [2019-12-07 16:01:16,813 INFO L78 Accepts]: Start accepts. Automaton has 27601 states and 81876 transitions. Word has length 72 [2019-12-07 16:01:16,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:01:16,813 INFO L462 AbstractCegarLoop]: Abstraction has 27601 states and 81876 transitions. [2019-12-07 16:01:16,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 16:01:16,813 INFO L276 IsEmpty]: Start isEmpty. Operand 27601 states and 81876 transitions. [2019-12-07 16:01:16,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:01:16,912 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:01:16,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:01:16,912 INFO L410 AbstractCegarLoop]: === Iteration 80 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:01:16,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:01:16,912 INFO L82 PathProgramCache]: Analyzing trace with hash -1449820961, now seen corresponding path program 67 times [2019-12-07 16:01:16,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:01:16,913 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979095285] [2019-12-07 16:01:16,913 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:01:16,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:01:17,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:01:17,544 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979095285] [2019-12-07 16:01:17,544 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:01:17,544 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2019-12-07 16:01:17,544 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104539035] [2019-12-07 16:01:17,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 16:01:17,544 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:01:17,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 16:01:17,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=441, Unknown=0, NotChecked=0, Total=506 [2019-12-07 16:01:17,545 INFO L87 Difference]: Start difference. First operand 27601 states and 81876 transitions. Second operand 23 states. [2019-12-07 16:01:20,388 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 36 [2019-12-07 16:01:21,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:01:21,757 INFO L93 Difference]: Finished difference Result 55134 states and 166474 transitions. [2019-12-07 16:01:21,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2019-12-07 16:01:21,757 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 72 [2019-12-07 16:01:21,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:01:21,825 INFO L225 Difference]: With dead ends: 55134 [2019-12-07 16:01:21,826 INFO L226 Difference]: Without dead ends: 50224 [2019-12-07 16:01:21,826 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1469 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=661, Invalid=4451, Unknown=0, NotChecked=0, Total=5112 [2019-12-07 16:01:21,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50224 states. [2019-12-07 16:01:22,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50224 to 27484. [2019-12-07 16:01:22,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27484 states. [2019-12-07 16:01:22,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27484 states to 27484 states and 81303 transitions. [2019-12-07 16:01:22,409 INFO L78 Accepts]: Start accepts. Automaton has 27484 states and 81303 transitions. Word has length 72 [2019-12-07 16:01:22,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:01:22,409 INFO L462 AbstractCegarLoop]: Abstraction has 27484 states and 81303 transitions. [2019-12-07 16:01:22,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 16:01:22,409 INFO L276 IsEmpty]: Start isEmpty. Operand 27484 states and 81303 transitions. [2019-12-07 16:01:22,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:01:22,437 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:01:22,437 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:01:22,437 INFO L410 AbstractCegarLoop]: === Iteration 81 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:01:22,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:01:22,438 INFO L82 PathProgramCache]: Analyzing trace with hash -544702599, now seen corresponding path program 68 times [2019-12-07 16:01:22,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:01:22,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694066114] [2019-12-07 16:01:22,438 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:01:22,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:01:23,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:01:23,612 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694066114] [2019-12-07 16:01:23,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:01:23,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 16:01:23,613 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [49348122] [2019-12-07 16:01:23,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 16:01:23,613 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:01:23,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 16:01:23,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=627, Unknown=0, NotChecked=0, Total=702 [2019-12-07 16:01:23,613 INFO L87 Difference]: Start difference. First operand 27484 states and 81303 transitions. Second operand 27 states. [2019-12-07 16:01:30,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:01:30,974 INFO L93 Difference]: Finished difference Result 49318 states and 148268 transitions. [2019-12-07 16:01:30,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 16:01:30,975 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 16:01:30,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:01:31,041 INFO L225 Difference]: With dead ends: 49318 [2019-12-07 16:01:31,041 INFO L226 Difference]: Without dead ends: 49286 [2019-12-07 16:01:31,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1058 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=537, Invalid=4019, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 16:01:31,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49286 states. [2019-12-07 16:01:31,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49286 to 27898. [2019-12-07 16:01:31,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27898 states. [2019-12-07 16:01:31,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27898 states to 27898 states and 82522 transitions. [2019-12-07 16:01:31,617 INFO L78 Accepts]: Start accepts. Automaton has 27898 states and 82522 transitions. Word has length 72 [2019-12-07 16:01:31,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:01:31,617 INFO L462 AbstractCegarLoop]: Abstraction has 27898 states and 82522 transitions. [2019-12-07 16:01:31,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 16:01:31,617 INFO L276 IsEmpty]: Start isEmpty. Operand 27898 states and 82522 transitions. [2019-12-07 16:01:31,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:01:31,645 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:01:31,646 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:01:31,646 INFO L410 AbstractCegarLoop]: === Iteration 82 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:01:31,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:01:31,646 INFO L82 PathProgramCache]: Analyzing trace with hash -1765506455, now seen corresponding path program 69 times [2019-12-07 16:01:31,646 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:01:31,646 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586621081] [2019-12-07 16:01:31,646 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:01:31,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:01:32,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:01:32,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586621081] [2019-12-07 16:01:32,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:01:32,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 16:01:32,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097754101] [2019-12-07 16:01:32,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 16:01:32,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:01:32,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 16:01:32,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=578, Unknown=0, NotChecked=0, Total=650 [2019-12-07 16:01:32,564 INFO L87 Difference]: Start difference. First operand 27898 states and 82522 transitions. Second operand 26 states. [2019-12-07 16:01:33,971 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 29 [2019-12-07 16:01:34,251 WARN L192 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 36 [2019-12-07 16:01:34,858 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 35 [2019-12-07 16:01:35,406 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 31 [2019-12-07 16:01:35,881 WARN L192 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 38 [2019-12-07 16:01:36,291 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 38 [2019-12-07 16:01:36,633 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 38 [2019-12-07 16:01:38,071 WARN L192 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2019-12-07 16:01:39,840 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2019-12-07 16:01:40,031 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2019-12-07 16:01:41,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:01:41,916 INFO L93 Difference]: Finished difference Result 40346 states and 119600 transitions. [2019-12-07 16:01:41,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2019-12-07 16:01:41,916 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 16:01:41,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:01:41,963 INFO L225 Difference]: With dead ends: 40346 [2019-12-07 16:01:41,963 INFO L226 Difference]: Without dead ends: 38934 [2019-12-07 16:01:41,963 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1164 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=670, Invalid=4022, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 16:01:42,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38934 states. [2019-12-07 16:01:42,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38934 to 27658. [2019-12-07 16:01:42,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27658 states. [2019-12-07 16:01:42,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27658 states to 27658 states and 81770 transitions. [2019-12-07 16:01:42,458 INFO L78 Accepts]: Start accepts. Automaton has 27658 states and 81770 transitions. Word has length 72 [2019-12-07 16:01:42,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:01:42,458 INFO L462 AbstractCegarLoop]: Abstraction has 27658 states and 81770 transitions. [2019-12-07 16:01:42,458 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 16:01:42,458 INFO L276 IsEmpty]: Start isEmpty. Operand 27658 states and 81770 transitions. [2019-12-07 16:01:42,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 16:01:42,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:01:42,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:01:42,486 INFO L410 AbstractCegarLoop]: === Iteration 83 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:01:42,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:01:42,486 INFO L82 PathProgramCache]: Analyzing trace with hash -274897971, now seen corresponding path program 70 times [2019-12-07 16:01:42,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:01:42,487 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833806736] [2019-12-07 16:01:42,487 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:01:42,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:01:42,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:01:42,588 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 16:01:42,588 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:01:42,591 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1157] [1157] ULTIMATE.startENTRY-->L836: Formula: (let ((.cse1 (store |v_#valid_72| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_270| 1))) (and (= v_~__unbuffered_p2_EAX$read_delayed~0_79 0) (= 0 v_~__unbuffered_p2_EAX$w_buff0_used~0_8) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8) (= |v_#length_40| (store (store |v_#length_41| |v_~#x~0.base_270| 4) |v_ULTIMATE.start_main_~#t2272~0.base_20| 4)) (= v_~x$r_buff0_thd1~0_240 0) (= 0 v_~weak$$choice0~0_82) (= v_~x$flush_delayed~0_114 0) (= 0 v_~__unbuffered_cnt~0_78) (= 0 v_~x$r_buff0_thd2~0_65) (< |v_#StackHeapBarrier_24| |v_~#x~0.base_270|) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6) (= 0 v_~__unbuffered_p2_EAX~0_105) (= v_~weak$$choice2~0_140 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t2272~0.base_20| 1)) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$read_delayed~0_7) (= 0 v_~weak$$choice1~0_30) (= 0 v_~__unbuffered_p2_EAX$w_buff1~0_8) (= 0 v_~x$w_buff1_used~0_393) (= |v_ULTIMATE.start_main_~#t2272~0.offset_17| 0) (= v_~main$tmp_guard0~0_48 0) (= 0 |v_~#x~0.offset_270|) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.base_67) (< 0 |v_#StackHeapBarrier_24|) (= 0 v_~x$r_buff1_thd3~0_222) (< |v_#StackHeapBarrier_24| |v_ULTIMATE.start_main_~#t2272~0.base_20|) (= 0 v_~__unbuffered_p2_EAX$flush_delayed~0_7) (= |v_#memory_int_453| (store |v_#memory_int_454| |v_ULTIMATE.start_main_~#t2272~0.base_20| (store (select |v_#memory_int_454| |v_ULTIMATE.start_main_~#t2272~0.base_20|) |v_ULTIMATE.start_main_~#t2272~0.offset_17| 0))) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd2~0_8) (= 0 v_~x$r_buff0_thd3~0_292) (= (select (select |v_#memory_int_454| |v_~#x~0.base_270|) |v_~#x~0.offset_270|) 0) (= v_~x$r_buff0_thd0~0_103 0) (= v_~x$r_buff1_thd0~0_71 0) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd2~0_7) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6) (= 0 v_~__unbuffered_p2_EAX$w_buff1_used~0_7) (= (select .cse1 |v_~#x~0.base_270|) 0) (= 0 v_~x$read_delayed_var~0.base_8) (= (select .cse0 |v_ULTIMATE.start_main_~#t2272~0.base_20|) 0) (= 0 v_~__unbuffered_p2_EAX$mem_tmp~0_7) (= v_~main$tmp_guard1~0_41 0) (= 0 |v_#NULL.base_4|) (= v_~y~0_91 0) (= 0 v_~__unbuffered_p0_EAX~0_57) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_67) (= 0 v_~x$w_buff1~0_149) (= 0 v_~x$w_buff0~0_120) (= v_~x$r_buff1_thd1~0_134 0) (= |v_#NULL.offset_4| 0) (= 0 v_~__unbuffered_p2_EAX$w_buff0~0_8) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd3~0_8) (= v_~x$r_buff1_thd2~0_50 0) (= v_~x$mem_tmp~0_90 0) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd1~0_8) (= 0 v_~x$w_buff0_used~0_798)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_24|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_454|, #length=|v_#length_41|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_120, ~x$flush_delayed~0=v_~x$flush_delayed~0_114, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_67, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_67, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_134, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_292, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_11|, ULTIMATE.start_main_~#t2274~0.base=|v_ULTIMATE.start_main_~#t2274~0.base_35|, ~weak$$choice1~0=v_~weak$$choice1~0_30, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_57, ~__unbuffered_p2_EAX$w_buff0_used~0=v_~__unbuffered_p2_EAX$w_buff0_used~0_8, ULTIMATE.start_main_~#t2274~0.offset=|v_ULTIMATE.start_main_~#t2274~0.offset_31|, #length=|v_#length_40|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_105, ~__unbuffered_p2_EAX$r_buff1_thd2~0=v_~__unbuffered_p2_EAX$r_buff1_thd2~0_8, ~__unbuffered_p2_EAX$r_buff0_thd0~0=v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_103, ~__unbuffered_p2_EAX$w_buff0~0=v_~__unbuffered_p2_EAX$w_buff0~0_8, ~#x~0.offset=|v_~#x~0.offset_270|, ~x$w_buff1~0=v_~x$w_buff1~0_149, ULTIMATE.start_main_~#t2273~0.offset=|v_ULTIMATE.start_main_~#t2273~0.offset_18|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_393, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_50, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_24|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_94|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_178|, ULTIMATE.start_main_#t~nondet81=|v_ULTIMATE.start_main_#t~nondet81_36|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_68|, ~weak$$choice0~0=v_~weak$$choice0~0_82, #StackHeapBarrier=|v_#StackHeapBarrier_24|, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_41|, ~__unbuffered_p2_EAX$r_buff0_thd1~0=v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~__unbuffered_p2_EAX$r_buff1_thd3~0=v_~__unbuffered_p2_EAX$r_buff1_thd3~0_8, ~__unbuffered_p2_EAX$w_buff1~0=v_~__unbuffered_p2_EAX$w_buff1~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_240, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_23|, ULTIMATE.start_main_~#t2272~0.offset=|v_ULTIMATE.start_main_~#t2272~0.offset_17|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_41, ~x$mem_tmp~0=v_~x$mem_tmp~0_90, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_11|, ~__unbuffered_p2_EAX$w_buff1_used~0=v_~__unbuffered_p2_EAX$w_buff1_used~0_7, ~__unbuffered_p2_EAX$r_buff0_thd2~0=v_~__unbuffered_p2_EAX$r_buff0_thd2~0_7, ~__unbuffered_p2_EAX$r_buff1_thd0~0=v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6, ~y~0=v_~y~0_91, ULTIMATE.start_main_~#t2272~0.base=|v_ULTIMATE.start_main_~#t2272~0.base_20|, ULTIMATE.start_main_#t~mem74=|v_ULTIMATE.start_main_#t~mem74_103|, ~__unbuffered_p2_EAX$mem_tmp~0=v_~__unbuffered_p2_EAX$mem_tmp~0_7, ULTIMATE.start_main_~#t2273~0.base=|v_ULTIMATE.start_main_~#t2273~0.base_22|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_48, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_71, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_65, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_188|, ~__unbuffered_p2_EAX$flush_delayed~0=v_~__unbuffered_p2_EAX$flush_delayed~0_7, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_125|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_798, ~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_79, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_71|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_70|, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_50|, #memory_int=|v_#memory_int_453|, ~#x~0.base=|v_~#x~0.base_270|, ~__unbuffered_p2_EAX$r_buff1_thd1~0=v_~__unbuffered_p2_EAX$r_buff1_thd1~0_8, ~__unbuffered_p2_EAX$r_buff0_thd3~0=v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_140, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, ~__unbuffered_p2_EAX$read_delayed_var~0.base, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2274~0.base, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p2_EAX$w_buff0_used~0, ULTIMATE.start_main_~#t2274~0.offset, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EAX$r_buff1_thd2~0, ~__unbuffered_p2_EAX$r_buff0_thd0~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EAX$w_buff0~0, ~#x~0.offset, ~x$w_buff1~0, ULTIMATE.start_main_~#t2273~0.offset, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~nondet81, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite84, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite80, ~__unbuffered_p2_EAX$r_buff0_thd1~0, ~__unbuffered_cnt~0, ~__unbuffered_p2_EAX$r_buff1_thd3~0, ~__unbuffered_p2_EAX$w_buff1~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet73, ULTIMATE.start_main_~#t2272~0.offset, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~nondet71, ~__unbuffered_p2_EAX$w_buff1_used~0, ~__unbuffered_p2_EAX$r_buff0_thd2~0, ~__unbuffered_p2_EAX$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_~#t2272~0.base, ULTIMATE.start_main_#t~mem74, ~__unbuffered_p2_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2273~0.base, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite78, ~__unbuffered_p2_EAX$flush_delayed~0, #NULL.base, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0, ~__unbuffered_p2_EAX$read_delayed~0, ULTIMATE.start_main_#t~ite83, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem82, #memory_int, ~#x~0.base, ~__unbuffered_p2_EAX$r_buff1_thd1~0, ~__unbuffered_p2_EAX$r_buff0_thd3~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 16:01:42,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1124] [1124] L836-1-->L838: Formula: (and (= |v_ULTIMATE.start_main_~#t2273~0.offset_11| 0) (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t2273~0.base_13|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2273~0.base_13| 4)) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t2273~0.base_13| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2273~0.base_13|) (= (store |v_#memory_int_296| |v_ULTIMATE.start_main_~#t2273~0.base_13| (store (select |v_#memory_int_296| |v_ULTIMATE.start_main_~#t2273~0.base_13|) |v_ULTIMATE.start_main_~#t2273~0.offset_11| 1)) |v_#memory_int_295|) (not (= |v_ULTIMATE.start_main_~#t2273~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_296|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t2273~0.base=|v_ULTIMATE.start_main_~#t2273~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_295|, ULTIMATE.start_main_~#t2273~0.offset=|v_ULTIMATE.start_main_~#t2273~0.offset_11|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2273~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2273~0.offset, #length, ULTIMATE.start_main_#t~nondet71] because there is no mapped edge [2019-12-07 16:01:42,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1114] [1114] L838-1-->L840: Formula: (and (= |v_#memory_int_245| (store |v_#memory_int_246| |v_ULTIMATE.start_main_~#t2274~0.base_25| (store (select |v_#memory_int_246| |v_ULTIMATE.start_main_~#t2274~0.base_25|) |v_ULTIMATE.start_main_~#t2274~0.offset_23| 2))) (= |v_ULTIMATE.start_main_~#t2274~0.offset_23| 0) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2274~0.base_25|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2274~0.base_25| 1) |v_#valid_38|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2274~0.base_25|) (not (= 0 |v_ULTIMATE.start_main_~#t2274~0.base_25|)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t2274~0.base_25| 4) |v_#length_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_246|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_245|, ULTIMATE.start_main_~#t2274~0.offset=|v_ULTIMATE.start_main_~#t2274~0.offset_23|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_6|, ULTIMATE.start_main_~#t2274~0.base=|v_ULTIMATE.start_main_~#t2274~0.base_25|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2274~0.offset, #length, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2274~0.base] because there is no mapped edge [2019-12-07 16:01:42,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1095] [1095] L778-2-->L778-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-922181263 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In-922181263 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite31_Out-922181263| ~x$w_buff1~0_In-922181263) (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~mem30_In-922181263| |P1Thread1of1ForFork1_#t~mem30_Out-922181263|)) (and (= (select (select |#memory_int_In-922181263| |~#x~0.base_In-922181263|) |~#x~0.offset_In-922181263|) |P1Thread1of1ForFork1_#t~mem30_Out-922181263|) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite31_Out-922181263| |P1Thread1of1ForFork1_#t~mem30_Out-922181263|)))) InVars {P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_In-922181263|, ~#x~0.offset=|~#x~0.offset_In-922181263|, ~x$w_buff1~0=~x$w_buff1~0_In-922181263, ~#x~0.base=|~#x~0.base_In-922181263|, #memory_int=|#memory_int_In-922181263|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-922181263, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-922181263} OutVars{P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_Out-922181263|, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out-922181263|, ~#x~0.offset=|~#x~0.offset_In-922181263|, ~x$w_buff1~0=~x$w_buff1~0_In-922181263, ~#x~0.base=|~#x~0.base_In-922181263|, #memory_int=|#memory_int_In-922181263|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-922181263, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-922181263} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 16:01:42,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1012] [1012] L778-4-->L779: Formula: (= (store |v_#memory_int_94| |v_~#x~0.base_59| (store (select |v_#memory_int_94| |v_~#x~0.base_59|) |v_~#x~0.offset_59| |v_P1Thread1of1ForFork1_#t~ite31_6|)) |v_#memory_int_93|) InVars {~#x~0.offset=|v_~#x~0.offset_59|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_6|, #memory_int=|v_#memory_int_94|, ~#x~0.base=|v_~#x~0.base_59|} OutVars{P1Thread1of1ForFork1_#t~mem30=|v_P1Thread1of1ForFork1_#t~mem30_3|, ~#x~0.offset=|v_~#x~0.offset_59|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, #memory_int=|v_#memory_int_93|, ~#x~0.base=|v_~#x~0.base_59|, P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31, #memory_int, P1Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 16:01:42,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1078] [1078] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1140267392 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1140267392 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite33_Out1140267392| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite33_Out1140267392| ~x$w_buff0_used~0_In1140267392)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1140267392, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1140267392} OutVars{P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out1140267392|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1140267392, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1140267392} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 16:01:42,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1093] [1093] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-1563119888 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1563119888 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1563119888 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-1563119888 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out-1563119888| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite34_Out-1563119888| ~x$w_buff1_used~0_In-1563119888) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1563119888, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1563119888, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1563119888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1563119888} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-1563119888|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1563119888, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1563119888, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1563119888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1563119888} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 16:01:42,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1050] [1050] L801-->L802: Formula: (and (= v_~x$r_buff0_thd3~0_148 v_~x$r_buff0_thd3~0_147) (not (= (mod v_~weak$$choice2~0_113 256) 0))) InVars {~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_113} OutVars{P2Thread1of1ForFork2_#t~ite56=|v_P2Thread1of1ForFork2_#t~ite56_12|, P2Thread1of1ForFork2_#t~ite57=|v_P2Thread1of1ForFork2_#t~ite57_8|, P2Thread1of1ForFork2_#t~ite55=|v_P2Thread1of1ForFork2_#t~ite55_11|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_113} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite56, P2Thread1of1ForFork2_#t~ite57, P2Thread1of1ForFork2_#t~ite55, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 16:01:42,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~x$flush_delayed~0_In-349718918 256)))) (or (and (= |P2Thread1of1ForFork2_#t~mem62_In-349718918| |P2Thread1of1ForFork2_#t~mem62_Out-349718918|) (= |P2Thread1of1ForFork2_#t~ite63_Out-349718918| ~x$mem_tmp~0_In-349718918) (not .cse0)) (and (= |P2Thread1of1ForFork2_#t~mem62_Out-349718918| |P2Thread1of1ForFork2_#t~ite63_Out-349718918|) .cse0 (= |P2Thread1of1ForFork2_#t~mem62_Out-349718918| (select (select |#memory_int_In-349718918| |~#x~0.base_In-349718918|) |~#x~0.offset_In-349718918|))))) InVars {~x$flush_delayed~0=~x$flush_delayed~0_In-349718918, ~#x~0.offset=|~#x~0.offset_In-349718918|, ~#x~0.base=|~#x~0.base_In-349718918|, #memory_int=|#memory_int_In-349718918|, ~x$mem_tmp~0=~x$mem_tmp~0_In-349718918, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_In-349718918|} OutVars{~x$flush_delayed~0=~x$flush_delayed~0_In-349718918, ~#x~0.offset=|~#x~0.offset_In-349718918|, P2Thread1of1ForFork2_#t~ite63=|P2Thread1of1ForFork2_#t~ite63_Out-349718918|, ~#x~0.base=|~#x~0.base_In-349718918|, #memory_int=|#memory_int_In-349718918|, ~x$mem_tmp~0=~x$mem_tmp~0_In-349718918, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_Out-349718918|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite63, P2Thread1of1ForFork2_#t~mem62] because there is no mapped edge [2019-12-07 16:01:42,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1067] [1067] L813-2-->L813-5: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd3~0_In42101528 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In42101528 256))) (.cse1 (= |P2Thread1of1ForFork2_#t~ite65_Out42101528| |P2Thread1of1ForFork2_#t~ite66_Out42101528|))) (or (and (= |P2Thread1of1ForFork2_#t~ite65_Out42101528| ~x$w_buff1~0_In42101528) (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork2_#t~mem64_In42101528| |P2Thread1of1ForFork2_#t~mem64_Out42101528|)) (and (or .cse2 .cse0) (= (select (select |#memory_int_In42101528| |~#x~0.base_In42101528|) |~#x~0.offset_In42101528|) |P2Thread1of1ForFork2_#t~mem64_Out42101528|) .cse1 (= |P2Thread1of1ForFork2_#t~ite65_Out42101528| |P2Thread1of1ForFork2_#t~mem64_Out42101528|)))) InVars {~#x~0.offset=|~#x~0.offset_In42101528|, ~x$w_buff1~0=~x$w_buff1~0_In42101528, ~#x~0.base=|~#x~0.base_In42101528|, #memory_int=|#memory_int_In42101528|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In42101528, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In42101528, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_In42101528|} OutVars{P2Thread1of1ForFork2_#t~ite65=|P2Thread1of1ForFork2_#t~ite65_Out42101528|, P2Thread1of1ForFork2_#t~ite66=|P2Thread1of1ForFork2_#t~ite66_Out42101528|, ~#x~0.offset=|~#x~0.offset_In42101528|, ~x$w_buff1~0=~x$w_buff1~0_In42101528, ~#x~0.base=|~#x~0.base_In42101528|, #memory_int=|#memory_int_In42101528|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In42101528, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In42101528, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_Out42101528|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite65, P2Thread1of1ForFork2_#t~ite66, P2Thread1of1ForFork2_#t~mem64] because there is no mapped edge [2019-12-07 16:01:42,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1070] [1070] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1074103718 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1074103718 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite67_Out1074103718|)) (and (= ~x$w_buff0_used~0_In1074103718 |P2Thread1of1ForFork2_#t~ite67_Out1074103718|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1074103718, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1074103718} OutVars{P2Thread1of1ForFork2_#t~ite67=|P2Thread1of1ForFork2_#t~ite67_Out1074103718|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1074103718, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1074103718} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite67] because there is no mapped edge [2019-12-07 16:01:42,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1019] [1019] L759-->L760: Formula: (and (not (= (mod v_~weak$$choice2~0_67 256) 0)) (= v_~x$r_buff0_thd1~0_84 v_~x$r_buff0_thd1~0_83)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_84, ~weak$$choice2~0=v_~weak$$choice2~0_67} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_9|, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_6|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_83, ~weak$$choice2~0=v_~weak$$choice2~0_67, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_9|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, ~x$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 16:01:42,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1080] [1080] L762-->L762-2: Formula: (let ((.cse0 (= (mod ~x$flush_delayed~0_In-1650121453 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite29_Out-1650121453| ~x$mem_tmp~0_In-1650121453) (= |P0Thread1of1ForFork0_#t~mem28_In-1650121453| |P0Thread1of1ForFork0_#t~mem28_Out-1650121453|) (not .cse0)) (and (= (select (select |#memory_int_In-1650121453| |~#x~0.base_In-1650121453|) |~#x~0.offset_In-1650121453|) |P0Thread1of1ForFork0_#t~mem28_Out-1650121453|) .cse0 (= |P0Thread1of1ForFork0_#t~mem28_Out-1650121453| |P0Thread1of1ForFork0_#t~ite29_Out-1650121453|)))) InVars {P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_In-1650121453|, ~x$flush_delayed~0=~x$flush_delayed~0_In-1650121453, ~#x~0.offset=|~#x~0.offset_In-1650121453|, ~#x~0.base=|~#x~0.base_In-1650121453|, #memory_int=|#memory_int_In-1650121453|, ~x$mem_tmp~0=~x$mem_tmp~0_In-1650121453} OutVars{P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_Out-1650121453|, ~x$flush_delayed~0=~x$flush_delayed~0_In-1650121453, ~#x~0.offset=|~#x~0.offset_In-1650121453|, P0Thread1of1ForFork0_#t~ite29=|P0Thread1of1ForFork0_#t~ite29_Out-1650121453|, ~#x~0.base=|~#x~0.base_In-1650121453|, #memory_int=|#memory_int_In-1650121453|, ~x$mem_tmp~0=~x$mem_tmp~0_In-1650121453} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:01:42,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1126] [1126] L762-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$flush_delayed~0_97 0) (= |v_#memory_int_310| (store |v_#memory_int_311| |v_~#x~0.base_197| (store (select |v_#memory_int_311| |v_~#x~0.base_197|) |v_~#x~0.offset_197| |v_P0Thread1of1ForFork0_#t~ite29_26|)))) InVars {~#x~0.offset=|v_~#x~0.offset_197|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_26|, #memory_int=|v_#memory_int_311|, ~#x~0.base=|v_~#x~0.base_197|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P0Thread1of1ForFork0_#t~mem28=|v_P0Thread1of1ForFork0_#t~mem28_13|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_97, ~#x~0.offset=|v_~#x~0.offset_197|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_25|, #memory_int=|v_#memory_int_310|, ~#x~0.base=|v_~#x~0.base_197|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#res.offset, ~x$flush_delayed~0, P0Thread1of1ForFork0_#t~ite29, #memory_int, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:01:42,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1066] [1066] L781-->L782: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In2097733935 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_Out2097733935 ~x$r_buff0_thd2~0_In2097733935)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In2097733935 256)))) (or (and .cse0 .cse1) (and (not .cse1) (= ~x$r_buff0_thd2~0_Out2097733935 0) (not .cse2)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2097733935, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2097733935} OutVars{P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out2097733935|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2097733935, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2097733935} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 16:01:42,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1094] [1094] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1192815755 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1192815755 256))) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-1192815755 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1192815755 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite36_Out-1192815755|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$r_buff1_thd2~0_In-1192815755 |P1Thread1of1ForFork1_#t~ite36_Out-1192815755|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1192815755, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1192815755, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1192815755, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1192815755} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1192815755, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1192815755, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1192815755, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-1192815755|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1192815755} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 16:01:42,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1110] [1110] L782-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_34 |v_P1Thread1of1ForFork1_#t~ite36_22|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_34, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 16:01:42,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1087] [1087] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In1227587070 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1227587070 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1227587070 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1227587070 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1227587070 |P2Thread1of1ForFork2_#t~ite68_Out1227587070|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork2_#t~ite68_Out1227587070|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1227587070, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1227587070, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1227587070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1227587070} OutVars{P2Thread1of1ForFork2_#t~ite68=|P2Thread1of1ForFork2_#t~ite68_Out1227587070|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1227587070, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1227587070, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1227587070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1227587070} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite68] because there is no mapped edge [2019-12-07 16:01:42,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1091] [1091] L816-->L817: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-1922365131 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-1922365131 256) 0)) (.cse1 (= ~x$r_buff0_thd3~0_Out-1922365131 ~x$r_buff0_thd3~0_In-1922365131))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~x$r_buff0_thd3~0_Out-1922365131)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1922365131, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1922365131} OutVars{P2Thread1of1ForFork2_#t~ite69=|P2Thread1of1ForFork2_#t~ite69_Out-1922365131|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out-1922365131, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1922365131} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite69, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 16:01:42,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1081] [1081] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In1119921220 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1119921220 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In1119921220 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1119921220 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite70_Out1119921220| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite70_Out1119921220| ~x$r_buff1_thd3~0_In1119921220)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1119921220, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1119921220, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1119921220, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1119921220} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1119921220, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1119921220, P2Thread1of1ForFork2_#t~ite70=|P2Thread1of1ForFork2_#t~ite70_Out1119921220|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1119921220, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1119921220} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite70] because there is no mapped edge [2019-12-07 16:01:42,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1109] [1109] L817-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#t~ite70_28| v_~x$r_buff1_thd3~0_118) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_118, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, P2Thread1of1ForFork2_#t~ite70, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 16:01:42,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1038] [1038] L844-->L846-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (or (= (mod v_~x$w_buff0_used~0_315 256) 0) (= 0 (mod v_~x$r_buff0_thd0~0_33 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_315} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_315} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:01:42,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1096] [1096] L846-2-->L846-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In104412190 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In104412190 256)))) (or (and (= (select (select |#memory_int_In104412190| |~#x~0.base_In104412190|) |~#x~0.offset_In104412190|) |ULTIMATE.start_main_#t~mem74_Out104412190|) (= |ULTIMATE.start_main_#t~ite75_Out104412190| |ULTIMATE.start_main_#t~mem74_Out104412190|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite75_Out104412190| ~x$w_buff1~0_In104412190) (= |ULTIMATE.start_main_#t~mem74_In104412190| |ULTIMATE.start_main_#t~mem74_Out104412190|) (not .cse0)))) InVars {~#x~0.offset=|~#x~0.offset_In104412190|, ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_In104412190|, ~x$w_buff1~0=~x$w_buff1~0_In104412190, ~#x~0.base=|~#x~0.base_In104412190|, #memory_int=|#memory_int_In104412190|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In104412190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In104412190} OutVars{ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_Out104412190|, ~#x~0.offset=|~#x~0.offset_In104412190|, ~x$w_buff1~0=~x$w_buff1~0_In104412190, ~#x~0.base=|~#x~0.base_In104412190|, #memory_int=|#memory_int_In104412190|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In104412190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In104412190, ULTIMATE.start_main_#t~ite75=|ULTIMATE.start_main_#t~ite75_Out104412190|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem74, ULTIMATE.start_main_#t~ite75] because there is no mapped edge [2019-12-07 16:01:42,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1035] [1035] L846-4-->L847: Formula: (= |v_#memory_int_123| (store |v_#memory_int_124| |v_~#x~0.base_79| (store (select |v_#memory_int_124| |v_~#x~0.base_79|) |v_~#x~0.offset_79| |v_ULTIMATE.start_main_#t~ite75_10|))) InVars {~#x~0.offset=|v_~#x~0.offset_79|, #memory_int=|v_#memory_int_124|, ~#x~0.base=|v_~#x~0.base_79|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_10|} OutVars{ULTIMATE.start_main_#t~mem74=|v_ULTIMATE.start_main_#t~mem74_7|, ~#x~0.offset=|v_~#x~0.offset_79|, #memory_int=|v_#memory_int_123|, ~#x~0.base=|v_~#x~0.base_79|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_9|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem74, #memory_int, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76] because there is no mapped edge [2019-12-07 16:01:42,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1079] [1079] L847-->L847-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-388850348 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-388850348 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite77_Out-388850348| ~x$w_buff0_used~0_In-388850348)) (and (= |ULTIMATE.start_main_#t~ite77_Out-388850348| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-388850348, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-388850348} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-388850348, ULTIMATE.start_main_#t~ite77=|ULTIMATE.start_main_#t~ite77_Out-388850348|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-388850348} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] because there is no mapped edge [2019-12-07 16:01:42,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1086] [1086] L848-->L848-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In-1903393307 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1903393307 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1903393307 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1903393307 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite78_Out-1903393307| 0)) (and (= |ULTIMATE.start_main_#t~ite78_Out-1903393307| ~x$w_buff1_used~0_In-1903393307) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1903393307, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1903393307, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1903393307, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1903393307} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1903393307, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1903393307, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1903393307, ULTIMATE.start_main_#t~ite78=|ULTIMATE.start_main_#t~ite78_Out-1903393307|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1903393307} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite78] because there is no mapped edge [2019-12-07 16:01:42,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1071] [1071] L849-->L850: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1093517800 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1093517800 256))) (.cse1 (= ~x$r_buff0_thd0~0_In1093517800 ~x$r_buff0_thd0~0_Out1093517800))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd0~0_Out1093517800) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1093517800, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1093517800} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out1093517800, ULTIMATE.start_main_#t~ite79=|ULTIMATE.start_main_#t~ite79_Out1093517800|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1093517800} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite79] because there is no mapped edge [2019-12-07 16:01:42,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1077] [1077] L850-->L854: Formula: (let ((.cse3 (= ~x$r_buff1_thd0~0_Out1804326487 0)) (.cse5 (= (mod ~x$w_buff1_used~0_In1804326487 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In1804326487 256) 0)) (.cse4 (= ~x$r_buff1_thd0~0_Out1804326487 ~x$r_buff1_thd0~0_In1804326487)) (.cse6 (= 0 (mod ~x$r_buff1_thd0~0_In1804326487 256))) (.cse1 (= ~weak$$choice1~0_Out1804326487 |ULTIMATE.start_main_#t~nondet81_In1804326487|)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1804326487 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) .cse3) (and .cse4 .cse2 .cse1 .cse5) (and .cse1 (not .cse6) .cse3 (not .cse5)) (and .cse4 .cse1 .cse5 .cse0) (and .cse4 .cse2 .cse6 .cse1) (and .cse4 .cse6 .cse1 .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1804326487, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1804326487, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1804326487, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_In1804326487|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1804326487} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1804326487, ~weak$$choice1~0=~weak$$choice1~0_Out1804326487, ULTIMATE.start_main_#t~ite80=|ULTIMATE.start_main_#t~ite80_Out1804326487|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1804326487, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out1804326487, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_Out1804326487|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1804326487} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite80, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet81] because there is no mapped edge [2019-12-07 16:01:42,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1090] [1090] L854-->L854-3: Formula: (let ((.cse0 (not (= 0 (mod ~__unbuffered_p2_EAX$read_delayed~0_In-1337861142 256)))) (.cse1 (= 0 (mod ~weak$$choice1~0_In-1337861142 256)))) (or (and .cse0 (= ~__unbuffered_p2_EAX~0_In-1337861142 |ULTIMATE.start_main_#t~ite83_Out-1337861142|) .cse1 (= |ULTIMATE.start_main_#t~mem82_In-1337861142| |ULTIMATE.start_main_#t~mem82_Out-1337861142|)) (and .cse0 (not .cse1) (= (select (select |#memory_int_In-1337861142| ~__unbuffered_p2_EAX$read_delayed_var~0.base_In-1337861142) ~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-1337861142) |ULTIMATE.start_main_#t~mem82_Out-1337861142|) (= |ULTIMATE.start_main_#t~mem82_Out-1337861142| |ULTIMATE.start_main_#t~ite83_Out-1337861142|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-1337861142, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-1337861142, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_In-1337861142|, #memory_int=|#memory_int_In-1337861142|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-1337861142} OutVars{ULTIMATE.start_main_#t~ite83=|ULTIMATE.start_main_#t~ite83_Out-1337861142|, ~weak$$choice1~0=~weak$$choice1~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-1337861142, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_Out-1337861142|, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-1337861142, #memory_int=|#memory_int_In-1337861142|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-1337861142} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~mem82] because there is no mapped edge [2019-12-07 16:01:42,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1123] [1123] L854-3-->L857-1: Formula: (and (let ((.cse1 (= v_~y~0_73 2)) (.cse4 (= 0 v_~__unbuffered_p0_EAX~0_34)) (.cse3 (= 1 v_~__unbuffered_p2_EAX~0_70)) (.cse0 (= |v_ULTIMATE.start_main_#t~ite83_52| v_~__unbuffered_p2_EAX~0_70)) (.cse2 (= v_~main$tmp_guard1~0_28 1))) (or (and .cse0 (not .cse1) .cse2) (and (= v_~main$tmp_guard1~0_28 0) .cse1 .cse0 .cse3 .cse4) (and (not .cse4) .cse0 .cse2) (and (not .cse3) .cse0 .cse2))) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_28 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_52|, ~y~0=v_~y~0_73} OutVars{ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_47|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_51|, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_70, ~y~0=v_~y~0_73, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite84, ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~mem82, ~main$tmp_guard1~0, ~__unbuffered_p2_EAX~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:01:42,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1112] [1112] L857-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:01:42,685 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:01:42 BasicIcfg [2019-12-07 16:01:42,685 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:01:42,685 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:01:42,685 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:01:42,685 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:01:42,686 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:50:58" (3/4) ... [2019-12-07 16:01:42,687 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:01:42,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1157] [1157] ULTIMATE.startENTRY-->L836: Formula: (let ((.cse1 (store |v_#valid_72| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_270| 1))) (and (= v_~__unbuffered_p2_EAX$read_delayed~0_79 0) (= 0 v_~__unbuffered_p2_EAX$w_buff0_used~0_8) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8) (= |v_#length_40| (store (store |v_#length_41| |v_~#x~0.base_270| 4) |v_ULTIMATE.start_main_~#t2272~0.base_20| 4)) (= v_~x$r_buff0_thd1~0_240 0) (= 0 v_~weak$$choice0~0_82) (= v_~x$flush_delayed~0_114 0) (= 0 v_~__unbuffered_cnt~0_78) (= 0 v_~x$r_buff0_thd2~0_65) (< |v_#StackHeapBarrier_24| |v_~#x~0.base_270|) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6) (= 0 v_~__unbuffered_p2_EAX~0_105) (= v_~weak$$choice2~0_140 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t2272~0.base_20| 1)) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$read_delayed~0_7) (= 0 v_~weak$$choice1~0_30) (= 0 v_~__unbuffered_p2_EAX$w_buff1~0_8) (= 0 v_~x$w_buff1_used~0_393) (= |v_ULTIMATE.start_main_~#t2272~0.offset_17| 0) (= v_~main$tmp_guard0~0_48 0) (= 0 |v_~#x~0.offset_270|) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.base_67) (< 0 |v_#StackHeapBarrier_24|) (= 0 v_~x$r_buff1_thd3~0_222) (< |v_#StackHeapBarrier_24| |v_ULTIMATE.start_main_~#t2272~0.base_20|) (= 0 v_~__unbuffered_p2_EAX$flush_delayed~0_7) (= |v_#memory_int_453| (store |v_#memory_int_454| |v_ULTIMATE.start_main_~#t2272~0.base_20| (store (select |v_#memory_int_454| |v_ULTIMATE.start_main_~#t2272~0.base_20|) |v_ULTIMATE.start_main_~#t2272~0.offset_17| 0))) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd2~0_8) (= 0 v_~x$r_buff0_thd3~0_292) (= (select (select |v_#memory_int_454| |v_~#x~0.base_270|) |v_~#x~0.offset_270|) 0) (= v_~x$r_buff0_thd0~0_103 0) (= v_~x$r_buff1_thd0~0_71 0) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd2~0_7) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6) (= 0 v_~__unbuffered_p2_EAX$w_buff1_used~0_7) (= (select .cse1 |v_~#x~0.base_270|) 0) (= 0 v_~x$read_delayed_var~0.base_8) (= (select .cse0 |v_ULTIMATE.start_main_~#t2272~0.base_20|) 0) (= 0 v_~__unbuffered_p2_EAX$mem_tmp~0_7) (= v_~main$tmp_guard1~0_41 0) (= 0 |v_#NULL.base_4|) (= v_~y~0_91 0) (= 0 v_~__unbuffered_p0_EAX~0_57) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_67) (= 0 v_~x$w_buff1~0_149) (= 0 v_~x$w_buff0~0_120) (= v_~x$r_buff1_thd1~0_134 0) (= |v_#NULL.offset_4| 0) (= 0 v_~__unbuffered_p2_EAX$w_buff0~0_8) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd3~0_8) (= v_~x$r_buff1_thd2~0_50 0) (= v_~x$mem_tmp~0_90 0) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd1~0_8) (= 0 v_~x$w_buff0_used~0_798)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_24|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_454|, #length=|v_#length_41|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_120, ~x$flush_delayed~0=v_~x$flush_delayed~0_114, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_67, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_67, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_134, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_292, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_11|, ULTIMATE.start_main_~#t2274~0.base=|v_ULTIMATE.start_main_~#t2274~0.base_35|, ~weak$$choice1~0=v_~weak$$choice1~0_30, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_57, ~__unbuffered_p2_EAX$w_buff0_used~0=v_~__unbuffered_p2_EAX$w_buff0_used~0_8, ULTIMATE.start_main_~#t2274~0.offset=|v_ULTIMATE.start_main_~#t2274~0.offset_31|, #length=|v_#length_40|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_105, ~__unbuffered_p2_EAX$r_buff1_thd2~0=v_~__unbuffered_p2_EAX$r_buff1_thd2~0_8, ~__unbuffered_p2_EAX$r_buff0_thd0~0=v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_103, ~__unbuffered_p2_EAX$w_buff0~0=v_~__unbuffered_p2_EAX$w_buff0~0_8, ~#x~0.offset=|v_~#x~0.offset_270|, ~x$w_buff1~0=v_~x$w_buff1~0_149, ULTIMATE.start_main_~#t2273~0.offset=|v_ULTIMATE.start_main_~#t2273~0.offset_18|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_393, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_50, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_24|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_94|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_178|, ULTIMATE.start_main_#t~nondet81=|v_ULTIMATE.start_main_#t~nondet81_36|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_68|, ~weak$$choice0~0=v_~weak$$choice0~0_82, #StackHeapBarrier=|v_#StackHeapBarrier_24|, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_41|, ~__unbuffered_p2_EAX$r_buff0_thd1~0=v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, ~__unbuffered_p2_EAX$r_buff1_thd3~0=v_~__unbuffered_p2_EAX$r_buff1_thd3~0_8, ~__unbuffered_p2_EAX$w_buff1~0=v_~__unbuffered_p2_EAX$w_buff1~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_240, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_23|, ULTIMATE.start_main_~#t2272~0.offset=|v_ULTIMATE.start_main_~#t2272~0.offset_17|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_41, ~x$mem_tmp~0=v_~x$mem_tmp~0_90, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_11|, ~__unbuffered_p2_EAX$w_buff1_used~0=v_~__unbuffered_p2_EAX$w_buff1_used~0_7, ~__unbuffered_p2_EAX$r_buff0_thd2~0=v_~__unbuffered_p2_EAX$r_buff0_thd2~0_7, ~__unbuffered_p2_EAX$r_buff1_thd0~0=v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6, ~y~0=v_~y~0_91, ULTIMATE.start_main_~#t2272~0.base=|v_ULTIMATE.start_main_~#t2272~0.base_20|, ULTIMATE.start_main_#t~mem74=|v_ULTIMATE.start_main_#t~mem74_103|, ~__unbuffered_p2_EAX$mem_tmp~0=v_~__unbuffered_p2_EAX$mem_tmp~0_7, ULTIMATE.start_main_~#t2273~0.base=|v_ULTIMATE.start_main_~#t2273~0.base_22|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_48, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_71, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_65, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_188|, ~__unbuffered_p2_EAX$flush_delayed~0=v_~__unbuffered_p2_EAX$flush_delayed~0_7, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_125|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_798, ~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_79, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_71|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_70|, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_50|, #memory_int=|v_#memory_int_453|, ~#x~0.base=|v_~#x~0.base_270|, ~__unbuffered_p2_EAX$r_buff1_thd1~0=v_~__unbuffered_p2_EAX$r_buff1_thd1~0_8, ~__unbuffered_p2_EAX$r_buff0_thd3~0=v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_140, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, ~__unbuffered_p2_EAX$read_delayed_var~0.base, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2274~0.base, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p2_EAX$w_buff0_used~0, ULTIMATE.start_main_~#t2274~0.offset, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EAX$r_buff1_thd2~0, ~__unbuffered_p2_EAX$r_buff0_thd0~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EAX$w_buff0~0, ~#x~0.offset, ~x$w_buff1~0, ULTIMATE.start_main_~#t2273~0.offset, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~nondet81, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite84, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite80, ~__unbuffered_p2_EAX$r_buff0_thd1~0, ~__unbuffered_cnt~0, ~__unbuffered_p2_EAX$r_buff1_thd3~0, ~__unbuffered_p2_EAX$w_buff1~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet73, ULTIMATE.start_main_~#t2272~0.offset, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~nondet71, ~__unbuffered_p2_EAX$w_buff1_used~0, ~__unbuffered_p2_EAX$r_buff0_thd2~0, ~__unbuffered_p2_EAX$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_~#t2272~0.base, ULTIMATE.start_main_#t~mem74, ~__unbuffered_p2_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2273~0.base, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite78, ~__unbuffered_p2_EAX$flush_delayed~0, #NULL.base, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0, ~__unbuffered_p2_EAX$read_delayed~0, ULTIMATE.start_main_#t~ite83, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem82, #memory_int, ~#x~0.base, ~__unbuffered_p2_EAX$r_buff1_thd1~0, ~__unbuffered_p2_EAX$r_buff0_thd3~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 16:01:42,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1124] [1124] L836-1-->L838: Formula: (and (= |v_ULTIMATE.start_main_~#t2273~0.offset_11| 0) (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t2273~0.base_13|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2273~0.base_13| 4)) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t2273~0.base_13| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2273~0.base_13|) (= (store |v_#memory_int_296| |v_ULTIMATE.start_main_~#t2273~0.base_13| (store (select |v_#memory_int_296| |v_ULTIMATE.start_main_~#t2273~0.base_13|) |v_ULTIMATE.start_main_~#t2273~0.offset_11| 1)) |v_#memory_int_295|) (not (= |v_ULTIMATE.start_main_~#t2273~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_296|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t2273~0.base=|v_ULTIMATE.start_main_~#t2273~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_295|, ULTIMATE.start_main_~#t2273~0.offset=|v_ULTIMATE.start_main_~#t2273~0.offset_11|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2273~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2273~0.offset, #length, ULTIMATE.start_main_#t~nondet71] because there is no mapped edge [2019-12-07 16:01:42,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1114] [1114] L838-1-->L840: Formula: (and (= |v_#memory_int_245| (store |v_#memory_int_246| |v_ULTIMATE.start_main_~#t2274~0.base_25| (store (select |v_#memory_int_246| |v_ULTIMATE.start_main_~#t2274~0.base_25|) |v_ULTIMATE.start_main_~#t2274~0.offset_23| 2))) (= |v_ULTIMATE.start_main_~#t2274~0.offset_23| 0) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2274~0.base_25|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2274~0.base_25| 1) |v_#valid_38|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2274~0.base_25|) (not (= 0 |v_ULTIMATE.start_main_~#t2274~0.base_25|)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t2274~0.base_25| 4) |v_#length_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_246|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_245|, ULTIMATE.start_main_~#t2274~0.offset=|v_ULTIMATE.start_main_~#t2274~0.offset_23|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_6|, ULTIMATE.start_main_~#t2274~0.base=|v_ULTIMATE.start_main_~#t2274~0.base_25|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2274~0.offset, #length, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2274~0.base] because there is no mapped edge [2019-12-07 16:01:42,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1095] [1095] L778-2-->L778-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-922181263 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In-922181263 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite31_Out-922181263| ~x$w_buff1~0_In-922181263) (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~mem30_In-922181263| |P1Thread1of1ForFork1_#t~mem30_Out-922181263|)) (and (= (select (select |#memory_int_In-922181263| |~#x~0.base_In-922181263|) |~#x~0.offset_In-922181263|) |P1Thread1of1ForFork1_#t~mem30_Out-922181263|) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite31_Out-922181263| |P1Thread1of1ForFork1_#t~mem30_Out-922181263|)))) InVars {P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_In-922181263|, ~#x~0.offset=|~#x~0.offset_In-922181263|, ~x$w_buff1~0=~x$w_buff1~0_In-922181263, ~#x~0.base=|~#x~0.base_In-922181263|, #memory_int=|#memory_int_In-922181263|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-922181263, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-922181263} OutVars{P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_Out-922181263|, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out-922181263|, ~#x~0.offset=|~#x~0.offset_In-922181263|, ~x$w_buff1~0=~x$w_buff1~0_In-922181263, ~#x~0.base=|~#x~0.base_In-922181263|, #memory_int=|#memory_int_In-922181263|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-922181263, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-922181263} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 16:01:42,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1012] [1012] L778-4-->L779: Formula: (= (store |v_#memory_int_94| |v_~#x~0.base_59| (store (select |v_#memory_int_94| |v_~#x~0.base_59|) |v_~#x~0.offset_59| |v_P1Thread1of1ForFork1_#t~ite31_6|)) |v_#memory_int_93|) InVars {~#x~0.offset=|v_~#x~0.offset_59|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_6|, #memory_int=|v_#memory_int_94|, ~#x~0.base=|v_~#x~0.base_59|} OutVars{P1Thread1of1ForFork1_#t~mem30=|v_P1Thread1of1ForFork1_#t~mem30_3|, ~#x~0.offset=|v_~#x~0.offset_59|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, #memory_int=|v_#memory_int_93|, ~#x~0.base=|v_~#x~0.base_59|, P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31, #memory_int, P1Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 16:01:42,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1078] [1078] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1140267392 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1140267392 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite33_Out1140267392| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite33_Out1140267392| ~x$w_buff0_used~0_In1140267392)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1140267392, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1140267392} OutVars{P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out1140267392|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1140267392, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1140267392} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 16:01:42,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1093] [1093] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-1563119888 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1563119888 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1563119888 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-1563119888 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out-1563119888| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite34_Out-1563119888| ~x$w_buff1_used~0_In-1563119888) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1563119888, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1563119888, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1563119888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1563119888} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-1563119888|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1563119888, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1563119888, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1563119888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1563119888} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 16:01:42,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1050] [1050] L801-->L802: Formula: (and (= v_~x$r_buff0_thd3~0_148 v_~x$r_buff0_thd3~0_147) (not (= (mod v_~weak$$choice2~0_113 256) 0))) InVars {~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_113} OutVars{P2Thread1of1ForFork2_#t~ite56=|v_P2Thread1of1ForFork2_#t~ite56_12|, P2Thread1of1ForFork2_#t~ite57=|v_P2Thread1of1ForFork2_#t~ite57_8|, P2Thread1of1ForFork2_#t~ite55=|v_P2Thread1of1ForFork2_#t~ite55_11|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_113} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite56, P2Thread1of1ForFork2_#t~ite57, P2Thread1of1ForFork2_#t~ite55, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 16:01:42,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~x$flush_delayed~0_In-349718918 256)))) (or (and (= |P2Thread1of1ForFork2_#t~mem62_In-349718918| |P2Thread1of1ForFork2_#t~mem62_Out-349718918|) (= |P2Thread1of1ForFork2_#t~ite63_Out-349718918| ~x$mem_tmp~0_In-349718918) (not .cse0)) (and (= |P2Thread1of1ForFork2_#t~mem62_Out-349718918| |P2Thread1of1ForFork2_#t~ite63_Out-349718918|) .cse0 (= |P2Thread1of1ForFork2_#t~mem62_Out-349718918| (select (select |#memory_int_In-349718918| |~#x~0.base_In-349718918|) |~#x~0.offset_In-349718918|))))) InVars {~x$flush_delayed~0=~x$flush_delayed~0_In-349718918, ~#x~0.offset=|~#x~0.offset_In-349718918|, ~#x~0.base=|~#x~0.base_In-349718918|, #memory_int=|#memory_int_In-349718918|, ~x$mem_tmp~0=~x$mem_tmp~0_In-349718918, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_In-349718918|} OutVars{~x$flush_delayed~0=~x$flush_delayed~0_In-349718918, ~#x~0.offset=|~#x~0.offset_In-349718918|, P2Thread1of1ForFork2_#t~ite63=|P2Thread1of1ForFork2_#t~ite63_Out-349718918|, ~#x~0.base=|~#x~0.base_In-349718918|, #memory_int=|#memory_int_In-349718918|, ~x$mem_tmp~0=~x$mem_tmp~0_In-349718918, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_Out-349718918|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite63, P2Thread1of1ForFork2_#t~mem62] because there is no mapped edge [2019-12-07 16:01:42,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1067] [1067] L813-2-->L813-5: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd3~0_In42101528 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In42101528 256))) (.cse1 (= |P2Thread1of1ForFork2_#t~ite65_Out42101528| |P2Thread1of1ForFork2_#t~ite66_Out42101528|))) (or (and (= |P2Thread1of1ForFork2_#t~ite65_Out42101528| ~x$w_buff1~0_In42101528) (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork2_#t~mem64_In42101528| |P2Thread1of1ForFork2_#t~mem64_Out42101528|)) (and (or .cse2 .cse0) (= (select (select |#memory_int_In42101528| |~#x~0.base_In42101528|) |~#x~0.offset_In42101528|) |P2Thread1of1ForFork2_#t~mem64_Out42101528|) .cse1 (= |P2Thread1of1ForFork2_#t~ite65_Out42101528| |P2Thread1of1ForFork2_#t~mem64_Out42101528|)))) InVars {~#x~0.offset=|~#x~0.offset_In42101528|, ~x$w_buff1~0=~x$w_buff1~0_In42101528, ~#x~0.base=|~#x~0.base_In42101528|, #memory_int=|#memory_int_In42101528|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In42101528, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In42101528, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_In42101528|} OutVars{P2Thread1of1ForFork2_#t~ite65=|P2Thread1of1ForFork2_#t~ite65_Out42101528|, P2Thread1of1ForFork2_#t~ite66=|P2Thread1of1ForFork2_#t~ite66_Out42101528|, ~#x~0.offset=|~#x~0.offset_In42101528|, ~x$w_buff1~0=~x$w_buff1~0_In42101528, ~#x~0.base=|~#x~0.base_In42101528|, #memory_int=|#memory_int_In42101528|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In42101528, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In42101528, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_Out42101528|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite65, P2Thread1of1ForFork2_#t~ite66, P2Thread1of1ForFork2_#t~mem64] because there is no mapped edge [2019-12-07 16:01:42,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1070] [1070] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1074103718 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1074103718 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite67_Out1074103718|)) (and (= ~x$w_buff0_used~0_In1074103718 |P2Thread1of1ForFork2_#t~ite67_Out1074103718|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1074103718, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1074103718} OutVars{P2Thread1of1ForFork2_#t~ite67=|P2Thread1of1ForFork2_#t~ite67_Out1074103718|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1074103718, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1074103718} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite67] because there is no mapped edge [2019-12-07 16:01:42,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1019] [1019] L759-->L760: Formula: (and (not (= (mod v_~weak$$choice2~0_67 256) 0)) (= v_~x$r_buff0_thd1~0_84 v_~x$r_buff0_thd1~0_83)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_84, ~weak$$choice2~0=v_~weak$$choice2~0_67} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_9|, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_6|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_83, ~weak$$choice2~0=v_~weak$$choice2~0_67, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_9|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, ~x$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 16:01:42,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1080] [1080] L762-->L762-2: Formula: (let ((.cse0 (= (mod ~x$flush_delayed~0_In-1650121453 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite29_Out-1650121453| ~x$mem_tmp~0_In-1650121453) (= |P0Thread1of1ForFork0_#t~mem28_In-1650121453| |P0Thread1of1ForFork0_#t~mem28_Out-1650121453|) (not .cse0)) (and (= (select (select |#memory_int_In-1650121453| |~#x~0.base_In-1650121453|) |~#x~0.offset_In-1650121453|) |P0Thread1of1ForFork0_#t~mem28_Out-1650121453|) .cse0 (= |P0Thread1of1ForFork0_#t~mem28_Out-1650121453| |P0Thread1of1ForFork0_#t~ite29_Out-1650121453|)))) InVars {P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_In-1650121453|, ~x$flush_delayed~0=~x$flush_delayed~0_In-1650121453, ~#x~0.offset=|~#x~0.offset_In-1650121453|, ~#x~0.base=|~#x~0.base_In-1650121453|, #memory_int=|#memory_int_In-1650121453|, ~x$mem_tmp~0=~x$mem_tmp~0_In-1650121453} OutVars{P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_Out-1650121453|, ~x$flush_delayed~0=~x$flush_delayed~0_In-1650121453, ~#x~0.offset=|~#x~0.offset_In-1650121453|, P0Thread1of1ForFork0_#t~ite29=|P0Thread1of1ForFork0_#t~ite29_Out-1650121453|, ~#x~0.base=|~#x~0.base_In-1650121453|, #memory_int=|#memory_int_In-1650121453|, ~x$mem_tmp~0=~x$mem_tmp~0_In-1650121453} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:01:42,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1126] [1126] L762-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$flush_delayed~0_97 0) (= |v_#memory_int_310| (store |v_#memory_int_311| |v_~#x~0.base_197| (store (select |v_#memory_int_311| |v_~#x~0.base_197|) |v_~#x~0.offset_197| |v_P0Thread1of1ForFork0_#t~ite29_26|)))) InVars {~#x~0.offset=|v_~#x~0.offset_197|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_26|, #memory_int=|v_#memory_int_311|, ~#x~0.base=|v_~#x~0.base_197|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P0Thread1of1ForFork0_#t~mem28=|v_P0Thread1of1ForFork0_#t~mem28_13|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_97, ~#x~0.offset=|v_~#x~0.offset_197|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_25|, #memory_int=|v_#memory_int_310|, ~#x~0.base=|v_~#x~0.base_197|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#res.offset, ~x$flush_delayed~0, P0Thread1of1ForFork0_#t~ite29, #memory_int, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:01:42,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1066] [1066] L781-->L782: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In2097733935 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_Out2097733935 ~x$r_buff0_thd2~0_In2097733935)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In2097733935 256)))) (or (and .cse0 .cse1) (and (not .cse1) (= ~x$r_buff0_thd2~0_Out2097733935 0) (not .cse2)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2097733935, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2097733935} OutVars{P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out2097733935|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2097733935, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2097733935} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 16:01:42,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1094] [1094] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1192815755 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1192815755 256))) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-1192815755 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1192815755 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite36_Out-1192815755|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$r_buff1_thd2~0_In-1192815755 |P1Thread1of1ForFork1_#t~ite36_Out-1192815755|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1192815755, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1192815755, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1192815755, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1192815755} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1192815755, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1192815755, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1192815755, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-1192815755|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1192815755} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 16:01:42,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1110] [1110] L782-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_34 |v_P1Thread1of1ForFork1_#t~ite36_22|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_34, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 16:01:42,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1087] [1087] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In1227587070 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1227587070 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1227587070 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1227587070 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1227587070 |P2Thread1of1ForFork2_#t~ite68_Out1227587070|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork2_#t~ite68_Out1227587070|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1227587070, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1227587070, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1227587070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1227587070} OutVars{P2Thread1of1ForFork2_#t~ite68=|P2Thread1of1ForFork2_#t~ite68_Out1227587070|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1227587070, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1227587070, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1227587070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1227587070} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite68] because there is no mapped edge [2019-12-07 16:01:42,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1091] [1091] L816-->L817: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-1922365131 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-1922365131 256) 0)) (.cse1 (= ~x$r_buff0_thd3~0_Out-1922365131 ~x$r_buff0_thd3~0_In-1922365131))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~x$r_buff0_thd3~0_Out-1922365131)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1922365131, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1922365131} OutVars{P2Thread1of1ForFork2_#t~ite69=|P2Thread1of1ForFork2_#t~ite69_Out-1922365131|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out-1922365131, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1922365131} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite69, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 16:01:42,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1081] [1081] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In1119921220 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1119921220 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In1119921220 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1119921220 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite70_Out1119921220| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite70_Out1119921220| ~x$r_buff1_thd3~0_In1119921220)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1119921220, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1119921220, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1119921220, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1119921220} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1119921220, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1119921220, P2Thread1of1ForFork2_#t~ite70=|P2Thread1of1ForFork2_#t~ite70_Out1119921220|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1119921220, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1119921220} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite70] because there is no mapped edge [2019-12-07 16:01:42,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1109] [1109] L817-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#t~ite70_28| v_~x$r_buff1_thd3~0_118) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_118, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, P2Thread1of1ForFork2_#t~ite70, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 16:01:42,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1038] [1038] L844-->L846-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (or (= (mod v_~x$w_buff0_used~0_315 256) 0) (= 0 (mod v_~x$r_buff0_thd0~0_33 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_315} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_315} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:01:42,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1096] [1096] L846-2-->L846-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In104412190 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In104412190 256)))) (or (and (= (select (select |#memory_int_In104412190| |~#x~0.base_In104412190|) |~#x~0.offset_In104412190|) |ULTIMATE.start_main_#t~mem74_Out104412190|) (= |ULTIMATE.start_main_#t~ite75_Out104412190| |ULTIMATE.start_main_#t~mem74_Out104412190|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite75_Out104412190| ~x$w_buff1~0_In104412190) (= |ULTIMATE.start_main_#t~mem74_In104412190| |ULTIMATE.start_main_#t~mem74_Out104412190|) (not .cse0)))) InVars {~#x~0.offset=|~#x~0.offset_In104412190|, ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_In104412190|, ~x$w_buff1~0=~x$w_buff1~0_In104412190, ~#x~0.base=|~#x~0.base_In104412190|, #memory_int=|#memory_int_In104412190|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In104412190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In104412190} OutVars{ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_Out104412190|, ~#x~0.offset=|~#x~0.offset_In104412190|, ~x$w_buff1~0=~x$w_buff1~0_In104412190, ~#x~0.base=|~#x~0.base_In104412190|, #memory_int=|#memory_int_In104412190|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In104412190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In104412190, ULTIMATE.start_main_#t~ite75=|ULTIMATE.start_main_#t~ite75_Out104412190|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem74, ULTIMATE.start_main_#t~ite75] because there is no mapped edge [2019-12-07 16:01:42,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1035] [1035] L846-4-->L847: Formula: (= |v_#memory_int_123| (store |v_#memory_int_124| |v_~#x~0.base_79| (store (select |v_#memory_int_124| |v_~#x~0.base_79|) |v_~#x~0.offset_79| |v_ULTIMATE.start_main_#t~ite75_10|))) InVars {~#x~0.offset=|v_~#x~0.offset_79|, #memory_int=|v_#memory_int_124|, ~#x~0.base=|v_~#x~0.base_79|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_10|} OutVars{ULTIMATE.start_main_#t~mem74=|v_ULTIMATE.start_main_#t~mem74_7|, ~#x~0.offset=|v_~#x~0.offset_79|, #memory_int=|v_#memory_int_123|, ~#x~0.base=|v_~#x~0.base_79|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_9|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem74, #memory_int, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76] because there is no mapped edge [2019-12-07 16:01:42,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1079] [1079] L847-->L847-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-388850348 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-388850348 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite77_Out-388850348| ~x$w_buff0_used~0_In-388850348)) (and (= |ULTIMATE.start_main_#t~ite77_Out-388850348| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-388850348, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-388850348} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-388850348, ULTIMATE.start_main_#t~ite77=|ULTIMATE.start_main_#t~ite77_Out-388850348|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-388850348} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] because there is no mapped edge [2019-12-07 16:01:42,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1086] [1086] L848-->L848-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In-1903393307 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1903393307 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1903393307 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1903393307 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite78_Out-1903393307| 0)) (and (= |ULTIMATE.start_main_#t~ite78_Out-1903393307| ~x$w_buff1_used~0_In-1903393307) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1903393307, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1903393307, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1903393307, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1903393307} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1903393307, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1903393307, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1903393307, ULTIMATE.start_main_#t~ite78=|ULTIMATE.start_main_#t~ite78_Out-1903393307|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1903393307} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite78] because there is no mapped edge [2019-12-07 16:01:42,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1071] [1071] L849-->L850: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1093517800 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1093517800 256))) (.cse1 (= ~x$r_buff0_thd0~0_In1093517800 ~x$r_buff0_thd0~0_Out1093517800))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd0~0_Out1093517800) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1093517800, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1093517800} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out1093517800, ULTIMATE.start_main_#t~ite79=|ULTIMATE.start_main_#t~ite79_Out1093517800|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1093517800} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite79] because there is no mapped edge [2019-12-07 16:01:42,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1077] [1077] L850-->L854: Formula: (let ((.cse3 (= ~x$r_buff1_thd0~0_Out1804326487 0)) (.cse5 (= (mod ~x$w_buff1_used~0_In1804326487 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In1804326487 256) 0)) (.cse4 (= ~x$r_buff1_thd0~0_Out1804326487 ~x$r_buff1_thd0~0_In1804326487)) (.cse6 (= 0 (mod ~x$r_buff1_thd0~0_In1804326487 256))) (.cse1 (= ~weak$$choice1~0_Out1804326487 |ULTIMATE.start_main_#t~nondet81_In1804326487|)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1804326487 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) .cse3) (and .cse4 .cse2 .cse1 .cse5) (and .cse1 (not .cse6) .cse3 (not .cse5)) (and .cse4 .cse1 .cse5 .cse0) (and .cse4 .cse2 .cse6 .cse1) (and .cse4 .cse6 .cse1 .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1804326487, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1804326487, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1804326487, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_In1804326487|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1804326487} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1804326487, ~weak$$choice1~0=~weak$$choice1~0_Out1804326487, ULTIMATE.start_main_#t~ite80=|ULTIMATE.start_main_#t~ite80_Out1804326487|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1804326487, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out1804326487, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_Out1804326487|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1804326487} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite80, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet81] because there is no mapped edge [2019-12-07 16:01:42,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1090] [1090] L854-->L854-3: Formula: (let ((.cse0 (not (= 0 (mod ~__unbuffered_p2_EAX$read_delayed~0_In-1337861142 256)))) (.cse1 (= 0 (mod ~weak$$choice1~0_In-1337861142 256)))) (or (and .cse0 (= ~__unbuffered_p2_EAX~0_In-1337861142 |ULTIMATE.start_main_#t~ite83_Out-1337861142|) .cse1 (= |ULTIMATE.start_main_#t~mem82_In-1337861142| |ULTIMATE.start_main_#t~mem82_Out-1337861142|)) (and .cse0 (not .cse1) (= (select (select |#memory_int_In-1337861142| ~__unbuffered_p2_EAX$read_delayed_var~0.base_In-1337861142) ~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-1337861142) |ULTIMATE.start_main_#t~mem82_Out-1337861142|) (= |ULTIMATE.start_main_#t~mem82_Out-1337861142| |ULTIMATE.start_main_#t~ite83_Out-1337861142|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-1337861142, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-1337861142, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_In-1337861142|, #memory_int=|#memory_int_In-1337861142|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-1337861142} OutVars{ULTIMATE.start_main_#t~ite83=|ULTIMATE.start_main_#t~ite83_Out-1337861142|, ~weak$$choice1~0=~weak$$choice1~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-1337861142, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_Out-1337861142|, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-1337861142, #memory_int=|#memory_int_In-1337861142|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-1337861142, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-1337861142} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~mem82] because there is no mapped edge [2019-12-07 16:01:42,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1123] [1123] L854-3-->L857-1: Formula: (and (let ((.cse1 (= v_~y~0_73 2)) (.cse4 (= 0 v_~__unbuffered_p0_EAX~0_34)) (.cse3 (= 1 v_~__unbuffered_p2_EAX~0_70)) (.cse0 (= |v_ULTIMATE.start_main_#t~ite83_52| v_~__unbuffered_p2_EAX~0_70)) (.cse2 (= v_~main$tmp_guard1~0_28 1))) (or (and .cse0 (not .cse1) .cse2) (and (= v_~main$tmp_guard1~0_28 0) .cse1 .cse0 .cse3 .cse4) (and (not .cse4) .cse0 .cse2) (and (not .cse3) .cse0 .cse2))) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7| (mod v_~main$tmp_guard1~0_28 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_52|, ~y~0=v_~y~0_73} OutVars{ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_47|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_51|, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_70, ~y~0=v_~y~0_73, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite84, ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~mem82, ~main$tmp_guard1~0, ~__unbuffered_p2_EAX~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:01:42,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1112] [1112] L857-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:01:42,773 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_65146f0d-1e42-4019-a199-3da48931dc91/bin/utaipan/witness.graphml [2019-12-07 16:01:42,773 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:01:42,774 INFO L168 Benchmark]: Toolchain (without parser) took 645438.58 ms. Allocated memory was 1.0 GB in the beginning and 8.8 GB in the end (delta: 7.8 GB). Free memory was 938.7 MB in the beginning and 2.2 GB in the end (delta: -1.3 GB). Peak memory consumption was 6.5 GB. Max. memory is 11.5 GB. [2019-12-07 16:01:42,774 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:01:42,775 INFO L168 Benchmark]: CACSL2BoogieTranslator took 385.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 111.7 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -138.0 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:01:42,775 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.55 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:01:42,775 INFO L168 Benchmark]: Boogie Preprocessor took 28.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:01:42,775 INFO L168 Benchmark]: RCFGBuilder took 456.63 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 67.0 MB). Peak memory consumption was 67.0 MB. Max. memory is 11.5 GB. [2019-12-07 16:01:42,775 INFO L168 Benchmark]: TraceAbstraction took 644439.06 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 6.4 GB. Max. memory is 11.5 GB. [2019-12-07 16:01:42,776 INFO L168 Benchmark]: Witness Printer took 88.47 ms. Allocated memory is still 8.8 GB. Free memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: 71.0 MB). Peak memory consumption was 71.0 MB. Max. memory is 11.5 GB. [2019-12-07 16:01:42,777 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 385.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 111.7 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -138.0 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.55 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 456.63 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 67.0 MB). Peak memory consumption was 67.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 644439.06 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 6.4 GB. Max. memory is 11.5 GB. * Witness Printer took 88.47 ms. Allocated memory is still 8.8 GB. Free memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: 71.0 MB). Peak memory consumption was 71.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.5s, 222 ProgramPointsBefore, 120 ProgramPointsAfterwards, 275 TransitionsBefore, 143 TransitionsAfterwards, 32976 CoEnabledTransitionPairs, 8 FixpointIterations, 49 TrivialSequentialCompositions, 37 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 61 ConcurrentYvCompositions, 34 ChoiceCompositions, 12502 VarBasedMoverChecksPositive, 267 VarBasedMoverChecksNegative, 26 SemBasedMoverChecksPositive, 341 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 195223 CheckedPairsTotal, 147 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L836] FCALL, FORK 0 pthread_create(&t2272, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L838] FCALL, FORK 0 pthread_create(&t2273, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L840] FCALL, FORK 0 pthread_create(&t2274, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L792] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 3 x$flush_delayed = weak$$choice2 [L795] EXPR 3 \read(x) [L795] 3 x$mem_tmp = x [L775] 2 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L796] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) [L796] EXPR 3 \read(x) [L796] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1)=1, \read(x)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L796] 3 x = !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) [L779] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L797] EXPR 3 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L797] 3 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)) [L798] EXPR 3 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L798] 3 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)) [L799] EXPR 3 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L799] 3 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used)) [L800] EXPR 3 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L800] 3 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] EXPR 3 weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L802] 3 x$r_buff1_thd3 = weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] 3 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L804] 3 __unbuffered_p2_EAX$read_delayed_var = &x [L805] EXPR 3 \read(x) [L805] 3 __unbuffered_p2_EAX = x [L806] 3 x = x$flush_delayed ? x$mem_tmp : x [L807] 3 x$flush_delayed = (_Bool)0 [L810] 3 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L745] 1 y = 2 [L750] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L751] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L752] 1 x$flush_delayed = weak$$choice2 [L753] EXPR 1 \read(x) [L753] 1 x$mem_tmp = x [L754] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L754] EXPR 1 \read(x) [L754] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L754] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L755] EXPR 1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L813] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L755] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L813] 3 x = x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L756] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L756] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L757] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L757] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L758] EXPR 1 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L758] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L760] EXPR 1 weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L760] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L761] EXPR 1 \read(x) [L761] 1 __unbuffered_p0_EAX = x [L780] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L814] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L815] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L842] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L847] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L848] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 213 locations, 1 error locations. Result: UNSAFE, OverallTime: 644.2s, OverallIterations: 83, TraceHistogramMax: 1, AutomataDifference: 345.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 28004 SDtfs, 65502 SDslu, 303644 SDs, 0 SdLazy, 225443 SolverSat, 6230 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 187.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3862 GetRequests, 292 SyntacticMatches, 106 SemanticMatches, 3464 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47388 ImplicationChecksByTransitivity, 132.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=339084occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 116.5s AutomataMinimizationTime, 82 MinimizatonAttempts, 856284 StatesRemovedByMinimization, 72 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 1.6s SatisfiabilityAnalysisTime, 45.4s InterpolantComputationTime, 5524 NumberOfCodeBlocks, 5524 NumberOfCodeBlocksAsserted, 83 NumberOfCheckSat, 5370 ConstructedInterpolants, 0 QuantifiedInterpolants, 6441887 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 82 InterpolantComputations, 82 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...