./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe021_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe021_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ea9984fbf71bf5b7c3727b1cdfb6cadae73cb035 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:14:37,823 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:14:37,824 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:14:37,831 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:14:37,832 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:14:37,832 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:14:37,833 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:14:37,835 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:14:37,836 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:14:37,836 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:14:37,837 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:14:37,838 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:14:37,838 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:14:37,839 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:14:37,839 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:14:37,840 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:14:37,841 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:14:37,841 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:14:37,843 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:14:37,845 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:14:37,846 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:14:37,846 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:14:37,847 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:14:37,848 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:14:37,849 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:14:37,850 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:14:37,850 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:14:37,850 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:14:37,850 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:14:37,851 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:14:37,851 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:14:37,851 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:14:37,852 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:14:37,852 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:14:37,853 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:14:37,853 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:14:37,853 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:14:37,853 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:14:37,854 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:14:37,854 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:14:37,854 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:14:37,855 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 15:14:37,865 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:14:37,865 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:14:37,866 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 15:14:37,866 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 15:14:37,866 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 15:14:37,866 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 15:14:37,867 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 15:14:37,867 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 15:14:37,867 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 15:14:37,867 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 15:14:37,867 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 15:14:37,867 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 15:14:37,867 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 15:14:37,867 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 15:14:37,868 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 15:14:37,868 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:14:37,868 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:14:37,868 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:14:37,868 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:14:37,869 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:14:37,870 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:14:37,870 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:14:37,870 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:14:37,870 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:14:37,870 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:14:37,870 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:14:37,870 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:14:37,870 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 15:14:37,871 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:14:37,871 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:14:37,871 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:14:37,871 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 15:14:37,871 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ea9984fbf71bf5b7c3727b1cdfb6cadae73cb035 [2019-12-07 15:14:37,973 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:14:37,983 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:14:37,986 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:14:37,987 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:14:37,987 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:14:37,988 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe021_power.opt.i [2019-12-07 15:14:38,026 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/data/cc3730284/75a8bcd827ff4542ad0366d806aabbb0/FLAG2b154d51e [2019-12-07 15:14:38,494 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:14:38,495 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/sv-benchmarks/c/pthread-wmm/safe021_power.opt.i [2019-12-07 15:14:38,505 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/data/cc3730284/75a8bcd827ff4542ad0366d806aabbb0/FLAG2b154d51e [2019-12-07 15:14:38,514 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/data/cc3730284/75a8bcd827ff4542ad0366d806aabbb0 [2019-12-07 15:14:38,515 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:14:38,516 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:14:38,517 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:14:38,517 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:14:38,520 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:14:38,520 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,522 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38, skipping insertion in model container [2019-12-07 15:14:38,522 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,527 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:14:38,557 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:14:38,799 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:14:38,807 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:14:38,851 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:14:38,898 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:14:38,898 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38 WrapperNode [2019-12-07 15:14:38,898 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:14:38,899 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:14:38,899 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:14:38,899 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:14:38,905 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,918 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,941 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:14:38,941 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:14:38,941 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:14:38,941 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:14:38,948 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,948 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,952 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,952 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,959 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,962 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,965 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... [2019-12-07 15:14:38,968 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:14:38,969 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:14:38,969 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:14:38,969 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:14:38,969 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:14:39,010 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:14:39,010 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:14:39,011 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:14:39,011 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:14:39,011 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:14:39,011 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:14:39,011 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:14:39,011 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:14:39,011 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:14:39,011 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:14:39,011 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:14:39,011 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:14:39,011 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:14:39,012 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:14:39,380 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:14:39,380 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:14:39,381 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:14:39 BoogieIcfgContainer [2019-12-07 15:14:39,381 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:14:39,382 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:14:39,382 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:14:39,383 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:14:39,384 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:14:38" (1/3) ... [2019-12-07 15:14:39,384 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6845d000 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:14:39, skipping insertion in model container [2019-12-07 15:14:39,384 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:14:38" (2/3) ... [2019-12-07 15:14:39,385 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6845d000 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:14:39, skipping insertion in model container [2019-12-07 15:14:39,385 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:14:39" (3/3) ... [2019-12-07 15:14:39,386 INFO L109 eAbstractionObserver]: Analyzing ICFG safe021_power.opt.i [2019-12-07 15:14:39,392 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:14:39,392 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:14:39,397 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:14:39,398 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:14:39,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,421 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,421 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,426 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,430 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:14:39,445 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:14:39,457 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:14:39,458 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:14:39,458 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:14:39,458 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:14:39,458 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:14:39,458 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:14:39,458 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:14:39,458 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:14:39,469 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 15:14:39,470 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 15:14:39,524 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 15:14:39,524 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:14:39,534 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 579 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:14:39,549 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 15:14:39,578 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 15:14:39,578 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:14:39,583 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 579 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:14:39,596 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 15:14:39,597 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:14:42,318 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 80 [2019-12-07 15:14:42,554 INFO L206 etLargeBlockEncoding]: Checked pairs total: 91392 [2019-12-07 15:14:42,554 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 15:14:42,556 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 103 transitions [2019-12-07 15:14:57,998 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118050 states. [2019-12-07 15:14:58,000 INFO L276 IsEmpty]: Start isEmpty. Operand 118050 states. [2019-12-07 15:14:58,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 15:14:58,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:14:58,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 15:14:58,004 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:14:58,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:14:58,008 INFO L82 PathProgramCache]: Analyzing trace with hash 815309389, now seen corresponding path program 1 times [2019-12-07 15:14:58,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:14:58,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647237935] [2019-12-07 15:14:58,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:14:58,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:14:58,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:14:58,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647237935] [2019-12-07 15:14:58,158 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:14:58,159 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:14:58,159 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [783720223] [2019-12-07 15:14:58,162 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:14:58,162 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:14:58,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:14:58,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:14:58,173 INFO L87 Difference]: Start difference. First operand 118050 states. Second operand 3 states. [2019-12-07 15:14:58,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:14:58,879 INFO L93 Difference]: Finished difference Result 117660 states and 502246 transitions. [2019-12-07 15:14:58,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:14:58,881 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 15:14:58,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:14:59,662 INFO L225 Difference]: With dead ends: 117660 [2019-12-07 15:14:59,662 INFO L226 Difference]: Without dead ends: 115112 [2019-12-07 15:14:59,663 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:15:04,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115112 states. [2019-12-07 15:15:06,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115112 to 115112. [2019-12-07 15:15:06,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115112 states. [2019-12-07 15:15:06,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115112 states to 115112 states and 491858 transitions. [2019-12-07 15:15:06,508 INFO L78 Accepts]: Start accepts. Automaton has 115112 states and 491858 transitions. Word has length 5 [2019-12-07 15:15:06,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:15:06,508 INFO L462 AbstractCegarLoop]: Abstraction has 115112 states and 491858 transitions. [2019-12-07 15:15:06,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:15:06,508 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states and 491858 transitions. [2019-12-07 15:15:06,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:15:06,511 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:15:06,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:15:06,511 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:15:06,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:15:06,512 INFO L82 PathProgramCache]: Analyzing trace with hash 162612621, now seen corresponding path program 1 times [2019-12-07 15:15:06,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:15:06,512 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840227229] [2019-12-07 15:15:06,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:15:06,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:15:06,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:15:06,568 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840227229] [2019-12-07 15:15:06,568 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:15:06,568 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:15:06,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1955243070] [2019-12-07 15:15:06,569 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:15:06,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:15:06,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:15:06,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:15:06,570 INFO L87 Difference]: Start difference. First operand 115112 states and 491858 transitions. Second operand 4 states. [2019-12-07 15:15:07,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:15:07,879 INFO L93 Difference]: Finished difference Result 180042 states and 739573 transitions. [2019-12-07 15:15:07,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:15:07,879 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:15:07,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:15:08,322 INFO L225 Difference]: With dead ends: 180042 [2019-12-07 15:15:08,323 INFO L226 Difference]: Without dead ends: 179993 [2019-12-07 15:15:08,323 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:15:12,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179993 states. [2019-12-07 15:15:16,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179993 to 166069. [2019-12-07 15:15:16,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166069 states. [2019-12-07 15:15:17,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166069 states to 166069 states and 689057 transitions. [2019-12-07 15:15:17,166 INFO L78 Accepts]: Start accepts. Automaton has 166069 states and 689057 transitions. Word has length 11 [2019-12-07 15:15:17,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:15:17,167 INFO L462 AbstractCegarLoop]: Abstraction has 166069 states and 689057 transitions. [2019-12-07 15:15:17,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:15:17,167 INFO L276 IsEmpty]: Start isEmpty. Operand 166069 states and 689057 transitions. [2019-12-07 15:15:17,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:15:17,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:15:17,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:15:17,172 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:15:17,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:15:17,172 INFO L82 PathProgramCache]: Analyzing trace with hash 1907433687, now seen corresponding path program 1 times [2019-12-07 15:15:17,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:15:17,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769255785] [2019-12-07 15:15:17,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:15:17,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:15:17,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:15:17,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769255785] [2019-12-07 15:15:17,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:15:17,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:15:17,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472143630] [2019-12-07 15:15:17,220 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:15:17,220 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:15:17,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:15:17,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:15:17,221 INFO L87 Difference]: Start difference. First operand 166069 states and 689057 transitions. Second operand 4 states. [2019-12-07 15:15:18,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:15:18,690 INFO L93 Difference]: Finished difference Result 237299 states and 961992 transitions. [2019-12-07 15:15:18,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:15:18,690 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:15:18,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:15:19,278 INFO L225 Difference]: With dead ends: 237299 [2019-12-07 15:15:19,278 INFO L226 Difference]: Without dead ends: 237236 [2019-12-07 15:15:19,279 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:15:24,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237236 states. [2019-12-07 15:15:29,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237236 to 202025. [2019-12-07 15:15:29,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202025 states. [2019-12-07 15:15:30,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202025 states to 202025 states and 831679 transitions. [2019-12-07 15:15:30,273 INFO L78 Accepts]: Start accepts. Automaton has 202025 states and 831679 transitions. Word has length 13 [2019-12-07 15:15:30,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:15:30,274 INFO L462 AbstractCegarLoop]: Abstraction has 202025 states and 831679 transitions. [2019-12-07 15:15:30,274 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:15:30,274 INFO L276 IsEmpty]: Start isEmpty. Operand 202025 states and 831679 transitions. [2019-12-07 15:15:30,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:15:30,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:15:30,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:15:30,277 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:15:30,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:15:30,277 INFO L82 PathProgramCache]: Analyzing trace with hash -1457610254, now seen corresponding path program 1 times [2019-12-07 15:15:30,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:15:30,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654177904] [2019-12-07 15:15:30,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:15:30,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:15:30,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:15:30,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [654177904] [2019-12-07 15:15:30,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:15:30,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:15:30,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1544226505] [2019-12-07 15:15:30,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:15:30,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:15:30,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:15:30,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:15:30,319 INFO L87 Difference]: Start difference. First operand 202025 states and 831679 transitions. Second operand 4 states. [2019-12-07 15:15:31,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:15:31,964 INFO L93 Difference]: Finished difference Result 254241 states and 1038415 transitions. [2019-12-07 15:15:31,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:15:31,965 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:15:31,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:15:32,592 INFO L225 Difference]: With dead ends: 254241 [2019-12-07 15:15:32,592 INFO L226 Difference]: Without dead ends: 254241 [2019-12-07 15:15:32,592 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:15:38,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254241 states. [2019-12-07 15:15:41,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254241 to 214536. [2019-12-07 15:15:41,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214536 states. [2019-12-07 15:15:42,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214536 states to 214536 states and 883714 transitions. [2019-12-07 15:15:42,177 INFO L78 Accepts]: Start accepts. Automaton has 214536 states and 883714 transitions. Word has length 13 [2019-12-07 15:15:42,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:15:42,177 INFO L462 AbstractCegarLoop]: Abstraction has 214536 states and 883714 transitions. [2019-12-07 15:15:42,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:15:42,177 INFO L276 IsEmpty]: Start isEmpty. Operand 214536 states and 883714 transitions. [2019-12-07 15:15:42,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:15:42,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:15:42,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:15:42,194 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:15:42,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:15:42,194 INFO L82 PathProgramCache]: Analyzing trace with hash -440148133, now seen corresponding path program 1 times [2019-12-07 15:15:42,194 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:15:42,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706687601] [2019-12-07 15:15:42,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:15:42,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:15:42,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:15:42,238 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706687601] [2019-12-07 15:15:42,238 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:15:42,238 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:15:42,238 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250792336] [2019-12-07 15:15:42,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:15:42,239 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:15:42,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:15:42,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:15:42,239 INFO L87 Difference]: Start difference. First operand 214536 states and 883714 transitions. Second operand 5 states. [2019-12-07 15:15:43,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:15:43,907 INFO L93 Difference]: Finished difference Result 310602 states and 1253169 transitions. [2019-12-07 15:15:43,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:15:43,908 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 15:15:43,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:15:44,675 INFO L225 Difference]: With dead ends: 310602 [2019-12-07 15:15:44,675 INFO L226 Difference]: Without dead ends: 310455 [2019-12-07 15:15:44,675 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:15:53,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310455 states. [2019-12-07 15:15:57,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310455 to 237118. [2019-12-07 15:15:57,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237118 states. [2019-12-07 15:15:57,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237118 states to 237118 states and 972610 transitions. [2019-12-07 15:15:57,948 INFO L78 Accepts]: Start accepts. Automaton has 237118 states and 972610 transitions. Word has length 19 [2019-12-07 15:15:57,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:15:57,948 INFO L462 AbstractCegarLoop]: Abstraction has 237118 states and 972610 transitions. [2019-12-07 15:15:57,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:15:57,949 INFO L276 IsEmpty]: Start isEmpty. Operand 237118 states and 972610 transitions. [2019-12-07 15:15:57,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:15:57,960 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:15:57,960 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:15:57,960 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:15:57,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:15:57,961 INFO L82 PathProgramCache]: Analyzing trace with hash 489775222, now seen corresponding path program 1 times [2019-12-07 15:15:57,961 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:15:57,961 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709077584] [2019-12-07 15:15:57,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:15:57,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:15:58,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:15:58,010 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709077584] [2019-12-07 15:15:58,011 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:15:58,011 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:15:58,011 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [417631365] [2019-12-07 15:15:58,011 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:15:58,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:15:58,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:15:58,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:15:58,012 INFO L87 Difference]: Start difference. First operand 237118 states and 972610 transitions. Second operand 5 states. [2019-12-07 15:16:00,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:00,059 INFO L93 Difference]: Finished difference Result 338053 states and 1359908 transitions. [2019-12-07 15:16:00,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:16:00,060 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 15:16:00,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:00,902 INFO L225 Difference]: With dead ends: 338053 [2019-12-07 15:16:00,902 INFO L226 Difference]: Without dead ends: 337990 [2019-12-07 15:16:00,902 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:16:10,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337990 states. [2019-12-07 15:16:14,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337990 to 240428. [2019-12-07 15:16:14,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240428 states. [2019-12-07 15:16:15,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240428 states to 240428 states and 984368 transitions. [2019-12-07 15:16:15,302 INFO L78 Accepts]: Start accepts. Automaton has 240428 states and 984368 transitions. Word has length 19 [2019-12-07 15:16:15,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:15,303 INFO L462 AbstractCegarLoop]: Abstraction has 240428 states and 984368 transitions. [2019-12-07 15:16:15,303 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:16:15,303 INFO L276 IsEmpty]: Start isEmpty. Operand 240428 states and 984368 transitions. [2019-12-07 15:16:15,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:16:15,317 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:15,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:15,317 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:15,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:15,318 INFO L82 PathProgramCache]: Analyzing trace with hash 15415012, now seen corresponding path program 1 times [2019-12-07 15:16:15,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:15,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680428944] [2019-12-07 15:16:15,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:15,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:15,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:15,341 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680428944] [2019-12-07 15:16:15,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:15,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:16:15,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745854397] [2019-12-07 15:16:15,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:16:15,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:15,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:16:15,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:15,342 INFO L87 Difference]: Start difference. First operand 240428 states and 984368 transitions. Second operand 3 states. [2019-12-07 15:16:15,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:15,458 INFO L93 Difference]: Finished difference Result 44137 states and 141335 transitions. [2019-12-07 15:16:15,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:16:15,458 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 15:16:15,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:15,517 INFO L225 Difference]: With dead ends: 44137 [2019-12-07 15:16:15,517 INFO L226 Difference]: Without dead ends: 44137 [2019-12-07 15:16:15,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:15,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44137 states. [2019-12-07 15:16:16,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44137 to 44137. [2019-12-07 15:16:16,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44137 states. [2019-12-07 15:16:16,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44137 states to 44137 states and 141335 transitions. [2019-12-07 15:16:16,187 INFO L78 Accepts]: Start accepts. Automaton has 44137 states and 141335 transitions. Word has length 19 [2019-12-07 15:16:16,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:16,187 INFO L462 AbstractCegarLoop]: Abstraction has 44137 states and 141335 transitions. [2019-12-07 15:16:16,187 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:16:16,188 INFO L276 IsEmpty]: Start isEmpty. Operand 44137 states and 141335 transitions. [2019-12-07 15:16:16,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:16:16,195 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:16,195 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:16,195 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:16,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:16,195 INFO L82 PathProgramCache]: Analyzing trace with hash 1391822063, now seen corresponding path program 1 times [2019-12-07 15:16:16,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:16,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323418319] [2019-12-07 15:16:16,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:16,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:16,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:16,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323418319] [2019-12-07 15:16:16,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:16,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:16:16,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094572106] [2019-12-07 15:16:16,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:16:16,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:16,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:16:16,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:16:16,247 INFO L87 Difference]: Start difference. First operand 44137 states and 141335 transitions. Second operand 5 states. [2019-12-07 15:16:16,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:16,586 INFO L93 Difference]: Finished difference Result 58785 states and 185400 transitions. [2019-12-07 15:16:16,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:16:16,587 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 15:16:16,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:16,668 INFO L225 Difference]: With dead ends: 58785 [2019-12-07 15:16:16,668 INFO L226 Difference]: Without dead ends: 58785 [2019-12-07 15:16:16,668 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:16:17,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58785 states. [2019-12-07 15:16:17,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58785 to 46592. [2019-12-07 15:16:17,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46592 states. [2019-12-07 15:16:17,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46592 states to 46592 states and 149032 transitions. [2019-12-07 15:16:17,770 INFO L78 Accepts]: Start accepts. Automaton has 46592 states and 149032 transitions. Word has length 25 [2019-12-07 15:16:17,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:17,770 INFO L462 AbstractCegarLoop]: Abstraction has 46592 states and 149032 transitions. [2019-12-07 15:16:17,770 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:16:17,770 INFO L276 IsEmpty]: Start isEmpty. Operand 46592 states and 149032 transitions. [2019-12-07 15:16:17,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 15:16:17,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:17,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:17,785 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:17,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:17,786 INFO L82 PathProgramCache]: Analyzing trace with hash 1986698611, now seen corresponding path program 1 times [2019-12-07 15:16:17,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:17,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392745481] [2019-12-07 15:16:17,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:17,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:17,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:17,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392745481] [2019-12-07 15:16:17,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:17,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:16:17,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [731704841] [2019-12-07 15:16:17,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:16:17,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:17,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:16:17,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:16:17,819 INFO L87 Difference]: Start difference. First operand 46592 states and 149032 transitions. Second operand 4 states. [2019-12-07 15:16:17,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:17,856 INFO L93 Difference]: Finished difference Result 9518 states and 25720 transitions. [2019-12-07 15:16:17,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:16:17,857 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 15:16:17,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:17,868 INFO L225 Difference]: With dead ends: 9518 [2019-12-07 15:16:17,868 INFO L226 Difference]: Without dead ends: 9518 [2019-12-07 15:16:17,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:16:17,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9518 states. [2019-12-07 15:16:17,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9518 to 9308. [2019-12-07 15:16:17,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9308 states. [2019-12-07 15:16:17,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9308 states to 9308 states and 25120 transitions. [2019-12-07 15:16:17,976 INFO L78 Accepts]: Start accepts. Automaton has 9308 states and 25120 transitions. Word has length 31 [2019-12-07 15:16:17,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:17,977 INFO L462 AbstractCegarLoop]: Abstraction has 9308 states and 25120 transitions. [2019-12-07 15:16:17,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:16:17,977 INFO L276 IsEmpty]: Start isEmpty. Operand 9308 states and 25120 transitions. [2019-12-07 15:16:17,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 15:16:17,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:17,985 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:17,985 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:17,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:17,986 INFO L82 PathProgramCache]: Analyzing trace with hash -832696622, now seen corresponding path program 1 times [2019-12-07 15:16:17,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:17,986 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551828640] [2019-12-07 15:16:17,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:18,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:18,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:18,035 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551828640] [2019-12-07 15:16:18,035 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:18,035 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:16:18,035 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493689707] [2019-12-07 15:16:18,035 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:16:18,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:18,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:16:18,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:16:18,036 INFO L87 Difference]: Start difference. First operand 9308 states and 25120 transitions. Second operand 5 states. [2019-12-07 15:16:18,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:18,071 INFO L93 Difference]: Finished difference Result 6726 states and 19143 transitions. [2019-12-07 15:16:18,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:16:18,072 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 15:16:18,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:18,079 INFO L225 Difference]: With dead ends: 6726 [2019-12-07 15:16:18,079 INFO L226 Difference]: Without dead ends: 6726 [2019-12-07 15:16:18,079 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:16:18,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6726 states. [2019-12-07 15:16:18,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6726 to 5837. [2019-12-07 15:16:18,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5837 states. [2019-12-07 15:16:18,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5837 states to 5837 states and 16736 transitions. [2019-12-07 15:16:18,155 INFO L78 Accepts]: Start accepts. Automaton has 5837 states and 16736 transitions. Word has length 37 [2019-12-07 15:16:18,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:18,155 INFO L462 AbstractCegarLoop]: Abstraction has 5837 states and 16736 transitions. [2019-12-07 15:16:18,155 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:16:18,155 INFO L276 IsEmpty]: Start isEmpty. Operand 5837 states and 16736 transitions. [2019-12-07 15:16:18,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 15:16:18,162 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:18,162 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:18,162 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:18,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:18,162 INFO L82 PathProgramCache]: Analyzing trace with hash -49475536, now seen corresponding path program 1 times [2019-12-07 15:16:18,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:18,162 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1109281945] [2019-12-07 15:16:18,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:18,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:18,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:18,208 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1109281945] [2019-12-07 15:16:18,208 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:18,209 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:16:18,209 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1269886309] [2019-12-07 15:16:18,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:16:18,209 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:18,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:16:18,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:18,209 INFO L87 Difference]: Start difference. First operand 5837 states and 16736 transitions. Second operand 3 states. [2019-12-07 15:16:18,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:18,246 INFO L93 Difference]: Finished difference Result 5850 states and 16753 transitions. [2019-12-07 15:16:18,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:16:18,246 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 15:16:18,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:18,251 INFO L225 Difference]: With dead ends: 5850 [2019-12-07 15:16:18,251 INFO L226 Difference]: Without dead ends: 5850 [2019-12-07 15:16:18,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:18,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5850 states. [2019-12-07 15:16:18,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5850 to 5843. [2019-12-07 15:16:18,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5843 states. [2019-12-07 15:16:18,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5843 states to 5843 states and 16744 transitions. [2019-12-07 15:16:18,321 INFO L78 Accepts]: Start accepts. Automaton has 5843 states and 16744 transitions. Word has length 64 [2019-12-07 15:16:18,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:18,322 INFO L462 AbstractCegarLoop]: Abstraction has 5843 states and 16744 transitions. [2019-12-07 15:16:18,322 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:16:18,322 INFO L276 IsEmpty]: Start isEmpty. Operand 5843 states and 16744 transitions. [2019-12-07 15:16:18,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 15:16:18,329 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:18,329 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:18,329 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:18,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:18,330 INFO L82 PathProgramCache]: Analyzing trace with hash 1883123384, now seen corresponding path program 1 times [2019-12-07 15:16:18,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:18,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1829959468] [2019-12-07 15:16:18,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:18,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:18,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:18,366 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1829959468] [2019-12-07 15:16:18,366 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:18,366 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:16:18,366 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [483120811] [2019-12-07 15:16:18,366 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:16:18,366 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:18,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:16:18,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:18,367 INFO L87 Difference]: Start difference. First operand 5843 states and 16744 transitions. Second operand 3 states. [2019-12-07 15:16:18,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:18,403 INFO L93 Difference]: Finished difference Result 5850 states and 16744 transitions. [2019-12-07 15:16:18,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:16:18,404 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 15:16:18,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:18,409 INFO L225 Difference]: With dead ends: 5850 [2019-12-07 15:16:18,409 INFO L226 Difference]: Without dead ends: 5849 [2019-12-07 15:16:18,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:18,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5849 states. [2019-12-07 15:16:18,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5849 to 5840. [2019-12-07 15:16:18,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5840 states. [2019-12-07 15:16:18,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5840 states to 5840 states and 16734 transitions. [2019-12-07 15:16:18,477 INFO L78 Accepts]: Start accepts. Automaton has 5840 states and 16734 transitions. Word has length 64 [2019-12-07 15:16:18,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:18,477 INFO L462 AbstractCegarLoop]: Abstraction has 5840 states and 16734 transitions. [2019-12-07 15:16:18,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:16:18,478 INFO L276 IsEmpty]: Start isEmpty. Operand 5840 states and 16734 transitions. [2019-12-07 15:16:18,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 15:16:18,484 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:18,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:18,484 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:18,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:18,484 INFO L82 PathProgramCache]: Analyzing trace with hash 1883571210, now seen corresponding path program 1 times [2019-12-07 15:16:18,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:18,485 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073942945] [2019-12-07 15:16:18,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:18,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:18,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:18,530 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2073942945] [2019-12-07 15:16:18,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:18,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:16:18,530 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404100462] [2019-12-07 15:16:18,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:16:18,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:18,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:16:18,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:16:18,531 INFO L87 Difference]: Start difference. First operand 5840 states and 16734 transitions. Second operand 5 states. [2019-12-07 15:16:18,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:18,735 INFO L93 Difference]: Finished difference Result 8673 states and 24555 transitions. [2019-12-07 15:16:18,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:16:18,736 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 64 [2019-12-07 15:16:18,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:18,743 INFO L225 Difference]: With dead ends: 8673 [2019-12-07 15:16:18,743 INFO L226 Difference]: Without dead ends: 8673 [2019-12-07 15:16:18,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:16:18,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8673 states. [2019-12-07 15:16:18,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8673 to 6608. [2019-12-07 15:16:18,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6608 states. [2019-12-07 15:16:18,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6608 states to 6608 states and 18982 transitions. [2019-12-07 15:16:18,831 INFO L78 Accepts]: Start accepts. Automaton has 6608 states and 18982 transitions. Word has length 64 [2019-12-07 15:16:18,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:18,831 INFO L462 AbstractCegarLoop]: Abstraction has 6608 states and 18982 transitions. [2019-12-07 15:16:18,831 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:16:18,831 INFO L276 IsEmpty]: Start isEmpty. Operand 6608 states and 18982 transitions. [2019-12-07 15:16:18,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 15:16:18,836 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:18,836 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:18,836 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:18,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:18,836 INFO L82 PathProgramCache]: Analyzing trace with hash -1230091042, now seen corresponding path program 2 times [2019-12-07 15:16:18,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:18,837 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015562062] [2019-12-07 15:16:18,837 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:18,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:18,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:18,896 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2015562062] [2019-12-07 15:16:18,896 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:18,896 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:16:18,896 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394715854] [2019-12-07 15:16:18,897 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:16:18,897 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:18,897 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:16:18,897 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:18,897 INFO L87 Difference]: Start difference. First operand 6608 states and 18982 transitions. Second operand 3 states. [2019-12-07 15:16:18,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:18,919 INFO L93 Difference]: Finished difference Result 6276 states and 17782 transitions. [2019-12-07 15:16:18,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:16:18,919 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 15:16:18,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:18,925 INFO L225 Difference]: With dead ends: 6276 [2019-12-07 15:16:18,925 INFO L226 Difference]: Without dead ends: 6276 [2019-12-07 15:16:18,925 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:18,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6276 states. [2019-12-07 15:16:18,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6276 to 5968. [2019-12-07 15:16:18,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5968 states. [2019-12-07 15:16:18,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5968 states to 5968 states and 16930 transitions. [2019-12-07 15:16:18,997 INFO L78 Accepts]: Start accepts. Automaton has 5968 states and 16930 transitions. Word has length 64 [2019-12-07 15:16:18,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:18,997 INFO L462 AbstractCegarLoop]: Abstraction has 5968 states and 16930 transitions. [2019-12-07 15:16:18,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:16:18,998 INFO L276 IsEmpty]: Start isEmpty. Operand 5968 states and 16930 transitions. [2019-12-07 15:16:19,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:16:19,002 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:19,002 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:19,002 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:19,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:19,003 INFO L82 PathProgramCache]: Analyzing trace with hash 1128424098, now seen corresponding path program 1 times [2019-12-07 15:16:19,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:19,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258647524] [2019-12-07 15:16:19,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:19,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:19,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:19,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258647524] [2019-12-07 15:16:19,068 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:19,068 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:16:19,068 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923392014] [2019-12-07 15:16:19,068 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:16:19,068 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:19,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:16:19,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:16:19,069 INFO L87 Difference]: Start difference. First operand 5968 states and 16930 transitions. Second operand 5 states. [2019-12-07 15:16:19,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:19,268 INFO L93 Difference]: Finished difference Result 8592 states and 24227 transitions. [2019-12-07 15:16:19,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:16:19,268 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 15:16:19,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:19,278 INFO L225 Difference]: With dead ends: 8592 [2019-12-07 15:16:19,278 INFO L226 Difference]: Without dead ends: 8592 [2019-12-07 15:16:19,278 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:16:19,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8592 states. [2019-12-07 15:16:19,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8592 to 7005. [2019-12-07 15:16:19,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7005 states. [2019-12-07 15:16:19,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7005 states to 7005 states and 19920 transitions. [2019-12-07 15:16:19,379 INFO L78 Accepts]: Start accepts. Automaton has 7005 states and 19920 transitions. Word has length 65 [2019-12-07 15:16:19,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:19,379 INFO L462 AbstractCegarLoop]: Abstraction has 7005 states and 19920 transitions. [2019-12-07 15:16:19,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:16:19,379 INFO L276 IsEmpty]: Start isEmpty. Operand 7005 states and 19920 transitions. [2019-12-07 15:16:19,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:16:19,384 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:19,385 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:19,385 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:19,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:19,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1714500708, now seen corresponding path program 2 times [2019-12-07 15:16:19,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:19,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619322893] [2019-12-07 15:16:19,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:19,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:19,595 WARN L192 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 15 DAG size of output: 10 [2019-12-07 15:16:19,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:19,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [619322893] [2019-12-07 15:16:19,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:19,610 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:16:19,610 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [262901066] [2019-12-07 15:16:19,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:16:19,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:19,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:16:19,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:19,611 INFO L87 Difference]: Start difference. First operand 7005 states and 19920 transitions. Second operand 3 states. [2019-12-07 15:16:19,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:19,651 INFO L93 Difference]: Finished difference Result 7005 states and 19919 transitions. [2019-12-07 15:16:19,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:16:19,652 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 15:16:19,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:19,658 INFO L225 Difference]: With dead ends: 7005 [2019-12-07 15:16:19,658 INFO L226 Difference]: Without dead ends: 7005 [2019-12-07 15:16:19,658 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:19,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7005 states. [2019-12-07 15:16:19,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7005 to 4620. [2019-12-07 15:16:19,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4620 states. [2019-12-07 15:16:19,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4620 states to 4620 states and 13293 transitions. [2019-12-07 15:16:19,724 INFO L78 Accepts]: Start accepts. Automaton has 4620 states and 13293 transitions. Word has length 65 [2019-12-07 15:16:19,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:19,724 INFO L462 AbstractCegarLoop]: Abstraction has 4620 states and 13293 transitions. [2019-12-07 15:16:19,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:16:19,724 INFO L276 IsEmpty]: Start isEmpty. Operand 4620 states and 13293 transitions. [2019-12-07 15:16:19,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:16:19,727 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:19,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:19,727 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:19,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:19,728 INFO L82 PathProgramCache]: Analyzing trace with hash 1444653798, now seen corresponding path program 1 times [2019-12-07 15:16:19,728 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:19,728 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1421336389] [2019-12-07 15:16:19,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:19,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:19,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:19,767 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1421336389] [2019-12-07 15:16:19,767 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:19,768 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:16:19,768 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084645008] [2019-12-07 15:16:19,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:16:19,768 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:19,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:16:19,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:19,768 INFO L87 Difference]: Start difference. First operand 4620 states and 13293 transitions. Second operand 3 states. [2019-12-07 15:16:19,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:19,784 INFO L93 Difference]: Finished difference Result 4236 states and 11895 transitions. [2019-12-07 15:16:19,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:16:19,784 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:16:19,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:19,788 INFO L225 Difference]: With dead ends: 4236 [2019-12-07 15:16:19,788 INFO L226 Difference]: Without dead ends: 4236 [2019-12-07 15:16:19,788 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:16:19,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4236 states. [2019-12-07 15:16:19,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4236 to 3882. [2019-12-07 15:16:19,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3882 states. [2019-12-07 15:16:19,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3882 states to 3882 states and 10895 transitions. [2019-12-07 15:16:19,839 INFO L78 Accepts]: Start accepts. Automaton has 3882 states and 10895 transitions. Word has length 66 [2019-12-07 15:16:19,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:19,839 INFO L462 AbstractCegarLoop]: Abstraction has 3882 states and 10895 transitions. [2019-12-07 15:16:19,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:16:19,839 INFO L276 IsEmpty]: Start isEmpty. Operand 3882 states and 10895 transitions. [2019-12-07 15:16:19,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:16:19,842 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:19,842 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:19,842 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:19,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:19,843 INFO L82 PathProgramCache]: Analyzing trace with hash -864116617, now seen corresponding path program 1 times [2019-12-07 15:16:19,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:19,843 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048318798] [2019-12-07 15:16:19,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:19,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:16:20,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:16:20,027 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048318798] [2019-12-07 15:16:20,027 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:16:20,028 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 15:16:20,028 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930394040] [2019-12-07 15:16:20,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 15:16:20,028 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:16:20,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 15:16:20,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:16:20,029 INFO L87 Difference]: Start difference. First operand 3882 states and 10895 transitions. Second operand 13 states. [2019-12-07 15:16:20,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:16:20,636 INFO L93 Difference]: Finished difference Result 14666 states and 41370 transitions. [2019-12-07 15:16:20,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 15:16:20,637 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 15:16:20,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:16:20,641 INFO L225 Difference]: With dead ends: 14666 [2019-12-07 15:16:20,641 INFO L226 Difference]: Without dead ends: 5554 [2019-12-07 15:16:20,642 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=218, Invalid=538, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:16:20,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5554 states. [2019-12-07 15:16:20,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5554 to 3273. [2019-12-07 15:16:20,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3273 states. [2019-12-07 15:16:20,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3273 states to 3273 states and 9098 transitions. [2019-12-07 15:16:20,691 INFO L78 Accepts]: Start accepts. Automaton has 3273 states and 9098 transitions. Word has length 67 [2019-12-07 15:16:20,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:16:20,692 INFO L462 AbstractCegarLoop]: Abstraction has 3273 states and 9098 transitions. [2019-12-07 15:16:20,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 15:16:20,692 INFO L276 IsEmpty]: Start isEmpty. Operand 3273 states and 9098 transitions. [2019-12-07 15:16:20,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:16:20,694 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:16:20,694 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:16:20,694 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:16:20,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:16:20,694 INFO L82 PathProgramCache]: Analyzing trace with hash -492073483, now seen corresponding path program 2 times [2019-12-07 15:16:20,694 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:16:20,694 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608739815] [2019-12-07 15:16:20,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:16:20,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:16:20,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:16:20,771 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 15:16:20,772 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:16:20,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] ULTIMATE.startENTRY-->L807: Formula: (let ((.cse0 (store |v_#valid_51| 0 0))) (and (= v_~x$r_buff1_thd1~0_165 0) (= 0 v_~x$r_buff1_thd3~0_146) (= 0 |v_ULTIMATE.start_main_~#t2284~0.offset_18|) (= v_~z~0_13 0) (= v_~main$tmp_guard0~0_18 0) (= v_~y~0_84 0) (= v_~x$flush_delayed~0_40 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2284~0.base_24| 4)) (= v_~main$tmp_guard1~0_48 0) (= v_~__unbuffered_cnt~0_158 0) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2284~0.base_24|) (= 0 v_~x$w_buff1_used~0_339) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$w_buff0_used~0_698) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_178) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24|) |v_ULTIMATE.start_main_~#t2284~0.offset_18| 0)) |v_#memory_int_19|) (= 0 v_~x$r_buff1_thd2~0_152) (= v_~x$r_buff0_thd1~0_141 0) (= v_~x$mem_tmp~0_20 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= |v_#valid_49| (store .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24| 1)) (= 0 v_~__unbuffered_p2_EAX~0_42) (= v_~__unbuffered_p2_EBX~0_42 0) (= v_~x$r_buff1_thd0~0_256 0) (= 0 v_~x$w_buff1~0_143) (= 0 |v_#NULL.base_3|) (= 0 v_~x$w_buff0~0_158) (= (select .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24|) 0) (= v_~x$r_buff0_thd0~0_367 0) (= 0 v_~weak$$choice2~0_95) (= 0 v_~x$r_buff0_thd2~0_210) (= 0 v_~x$r_buff0_thd3~0_129) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_16|, ~x$w_buff0~0=v_~x$w_buff0~0_158, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_38|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_40, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_26|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_24|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_62|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_165, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_129, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_71|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_42, ULTIMATE.start_main_~#t2284~0.offset=|v_ULTIMATE.start_main_~#t2284~0.offset_18|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_367, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_26|, ~x$w_buff1~0=v_~x$w_buff1~0_143, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_43|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_339, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_152, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_43|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_147|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_158, ~x~0=v_~x~0_178, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_141, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_16|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_24|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_28|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_31|, ~x$mem_tmp~0=v_~x$mem_tmp~0_20, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_254|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_16|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_80|, ~y~0=v_~y~0_84, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_16|, ULTIMATE.start_main_~#t2284~0.base=|v_ULTIMATE.start_main_~#t2284~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_22|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_45|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_256, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_210, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_44|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_45|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_698, ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_20|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_147|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_13, ~weak$$choice2~0=v_~weak$$choice2~0_95, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_15|, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2286~0.base, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2284~0.offset, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2285~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2284~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t2286~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 15:16:20,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L807-1-->L809: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11|) |v_ULTIMATE.start_main_~#t2285~0.offset_9| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2285~0.base_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2285~0.base_11| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2285~0.offset_9|) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t2285~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_3|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2285~0.offset] because there is no mapped edge [2019-12-07 15:16:20,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L809-1-->L811: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2286~0.base_11|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11|) |v_ULTIMATE.start_main_~#t2286~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2286~0.offset_10|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2286~0.base_11| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t2286~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2286~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2286~0.offset] because there is no mapped edge [2019-12-07 15:16:20,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L4-->L764: Formula: (and (= ~x$r_buff1_thd0~0_Out2045258832 ~x$r_buff0_thd0~0_In2045258832) (= ~x$r_buff0_thd1~0_In2045258832 ~x$r_buff1_thd1~0_Out2045258832) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In2045258832)) (= 1 ~x$r_buff0_thd2~0_Out2045258832) (= 1 ~y~0_Out2045258832) (= ~x$r_buff1_thd2~0_Out2045258832 ~x$r_buff0_thd2~0_In2045258832) (= ~x$r_buff0_thd3~0_In2045258832 ~x$r_buff1_thd3~0_Out2045258832)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In2045258832, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2045258832, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2045258832, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2045258832, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2045258832} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In2045258832, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2045258832, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2045258832, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out2045258832, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out2045258832, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out2045258832, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2045258832, ~y~0=~y~0_Out2045258832, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2045258832, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out2045258832} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 15:16:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L784-2-->L784-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-70352383 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-70352383 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite15_Out-70352383| ~x$w_buff1~0_In-70352383) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-70352383| ~x~0_In-70352383)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-70352383, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-70352383, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-70352383, ~x~0=~x~0_In-70352383} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-70352383|, ~x$w_buff1~0=~x$w_buff1~0_In-70352383, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-70352383, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-70352383, ~x~0=~x~0_In-70352383} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 15:16:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L784-4-->L785: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~x~0_27) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|, ~x~0=v_~x~0_27} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 15:16:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In453638749 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In453638749 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out453638749|) (not .cse1)) (and (= ~x$w_buff0_used~0_In453638749 |P2Thread1of1ForFork2_#t~ite17_Out453638749|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In453638749, ~x$w_buff0_used~0=~x$w_buff0_used~0_In453638749} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In453638749, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out453638749|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In453638749} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 15:16:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In265075884 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In265075884 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In265075884 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In265075884 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite18_Out265075884| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite18_Out265075884| ~x$w_buff1_used~0_In265075884) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In265075884, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In265075884, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In265075884, ~x$w_buff0_used~0=~x$w_buff0_used~0_In265075884} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In265075884, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In265075884, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In265075884, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out265075884|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In265075884} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 15:16:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L735-2-->L735-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1681107126 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1681107126 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1681107126 |P0Thread1of1ForFork0_#t~ite3_Out-1681107126|) (not .cse1)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite3_Out-1681107126| ~x~0_In-1681107126)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1681107126, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1681107126, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1681107126, ~x~0=~x~0_In-1681107126} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1681107126|, ~x$w_buff1~0=~x$w_buff1~0_In-1681107126, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1681107126, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1681107126, ~x~0=~x~0_In-1681107126} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 15:16:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L735-4-->L736: Formula: (= v_~x~0_31 |v_P0Thread1of1ForFork0_#t~ite3_8|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_8|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_7|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_11|, ~x~0=v_~x~0_31} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 15:16:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L736-->L736-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1979958401 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1979958401 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1979958401| 0) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In1979958401 |P0Thread1of1ForFork0_#t~ite5_Out1979958401|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1979958401, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1979958401} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1979958401|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1979958401, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1979958401} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 15:16:20,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L737-->L737-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-996875936 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-996875936 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-996875936 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-996875936 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-996875936| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-996875936| ~x$w_buff1_used~0_In-996875936) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-996875936, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-996875936, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-996875936, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-996875936} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-996875936|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-996875936, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-996875936, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-996875936, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-996875936} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 15:16:20,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-37073091 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-37073091 256) 0))) (or (and (= ~x$r_buff0_thd1~0_In-37073091 |P0Thread1of1ForFork0_#t~ite7_Out-37073091|) (or .cse0 .cse1)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-37073091| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-37073091, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-37073091} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-37073091, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-37073091|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-37073091} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 15:16:20,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L739-->L739-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In1437096939 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1437096939 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1437096939 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1437096939 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1437096939|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out1437096939| ~x$r_buff1_thd1~0_In1437096939)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1437096939, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1437096939, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1437096939, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1437096939} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1437096939, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1437096939|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1437096939, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1437096939, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1437096939} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 15:16:20,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_101 |v_P0Thread1of1ForFork0_#t~ite8_60|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_60|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_59|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_101} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 15:16:20,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-583628434 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-583628434 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-583628434|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-583628434 |P1Thread1of1ForFork1_#t~ite11_Out-583628434|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-583628434, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-583628434} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-583628434|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-583628434, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-583628434} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 15:16:20,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L766-->L766-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1100538828 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1100538828 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1100538828 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1100538828 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1100538828|)) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In1100538828 |P1Thread1of1ForFork1_#t~ite12_Out1100538828|) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1100538828, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1100538828, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1100538828, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1100538828} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1100538828, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1100538828, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1100538828|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1100538828, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1100538828} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 15:16:20,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L767-->L768: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1567520197 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1567520197 256))) (.cse1 (= ~x$r_buff0_thd2~0_In1567520197 ~x$r_buff0_thd2~0_Out1567520197))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd2~0_Out1567520197) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1567520197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1567520197} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1567520197|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1567520197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1567520197} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 15:16:20,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In123947471 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In123947471 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In123947471 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In123947471 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out123947471| ~x$r_buff1_thd2~0_In123947471) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out123947471| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In123947471, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In123947471, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In123947471, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123947471} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In123947471, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In123947471, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In123947471, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out123947471|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123947471} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 15:16:20,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L768-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_54 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 15:16:20,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L787-->L787-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In2113920738 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In2113920738 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2113920738| 0)) (and (= |P2Thread1of1ForFork2_#t~ite19_Out2113920738| ~x$r_buff0_thd3~0_In2113920738) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2113920738, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2113920738} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2113920738, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out2113920738|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2113920738} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 15:16:20,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1732436677 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1732436677 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1732436677 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1732436677 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out1732436677|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$r_buff1_thd3~0_In1732436677 |P2Thread1of1ForFork2_#t~ite20_Out1732436677|) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1732436677, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1732436677, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1732436677, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1732436677} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1732436677|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1732436677, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1732436677, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1732436677, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1732436677} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 15:16:20,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L788-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_81 |v_P2Thread1of1ForFork2_#t~ite20_48|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_47|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_81, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 15:16:20,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L811-1-->L817: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:16:20,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L817-2-->L817-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out607571842| |ULTIMATE.start_main_#t~ite24_Out607571842|)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In607571842 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In607571842 256)))) (or (and .cse0 (= ~x~0_In607571842 |ULTIMATE.start_main_#t~ite24_Out607571842|) (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite24_Out607571842| ~x$w_buff1~0_In607571842) .cse0 (not .cse1) (not .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In607571842, ~x$w_buff1_used~0=~x$w_buff1_used~0_In607571842, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In607571842, ~x~0=~x~0_In607571842} OutVars{~x$w_buff1~0=~x$w_buff1~0_In607571842, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out607571842|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out607571842|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In607571842, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In607571842, ~x~0=~x~0_In607571842} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 15:16:20,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1129599191 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1129599191 256) 0))) (or (and (= ~x$w_buff0_used~0_In-1129599191 |ULTIMATE.start_main_#t~ite26_Out-1129599191|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite26_Out-1129599191| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1129599191, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1129599191} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1129599191, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1129599191|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1129599191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 15:16:20,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L819-->L819-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-182628863 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-182628863 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-182628863 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-182628863 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out-182628863| ~x$w_buff1_used~0_In-182628863) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite27_Out-182628863| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-182628863, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-182628863, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-182628863, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-182628863} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-182628863, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-182628863, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-182628863|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-182628863, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-182628863} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 15:16:20,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L820-->L820-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In574302730 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In574302730 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite28_Out574302730|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In574302730 |ULTIMATE.start_main_#t~ite28_Out574302730|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In574302730, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574302730} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In574302730, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out574302730|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574302730} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 15:16:20,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-103677559 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-103677559 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-103677559 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-103677559 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite29_Out-103677559|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd0~0_In-103677559 |ULTIMATE.start_main_#t~ite29_Out-103677559|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-103677559, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-103677559, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-103677559, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-103677559} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-103677559, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-103677559|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-103677559, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-103677559, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-103677559} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 15:16:20,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L832-->L832-8: Formula: (let ((.cse4 (= |ULTIMATE.start_main_#t~ite45_Out-173691359| |ULTIMATE.start_main_#t~ite44_Out-173691359|)) (.cse0 (= (mod ~x$w_buff1_used~0_In-173691359 256) 0)) (.cse5 (= (mod ~weak$$choice2~0_In-173691359 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-173691359 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-173691359 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-173691359 256)))) (or (and (= |ULTIMATE.start_main_#t~ite43_In-173691359| |ULTIMATE.start_main_#t~ite43_Out-173691359|) (or (and (or (and .cse0 .cse1) (and .cse1 .cse2) .cse3) (= ~x$w_buff1_used~0_In-173691359 |ULTIMATE.start_main_#t~ite44_Out-173691359|) .cse4 .cse5) (and (= |ULTIMATE.start_main_#t~ite45_Out-173691359| ~x$w_buff1_used~0_In-173691359) (= |ULTIMATE.start_main_#t~ite44_In-173691359| |ULTIMATE.start_main_#t~ite44_Out-173691359|) (not .cse5)))) (let ((.cse6 (not .cse1))) (and .cse4 (or .cse6 (not .cse0)) .cse5 (not .cse3) (= |ULTIMATE.start_main_#t~ite43_Out-173691359| |ULTIMATE.start_main_#t~ite44_Out-173691359|) (or .cse6 (not .cse2)) (= |ULTIMATE.start_main_#t~ite43_Out-173691359| 0))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-173691359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-173691359, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-173691359, ~weak$$choice2~0=~weak$$choice2~0_In-173691359, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_In-173691359|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-173691359, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In-173691359|} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-173691359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-173691359, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-173691359, ~weak$$choice2~0=~weak$$choice2~0_In-173691359, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-173691359|, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-173691359|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-173691359|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-173691359} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:16:20,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-8-->L834: Formula: (and (not (= (mod v_~weak$$choice2~0_91 256) 0)) (= v_~x$w_buff1_used~0_335 |v_ULTIMATE.start_main_#t~ite45_32|) (= v_~x$r_buff0_thd0~0_362 v_~x$r_buff0_thd0~0_361)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_362, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_32|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_361, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_26|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_335, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_27|, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_30|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:16:20,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1948449739 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out1948449739| |ULTIMATE.start_main_#t~ite51_Out1948449739|) .cse0 (= ~x$r_buff1_thd0~0_In1948449739 |ULTIMATE.start_main_#t~ite50_Out1948449739|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1948449739 256)))) (or (and (= 0 (mod ~x$r_buff1_thd0~0_In1948449739 256)) .cse1) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In1948449739 256))) (= (mod ~x$w_buff0_used~0_In1948449739 256) 0)))) (and (not .cse0) (= ~x$r_buff1_thd0~0_In1948449739 |ULTIMATE.start_main_#t~ite51_Out1948449739|) (= |ULTIMATE.start_main_#t~ite50_In1948449739| |ULTIMATE.start_main_#t~ite50_Out1948449739|)))) InVars {ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_In1948449739|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1948449739, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1948449739, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1948449739, ~weak$$choice2~0=~weak$$choice2~0_In1948449739, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1948449739} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1948449739|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1948449739, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1948449739|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1948449739, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1948449739, ~weak$$choice2~0=~weak$$choice2~0_In1948449739, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1948449739} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:16:20,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L836-->L839-1: Formula: (and (= v_~x$mem_tmp~0_12 v_~x~0_148) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$flush_delayed~0_22 0) (= (mod v_~main$tmp_guard1~0_34 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12, ~x~0=v_~x~0_148, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:16:20,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L839-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:16:20,836 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:16:20 BasicIcfg [2019-12-07 15:16:20,836 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:16:20,836 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:16:20,837 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:16:20,837 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:16:20,837 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:14:39" (3/4) ... [2019-12-07 15:16:20,838 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:16:20,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] ULTIMATE.startENTRY-->L807: Formula: (let ((.cse0 (store |v_#valid_51| 0 0))) (and (= v_~x$r_buff1_thd1~0_165 0) (= 0 v_~x$r_buff1_thd3~0_146) (= 0 |v_ULTIMATE.start_main_~#t2284~0.offset_18|) (= v_~z~0_13 0) (= v_~main$tmp_guard0~0_18 0) (= v_~y~0_84 0) (= v_~x$flush_delayed~0_40 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2284~0.base_24| 4)) (= v_~main$tmp_guard1~0_48 0) (= v_~__unbuffered_cnt~0_158 0) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2284~0.base_24|) (= 0 v_~x$w_buff1_used~0_339) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$w_buff0_used~0_698) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_178) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24|) |v_ULTIMATE.start_main_~#t2284~0.offset_18| 0)) |v_#memory_int_19|) (= 0 v_~x$r_buff1_thd2~0_152) (= v_~x$r_buff0_thd1~0_141 0) (= v_~x$mem_tmp~0_20 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= |v_#valid_49| (store .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24| 1)) (= 0 v_~__unbuffered_p2_EAX~0_42) (= v_~__unbuffered_p2_EBX~0_42 0) (= v_~x$r_buff1_thd0~0_256 0) (= 0 v_~x$w_buff1~0_143) (= 0 |v_#NULL.base_3|) (= 0 v_~x$w_buff0~0_158) (= (select .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24|) 0) (= v_~x$r_buff0_thd0~0_367 0) (= 0 v_~weak$$choice2~0_95) (= 0 v_~x$r_buff0_thd2~0_210) (= 0 v_~x$r_buff0_thd3~0_129) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_16|, ~x$w_buff0~0=v_~x$w_buff0~0_158, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_38|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_40, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_26|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_24|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_62|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_165, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_129, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_71|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_42, ULTIMATE.start_main_~#t2284~0.offset=|v_ULTIMATE.start_main_~#t2284~0.offset_18|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_367, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_26|, ~x$w_buff1~0=v_~x$w_buff1~0_143, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_43|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_339, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_152, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_43|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_147|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_158, ~x~0=v_~x~0_178, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_141, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_16|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_24|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_28|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_31|, ~x$mem_tmp~0=v_~x$mem_tmp~0_20, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_254|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_16|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_80|, ~y~0=v_~y~0_84, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_16|, ULTIMATE.start_main_~#t2284~0.base=|v_ULTIMATE.start_main_~#t2284~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_22|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_45|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_256, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_210, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_44|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_45|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_698, ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_20|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_147|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_13, ~weak$$choice2~0=v_~weak$$choice2~0_95, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_15|, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2286~0.base, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2284~0.offset, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2285~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2284~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t2286~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 15:16:20,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L807-1-->L809: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11|) |v_ULTIMATE.start_main_~#t2285~0.offset_9| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2285~0.base_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2285~0.base_11| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2285~0.offset_9|) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t2285~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_3|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2285~0.offset] because there is no mapped edge [2019-12-07 15:16:20,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L809-1-->L811: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2286~0.base_11|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11|) |v_ULTIMATE.start_main_~#t2286~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2286~0.offset_10|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2286~0.base_11| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t2286~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2286~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2286~0.offset] because there is no mapped edge [2019-12-07 15:16:20,840 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L4-->L764: Formula: (and (= ~x$r_buff1_thd0~0_Out2045258832 ~x$r_buff0_thd0~0_In2045258832) (= ~x$r_buff0_thd1~0_In2045258832 ~x$r_buff1_thd1~0_Out2045258832) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In2045258832)) (= 1 ~x$r_buff0_thd2~0_Out2045258832) (= 1 ~y~0_Out2045258832) (= ~x$r_buff1_thd2~0_Out2045258832 ~x$r_buff0_thd2~0_In2045258832) (= ~x$r_buff0_thd3~0_In2045258832 ~x$r_buff1_thd3~0_Out2045258832)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In2045258832, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2045258832, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2045258832, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2045258832, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2045258832} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In2045258832, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2045258832, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2045258832, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out2045258832, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out2045258832, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out2045258832, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2045258832, ~y~0=~y~0_Out2045258832, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2045258832, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out2045258832} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 15:16:20,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L784-2-->L784-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-70352383 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-70352383 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite15_Out-70352383| ~x$w_buff1~0_In-70352383) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-70352383| ~x~0_In-70352383)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-70352383, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-70352383, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-70352383, ~x~0=~x~0_In-70352383} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-70352383|, ~x$w_buff1~0=~x$w_buff1~0_In-70352383, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-70352383, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-70352383, ~x~0=~x~0_In-70352383} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 15:16:20,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L784-4-->L785: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~x~0_27) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|, ~x~0=v_~x~0_27} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 15:16:20,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In453638749 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In453638749 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out453638749|) (not .cse1)) (and (= ~x$w_buff0_used~0_In453638749 |P2Thread1of1ForFork2_#t~ite17_Out453638749|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In453638749, ~x$w_buff0_used~0=~x$w_buff0_used~0_In453638749} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In453638749, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out453638749|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In453638749} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 15:16:20,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In265075884 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In265075884 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In265075884 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In265075884 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite18_Out265075884| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite18_Out265075884| ~x$w_buff1_used~0_In265075884) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In265075884, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In265075884, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In265075884, ~x$w_buff0_used~0=~x$w_buff0_used~0_In265075884} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In265075884, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In265075884, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In265075884, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out265075884|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In265075884} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 15:16:20,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L735-2-->L735-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1681107126 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1681107126 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1681107126 |P0Thread1of1ForFork0_#t~ite3_Out-1681107126|) (not .cse1)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite3_Out-1681107126| ~x~0_In-1681107126)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1681107126, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1681107126, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1681107126, ~x~0=~x~0_In-1681107126} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1681107126|, ~x$w_buff1~0=~x$w_buff1~0_In-1681107126, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1681107126, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1681107126, ~x~0=~x~0_In-1681107126} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 15:16:20,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L735-4-->L736: Formula: (= v_~x~0_31 |v_P0Thread1of1ForFork0_#t~ite3_8|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_8|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_7|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_11|, ~x~0=v_~x~0_31} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 15:16:20,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L736-->L736-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1979958401 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1979958401 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1979958401| 0) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In1979958401 |P0Thread1of1ForFork0_#t~ite5_Out1979958401|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1979958401, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1979958401} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1979958401|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1979958401, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1979958401} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 15:16:20,842 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L737-->L737-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-996875936 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-996875936 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-996875936 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-996875936 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-996875936| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-996875936| ~x$w_buff1_used~0_In-996875936) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-996875936, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-996875936, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-996875936, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-996875936} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-996875936|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-996875936, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-996875936, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-996875936, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-996875936} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 15:16:20,842 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-37073091 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-37073091 256) 0))) (or (and (= ~x$r_buff0_thd1~0_In-37073091 |P0Thread1of1ForFork0_#t~ite7_Out-37073091|) (or .cse0 .cse1)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite7_Out-37073091| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-37073091, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-37073091} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-37073091, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-37073091|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-37073091} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 15:16:20,842 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L739-->L739-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In1437096939 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1437096939 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1437096939 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1437096939 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1437096939|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out1437096939| ~x$r_buff1_thd1~0_In1437096939)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1437096939, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1437096939, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1437096939, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1437096939} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1437096939, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1437096939|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1437096939, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1437096939, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1437096939} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 15:16:20,843 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_101 |v_P0Thread1of1ForFork0_#t~ite8_60|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_60|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_59|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_101} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 15:16:20,843 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-583628434 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-583628434 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-583628434|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-583628434 |P1Thread1of1ForFork1_#t~ite11_Out-583628434|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-583628434, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-583628434} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-583628434|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-583628434, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-583628434} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 15:16:20,843 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L766-->L766-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1100538828 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1100538828 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1100538828 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1100538828 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1100538828|)) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In1100538828 |P1Thread1of1ForFork1_#t~ite12_Out1100538828|) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1100538828, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1100538828, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1100538828, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1100538828} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1100538828, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1100538828, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1100538828|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1100538828, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1100538828} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 15:16:20,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L767-->L768: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1567520197 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1567520197 256))) (.cse1 (= ~x$r_buff0_thd2~0_In1567520197 ~x$r_buff0_thd2~0_Out1567520197))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd2~0_Out1567520197) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1567520197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1567520197} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1567520197|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1567520197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1567520197} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 15:16:20,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In123947471 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In123947471 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In123947471 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In123947471 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out123947471| ~x$r_buff1_thd2~0_In123947471) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out123947471| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In123947471, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In123947471, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In123947471, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123947471} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In123947471, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In123947471, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In123947471, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out123947471|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123947471} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 15:16:20,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L768-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_54 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 15:16:20,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L787-->L787-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In2113920738 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In2113920738 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2113920738| 0)) (and (= |P2Thread1of1ForFork2_#t~ite19_Out2113920738| ~x$r_buff0_thd3~0_In2113920738) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2113920738, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2113920738} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2113920738, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out2113920738|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2113920738} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 15:16:20,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1732436677 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1732436677 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1732436677 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1732436677 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out1732436677|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$r_buff1_thd3~0_In1732436677 |P2Thread1of1ForFork2_#t~ite20_Out1732436677|) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1732436677, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1732436677, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1732436677, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1732436677} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1732436677|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1732436677, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1732436677, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1732436677, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1732436677} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 15:16:20,845 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L788-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_81 |v_P2Thread1of1ForFork2_#t~ite20_48|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_47|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_81, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 15:16:20,845 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L811-1-->L817: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:16:20,845 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L817-2-->L817-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out607571842| |ULTIMATE.start_main_#t~ite24_Out607571842|)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In607571842 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In607571842 256)))) (or (and .cse0 (= ~x~0_In607571842 |ULTIMATE.start_main_#t~ite24_Out607571842|) (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite24_Out607571842| ~x$w_buff1~0_In607571842) .cse0 (not .cse1) (not .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In607571842, ~x$w_buff1_used~0=~x$w_buff1_used~0_In607571842, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In607571842, ~x~0=~x~0_In607571842} OutVars{~x$w_buff1~0=~x$w_buff1~0_In607571842, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out607571842|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out607571842|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In607571842, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In607571842, ~x~0=~x~0_In607571842} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 15:16:20,845 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1129599191 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1129599191 256) 0))) (or (and (= ~x$w_buff0_used~0_In-1129599191 |ULTIMATE.start_main_#t~ite26_Out-1129599191|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite26_Out-1129599191| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1129599191, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1129599191} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1129599191, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1129599191|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1129599191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 15:16:20,846 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L819-->L819-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-182628863 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-182628863 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-182628863 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-182628863 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out-182628863| ~x$w_buff1_used~0_In-182628863) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite27_Out-182628863| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-182628863, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-182628863, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-182628863, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-182628863} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-182628863, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-182628863, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-182628863|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-182628863, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-182628863} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 15:16:20,846 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L820-->L820-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In574302730 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In574302730 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite28_Out574302730|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In574302730 |ULTIMATE.start_main_#t~ite28_Out574302730|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In574302730, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574302730} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In574302730, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out574302730|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In574302730} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 15:16:20,846 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-103677559 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-103677559 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-103677559 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-103677559 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite29_Out-103677559|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd0~0_In-103677559 |ULTIMATE.start_main_#t~ite29_Out-103677559|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-103677559, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-103677559, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-103677559, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-103677559} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-103677559, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-103677559|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-103677559, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-103677559, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-103677559} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 15:16:20,848 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L832-->L832-8: Formula: (let ((.cse4 (= |ULTIMATE.start_main_#t~ite45_Out-173691359| |ULTIMATE.start_main_#t~ite44_Out-173691359|)) (.cse0 (= (mod ~x$w_buff1_used~0_In-173691359 256) 0)) (.cse5 (= (mod ~weak$$choice2~0_In-173691359 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-173691359 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-173691359 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-173691359 256)))) (or (and (= |ULTIMATE.start_main_#t~ite43_In-173691359| |ULTIMATE.start_main_#t~ite43_Out-173691359|) (or (and (or (and .cse0 .cse1) (and .cse1 .cse2) .cse3) (= ~x$w_buff1_used~0_In-173691359 |ULTIMATE.start_main_#t~ite44_Out-173691359|) .cse4 .cse5) (and (= |ULTIMATE.start_main_#t~ite45_Out-173691359| ~x$w_buff1_used~0_In-173691359) (= |ULTIMATE.start_main_#t~ite44_In-173691359| |ULTIMATE.start_main_#t~ite44_Out-173691359|) (not .cse5)))) (let ((.cse6 (not .cse1))) (and .cse4 (or .cse6 (not .cse0)) .cse5 (not .cse3) (= |ULTIMATE.start_main_#t~ite43_Out-173691359| |ULTIMATE.start_main_#t~ite44_Out-173691359|) (or .cse6 (not .cse2)) (= |ULTIMATE.start_main_#t~ite43_Out-173691359| 0))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-173691359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-173691359, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-173691359, ~weak$$choice2~0=~weak$$choice2~0_In-173691359, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_In-173691359|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-173691359, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In-173691359|} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-173691359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-173691359, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-173691359, ~weak$$choice2~0=~weak$$choice2~0_In-173691359, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-173691359|, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-173691359|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-173691359|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-173691359} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:16:20,848 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-8-->L834: Formula: (and (not (= (mod v_~weak$$choice2~0_91 256) 0)) (= v_~x$w_buff1_used~0_335 |v_ULTIMATE.start_main_#t~ite45_32|) (= v_~x$r_buff0_thd0~0_362 v_~x$r_buff0_thd0~0_361)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_362, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_32|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_361, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_26|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_335, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_27|, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_30|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:16:20,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1948449739 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out1948449739| |ULTIMATE.start_main_#t~ite51_Out1948449739|) .cse0 (= ~x$r_buff1_thd0~0_In1948449739 |ULTIMATE.start_main_#t~ite50_Out1948449739|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1948449739 256)))) (or (and (= 0 (mod ~x$r_buff1_thd0~0_In1948449739 256)) .cse1) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In1948449739 256))) (= (mod ~x$w_buff0_used~0_In1948449739 256) 0)))) (and (not .cse0) (= ~x$r_buff1_thd0~0_In1948449739 |ULTIMATE.start_main_#t~ite51_Out1948449739|) (= |ULTIMATE.start_main_#t~ite50_In1948449739| |ULTIMATE.start_main_#t~ite50_Out1948449739|)))) InVars {ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_In1948449739|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1948449739, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1948449739, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1948449739, ~weak$$choice2~0=~weak$$choice2~0_In1948449739, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1948449739} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1948449739|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1948449739, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1948449739|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1948449739, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1948449739, ~weak$$choice2~0=~weak$$choice2~0_In1948449739, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1948449739} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:16:20,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L836-->L839-1: Formula: (and (= v_~x$mem_tmp~0_12 v_~x~0_148) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$flush_delayed~0_22 0) (= (mod v_~main$tmp_guard1~0_34 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12, ~x~0=v_~x~0_148, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:16:20,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L839-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:16:20,901 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_de0b962e-d759-4f83-b161-f00b242b6f7c/bin/utaipan/witness.graphml [2019-12-07 15:16:20,901 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:16:20,902 INFO L168 Benchmark]: Toolchain (without parser) took 102386.23 ms. Allocated memory was 1.0 GB in the beginning and 8.3 GB in the end (delta: 7.3 GB). Free memory was 939.3 MB in the beginning and 4.6 GB in the end (delta: -3.7 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 15:16:20,903 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:16:20,903 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.57 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -126.5 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:16:20,903 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:16:20,904 INFO L168 Benchmark]: Boogie Preprocessor took 27.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:16:20,904 INFO L168 Benchmark]: RCFGBuilder took 412.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.8 MB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:16:20,904 INFO L168 Benchmark]: TraceAbstraction took 101454.74 ms. Allocated memory was 1.1 GB in the beginning and 8.3 GB in the end (delta: 7.2 GB). Free memory was 997.8 MB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 15:16:20,904 INFO L168 Benchmark]: Witness Printer took 65.06 ms. Allocated memory is still 8.3 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 38.3 MB). Peak memory consumption was 38.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:16:20,906 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.57 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -126.5 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 412.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.8 MB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 101454.74 ms. Allocated memory was 1.1 GB in the beginning and 8.3 GB in the end (delta: 7.2 GB). Free memory was 997.8 MB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. * Witness Printer took 65.06 ms. Allocated memory is still 8.3 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 38.3 MB). Peak memory consumption was 38.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 175 ProgramPointsBefore, 94 ProgramPointsAfterwards, 212 TransitionsBefore, 103 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 8 FixpointIterations, 32 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 32 ChoiceCompositions, 5784 VarBasedMoverChecksPositive, 205 VarBasedMoverChecksNegative, 38 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 91392 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L807] FCALL, FORK 0 pthread_create(&t2284, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L809] FCALL, FORK 0 pthread_create(&t2285, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L749] 2 x$w_buff1 = x$w_buff0 [L750] 2 x$w_buff0 = 2 [L751] 2 x$w_buff1_used = x$w_buff0_used [L752] 2 x$w_buff0_used = (_Bool)1 [L811] FCALL, FORK 0 pthread_create(&t2286, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L778] 3 __unbuffered_p2_EAX = y [L781] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L729] 1 z = 1 [L732] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L784] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L785] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L736] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L737] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L738] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L786] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L787] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L817] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L817] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L818] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L819] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L820] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L821] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L824] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L825] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L826] 0 x$flush_delayed = weak$$choice2 [L827] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L828] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L828] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L829] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L829] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L830] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L830] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L831] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L831] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L834] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L835] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 101.3s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 14.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2866 SDtfs, 2533 SDslu, 4768 SDs, 0 SdLazy, 2880 SolverSat, 119 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 113 GetRequests, 27 SyntacticMatches, 11 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=240428occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 66.4s AutomataMinimizationTime, 18 MinimizatonAttempts, 282027 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 778 NumberOfCodeBlocks, 778 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 693 ConstructedInterpolants, 0 QuantifiedInterpolants, 132147 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...