./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe024_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe024_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a90235dcc8a5b69a4a45037bda62e61eb2c94ba0 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:37:36,121 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:37:36,122 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:37:36,130 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:37:36,130 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:37:36,131 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:37:36,132 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:37:36,133 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:37:36,134 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:37:36,135 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:37:36,136 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:37:36,136 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:37:36,137 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:37:36,137 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:37:36,138 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:37:36,139 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:37:36,139 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:37:36,140 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:37:36,141 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:37:36,142 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:37:36,143 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:37:36,144 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:37:36,145 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:37:36,145 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:37:36,147 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:37:36,147 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:37:36,147 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:37:36,148 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:37:36,148 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:37:36,149 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:37:36,149 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:37:36,149 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:37:36,150 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:37:36,150 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:37:36,151 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:37:36,151 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:37:36,151 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:37:36,151 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:37:36,151 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:37:36,152 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:37:36,152 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:37:36,153 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:37:36,162 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:37:36,162 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:37:36,163 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:37:36,163 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:37:36,163 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:37:36,163 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:37:36,163 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:37:36,163 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:37:36,163 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:37:36,164 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:37:36,164 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:37:36,164 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:37:36,164 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:37:36,164 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:37:36,164 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:37:36,165 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:37:36,165 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:37:36,165 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:37:36,165 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:37:36,165 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:37:36,165 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:37:36,165 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:37:36,166 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:37:36,166 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:37:36,166 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:37:36,166 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:37:36,166 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:37:36,166 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:37:36,166 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:37:36,167 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:37:36,167 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:37:36,167 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:37:36,167 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:37:36,167 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:37:36,167 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:37:36,168 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:37:36,168 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:37:36,168 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:37:36,168 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:37:36,168 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:37:36,168 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a90235dcc8a5b69a4a45037bda62e61eb2c94ba0 [2019-12-07 19:37:36,272 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:37:36,280 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:37:36,282 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:37:36,283 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:37:36,283 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:37:36,284 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe024_rmo.oepc.i [2019-12-07 19:37:36,321 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/data/8d2bd5d5e/738665eff26543d0b0616c25039525f8/FLAGa09d2d966 [2019-12-07 19:37:36,797 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:37:36,797 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/sv-benchmarks/c/pthread-wmm/safe024_rmo.oepc.i [2019-12-07 19:37:36,806 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/data/8d2bd5d5e/738665eff26543d0b0616c25039525f8/FLAGa09d2d966 [2019-12-07 19:37:37,302 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/data/8d2bd5d5e/738665eff26543d0b0616c25039525f8 [2019-12-07 19:37:37,304 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:37:37,305 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:37:37,306 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:37:37,306 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:37:37,308 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:37:37,309 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,310 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b6fc423 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37, skipping insertion in model container [2019-12-07 19:37:37,310 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,315 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:37:37,343 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:37:37,578 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:37:37,586 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:37:37,624 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:37:37,668 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:37:37,668 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37 WrapperNode [2019-12-07 19:37:37,668 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:37:37,668 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:37:37,669 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:37:37,669 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:37:37,674 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,686 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,704 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:37:37,705 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:37:37,705 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:37:37,705 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:37:37,711 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,711 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,714 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,714 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,721 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,724 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,726 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... [2019-12-07 19:37:37,729 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:37:37,730 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:37:37,730 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:37:37,730 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:37:37,730 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:37:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:37:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:37:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:37:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:37:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:37:37,773 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:37:37,773 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:37:37,773 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:37:37,774 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:37:37,774 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:37:37,774 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:37:37,774 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:37:37,774 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:37:37,775 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:37:38,115 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:37:38,115 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:37:38,116 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:37:38 BoogieIcfgContainer [2019-12-07 19:37:38,116 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:37:38,117 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:37:38,117 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:37:38,119 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:37:38,119 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:37:37" (1/3) ... [2019-12-07 19:37:38,120 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c1572a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:37:38, skipping insertion in model container [2019-12-07 19:37:38,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:37:37" (2/3) ... [2019-12-07 19:37:38,120 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c1572a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:37:38, skipping insertion in model container [2019-12-07 19:37:38,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:37:38" (3/3) ... [2019-12-07 19:37:38,122 INFO L109 eAbstractionObserver]: Analyzing ICFG safe024_rmo.oepc.i [2019-12-07 19:37:38,128 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:37:38,128 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:37:38,134 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:37:38,134 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:37:38,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,162 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,162 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,165 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,165 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,165 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,165 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,165 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,166 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,166 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,166 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,166 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,166 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,168 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,168 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,168 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,168 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,168 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,169 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,169 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,169 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,169 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,169 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,169 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,170 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,170 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,170 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,170 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,170 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,171 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,171 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,171 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,171 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,171 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,178 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,178 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,178 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,178 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,178 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,178 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,182 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,182 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,182 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,182 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,182 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,182 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:37:38,197 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:37:38,209 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:37:38,209 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:37:38,210 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:37:38,210 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:37:38,210 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:37:38,210 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:37:38,210 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:37:38,210 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:37:38,223 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-12-07 19:37:38,224 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 19:37:38,285 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 19:37:38,285 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:37:38,296 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 726 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 19:37:38,311 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 19:37:38,347 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 19:37:38,347 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:37:38,354 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 726 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 19:37:38,368 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 19:37:38,369 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:37:41,522 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 19:37:41,620 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66430 [2019-12-07 19:37:41,620 INFO L214 etLargeBlockEncoding]: Total number of compositions: 109 [2019-12-07 19:37:41,623 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 89 transitions [2019-12-07 19:37:51,253 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 89098 states. [2019-12-07 19:37:51,254 INFO L276 IsEmpty]: Start isEmpty. Operand 89098 states. [2019-12-07 19:37:51,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 19:37:51,259 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:37:51,260 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 19:37:51,260 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:37:51,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:37:51,264 INFO L82 PathProgramCache]: Analyzing trace with hash 797474656, now seen corresponding path program 1 times [2019-12-07 19:37:51,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:37:51,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020493886] [2019-12-07 19:37:51,271 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:37:51,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:37:51,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:37:51,417 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020493886] [2019-12-07 19:37:51,418 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:37:51,418 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:37:51,419 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2100262161] [2019-12-07 19:37:51,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:37:51,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:37:51,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:37:51,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:37:51,433 INFO L87 Difference]: Start difference. First operand 89098 states. Second operand 3 states. [2019-12-07 19:37:52,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:37:52,094 INFO L93 Difference]: Finished difference Result 87834 states and 374974 transitions. [2019-12-07 19:37:52,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:37:52,096 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 19:37:52,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:37:52,485 INFO L225 Difference]: With dead ends: 87834 [2019-12-07 19:37:52,485 INFO L226 Difference]: Without dead ends: 82738 [2019-12-07 19:37:52,486 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:37:55,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82738 states. [2019-12-07 19:37:57,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82738 to 82738. [2019-12-07 19:37:57,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82738 states. [2019-12-07 19:37:57,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82738 states to 82738 states and 352742 transitions. [2019-12-07 19:37:57,473 INFO L78 Accepts]: Start accepts. Automaton has 82738 states and 352742 transitions. Word has length 5 [2019-12-07 19:37:57,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:37:57,474 INFO L462 AbstractCegarLoop]: Abstraction has 82738 states and 352742 transitions. [2019-12-07 19:37:57,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:37:57,474 INFO L276 IsEmpty]: Start isEmpty. Operand 82738 states and 352742 transitions. [2019-12-07 19:37:57,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:37:57,480 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:37:57,480 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:37:57,480 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:37:57,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:37:57,480 INFO L82 PathProgramCache]: Analyzing trace with hash 334215788, now seen corresponding path program 1 times [2019-12-07 19:37:57,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:37:57,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920308933] [2019-12-07 19:37:57,481 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:37:57,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:37:57,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:37:57,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920308933] [2019-12-07 19:37:57,554 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:37:57,554 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:37:57,554 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819033166] [2019-12-07 19:37:57,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:37:57,555 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:37:57,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:37:57,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:37:57,555 INFO L87 Difference]: Start difference. First operand 82738 states and 352742 transitions. Second operand 4 states. [2019-12-07 19:37:58,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:37:58,362 INFO L93 Difference]: Finished difference Result 127286 states and 521114 transitions. [2019-12-07 19:37:58,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:37:58,362 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:37:58,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:37:58,713 INFO L225 Difference]: With dead ends: 127286 [2019-12-07 19:37:58,713 INFO L226 Difference]: Without dead ends: 127202 [2019-12-07 19:37:58,713 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:38:04,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127202 states. [2019-12-07 19:38:06,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127202 to 115962. [2019-12-07 19:38:06,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115962 states. [2019-12-07 19:38:06,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115962 states to 115962 states and 480151 transitions. [2019-12-07 19:38:06,326 INFO L78 Accepts]: Start accepts. Automaton has 115962 states and 480151 transitions. Word has length 13 [2019-12-07 19:38:06,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:06,327 INFO L462 AbstractCegarLoop]: Abstraction has 115962 states and 480151 transitions. [2019-12-07 19:38:06,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:38:06,327 INFO L276 IsEmpty]: Start isEmpty. Operand 115962 states and 480151 transitions. [2019-12-07 19:38:06,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:38:06,330 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:06,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:06,330 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:06,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:06,331 INFO L82 PathProgramCache]: Analyzing trace with hash -1013985610, now seen corresponding path program 1 times [2019-12-07 19:38:06,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:06,331 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346083443] [2019-12-07 19:38:06,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:06,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:06,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:06,364 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [346083443] [2019-12-07 19:38:06,364 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:06,364 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:38:06,364 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401057764] [2019-12-07 19:38:06,364 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:38:06,364 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:06,365 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:38:06,365 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:06,365 INFO L87 Difference]: Start difference. First operand 115962 states and 480151 transitions. Second operand 3 states. [2019-12-07 19:38:06,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:06,469 INFO L93 Difference]: Finished difference Result 28492 states and 95363 transitions. [2019-12-07 19:38:06,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:38:06,470 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 19:38:06,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:06,517 INFO L225 Difference]: With dead ends: 28492 [2019-12-07 19:38:06,517 INFO L226 Difference]: Without dead ends: 28492 [2019-12-07 19:38:06,517 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:06,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28492 states. [2019-12-07 19:38:07,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28492 to 28492. [2019-12-07 19:38:07,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28492 states. [2019-12-07 19:38:07,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28492 states to 28492 states and 95363 transitions. [2019-12-07 19:38:07,226 INFO L78 Accepts]: Start accepts. Automaton has 28492 states and 95363 transitions. Word has length 13 [2019-12-07 19:38:07,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:07,227 INFO L462 AbstractCegarLoop]: Abstraction has 28492 states and 95363 transitions. [2019-12-07 19:38:07,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:38:07,227 INFO L276 IsEmpty]: Start isEmpty. Operand 28492 states and 95363 transitions. [2019-12-07 19:38:07,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 19:38:07,228 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:07,228 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:07,228 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:07,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:07,229 INFO L82 PathProgramCache]: Analyzing trace with hash 319138254, now seen corresponding path program 1 times [2019-12-07 19:38:07,229 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:07,229 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515834082] [2019-12-07 19:38:07,229 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:07,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:07,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:07,284 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515834082] [2019-12-07 19:38:07,284 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:07,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:38:07,284 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063580923] [2019-12-07 19:38:07,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:38:07,284 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:07,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:38:07,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:38:07,285 INFO L87 Difference]: Start difference. First operand 28492 states and 95363 transitions. Second operand 5 states. [2019-12-07 19:38:07,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:07,597 INFO L93 Difference]: Finished difference Result 41156 states and 135447 transitions. [2019-12-07 19:38:07,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:38:07,598 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2019-12-07 19:38:07,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:07,660 INFO L225 Difference]: With dead ends: 41156 [2019-12-07 19:38:07,660 INFO L226 Difference]: Without dead ends: 41141 [2019-12-07 19:38:07,661 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:38:07,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41141 states. [2019-12-07 19:38:08,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41141 to 31619. [2019-12-07 19:38:08,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31619 states. [2019-12-07 19:38:08,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31619 states to 31619 states and 105299 transitions. [2019-12-07 19:38:08,259 INFO L78 Accepts]: Start accepts. Automaton has 31619 states and 105299 transitions. Word has length 14 [2019-12-07 19:38:08,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:08,259 INFO L462 AbstractCegarLoop]: Abstraction has 31619 states and 105299 transitions. [2019-12-07 19:38:08,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:38:08,259 INFO L276 IsEmpty]: Start isEmpty. Operand 31619 states and 105299 transitions. [2019-12-07 19:38:08,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:38:08,268 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:08,268 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:08,268 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:08,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:08,268 INFO L82 PathProgramCache]: Analyzing trace with hash 436639450, now seen corresponding path program 1 times [2019-12-07 19:38:08,269 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:08,269 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091012427] [2019-12-07 19:38:08,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:08,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:08,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:08,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091012427] [2019-12-07 19:38:08,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:08,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:38:08,358 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767794335] [2019-12-07 19:38:08,358 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:38:08,358 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:08,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:38:08,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:38:08,359 INFO L87 Difference]: Start difference. First operand 31619 states and 105299 transitions. Second operand 7 states. [2019-12-07 19:38:08,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:08,996 INFO L93 Difference]: Finished difference Result 48171 states and 157719 transitions. [2019-12-07 19:38:08,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 19:38:08,997 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 19:38:08,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:09,068 INFO L225 Difference]: With dead ends: 48171 [2019-12-07 19:38:09,069 INFO L226 Difference]: Without dead ends: 48157 [2019-12-07 19:38:09,069 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=138, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:38:09,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48157 states. [2019-12-07 19:38:09,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48157 to 31596. [2019-12-07 19:38:09,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31596 states. [2019-12-07 19:38:09,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31596 states to 31596 states and 105222 transitions. [2019-12-07 19:38:09,719 INFO L78 Accepts]: Start accepts. Automaton has 31596 states and 105222 transitions. Word has length 22 [2019-12-07 19:38:09,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:09,719 INFO L462 AbstractCegarLoop]: Abstraction has 31596 states and 105222 transitions. [2019-12-07 19:38:09,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:38:09,719 INFO L276 IsEmpty]: Start isEmpty. Operand 31596 states and 105222 transitions. [2019-12-07 19:38:09,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:38:09,725 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:09,725 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:09,726 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:09,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:09,726 INFO L82 PathProgramCache]: Analyzing trace with hash 552377370, now seen corresponding path program 2 times [2019-12-07 19:38:09,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:09,726 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128349935] [2019-12-07 19:38:09,726 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:09,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:10,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:10,042 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128349935] [2019-12-07 19:38:10,042 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:10,042 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:38:10,042 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857150052] [2019-12-07 19:38:10,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:38:10,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:10,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:38:10,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:38:10,043 INFO L87 Difference]: Start difference. First operand 31596 states and 105222 transitions. Second operand 6 states. [2019-12-07 19:38:10,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:10,513 INFO L93 Difference]: Finished difference Result 50504 states and 164652 transitions. [2019-12-07 19:38:10,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 19:38:10,514 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 19:38:10,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:10,595 INFO L225 Difference]: With dead ends: 50504 [2019-12-07 19:38:10,595 INFO L226 Difference]: Without dead ends: 50489 [2019-12-07 19:38:10,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:38:10,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50489 states. [2019-12-07 19:38:11,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50489 to 33912. [2019-12-07 19:38:11,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33912 states. [2019-12-07 19:38:11,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33912 states to 33912 states and 112011 transitions. [2019-12-07 19:38:11,268 INFO L78 Accepts]: Start accepts. Automaton has 33912 states and 112011 transitions. Word has length 22 [2019-12-07 19:38:11,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:11,268 INFO L462 AbstractCegarLoop]: Abstraction has 33912 states and 112011 transitions. [2019-12-07 19:38:11,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:38:11,268 INFO L276 IsEmpty]: Start isEmpty. Operand 33912 states and 112011 transitions. [2019-12-07 19:38:11,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:38:11,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:11,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:11,274 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:11,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:11,274 INFO L82 PathProgramCache]: Analyzing trace with hash -324366654, now seen corresponding path program 1 times [2019-12-07 19:38:11,274 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:11,274 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1428988175] [2019-12-07 19:38:11,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:11,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:11,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:11,364 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1428988175] [2019-12-07 19:38:11,365 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:11,365 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:38:11,365 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782150122] [2019-12-07 19:38:11,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:38:11,365 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:11,365 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:38:11,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:38:11,366 INFO L87 Difference]: Start difference. First operand 33912 states and 112011 transitions. Second operand 6 states. [2019-12-07 19:38:11,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:11,901 INFO L93 Difference]: Finished difference Result 58332 states and 188079 transitions. [2019-12-07 19:38:11,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 19:38:11,902 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 19:38:11,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:11,990 INFO L225 Difference]: With dead ends: 58332 [2019-12-07 19:38:11,990 INFO L226 Difference]: Without dead ends: 58317 [2019-12-07 19:38:11,990 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:38:12,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58317 states. [2019-12-07 19:38:12,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58317 to 39114. [2019-12-07 19:38:12,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39114 states. [2019-12-07 19:38:12,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39114 states to 39114 states and 127576 transitions. [2019-12-07 19:38:12,771 INFO L78 Accepts]: Start accepts. Automaton has 39114 states and 127576 transitions. Word has length 22 [2019-12-07 19:38:12,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:12,771 INFO L462 AbstractCegarLoop]: Abstraction has 39114 states and 127576 transitions. [2019-12-07 19:38:12,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:38:12,772 INFO L276 IsEmpty]: Start isEmpty. Operand 39114 states and 127576 transitions. [2019-12-07 19:38:12,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:38:12,778 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:12,778 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:12,778 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:12,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:12,778 INFO L82 PathProgramCache]: Analyzing trace with hash -1455790486, now seen corresponding path program 3 times [2019-12-07 19:38:12,778 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:12,779 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896355725] [2019-12-07 19:38:12,779 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:12,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:12,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:12,857 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896355725] [2019-12-07 19:38:12,857 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:12,857 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:38:12,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889590062] [2019-12-07 19:38:12,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:38:12,858 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:12,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:38:12,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:38:12,858 INFO L87 Difference]: Start difference. First operand 39114 states and 127576 transitions. Second operand 8 states. [2019-12-07 19:38:13,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:13,627 INFO L93 Difference]: Finished difference Result 59637 states and 191676 transitions. [2019-12-07 19:38:13,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:38:13,628 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 22 [2019-12-07 19:38:13,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:13,719 INFO L225 Difference]: With dead ends: 59637 [2019-12-07 19:38:13,719 INFO L226 Difference]: Without dead ends: 59622 [2019-12-07 19:38:13,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:38:13,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59622 states. [2019-12-07 19:38:14,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59622 to 38578. [2019-12-07 19:38:14,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38578 states. [2019-12-07 19:38:14,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38578 states to 38578 states and 125746 transitions. [2019-12-07 19:38:14,548 INFO L78 Accepts]: Start accepts. Automaton has 38578 states and 125746 transitions. Word has length 22 [2019-12-07 19:38:14,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:14,549 INFO L462 AbstractCegarLoop]: Abstraction has 38578 states and 125746 transitions. [2019-12-07 19:38:14,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:38:14,549 INFO L276 IsEmpty]: Start isEmpty. Operand 38578 states and 125746 transitions. [2019-12-07 19:38:14,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 19:38:14,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:14,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:14,561 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:14,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:14,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1832050687, now seen corresponding path program 1 times [2019-12-07 19:38:14,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:14,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230890701] [2019-12-07 19:38:14,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:14,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:14,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:14,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230890701] [2019-12-07 19:38:14,611 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:14,611 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:38:14,611 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293349759] [2019-12-07 19:38:14,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:38:14,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:14,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:38:14,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:38:14,612 INFO L87 Difference]: Start difference. First operand 38578 states and 125746 transitions. Second operand 5 states. [2019-12-07 19:38:14,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:14,971 INFO L93 Difference]: Finished difference Result 51721 states and 166229 transitions. [2019-12-07 19:38:14,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:38:14,972 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 19:38:14,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:15,053 INFO L225 Difference]: With dead ends: 51721 [2019-12-07 19:38:15,053 INFO L226 Difference]: Without dead ends: 51698 [2019-12-07 19:38:15,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:38:15,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51698 states. [2019-12-07 19:38:15,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51698 to 43443. [2019-12-07 19:38:15,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43443 states. [2019-12-07 19:38:15,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43443 states to 43443 states and 140746 transitions. [2019-12-07 19:38:15,824 INFO L78 Accepts]: Start accepts. Automaton has 43443 states and 140746 transitions. Word has length 25 [2019-12-07 19:38:15,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:15,824 INFO L462 AbstractCegarLoop]: Abstraction has 43443 states and 140746 transitions. [2019-12-07 19:38:15,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:38:15,824 INFO L276 IsEmpty]: Start isEmpty. Operand 43443 states and 140746 transitions. [2019-12-07 19:38:15,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:38:15,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:15,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:15,838 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:15,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:15,838 INFO L82 PathProgramCache]: Analyzing trace with hash -353872392, now seen corresponding path program 1 times [2019-12-07 19:38:15,838 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:15,838 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734365704] [2019-12-07 19:38:15,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:15,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:15,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:15,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734365704] [2019-12-07 19:38:15,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:15,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:38:15,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712367311] [2019-12-07 19:38:15,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:38:15,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:15,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:38:15,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:38:15,870 INFO L87 Difference]: Start difference. First operand 43443 states and 140746 transitions. Second operand 4 states. [2019-12-07 19:38:15,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:15,925 INFO L93 Difference]: Finished difference Result 16755 states and 50244 transitions. [2019-12-07 19:38:15,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:38:15,925 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2019-12-07 19:38:15,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:15,944 INFO L225 Difference]: With dead ends: 16755 [2019-12-07 19:38:15,945 INFO L226 Difference]: Without dead ends: 16755 [2019-12-07 19:38:15,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:38:16,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16755 states. [2019-12-07 19:38:16,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16755 to 16215. [2019-12-07 19:38:16,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16215 states. [2019-12-07 19:38:16,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16215 states to 16215 states and 48654 transitions. [2019-12-07 19:38:16,159 INFO L78 Accepts]: Start accepts. Automaton has 16215 states and 48654 transitions. Word has length 27 [2019-12-07 19:38:16,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:16,160 INFO L462 AbstractCegarLoop]: Abstraction has 16215 states and 48654 transitions. [2019-12-07 19:38:16,160 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:38:16,160 INFO L276 IsEmpty]: Start isEmpty. Operand 16215 states and 48654 transitions. [2019-12-07 19:38:16,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 19:38:16,179 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:16,179 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:16,179 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:16,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:16,179 INFO L82 PathProgramCache]: Analyzing trace with hash 207279171, now seen corresponding path program 1 times [2019-12-07 19:38:16,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:16,180 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262889240] [2019-12-07 19:38:16,180 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:16,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:16,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:16,218 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262889240] [2019-12-07 19:38:16,218 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:16,218 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:38:16,219 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789099534] [2019-12-07 19:38:16,219 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:38:16,219 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:16,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:38:16,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:38:16,219 INFO L87 Difference]: Start difference. First operand 16215 states and 48654 transitions. Second operand 5 states. [2019-12-07 19:38:16,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:16,273 INFO L93 Difference]: Finished difference Result 14576 states and 44563 transitions. [2019-12-07 19:38:16,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:38:16,274 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2019-12-07 19:38:16,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:16,289 INFO L225 Difference]: With dead ends: 14576 [2019-12-07 19:38:16,290 INFO L226 Difference]: Without dead ends: 14576 [2019-12-07 19:38:16,290 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:38:16,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14576 states. [2019-12-07 19:38:16,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14576 to 13045. [2019-12-07 19:38:16,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13045 states. [2019-12-07 19:38:16,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13045 states to 13045 states and 40140 transitions. [2019-12-07 19:38:16,481 INFO L78 Accepts]: Start accepts. Automaton has 13045 states and 40140 transitions. Word has length 39 [2019-12-07 19:38:16,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:16,481 INFO L462 AbstractCegarLoop]: Abstraction has 13045 states and 40140 transitions. [2019-12-07 19:38:16,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:38:16,481 INFO L276 IsEmpty]: Start isEmpty. Operand 13045 states and 40140 transitions. [2019-12-07 19:38:16,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 19:38:16,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:16,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:16,499 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:16,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:16,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1179829373, now seen corresponding path program 1 times [2019-12-07 19:38:16,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:16,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280932780] [2019-12-07 19:38:16,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:16,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:16,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:16,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280932780] [2019-12-07 19:38:16,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:16,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:38:16,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372677400] [2019-12-07 19:38:16,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:38:16,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:16,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:38:16,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:38:16,557 INFO L87 Difference]: Start difference. First operand 13045 states and 40140 transitions. Second operand 5 states. [2019-12-07 19:38:16,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:16,843 INFO L93 Difference]: Finished difference Result 18239 states and 55632 transitions. [2019-12-07 19:38:16,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:38:16,843 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-07 19:38:16,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:16,862 INFO L225 Difference]: With dead ends: 18239 [2019-12-07 19:38:16,863 INFO L226 Difference]: Without dead ends: 18239 [2019-12-07 19:38:16,863 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:38:16,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18239 states. [2019-12-07 19:38:17,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18239 to 16201. [2019-12-07 19:38:17,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16201 states. [2019-12-07 19:38:17,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16201 states to 16201 states and 49815 transitions. [2019-12-07 19:38:17,102 INFO L78 Accepts]: Start accepts. Automaton has 16201 states and 49815 transitions. Word has length 53 [2019-12-07 19:38:17,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:17,102 INFO L462 AbstractCegarLoop]: Abstraction has 16201 states and 49815 transitions. [2019-12-07 19:38:17,102 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:38:17,102 INFO L276 IsEmpty]: Start isEmpty. Operand 16201 states and 49815 transitions. [2019-12-07 19:38:17,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 19:38:17,116 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:17,116 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:17,116 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:17,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:17,117 INFO L82 PathProgramCache]: Analyzing trace with hash 194850767, now seen corresponding path program 2 times [2019-12-07 19:38:17,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:17,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028118088] [2019-12-07 19:38:17,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:17,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:17,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:17,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028118088] [2019-12-07 19:38:17,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:17,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:38:17,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423606629] [2019-12-07 19:38:17,173 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:38:17,173 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:17,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:38:17,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:38:17,173 INFO L87 Difference]: Start difference. First operand 16201 states and 49815 transitions. Second operand 6 states. [2019-12-07 19:38:17,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:17,595 INFO L93 Difference]: Finished difference Result 28256 states and 86685 transitions. [2019-12-07 19:38:17,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:38:17,596 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-12-07 19:38:17,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:17,629 INFO L225 Difference]: With dead ends: 28256 [2019-12-07 19:38:17,629 INFO L226 Difference]: Without dead ends: 28256 [2019-12-07 19:38:17,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:38:17,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28256 states. [2019-12-07 19:38:17,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28256 to 16851. [2019-12-07 19:38:17,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16851 states. [2019-12-07 19:38:17,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16851 states to 16851 states and 51954 transitions. [2019-12-07 19:38:17,940 INFO L78 Accepts]: Start accepts. Automaton has 16851 states and 51954 transitions. Word has length 53 [2019-12-07 19:38:17,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:17,940 INFO L462 AbstractCegarLoop]: Abstraction has 16851 states and 51954 transitions. [2019-12-07 19:38:17,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:38:17,941 INFO L276 IsEmpty]: Start isEmpty. Operand 16851 states and 51954 transitions. [2019-12-07 19:38:17,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 19:38:17,956 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:17,956 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:17,956 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:17,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:17,956 INFO L82 PathProgramCache]: Analyzing trace with hash 690646521, now seen corresponding path program 3 times [2019-12-07 19:38:17,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:17,957 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797194895] [2019-12-07 19:38:17,957 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:17,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:18,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:18,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797194895] [2019-12-07 19:38:18,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:18,023 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:38:18,023 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936506192] [2019-12-07 19:38:18,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:38:18,024 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:18,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:38:18,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:18,024 INFO L87 Difference]: Start difference. First operand 16851 states and 51954 transitions. Second operand 3 states. [2019-12-07 19:38:18,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:18,073 INFO L93 Difference]: Finished difference Result 16849 states and 51949 transitions. [2019-12-07 19:38:18,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:38:18,074 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 19:38:18,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:18,093 INFO L225 Difference]: With dead ends: 16849 [2019-12-07 19:38:18,094 INFO L226 Difference]: Without dead ends: 16849 [2019-12-07 19:38:18,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:18,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16849 states. [2019-12-07 19:38:18,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16849 to 15551. [2019-12-07 19:38:18,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15551 states. [2019-12-07 19:38:18,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15551 states to 15551 states and 48250 transitions. [2019-12-07 19:38:18,324 INFO L78 Accepts]: Start accepts. Automaton has 15551 states and 48250 transitions. Word has length 53 [2019-12-07 19:38:18,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:18,324 INFO L462 AbstractCegarLoop]: Abstraction has 15551 states and 48250 transitions. [2019-12-07 19:38:18,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:38:18,324 INFO L276 IsEmpty]: Start isEmpty. Operand 15551 states and 48250 transitions. [2019-12-07 19:38:18,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:18,341 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:18,342 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:18,342 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:18,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:18,342 INFO L82 PathProgramCache]: Analyzing trace with hash 95954180, now seen corresponding path program 1 times [2019-12-07 19:38:18,342 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:18,342 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369240946] [2019-12-07 19:38:18,342 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:18,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:18,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:18,399 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369240946] [2019-12-07 19:38:18,399 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:18,399 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:38:18,399 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518761015] [2019-12-07 19:38:18,399 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:38:18,399 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:18,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:38:18,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:38:18,400 INFO L87 Difference]: Start difference. First operand 15551 states and 48250 transitions. Second operand 4 states. [2019-12-07 19:38:18,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:18,482 INFO L93 Difference]: Finished difference Result 27590 states and 85767 transitions. [2019-12-07 19:38:18,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:38:18,483 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2019-12-07 19:38:18,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:18,499 INFO L225 Difference]: With dead ends: 27590 [2019-12-07 19:38:18,499 INFO L226 Difference]: Without dead ends: 13327 [2019-12-07 19:38:18,499 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:38:18,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13327 states. [2019-12-07 19:38:18,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13327 to 13327. [2019-12-07 19:38:18,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13327 states. [2019-12-07 19:38:18,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13327 states to 13327 states and 41203 transitions. [2019-12-07 19:38:18,686 INFO L78 Accepts]: Start accepts. Automaton has 13327 states and 41203 transitions. Word has length 54 [2019-12-07 19:38:18,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:18,686 INFO L462 AbstractCegarLoop]: Abstraction has 13327 states and 41203 transitions. [2019-12-07 19:38:18,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:38:18,686 INFO L276 IsEmpty]: Start isEmpty. Operand 13327 states and 41203 transitions. [2019-12-07 19:38:18,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:18,699 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:18,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:18,699 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:18,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:18,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1323271516, now seen corresponding path program 2 times [2019-12-07 19:38:18,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:18,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1129459345] [2019-12-07 19:38:18,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:18,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:18,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:18,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1129459345] [2019-12-07 19:38:18,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:18,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:38:18,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516052672] [2019-12-07 19:38:18,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:38:18,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:18,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:38:18,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:38:18,763 INFO L87 Difference]: Start difference. First operand 13327 states and 41203 transitions. Second operand 7 states. [2019-12-07 19:38:19,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:19,285 INFO L93 Difference]: Finished difference Result 19814 states and 59764 transitions. [2019-12-07 19:38:19,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 19:38:19,286 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 19:38:19,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:19,306 INFO L225 Difference]: With dead ends: 19814 [2019-12-07 19:38:19,306 INFO L226 Difference]: Without dead ends: 19814 [2019-12-07 19:38:19,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:38:19,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19814 states. [2019-12-07 19:38:19,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19814 to 14792. [2019-12-07 19:38:19,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14792 states. [2019-12-07 19:38:19,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14792 states to 14792 states and 45393 transitions. [2019-12-07 19:38:19,551 INFO L78 Accepts]: Start accepts. Automaton has 14792 states and 45393 transitions. Word has length 54 [2019-12-07 19:38:19,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:19,551 INFO L462 AbstractCegarLoop]: Abstraction has 14792 states and 45393 transitions. [2019-12-07 19:38:19,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:38:19,551 INFO L276 IsEmpty]: Start isEmpty. Operand 14792 states and 45393 transitions. [2019-12-07 19:38:19,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:19,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:19,564 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:19,564 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:19,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:19,565 INFO L82 PathProgramCache]: Analyzing trace with hash -229144546, now seen corresponding path program 3 times [2019-12-07 19:38:19,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:19,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200218760] [2019-12-07 19:38:19,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:19,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:19,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:19,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1200218760] [2019-12-07 19:38:19,618 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:19,618 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:38:19,618 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169328418] [2019-12-07 19:38:19,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:38:19,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:19,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:38:19,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:38:19,619 INFO L87 Difference]: Start difference. First operand 14792 states and 45393 transitions. Second operand 7 states. [2019-12-07 19:38:19,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:19,872 INFO L93 Difference]: Finished difference Result 35407 states and 107871 transitions. [2019-12-07 19:38:19,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:38:19,873 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 19:38:19,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:19,904 INFO L225 Difference]: With dead ends: 35407 [2019-12-07 19:38:19,904 INFO L226 Difference]: Without dead ends: 27445 [2019-12-07 19:38:19,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:38:19,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27445 states. [2019-12-07 19:38:20,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27445 to 16901. [2019-12-07 19:38:20,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16901 states. [2019-12-07 19:38:20,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16901 states to 16901 states and 51930 transitions. [2019-12-07 19:38:20,214 INFO L78 Accepts]: Start accepts. Automaton has 16901 states and 51930 transitions. Word has length 54 [2019-12-07 19:38:20,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:20,214 INFO L462 AbstractCegarLoop]: Abstraction has 16901 states and 51930 transitions. [2019-12-07 19:38:20,214 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:38:20,214 INFO L276 IsEmpty]: Start isEmpty. Operand 16901 states and 51930 transitions. [2019-12-07 19:38:20,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:20,228 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:20,228 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:20,228 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:20,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:20,228 INFO L82 PathProgramCache]: Analyzing trace with hash -333290850, now seen corresponding path program 4 times [2019-12-07 19:38:20,229 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:20,229 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729997430] [2019-12-07 19:38:20,229 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:20,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:20,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:20,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729997430] [2019-12-07 19:38:20,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:20,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:38:20,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682274256] [2019-12-07 19:38:20,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:38:20,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:20,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:38:20,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:38:20,423 INFO L87 Difference]: Start difference. First operand 16901 states and 51930 transitions. Second operand 13 states. [2019-12-07 19:38:22,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:22,295 INFO L93 Difference]: Finished difference Result 44557 states and 133025 transitions. [2019-12-07 19:38:22,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 19:38:22,295 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 19:38:22,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:22,330 INFO L225 Difference]: With dead ends: 44557 [2019-12-07 19:38:22,331 INFO L226 Difference]: Without dead ends: 30362 [2019-12-07 19:38:22,331 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 254 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=242, Invalid=1018, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 19:38:22,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30362 states. [2019-12-07 19:38:22,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30362 to 18988. [2019-12-07 19:38:22,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18988 states. [2019-12-07 19:38:22,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18988 states to 18988 states and 58414 transitions. [2019-12-07 19:38:22,720 INFO L78 Accepts]: Start accepts. Automaton has 18988 states and 58414 transitions. Word has length 54 [2019-12-07 19:38:22,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:22,720 INFO L462 AbstractCegarLoop]: Abstraction has 18988 states and 58414 transitions. [2019-12-07 19:38:22,720 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:38:22,720 INFO L276 IsEmpty]: Start isEmpty. Operand 18988 states and 58414 transitions. [2019-12-07 19:38:22,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:22,740 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:22,740 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:22,740 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:22,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:22,740 INFO L82 PathProgramCache]: Analyzing trace with hash 1238522104, now seen corresponding path program 5 times [2019-12-07 19:38:22,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:22,740 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398205817] [2019-12-07 19:38:22,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:22,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:22,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:22,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398205817] [2019-12-07 19:38:22,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:22,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:38:22,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1075471668] [2019-12-07 19:38:22,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:38:22,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:22,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:38:22,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:38:22,958 INFO L87 Difference]: Start difference. First operand 18988 states and 58414 transitions. Second operand 13 states. [2019-12-07 19:38:25,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:25,987 INFO L93 Difference]: Finished difference Result 36978 states and 110745 transitions. [2019-12-07 19:38:25,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 19:38:25,987 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 19:38:25,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:26,023 INFO L225 Difference]: With dead ends: 36978 [2019-12-07 19:38:26,024 INFO L226 Difference]: Without dead ends: 30695 [2019-12-07 19:38:26,024 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 340 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=282, Invalid=1200, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 19:38:26,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30695 states. [2019-12-07 19:38:26,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30695 to 18869. [2019-12-07 19:38:26,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18869 states. [2019-12-07 19:38:26,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18869 states to 18869 states and 58082 transitions. [2019-12-07 19:38:26,370 INFO L78 Accepts]: Start accepts. Automaton has 18869 states and 58082 transitions. Word has length 54 [2019-12-07 19:38:26,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:26,370 INFO L462 AbstractCegarLoop]: Abstraction has 18869 states and 58082 transitions. [2019-12-07 19:38:26,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:38:26,370 INFO L276 IsEmpty]: Start isEmpty. Operand 18869 states and 58082 transitions. [2019-12-07 19:38:26,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:26,387 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:26,387 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:26,387 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:26,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:26,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1705682102, now seen corresponding path program 6 times [2019-12-07 19:38:26,388 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:26,388 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847481410] [2019-12-07 19:38:26,388 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:26,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:26,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:26,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847481410] [2019-12-07 19:38:26,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:26,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:38:26,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907845586] [2019-12-07 19:38:26,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:38:26,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:26,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:38:26,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:38:26,435 INFO L87 Difference]: Start difference. First operand 18869 states and 58082 transitions. Second operand 7 states. [2019-12-07 19:38:26,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:26,677 INFO L93 Difference]: Finished difference Result 37155 states and 113751 transitions. [2019-12-07 19:38:26,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 19:38:26,678 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 19:38:26,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:26,718 INFO L225 Difference]: With dead ends: 37155 [2019-12-07 19:38:26,719 INFO L226 Difference]: Without dead ends: 33940 [2019-12-07 19:38:26,719 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=134, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:38:26,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33940 states. [2019-12-07 19:38:27,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33940 to 19005. [2019-12-07 19:38:27,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19005 states. [2019-12-07 19:38:27,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19005 states to 19005 states and 58649 transitions. [2019-12-07 19:38:27,081 INFO L78 Accepts]: Start accepts. Automaton has 19005 states and 58649 transitions. Word has length 54 [2019-12-07 19:38:27,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:27,081 INFO L462 AbstractCegarLoop]: Abstraction has 19005 states and 58649 transitions. [2019-12-07 19:38:27,081 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:38:27,081 INFO L276 IsEmpty]: Start isEmpty. Operand 19005 states and 58649 transitions. [2019-12-07 19:38:27,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:27,098 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:27,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:27,098 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:27,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:27,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1458329250, now seen corresponding path program 1 times [2019-12-07 19:38:27,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:27,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725600915] [2019-12-07 19:38:27,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:27,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:27,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:27,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725600915] [2019-12-07 19:38:27,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:27,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:38:27,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443755139] [2019-12-07 19:38:27,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:38:27,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:27,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:38:27,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:27,121 INFO L87 Difference]: Start difference. First operand 19005 states and 58649 transitions. Second operand 3 states. [2019-12-07 19:38:27,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:27,202 INFO L93 Difference]: Finished difference Result 25612 states and 79619 transitions. [2019-12-07 19:38:27,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:38:27,202 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 19:38:27,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:27,236 INFO L225 Difference]: With dead ends: 25612 [2019-12-07 19:38:27,236 INFO L226 Difference]: Without dead ends: 25612 [2019-12-07 19:38:27,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:27,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25612 states. [2019-12-07 19:38:27,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25612 to 23070. [2019-12-07 19:38:27,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23070 states. [2019-12-07 19:38:27,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23070 states to 23070 states and 72301 transitions. [2019-12-07 19:38:27,583 INFO L78 Accepts]: Start accepts. Automaton has 23070 states and 72301 transitions. Word has length 54 [2019-12-07 19:38:27,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:27,584 INFO L462 AbstractCegarLoop]: Abstraction has 23070 states and 72301 transitions. [2019-12-07 19:38:27,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:38:27,584 INFO L276 IsEmpty]: Start isEmpty. Operand 23070 states and 72301 transitions. [2019-12-07 19:38:27,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:38:27,605 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:27,605 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:27,605 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:27,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:27,605 INFO L82 PathProgramCache]: Analyzing trace with hash -977490268, now seen corresponding path program 7 times [2019-12-07 19:38:27,606 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:27,606 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456441047] [2019-12-07 19:38:27,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:27,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:27,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:27,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [456441047] [2019-12-07 19:38:27,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:27,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:38:27,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1751273416] [2019-12-07 19:38:27,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:38:27,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:27,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:38:27,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:27,636 INFO L87 Difference]: Start difference. First operand 23070 states and 72301 transitions. Second operand 3 states. [2019-12-07 19:38:27,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:27,689 INFO L93 Difference]: Finished difference Result 18041 states and 55434 transitions. [2019-12-07 19:38:27,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:38:27,690 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 19:38:27,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:27,709 INFO L225 Difference]: With dead ends: 18041 [2019-12-07 19:38:27,709 INFO L226 Difference]: Without dead ends: 18041 [2019-12-07 19:38:27,709 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:38:27,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18041 states. [2019-12-07 19:38:27,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18041 to 17413. [2019-12-07 19:38:27,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17413 states. [2019-12-07 19:38:27,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17413 states to 17413 states and 53394 transitions. [2019-12-07 19:38:27,939 INFO L78 Accepts]: Start accepts. Automaton has 17413 states and 53394 transitions. Word has length 54 [2019-12-07 19:38:27,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:27,939 INFO L462 AbstractCegarLoop]: Abstraction has 17413 states and 53394 transitions. [2019-12-07 19:38:27,939 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:38:27,939 INFO L276 IsEmpty]: Start isEmpty. Operand 17413 states and 53394 transitions. [2019-12-07 19:38:27,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 19:38:27,954 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:27,954 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:27,954 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:27,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:27,954 INFO L82 PathProgramCache]: Analyzing trace with hash 1024706095, now seen corresponding path program 1 times [2019-12-07 19:38:27,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:27,955 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1106888144] [2019-12-07 19:38:27,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:27,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:28,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:28,271 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1106888144] [2019-12-07 19:38:28,272 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:28,272 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:38:28,272 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1745944548] [2019-12-07 19:38:28,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:38:28,272 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:28,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:38:28,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:38:28,272 INFO L87 Difference]: Start difference. First operand 17413 states and 53394 transitions. Second operand 15 states. [2019-12-07 19:38:31,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:31,300 INFO L93 Difference]: Finished difference Result 34697 states and 106130 transitions. [2019-12-07 19:38:31,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 19:38:31,301 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 55 [2019-12-07 19:38:31,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:31,336 INFO L225 Difference]: With dead ends: 34697 [2019-12-07 19:38:31,336 INFO L226 Difference]: Without dead ends: 34147 [2019-12-07 19:38:31,338 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1064 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=590, Invalid=3070, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 19:38:31,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34147 states. [2019-12-07 19:38:31,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34147 to 20095. [2019-12-07 19:38:31,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20095 states. [2019-12-07 19:38:31,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20095 states to 20095 states and 61540 transitions. [2019-12-07 19:38:31,697 INFO L78 Accepts]: Start accepts. Automaton has 20095 states and 61540 transitions. Word has length 55 [2019-12-07 19:38:31,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:31,697 INFO L462 AbstractCegarLoop]: Abstraction has 20095 states and 61540 transitions. [2019-12-07 19:38:31,697 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:38:31,697 INFO L276 IsEmpty]: Start isEmpty. Operand 20095 states and 61540 transitions. [2019-12-07 19:38:31,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 19:38:31,715 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:31,715 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:31,716 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:31,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:31,716 INFO L82 PathProgramCache]: Analyzing trace with hash 621327827, now seen corresponding path program 2 times [2019-12-07 19:38:31,716 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:31,716 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339420565] [2019-12-07 19:38:31,716 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:31,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:32,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:32,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339420565] [2019-12-07 19:38:32,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:32,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:38:32,026 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002712884] [2019-12-07 19:38:32,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:38:32,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:32,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:38:32,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:38:32,026 INFO L87 Difference]: Start difference. First operand 20095 states and 61540 transitions. Second operand 15 states. [2019-12-07 19:38:34,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:34,153 INFO L93 Difference]: Finished difference Result 34523 states and 105238 transitions. [2019-12-07 19:38:34,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 19:38:34,153 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 55 [2019-12-07 19:38:34,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:34,187 INFO L225 Difference]: With dead ends: 34523 [2019-12-07 19:38:34,187 INFO L226 Difference]: Without dead ends: 29791 [2019-12-07 19:38:34,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 775 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=500, Invalid=2362, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 19:38:34,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29791 states. [2019-12-07 19:38:34,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29791 to 18073. [2019-12-07 19:38:34,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18073 states. [2019-12-07 19:38:34,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18073 states to 18073 states and 55075 transitions. [2019-12-07 19:38:34,512 INFO L78 Accepts]: Start accepts. Automaton has 18073 states and 55075 transitions. Word has length 55 [2019-12-07 19:38:34,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:34,513 INFO L462 AbstractCegarLoop]: Abstraction has 18073 states and 55075 transitions. [2019-12-07 19:38:34,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:38:34,513 INFO L276 IsEmpty]: Start isEmpty. Operand 18073 states and 55075 transitions. [2019-12-07 19:38:34,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 19:38:34,528 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:34,528 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:34,528 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:34,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:34,529 INFO L82 PathProgramCache]: Analyzing trace with hash -1698448247, now seen corresponding path program 3 times [2019-12-07 19:38:34,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:34,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915514142] [2019-12-07 19:38:34,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:34,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:34,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:34,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915514142] [2019-12-07 19:38:34,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:34,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:38:34,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347820605] [2019-12-07 19:38:34,803 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:38:34,803 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:34,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:38:34,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:38:34,804 INFO L87 Difference]: Start difference. First operand 18073 states and 55075 transitions. Second operand 15 states. [2019-12-07 19:38:38,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:38,762 INFO L93 Difference]: Finished difference Result 31490 states and 95607 transitions. [2019-12-07 19:38:38,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 19:38:38,763 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 55 [2019-12-07 19:38:38,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:38,806 INFO L225 Difference]: With dead ends: 31490 [2019-12-07 19:38:38,806 INFO L226 Difference]: Without dead ends: 29512 [2019-12-07 19:38:38,808 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 860 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=514, Invalid=2566, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 19:38:38,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29512 states. [2019-12-07 19:38:39,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29512 to 18169. [2019-12-07 19:38:39,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18169 states. [2019-12-07 19:38:39,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18169 states to 18169 states and 55347 transitions. [2019-12-07 19:38:39,135 INFO L78 Accepts]: Start accepts. Automaton has 18169 states and 55347 transitions. Word has length 55 [2019-12-07 19:38:39,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:39,135 INFO L462 AbstractCegarLoop]: Abstraction has 18169 states and 55347 transitions. [2019-12-07 19:38:39,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:38:39,135 INFO L276 IsEmpty]: Start isEmpty. Operand 18169 states and 55347 transitions. [2019-12-07 19:38:39,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 19:38:39,151 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:39,151 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:39,151 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:39,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:39,151 INFO L82 PathProgramCache]: Analyzing trace with hash -2043347127, now seen corresponding path program 4 times [2019-12-07 19:38:39,151 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:39,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146338572] [2019-12-07 19:38:39,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:39,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:38:39,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:38:39,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146338572] [2019-12-07 19:38:39,280 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:38:39,280 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:38:39,280 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449743473] [2019-12-07 19:38:39,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:38:39,280 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:38:39,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:38:39,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:38:39,281 INFO L87 Difference]: Start difference. First operand 18169 states and 55347 transitions. Second operand 12 states. [2019-12-07 19:38:39,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:38:39,984 INFO L93 Difference]: Finished difference Result 38796 states and 118239 transitions. [2019-12-07 19:38:39,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 19:38:39,985 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 55 [2019-12-07 19:38:39,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:38:40,016 INFO L225 Difference]: With dead ends: 38796 [2019-12-07 19:38:40,016 INFO L226 Difference]: Without dead ends: 26747 [2019-12-07 19:38:40,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 357 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=280, Invalid=1202, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 19:38:40,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26747 states. [2019-12-07 19:38:40,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26747 to 17416. [2019-12-07 19:38:40,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17416 states. [2019-12-07 19:38:40,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17416 states to 17416 states and 52582 transitions. [2019-12-07 19:38:40,342 INFO L78 Accepts]: Start accepts. Automaton has 17416 states and 52582 transitions. Word has length 55 [2019-12-07 19:38:40,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:38:40,342 INFO L462 AbstractCegarLoop]: Abstraction has 17416 states and 52582 transitions. [2019-12-07 19:38:40,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:38:40,342 INFO L276 IsEmpty]: Start isEmpty. Operand 17416 states and 52582 transitions. [2019-12-07 19:38:40,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 19:38:40,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:38:40,356 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:38:40,356 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:38:40,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:38:40,357 INFO L82 PathProgramCache]: Analyzing trace with hash -1678920401, now seen corresponding path program 5 times [2019-12-07 19:38:40,357 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:38:40,357 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229875772] [2019-12-07 19:38:40,357 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:38:40,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:38:40,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:38:40,420 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:38:40,420 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:38:40,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_61| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_531) (= v_~x$r_buff0_thd1~0_337 0) (= |v_#NULL.offset_6| 0) (= 0 v_~x$w_buff1~0_304) (= (select .cse0 |v_ULTIMATE.start_main_~#t2357~0.base_24|) 0) (= 0 v_~x$r_buff1_thd3~0_123) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2357~0.base_24|) (< 0 |v_#StackHeapBarrier_16|) (= v_~y~0_70 0) (= |v_#valid_59| (store .cse0 |v_ULTIMATE.start_main_~#t2357~0.base_24| 1)) (= v_~x$mem_tmp~0_42 0) (= v_~z~0_50 0) (= 0 v_~x$r_buff0_thd2~0_165) (= v_~x$r_buff1_thd1~0_232 0) (= 0 v_~x$r_buff0_thd3~0_134) (= 0 v_~x$read_delayed~0_6) (= |v_ULTIMATE.start_main_~#t2357~0.offset_18| 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_49) (= 0 v_~x$r_buff1_thd2~0_115) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2357~0.base_24| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2357~0.base_24|) |v_ULTIMATE.start_main_~#t2357~0.offset_18| 0)) |v_#memory_int_23|) (= v_~x$r_buff0_thd0~0_141 0) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_p2_EBX~0_49 0) (= 0 v_~x~0_214) (= v_~__unbuffered_cnt~0_139 0) (= 0 v_~x$w_buff0~0_515) (= v_~weak$$choice2~0_149 0) (= v_~x$flush_delayed~0_77 0) (= 0 v_~weak$$choice0~0_34) (= 0 v_~__unbuffered_p0_EAX~0_48) (= v_~x$r_buff1_thd0~0_132 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t2357~0.base_24| 4) |v_#length_23|) (= 0 v_~x$w_buff0_used~0_899) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_515, ~x$flush_delayed~0=v_~x$flush_delayed~0_77, #NULL.offset=|v_#NULL.offset_6|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_232, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_134, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_44|, ULTIMATE.start_main_~#t2357~0.base=|v_ULTIMATE.start_main_~#t2357~0.base_24|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t2358~0.offset=|v_ULTIMATE.start_main_~#t2358~0.offset_19|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_48, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_49, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_49, ~x$w_buff1~0=v_~x$w_buff1~0_304, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_531, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_115, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_139, ~x~0=v_~x~0_214, ULTIMATE.start_main_~#t2359~0.base=|v_ULTIMATE.start_main_~#t2359~0.base_26|, ULTIMATE.start_main_~#t2359~0.offset=|v_ULTIMATE.start_main_~#t2359~0.offset_19|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_337, ULTIMATE.start_main_~#t2358~0.base=|v_ULTIMATE.start_main_~#t2358~0.base_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_82|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ~x$mem_tmp~0=v_~x$mem_tmp~0_42, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_68|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_38|, ~y~0=v_~y~0_70, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_20|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_132, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_165, #NULL.base=|v_#NULL.base_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_899, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_59|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_50, ULTIMATE.start_main_~#t2357~0.offset=|v_ULTIMATE.start_main_~#t2357~0.offset_18|, ~weak$$choice2~0=v_~weak$$choice2~0_149, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t2357~0.base, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2358~0.offset, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t2359~0.base, ULTIMATE.start_main_~#t2359~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t2358~0.base, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ULTIMATE.start_main_~#t2357~0.offset, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 19:38:40,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L820-1-->L822: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2358~0.base_13|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t2358~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t2358~0.offset_11| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2358~0.base_13| 4) |v_#length_15|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2358~0.base_13|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2358~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2358~0.base_13|) |v_ULTIMATE.start_main_~#t2358~0.offset_11| 1)) |v_#memory_int_15|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t2358~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t2358~0.offset=|v_ULTIMATE.start_main_~#t2358~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2358~0.base=|v_ULTIMATE.start_main_~#t2358~0.base_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2358~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t2358~0.base, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 19:38:40,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L822-1-->L824: Formula: (and (= |v_ULTIMATE.start_main_~#t2359~0.offset_11| 0) (not (= |v_ULTIMATE.start_main_~#t2359~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2359~0.base_13|) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2359~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2359~0.base_13|) |v_ULTIMATE.start_main_~#t2359~0.offset_11| 2))) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2359~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2359~0.base_13| 4)) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2359~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2359~0.offset=|v_ULTIMATE.start_main_~#t2359~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t2359~0.base=|v_ULTIMATE.start_main_~#t2359~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2359~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2359~0.base] because there is no mapped edge [2019-12-07 19:38:40,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] P1ENTRY-->L5-3: Formula: (and (= ~x$w_buff0_used~0_In2096997542 ~x$w_buff1_used~0_Out2096997542) (= 1 ~x$w_buff0~0_Out2096997542) (= 1 ~x$w_buff0_used~0_Out2096997542) (= P1Thread1of1ForFork0_~arg.offset_Out2096997542 |P1Thread1of1ForFork0_#in~arg.offset_In2096997542|) (= ~x$w_buff1~0_Out2096997542 ~x$w_buff0~0_In2096997542) (= P1Thread1of1ForFork0_~arg.base_Out2096997542 |P1Thread1of1ForFork0_#in~arg.base_In2096997542|) (= (ite (not (and (not (= (mod ~x$w_buff0_used~0_Out2096997542 256) 0)) (not (= 0 (mod ~x$w_buff1_used~0_Out2096997542 256))))) 1 0) |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out2096997542|) (= P1Thread1of1ForFork0___VERIFIER_assert_~expression_Out2096997542 |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out2096997542|) (not (= P1Thread1of1ForFork0___VERIFIER_assert_~expression_Out2096997542 0))) InVars {~x$w_buff0~0=~x$w_buff0~0_In2096997542, P1Thread1of1ForFork0_#in~arg.base=|P1Thread1of1ForFork0_#in~arg.base_In2096997542|, P1Thread1of1ForFork0_#in~arg.offset=|P1Thread1of1ForFork0_#in~arg.offset_In2096997542|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096997542} OutVars{~x$w_buff0~0=~x$w_buff0~0_Out2096997542, P1Thread1of1ForFork0___VERIFIER_assert_~expression=P1Thread1of1ForFork0___VERIFIER_assert_~expression_Out2096997542, P1Thread1of1ForFork0_~arg.offset=P1Thread1of1ForFork0_~arg.offset_Out2096997542, P1Thread1of1ForFork0_~arg.base=P1Thread1of1ForFork0_~arg.base_Out2096997542, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out2096997542|, P1Thread1of1ForFork0_#in~arg.base=|P1Thread1of1ForFork0_#in~arg.base_In2096997542|, ~x$w_buff1~0=~x$w_buff1~0_Out2096997542, P1Thread1of1ForFork0_#in~arg.offset=|P1Thread1of1ForFork0_#in~arg.offset_In2096997542|, ~x$w_buff1_used~0=~x$w_buff1_used~0_Out2096997542, ~x$w_buff0_used~0=~x$w_buff0_used~0_Out2096997542} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 19:38:40,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L797-2-->L797-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In369661034 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In369661034 256) 0))) (or (and (or .cse0 .cse1) (= ~x~0_In369661034 |P2Thread1of1ForFork1_#t~ite32_Out369661034|)) (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In369661034 |P2Thread1of1ForFork1_#t~ite32_Out369661034|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In369661034, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x~0=~x~0_In369661034} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out369661034|, ~x$w_buff1~0=~x$w_buff1~0_In369661034, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x~0=~x~0_In369661034} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 19:38:40,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L797-4-->L798: Formula: (= v_~x~0_64 |v_P2Thread1of1ForFork1_#t~ite32_20|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_20|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_19|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_27|, ~x~0=v_~x~0_64} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 19:38:40,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1269456779 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1269456779 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite34_Out1269456779|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1269456779 |P2Thread1of1ForFork1_#t~ite34_Out1269456779|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1269456779, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1269456779} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out1269456779|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1269456779, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1269456779} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 19:38:40,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L778-->L778-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1375124403 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1375124403 256) 0))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out1375124403|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In1375124403 |P1Thread1of1ForFork0_#t~ite28_Out1375124403|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1375124403, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1375124403, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out1375124403|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 19:38:40,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1218618018 256))) (.cse2 (= (mod ~x$r_buff1_thd2~0_In1218618018 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In1218618018 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1218618018 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite29_Out1218618018| ~x$w_buff1_used~0_In1218618018)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork0_#t~ite29_Out1218618018|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1218618018, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1218618018, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1218618018, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1218618018} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1218618018, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1218618018, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1218618018, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1218618018|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1218618018} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:38:40,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L780-->L781: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out763618595 ~x$r_buff0_thd2~0_In763618595)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In763618595 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In763618595 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~x$r_buff0_thd2~0_Out763618595 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out763618595|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 19:38:40,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L781-->L781-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd2~0_In-791148359 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-791148359 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-791148359 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-791148359 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out-791148359| ~x$r_buff1_thd2~0_In-791148359)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-791148359|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-791148359, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-791148359, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-791148359} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-791148359|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-791148359, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-791148359, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-791148359} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:38:40,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L781-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_55 |v_P1Thread1of1ForFork0_#t~ite31_36|) (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_35|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 19:38:40,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1245739146 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite12_Out-1245739146| ~x$w_buff1~0_In-1245739146) (= |P0Thread1of1ForFork2_#t~ite11_In-1245739146| |P0Thread1of1ForFork2_#t~ite11_Out-1245739146|) (not .cse0)) (and (= |P0Thread1of1ForFork2_#t~ite11_Out-1245739146| ~x$w_buff1~0_In-1245739146) .cse0 (= |P0Thread1of1ForFork2_#t~ite12_Out-1245739146| |P0Thread1of1ForFork2_#t~ite11_Out-1245739146|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1245739146 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-1245739146 256) 0)) (= (mod ~x$w_buff0_used~0_In-1245739146 256) 0) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-1245739146 256)))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1245739146, ~x$w_buff1~0=~x$w_buff1~0_In-1245739146, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1245739146, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1245739146, ~weak$$choice2~0=~weak$$choice2~0_In-1245739146, P0Thread1of1ForFork2_#t~ite11=|P0Thread1of1ForFork2_#t~ite11_In-1245739146|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1245739146} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1245739146, ~x$w_buff1~0=~x$w_buff1~0_In-1245739146, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1245739146, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1245739146, ~weak$$choice2~0=~weak$$choice2~0_In-1245739146, P0Thread1of1ForFork2_#t~ite12=|P0Thread1of1ForFork2_#t~ite12_Out-1245739146|, P0Thread1of1ForFork2_#t~ite11=|P0Thread1of1ForFork2_#t~ite11_Out-1245739146|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1245739146} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite12, P0Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:38:40,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L744-->L744-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-392446159 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite14_In-392446159| |P0Thread1of1ForFork2_#t~ite14_Out-392446159|) (= ~x$w_buff0_used~0_In-392446159 |P0Thread1of1ForFork2_#t~ite15_Out-392446159|) (not .cse0)) (and .cse0 (= ~x$w_buff0_used~0_In-392446159 |P0Thread1of1ForFork2_#t~ite14_Out-392446159|) (= |P0Thread1of1ForFork2_#t~ite14_Out-392446159| |P0Thread1of1ForFork2_#t~ite15_Out-392446159|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-392446159 256)))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-392446159 256))) (= 0 (mod ~x$w_buff0_used~0_In-392446159 256)) (and .cse1 (= (mod ~x$w_buff1_used~0_In-392446159 256) 0))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-392446159, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-392446159, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-392446159, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_In-392446159|, ~weak$$choice2~0=~weak$$choice2~0_In-392446159, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-392446159} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-392446159, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-392446159, P0Thread1of1ForFork2_#t~ite15=|P0Thread1of1ForFork2_#t~ite15_Out-392446159|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-392446159, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_Out-392446159|, ~weak$$choice2~0=~weak$$choice2~0_In-392446159, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-392446159} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite15, P0Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:38:40,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2065284406 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2065284406 256) 0))) (or (and .cse1 (= (mod ~x$w_buff1_used~0_In2065284406 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In2065284406 256)) (and (= (mod ~x$r_buff1_thd1~0_In2065284406 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite17_Out2065284406| ~x$w_buff1_used~0_In2065284406) (= |P0Thread1of1ForFork2_#t~ite17_Out2065284406| |P0Thread1of1ForFork2_#t~ite18_Out2065284406|)) (and (= |P0Thread1of1ForFork2_#t~ite18_Out2065284406| ~x$w_buff1_used~0_In2065284406) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite17_In2065284406| |P0Thread1of1ForFork2_#t~ite17_Out2065284406|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2065284406, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In2065284406|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2065284406, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2065284406, ~weak$$choice2~0=~weak$$choice2~0_In2065284406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2065284406} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2065284406, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out2065284406|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out2065284406|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2065284406, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2065284406, ~weak$$choice2~0=~weak$$choice2~0_In2065284406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2065284406} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 19:38:40,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L746-->L747-8: Formula: (and (= v_~x$r_buff1_thd1~0_214 |v_P0Thread1of1ForFork2_#t~ite24_33|) (= |v_P0Thread1of1ForFork2_#t~ite22_34| |v_P0Thread1of1ForFork2_#t~ite22_33|) (= v_~x$r_buff0_thd1~0_321 v_~x$r_buff0_thd1~0_320) (= |v_P0Thread1of1ForFork2_#t~ite23_38| |v_P0Thread1of1ForFork2_#t~ite23_37|) (not (= 0 (mod v_~weak$$choice2~0_142 256)))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_321, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_214, ~weak$$choice2~0=v_~weak$$choice2~0_142, P0Thread1of1ForFork2_#t~ite23=|v_P0Thread1of1ForFork2_#t~ite23_38|, P0Thread1of1ForFork2_#t~ite22=|v_P0Thread1of1ForFork2_#t~ite22_34|} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_29|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_320, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_214, P0Thread1of1ForFork2_#t~ite24=|v_P0Thread1of1ForFork2_#t~ite24_33|, ~weak$$choice2~0=v_~weak$$choice2~0_142, P0Thread1of1ForFork2_#t~ite23=|v_P0Thread1of1ForFork2_#t~ite23_37|, P0Thread1of1ForFork2_#t~ite22=|v_P0Thread1of1ForFork2_#t~ite22_33|, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_13|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23, P0Thread1of1ForFork2_#t~ite22, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 19:38:40,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L749-->L757: Formula: (and (= v_~x~0_54 v_~x$mem_tmp~0_11) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= (+ v_~__unbuffered_cnt~0_42 1) v_~__unbuffered_cnt~0_41) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~x$mem_tmp~0=v_~x$mem_tmp~0_11} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, ~x$mem_tmp~0=v_~x$mem_tmp~0_11, ~x~0=v_~x~0_54} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 19:38:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-167468437 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-167468437 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-167468437 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-167468437 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out-167468437| 0)) (and (= ~x$w_buff1_used~0_In-167468437 |P2Thread1of1ForFork1_#t~ite35_Out-167468437|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-167468437|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 19:38:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1696084617 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1696084617 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1696084617| ~x$r_buff0_thd3~0_In-1696084617) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1696084617| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1696084617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1696084617} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1696084617|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1696084617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1696084617} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 19:38:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1858809408 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1858809408 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In1858809408 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1858809408 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite37_Out1858809408|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite37_Out1858809408| ~x$r_buff1_thd3~0_In1858809408) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1858809408, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1858809408, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1858809408|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1858809408, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1858809408, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 19:38:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L801-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_85 1) v_~__unbuffered_cnt~0_84) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_72 |v_P2Thread1of1ForFork1_#t~ite37_38|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_85} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_37|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_72, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 19:38:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L824-1-->L830: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_39) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:38:40,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L830-2-->L830-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In1660523909 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1660523909 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite41_Out1660523909| ~x~0_In1660523909)) (and (= ~x$w_buff1~0_In1660523909 |ULTIMATE.start_main_#t~ite41_Out1660523909|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1660523909, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1660523909, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1660523909, ~x~0=~x~0_In1660523909} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1660523909|, ~x$w_buff1~0=~x$w_buff1~0_In1660523909, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1660523909, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1660523909, ~x~0=~x~0_In1660523909} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 19:38:40,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L830-4-->L831: Formula: (= v_~x~0_17 |v_ULTIMATE.start_main_#t~ite41_10|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_13|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 19:38:40,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In590419697 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In590419697 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out590419697| ~x$w_buff0_used~0_In590419697) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out590419697|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In590419697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In590419697} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In590419697, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out590419697|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In590419697} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 19:38:40,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L832-->L832-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In717503525 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In717503525 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd0~0_In717503525 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In717503525 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out717503525| ~x$w_buff1_used~0_In717503525) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite44_Out717503525| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In717503525, ~x$w_buff1_used~0=~x$w_buff1_used~0_In717503525, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In717503525, ~x$w_buff0_used~0=~x$w_buff0_used~0_In717503525} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In717503525, ~x$w_buff1_used~0=~x$w_buff1_used~0_In717503525, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In717503525, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out717503525|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In717503525} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 19:38:40,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In85697320 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In85697320 256) 0))) (or (and (= ~x$r_buff0_thd0~0_In85697320 |ULTIMATE.start_main_#t~ite45_Out85697320|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out85697320| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out85697320|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 19:38:40,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In542650917 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In542650917 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In542650917 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In542650917 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out542650917|)) (and (= ~x$r_buff1_thd0~0_In542650917 |ULTIMATE.start_main_#t~ite46_Out542650917|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In542650917, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x$w_buff0_used~0=~x$w_buff0_used~0_In542650917} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In542650917, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out542650917|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x$w_buff0_used~0=~x$w_buff0_used~0_In542650917} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 19:38:40,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_16 256)) (= v_~x$r_buff1_thd0~0_80 |v_ULTIMATE.start_main_#t~ite46_35|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= 0 v_~__unbuffered_p0_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_20 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_20, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_20, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_80, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:38:40,478 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:38:40 BasicIcfg [2019-12-07 19:38:40,478 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:38:40,479 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:38:40,479 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:38:40,479 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:38:40,479 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:37:38" (3/4) ... [2019-12-07 19:38:40,480 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:38:40,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_61| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_531) (= v_~x$r_buff0_thd1~0_337 0) (= |v_#NULL.offset_6| 0) (= 0 v_~x$w_buff1~0_304) (= (select .cse0 |v_ULTIMATE.start_main_~#t2357~0.base_24|) 0) (= 0 v_~x$r_buff1_thd3~0_123) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2357~0.base_24|) (< 0 |v_#StackHeapBarrier_16|) (= v_~y~0_70 0) (= |v_#valid_59| (store .cse0 |v_ULTIMATE.start_main_~#t2357~0.base_24| 1)) (= v_~x$mem_tmp~0_42 0) (= v_~z~0_50 0) (= 0 v_~x$r_buff0_thd2~0_165) (= v_~x$r_buff1_thd1~0_232 0) (= 0 v_~x$r_buff0_thd3~0_134) (= 0 v_~x$read_delayed~0_6) (= |v_ULTIMATE.start_main_~#t2357~0.offset_18| 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_49) (= 0 v_~x$r_buff1_thd2~0_115) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2357~0.base_24| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2357~0.base_24|) |v_ULTIMATE.start_main_~#t2357~0.offset_18| 0)) |v_#memory_int_23|) (= v_~x$r_buff0_thd0~0_141 0) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_p2_EBX~0_49 0) (= 0 v_~x~0_214) (= v_~__unbuffered_cnt~0_139 0) (= 0 v_~x$w_buff0~0_515) (= v_~weak$$choice2~0_149 0) (= v_~x$flush_delayed~0_77 0) (= 0 v_~weak$$choice0~0_34) (= 0 v_~__unbuffered_p0_EAX~0_48) (= v_~x$r_buff1_thd0~0_132 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t2357~0.base_24| 4) |v_#length_23|) (= 0 v_~x$w_buff0_used~0_899) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_515, ~x$flush_delayed~0=v_~x$flush_delayed~0_77, #NULL.offset=|v_#NULL.offset_6|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_232, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_134, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_44|, ULTIMATE.start_main_~#t2357~0.base=|v_ULTIMATE.start_main_~#t2357~0.base_24|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t2358~0.offset=|v_ULTIMATE.start_main_~#t2358~0.offset_19|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_48, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_49, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_49, ~x$w_buff1~0=v_~x$w_buff1~0_304, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_531, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_115, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_139, ~x~0=v_~x~0_214, ULTIMATE.start_main_~#t2359~0.base=|v_ULTIMATE.start_main_~#t2359~0.base_26|, ULTIMATE.start_main_~#t2359~0.offset=|v_ULTIMATE.start_main_~#t2359~0.offset_19|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_337, ULTIMATE.start_main_~#t2358~0.base=|v_ULTIMATE.start_main_~#t2358~0.base_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_82|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ~x$mem_tmp~0=v_~x$mem_tmp~0_42, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_68|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_38|, ~y~0=v_~y~0_70, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_20|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_132, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_165, #NULL.base=|v_#NULL.base_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_899, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_59|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_50, ULTIMATE.start_main_~#t2357~0.offset=|v_ULTIMATE.start_main_~#t2357~0.offset_18|, ~weak$$choice2~0=v_~weak$$choice2~0_149, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t2357~0.base, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2358~0.offset, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t2359~0.base, ULTIMATE.start_main_~#t2359~0.offset, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t2358~0.base, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ULTIMATE.start_main_~#t2357~0.offset, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 19:38:40,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L820-1-->L822: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2358~0.base_13|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t2358~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t2358~0.offset_11| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2358~0.base_13| 4) |v_#length_15|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2358~0.base_13|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2358~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2358~0.base_13|) |v_ULTIMATE.start_main_~#t2358~0.offset_11| 1)) |v_#memory_int_15|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t2358~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t2358~0.offset=|v_ULTIMATE.start_main_~#t2358~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2358~0.base=|v_ULTIMATE.start_main_~#t2358~0.base_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2358~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t2358~0.base, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 19:38:40,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L822-1-->L824: Formula: (and (= |v_ULTIMATE.start_main_~#t2359~0.offset_11| 0) (not (= |v_ULTIMATE.start_main_~#t2359~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2359~0.base_13|) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2359~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2359~0.base_13|) |v_ULTIMATE.start_main_~#t2359~0.offset_11| 2))) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2359~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2359~0.base_13| 4)) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2359~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2359~0.offset=|v_ULTIMATE.start_main_~#t2359~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t2359~0.base=|v_ULTIMATE.start_main_~#t2359~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2359~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2359~0.base] because there is no mapped edge [2019-12-07 19:38:40,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] P1ENTRY-->L5-3: Formula: (and (= ~x$w_buff0_used~0_In2096997542 ~x$w_buff1_used~0_Out2096997542) (= 1 ~x$w_buff0~0_Out2096997542) (= 1 ~x$w_buff0_used~0_Out2096997542) (= P1Thread1of1ForFork0_~arg.offset_Out2096997542 |P1Thread1of1ForFork0_#in~arg.offset_In2096997542|) (= ~x$w_buff1~0_Out2096997542 ~x$w_buff0~0_In2096997542) (= P1Thread1of1ForFork0_~arg.base_Out2096997542 |P1Thread1of1ForFork0_#in~arg.base_In2096997542|) (= (ite (not (and (not (= (mod ~x$w_buff0_used~0_Out2096997542 256) 0)) (not (= 0 (mod ~x$w_buff1_used~0_Out2096997542 256))))) 1 0) |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out2096997542|) (= P1Thread1of1ForFork0___VERIFIER_assert_~expression_Out2096997542 |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out2096997542|) (not (= P1Thread1of1ForFork0___VERIFIER_assert_~expression_Out2096997542 0))) InVars {~x$w_buff0~0=~x$w_buff0~0_In2096997542, P1Thread1of1ForFork0_#in~arg.base=|P1Thread1of1ForFork0_#in~arg.base_In2096997542|, P1Thread1of1ForFork0_#in~arg.offset=|P1Thread1of1ForFork0_#in~arg.offset_In2096997542|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096997542} OutVars{~x$w_buff0~0=~x$w_buff0~0_Out2096997542, P1Thread1of1ForFork0___VERIFIER_assert_~expression=P1Thread1of1ForFork0___VERIFIER_assert_~expression_Out2096997542, P1Thread1of1ForFork0_~arg.offset=P1Thread1of1ForFork0_~arg.offset_Out2096997542, P1Thread1of1ForFork0_~arg.base=P1Thread1of1ForFork0_~arg.base_Out2096997542, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out2096997542|, P1Thread1of1ForFork0_#in~arg.base=|P1Thread1of1ForFork0_#in~arg.base_In2096997542|, ~x$w_buff1~0=~x$w_buff1~0_Out2096997542, P1Thread1of1ForFork0_#in~arg.offset=|P1Thread1of1ForFork0_#in~arg.offset_In2096997542|, ~x$w_buff1_used~0=~x$w_buff1_used~0_Out2096997542, ~x$w_buff0_used~0=~x$w_buff0_used~0_Out2096997542} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 19:38:40,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L797-2-->L797-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In369661034 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In369661034 256) 0))) (or (and (or .cse0 .cse1) (= ~x~0_In369661034 |P2Thread1of1ForFork1_#t~ite32_Out369661034|)) (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In369661034 |P2Thread1of1ForFork1_#t~ite32_Out369661034|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In369661034, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x~0=~x~0_In369661034} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out369661034|, ~x$w_buff1~0=~x$w_buff1~0_In369661034, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x~0=~x~0_In369661034} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 19:38:40,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L797-4-->L798: Formula: (= v_~x~0_64 |v_P2Thread1of1ForFork1_#t~ite32_20|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_20|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_19|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_27|, ~x~0=v_~x~0_64} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 19:38:40,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1269456779 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1269456779 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite34_Out1269456779|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1269456779 |P2Thread1of1ForFork1_#t~ite34_Out1269456779|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1269456779, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1269456779} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out1269456779|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1269456779, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1269456779} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 19:38:40,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L778-->L778-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1375124403 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1375124403 256) 0))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out1375124403|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In1375124403 |P1Thread1of1ForFork0_#t~ite28_Out1375124403|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1375124403, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1375124403, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out1375124403|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 19:38:40,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1218618018 256))) (.cse2 (= (mod ~x$r_buff1_thd2~0_In1218618018 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In1218618018 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1218618018 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite29_Out1218618018| ~x$w_buff1_used~0_In1218618018)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork0_#t~ite29_Out1218618018|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1218618018, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1218618018, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1218618018, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1218618018} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1218618018, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1218618018, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1218618018, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1218618018|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1218618018} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:38:40,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L780-->L781: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out763618595 ~x$r_buff0_thd2~0_In763618595)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In763618595 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In763618595 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~x$r_buff0_thd2~0_Out763618595 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out763618595|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 19:38:40,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L781-->L781-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd2~0_In-791148359 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-791148359 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-791148359 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-791148359 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out-791148359| ~x$r_buff1_thd2~0_In-791148359)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-791148359|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-791148359, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-791148359, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-791148359} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-791148359|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-791148359, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-791148359, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-791148359} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:38:40,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L781-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_55 |v_P1Thread1of1ForFork0_#t~ite31_36|) (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_35|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 19:38:40,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1245739146 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite12_Out-1245739146| ~x$w_buff1~0_In-1245739146) (= |P0Thread1of1ForFork2_#t~ite11_In-1245739146| |P0Thread1of1ForFork2_#t~ite11_Out-1245739146|) (not .cse0)) (and (= |P0Thread1of1ForFork2_#t~ite11_Out-1245739146| ~x$w_buff1~0_In-1245739146) .cse0 (= |P0Thread1of1ForFork2_#t~ite12_Out-1245739146| |P0Thread1of1ForFork2_#t~ite11_Out-1245739146|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1245739146 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-1245739146 256) 0)) (= (mod ~x$w_buff0_used~0_In-1245739146 256) 0) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-1245739146 256)))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1245739146, ~x$w_buff1~0=~x$w_buff1~0_In-1245739146, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1245739146, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1245739146, ~weak$$choice2~0=~weak$$choice2~0_In-1245739146, P0Thread1of1ForFork2_#t~ite11=|P0Thread1of1ForFork2_#t~ite11_In-1245739146|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1245739146} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1245739146, ~x$w_buff1~0=~x$w_buff1~0_In-1245739146, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1245739146, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1245739146, ~weak$$choice2~0=~weak$$choice2~0_In-1245739146, P0Thread1of1ForFork2_#t~ite12=|P0Thread1of1ForFork2_#t~ite12_Out-1245739146|, P0Thread1of1ForFork2_#t~ite11=|P0Thread1of1ForFork2_#t~ite11_Out-1245739146|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1245739146} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite12, P0Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:38:40,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L744-->L744-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-392446159 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite14_In-392446159| |P0Thread1of1ForFork2_#t~ite14_Out-392446159|) (= ~x$w_buff0_used~0_In-392446159 |P0Thread1of1ForFork2_#t~ite15_Out-392446159|) (not .cse0)) (and .cse0 (= ~x$w_buff0_used~0_In-392446159 |P0Thread1of1ForFork2_#t~ite14_Out-392446159|) (= |P0Thread1of1ForFork2_#t~ite14_Out-392446159| |P0Thread1of1ForFork2_#t~ite15_Out-392446159|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-392446159 256)))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-392446159 256))) (= 0 (mod ~x$w_buff0_used~0_In-392446159 256)) (and .cse1 (= (mod ~x$w_buff1_used~0_In-392446159 256) 0))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-392446159, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-392446159, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-392446159, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_In-392446159|, ~weak$$choice2~0=~weak$$choice2~0_In-392446159, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-392446159} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-392446159, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-392446159, P0Thread1of1ForFork2_#t~ite15=|P0Thread1of1ForFork2_#t~ite15_Out-392446159|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-392446159, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_Out-392446159|, ~weak$$choice2~0=~weak$$choice2~0_In-392446159, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-392446159} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite15, P0Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:38:40,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2065284406 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2065284406 256) 0))) (or (and .cse1 (= (mod ~x$w_buff1_used~0_In2065284406 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In2065284406 256)) (and (= (mod ~x$r_buff1_thd1~0_In2065284406 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite17_Out2065284406| ~x$w_buff1_used~0_In2065284406) (= |P0Thread1of1ForFork2_#t~ite17_Out2065284406| |P0Thread1of1ForFork2_#t~ite18_Out2065284406|)) (and (= |P0Thread1of1ForFork2_#t~ite18_Out2065284406| ~x$w_buff1_used~0_In2065284406) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite17_In2065284406| |P0Thread1of1ForFork2_#t~ite17_Out2065284406|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2065284406, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In2065284406|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2065284406, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2065284406, ~weak$$choice2~0=~weak$$choice2~0_In2065284406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2065284406} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2065284406, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out2065284406|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out2065284406|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2065284406, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2065284406, ~weak$$choice2~0=~weak$$choice2~0_In2065284406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2065284406} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 19:38:40,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L746-->L747-8: Formula: (and (= v_~x$r_buff1_thd1~0_214 |v_P0Thread1of1ForFork2_#t~ite24_33|) (= |v_P0Thread1of1ForFork2_#t~ite22_34| |v_P0Thread1of1ForFork2_#t~ite22_33|) (= v_~x$r_buff0_thd1~0_321 v_~x$r_buff0_thd1~0_320) (= |v_P0Thread1of1ForFork2_#t~ite23_38| |v_P0Thread1of1ForFork2_#t~ite23_37|) (not (= 0 (mod v_~weak$$choice2~0_142 256)))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_321, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_214, ~weak$$choice2~0=v_~weak$$choice2~0_142, P0Thread1of1ForFork2_#t~ite23=|v_P0Thread1of1ForFork2_#t~ite23_38|, P0Thread1of1ForFork2_#t~ite22=|v_P0Thread1of1ForFork2_#t~ite22_34|} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_29|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_320, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_25|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_214, P0Thread1of1ForFork2_#t~ite24=|v_P0Thread1of1ForFork2_#t~ite24_33|, ~weak$$choice2~0=v_~weak$$choice2~0_142, P0Thread1of1ForFork2_#t~ite23=|v_P0Thread1of1ForFork2_#t~ite23_37|, P0Thread1of1ForFork2_#t~ite22=|v_P0Thread1of1ForFork2_#t~ite22_33|, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_13|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23, P0Thread1of1ForFork2_#t~ite22, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 19:38:40,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L749-->L757: Formula: (and (= v_~x~0_54 v_~x$mem_tmp~0_11) (not (= 0 (mod v_~x$flush_delayed~0_20 256))) (= (+ v_~__unbuffered_cnt~0_42 1) v_~__unbuffered_cnt~0_41) (= v_~x$flush_delayed~0_19 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_20, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~x$mem_tmp~0=v_~x$mem_tmp~0_11} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, ~x$mem_tmp~0=v_~x$mem_tmp~0_11, ~x~0=v_~x~0_54} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 19:38:40,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-167468437 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-167468437 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-167468437 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-167468437 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out-167468437| 0)) (and (= ~x$w_buff1_used~0_In-167468437 |P2Thread1of1ForFork1_#t~ite35_Out-167468437|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-167468437|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 19:38:40,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1696084617 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1696084617 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1696084617| ~x$r_buff0_thd3~0_In-1696084617) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1696084617| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1696084617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1696084617} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1696084617|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1696084617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1696084617} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 19:38:40,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1858809408 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1858809408 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In1858809408 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1858809408 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite37_Out1858809408|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite37_Out1858809408| ~x$r_buff1_thd3~0_In1858809408) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1858809408, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1858809408, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1858809408|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1858809408, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1858809408, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 19:38:40,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L801-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_85 1) v_~__unbuffered_cnt~0_84) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_72 |v_P2Thread1of1ForFork1_#t~ite37_38|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_85} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_37|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_72, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 19:38:40,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L824-1-->L830: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_39) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:38:40,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L830-2-->L830-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In1660523909 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1660523909 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite41_Out1660523909| ~x~0_In1660523909)) (and (= ~x$w_buff1~0_In1660523909 |ULTIMATE.start_main_#t~ite41_Out1660523909|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1660523909, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1660523909, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1660523909, ~x~0=~x~0_In1660523909} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1660523909|, ~x$w_buff1~0=~x$w_buff1~0_In1660523909, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1660523909, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1660523909, ~x~0=~x~0_In1660523909} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 19:38:40,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L830-4-->L831: Formula: (= v_~x~0_17 |v_ULTIMATE.start_main_#t~ite41_10|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_13|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 19:38:40,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In590419697 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In590419697 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out590419697| ~x$w_buff0_used~0_In590419697) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out590419697|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In590419697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In590419697} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In590419697, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out590419697|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In590419697} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 19:38:40,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L832-->L832-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In717503525 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In717503525 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd0~0_In717503525 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In717503525 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out717503525| ~x$w_buff1_used~0_In717503525) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite44_Out717503525| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In717503525, ~x$w_buff1_used~0=~x$w_buff1_used~0_In717503525, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In717503525, ~x$w_buff0_used~0=~x$w_buff0_used~0_In717503525} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In717503525, ~x$w_buff1_used~0=~x$w_buff1_used~0_In717503525, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In717503525, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out717503525|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In717503525} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 19:38:40,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In85697320 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In85697320 256) 0))) (or (and (= ~x$r_buff0_thd0~0_In85697320 |ULTIMATE.start_main_#t~ite45_Out85697320|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out85697320| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out85697320|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 19:38:40,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L834-->L834-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In542650917 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In542650917 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In542650917 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In542650917 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out542650917|)) (and (= ~x$r_buff1_thd0~0_In542650917 |ULTIMATE.start_main_#t~ite46_Out542650917|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In542650917, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x$w_buff0_used~0=~x$w_buff0_used~0_In542650917} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In542650917, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out542650917|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x$w_buff0_used~0=~x$w_buff0_used~0_In542650917} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 19:38:40,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_16 256)) (= v_~x$r_buff1_thd0~0_80 |v_ULTIMATE.start_main_#t~ite46_35|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= 0 v_~__unbuffered_p0_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_20 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_20, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_20, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_80, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:38:40,539 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_47a7c53c-809e-43eb-9e72-4165d75ee2ef/bin/utaipan/witness.graphml [2019-12-07 19:38:40,539 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:38:40,540 INFO L168 Benchmark]: Toolchain (without parser) took 63235.16 ms. Allocated memory was 1.0 GB in the beginning and 5.4 GB in the end (delta: 4.4 GB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -191.0 MB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 19:38:40,541 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:38:40,541 INFO L168 Benchmark]: CACSL2BoogieTranslator took 362.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -123.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:38:40,541 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:38:40,541 INFO L168 Benchmark]: Boogie Preprocessor took 25.06 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:38:40,542 INFO L168 Benchmark]: RCFGBuilder took 386.71 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:38:40,542 INFO L168 Benchmark]: TraceAbstraction took 62361.21 ms. Allocated memory was 1.1 GB in the beginning and 5.4 GB in the end (delta: 4.3 GB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -145.8 MB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 19:38:40,542 INFO L168 Benchmark]: Witness Printer took 60.66 ms. Allocated memory is still 5.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:38:40,543 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 362.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -123.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.06 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 386.71 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 62361.21 ms. Allocated memory was 1.1 GB in the beginning and 5.4 GB in the end (delta: 4.3 GB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -145.8 MB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 60.66 ms. Allocated memory is still 5.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 18.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 164 ProgramPointsBefore, 83 ProgramPointsAfterwards, 195 TransitionsBefore, 89 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 27 ConcurrentYvCompositions, 29 ChoiceCompositions, 6837 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 60 SemBasedMoverChecksPositive, 262 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 66430 CheckedPairsTotal, 109 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L820] FCALL, FORK 0 pthread_create(&t2357, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L822] FCALL, FORK 0 pthread_create(&t2358, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L767] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L768] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L769] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L770] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L771] 2 x$r_buff0_thd2 = (_Bool)1 [L774] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L777] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L824] FCALL, FORK 0 pthread_create(&t2359, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L791] 3 __unbuffered_p2_EAX = y [L794] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L797] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L732] 1 z = 1 [L737] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L738] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L739] 1 x$flush_delayed = weak$$choice2 [L740] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L741] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L777] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L778] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L779] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L741] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L742] EXPR 1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L742] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L743] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L744] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L745] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L747] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L748] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L798] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L799] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L800] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L830] 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L831] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L832] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L833] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 62.2s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 23.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5803 SDtfs, 8730 SDslu, 21010 SDs, 0 SdLazy, 18934 SolverSat, 523 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 465 GetRequests, 42 SyntacticMatches, 34 SemanticMatches, 389 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3800 ImplicationChecksByTransitivity, 5.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=115962occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 22.5s AutomataMinimizationTime, 26 MinimizatonAttempts, 222529 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 1090 NumberOfCodeBlocks, 1090 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 1009 ConstructedInterpolants, 0 QuantifiedInterpolants, 270635 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...