./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe028_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe028_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 40a4c4983f467c89f9ad0bd81df3d7c2280ebc02 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:42:44,861 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:42:44,863 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:42:44,870 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:42:44,870 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:42:44,871 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:42:44,872 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:42:44,873 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:42:44,874 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:42:44,875 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:42:44,876 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:42:44,876 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:42:44,877 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:42:44,877 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:42:44,878 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:42:44,879 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:42:44,879 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:42:44,880 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:42:44,881 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:42:44,883 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:42:44,884 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:42:44,884 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:42:44,885 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:42:44,885 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:42:44,887 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:42:44,887 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:42:44,887 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:42:44,888 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:42:44,888 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:42:44,889 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:42:44,889 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:42:44,889 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:42:44,890 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:42:44,890 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:42:44,891 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:42:44,891 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:42:44,891 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:42:44,892 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:42:44,892 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:42:44,892 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:42:44,893 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:42:44,893 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 15:42:44,903 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:42:44,903 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:42:44,904 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 15:42:44,904 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 15:42:44,904 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 15:42:44,904 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 15:42:44,904 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 15:42:44,905 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 15:42:44,905 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 15:42:44,905 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 15:42:44,905 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 15:42:44,905 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 15:42:44,905 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 15:42:44,905 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 15:42:44,906 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 15:42:44,906 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:42:44,906 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:42:44,906 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:42:44,906 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:42:44,907 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:42:44,908 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:42:44,908 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:42:44,908 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:42:44,908 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:42:44,908 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:42:44,908 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:42:44,908 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:42:44,908 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 15:42:44,909 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:42:44,909 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:42:44,909 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:42:44,909 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 15:42:44,909 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 40a4c4983f467c89f9ad0bd81df3d7c2280ebc02 [2019-12-07 15:42:45,006 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:42:45,016 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:42:45,019 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:42:45,020 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:42:45,021 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:42:45,021 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe028_rmo.oepc.i [2019-12-07 15:42:45,065 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/data/250dfcf05/0865bdf9504f4fa18129859a3297fd4d/FLAG00d9009c5 [2019-12-07 15:42:45,437 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:42:45,437 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/sv-benchmarks/c/pthread-wmm/safe028_rmo.oepc.i [2019-12-07 15:42:45,451 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/data/250dfcf05/0865bdf9504f4fa18129859a3297fd4d/FLAG00d9009c5 [2019-12-07 15:42:45,462 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/data/250dfcf05/0865bdf9504f4fa18129859a3297fd4d [2019-12-07 15:42:45,464 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:42:45,465 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:42:45,466 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:42:45,466 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:42:45,468 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:42:45,469 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,471 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45, skipping insertion in model container [2019-12-07 15:42:45,471 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,476 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:42:45,514 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:42:45,778 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:42:45,786 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:42:45,833 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:42:45,883 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:42:45,883 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45 WrapperNode [2019-12-07 15:42:45,883 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:42:45,883 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:42:45,883 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:42:45,884 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:42:45,889 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,903 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,920 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:42:45,920 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:42:45,920 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:42:45,920 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:42:45,927 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,927 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,931 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,931 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,940 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,943 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,946 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... [2019-12-07 15:42:45,950 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:42:45,950 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:42:45,950 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:42:45,950 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:42:45,951 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:42:45,993 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-07 15:42:45,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:42:45,993 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:42:45,994 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:42:45,994 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:42:45,994 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:42:45,994 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:42:45,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:42:45,996 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:42:46,410 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:42:46,410 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-07 15:42:46,411 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:42:46 BoogieIcfgContainer [2019-12-07 15:42:46,411 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:42:46,412 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:42:46,412 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:42:46,413 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:42:46,414 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:42:45" (1/3) ... [2019-12-07 15:42:46,414 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40461ea7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:42:46, skipping insertion in model container [2019-12-07 15:42:46,414 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:42:45" (2/3) ... [2019-12-07 15:42:46,414 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40461ea7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:42:46, skipping insertion in model container [2019-12-07 15:42:46,415 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:42:46" (3/3) ... [2019-12-07 15:42:46,416 INFO L109 eAbstractionObserver]: Analyzing ICFG safe028_rmo.oepc.i [2019-12-07 15:42:46,422 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:42:46,422 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:42:46,426 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 15:42:46,427 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:42:46,455 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,455 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,455 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,455 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,456 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,456 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,456 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,456 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,456 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,456 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,456 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,457 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,458 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,459 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,460 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,461 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,462 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,463 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,464 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,467 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,468 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,469 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,470 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,470 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,470 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,471 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,472 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,473 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,474 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~mem64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:42:46,493 INFO L249 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2019-12-07 15:42:46,506 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:42:46,506 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:42:46,506 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:42:46,506 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:42:46,506 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:42:46,506 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:42:46,506 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:42:46,506 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:42:46,518 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 223 places, 276 transitions [2019-12-07 15:42:46,519 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 223 places, 276 transitions [2019-12-07 15:42:46,597 INFO L134 PetriNetUnfolder]: 63/273 cut-off events. [2019-12-07 15:42:46,597 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:42:46,614 INFO L76 FinitePrefix]: Finished finitePrefix Result has 283 conditions, 273 events. 63/273 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 1060 event pairs. 9/218 useless extension candidates. Maximal degree in co-relation 225. Up to 2 conditions per place. [2019-12-07 15:42:46,644 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 223 places, 276 transitions [2019-12-07 15:42:46,694 INFO L134 PetriNetUnfolder]: 63/273 cut-off events. [2019-12-07 15:42:46,694 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:42:46,705 INFO L76 FinitePrefix]: Finished finitePrefix Result has 283 conditions, 273 events. 63/273 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 1060 event pairs. 9/218 useless extension candidates. Maximal degree in co-relation 225. Up to 2 conditions per place. [2019-12-07 15:42:46,736 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 32976 [2019-12-07 15:42:46,737 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:42:50,709 WARN L192 SmtUtils]: Spent 289.00 ms on a formula simplification. DAG size of input: 136 DAG size of output: 132 [2019-12-07 15:42:50,862 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification that was a NOOP. DAG size: 130 [2019-12-07 15:42:50,892 INFO L206 etLargeBlockEncoding]: Checked pairs total: 183707 [2019-12-07 15:42:50,892 INFO L214 etLargeBlockEncoding]: Total number of compositions: 146 [2019-12-07 15:42:50,894 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 117 places, 138 transitions [2019-12-07 15:44:19,355 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 300418 states. [2019-12-07 15:44:19,356 INFO L276 IsEmpty]: Start isEmpty. Operand 300418 states. [2019-12-07 15:44:19,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 15:44:19,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:44:19,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:44:19,394 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:44:19,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:44:19,398 INFO L82 PathProgramCache]: Analyzing trace with hash -2075695311, now seen corresponding path program 1 times [2019-12-07 15:44:19,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:44:19,404 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413623580] [2019-12-07 15:44:19,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:44:19,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:44:19,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:44:19,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413623580] [2019-12-07 15:44:19,627 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:44:19,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:44:19,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073056651] [2019-12-07 15:44:19,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:44:19,631 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:44:19,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:44:19,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:44:19,642 INFO L87 Difference]: Start difference. First operand 300418 states. Second operand 3 states. [2019-12-07 15:44:23,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:44:23,780 INFO L93 Difference]: Finished difference Result 300418 states and 1374458 transitions. [2019-12-07 15:44:23,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:44:23,781 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 15:44:23,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:44:24,861 INFO L225 Difference]: With dead ends: 300418 [2019-12-07 15:44:24,861 INFO L226 Difference]: Without dead ends: 281698 [2019-12-07 15:44:24,862 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:44:46,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 281698 states. [2019-12-07 15:44:50,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 281698 to 281698. [2019-12-07 15:44:50,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281698 states. [2019-12-07 15:44:57,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281698 states to 281698 states and 1288736 transitions. [2019-12-07 15:44:57,081 INFO L78 Accepts]: Start accepts. Automaton has 281698 states and 1288736 transitions. Word has length 17 [2019-12-07 15:44:57,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:44:57,082 INFO L462 AbstractCegarLoop]: Abstraction has 281698 states and 1288736 transitions. [2019-12-07 15:44:57,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:44:57,082 INFO L276 IsEmpty]: Start isEmpty. Operand 281698 states and 1288736 transitions. [2019-12-07 15:44:57,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:44:57,117 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:44:57,117 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:44:57,118 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:44:57,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:44:57,118 INFO L82 PathProgramCache]: Analyzing trace with hash 1282420922, now seen corresponding path program 1 times [2019-12-07 15:44:57,118 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:44:57,118 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500102371] [2019-12-07 15:44:57,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:44:57,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:44:57,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:44:57,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500102371] [2019-12-07 15:44:57,192 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:44:57,192 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:44:57,192 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [623701867] [2019-12-07 15:44:57,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:44:57,193 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:44:57,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:44:57,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:44:57,194 INFO L87 Difference]: Start difference. First operand 281698 states and 1288736 transitions. Second operand 4 states. [2019-12-07 15:44:57,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:44:57,529 INFO L93 Difference]: Finished difference Result 71266 states and 271018 transitions. [2019-12-07 15:44:57,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:44:57,530 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 15:44:57,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:44:57,673 INFO L225 Difference]: With dead ends: 71266 [2019-12-07 15:44:57,673 INFO L226 Difference]: Without dead ends: 52546 [2019-12-07 15:44:57,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:44:58,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52546 states. [2019-12-07 15:44:58,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52546 to 52546. [2019-12-07 15:44:58,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52546 states. [2019-12-07 15:44:58,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52546 states to 52546 states and 187648 transitions. [2019-12-07 15:44:58,842 INFO L78 Accepts]: Start accepts. Automaton has 52546 states and 187648 transitions. Word has length 18 [2019-12-07 15:44:58,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:44:58,843 INFO L462 AbstractCegarLoop]: Abstraction has 52546 states and 187648 transitions. [2019-12-07 15:44:58,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:44:58,843 INFO L276 IsEmpty]: Start isEmpty. Operand 52546 states and 187648 transitions. [2019-12-07 15:44:58,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 15:44:58,860 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:44:58,860 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:44:58,860 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:44:58,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:44:58,861 INFO L82 PathProgramCache]: Analyzing trace with hash 285755223, now seen corresponding path program 1 times [2019-12-07 15:44:58,861 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:44:58,861 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476872977] [2019-12-07 15:44:58,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:44:58,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:44:58,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:44:58,939 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476872977] [2019-12-07 15:44:58,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:44:58,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:44:58,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952899085] [2019-12-07 15:44:58,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:44:58,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:44:58,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:44:58,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:44:58,940 INFO L87 Difference]: Start difference. First operand 52546 states and 187648 transitions. Second operand 3 states. [2019-12-07 15:44:59,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:44:59,103 INFO L93 Difference]: Finished difference Result 49978 states and 176124 transitions. [2019-12-07 15:44:59,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:44:59,104 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 15:44:59,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:44:59,208 INFO L225 Difference]: With dead ends: 49978 [2019-12-07 15:44:59,209 INFO L226 Difference]: Without dead ends: 49978 [2019-12-07 15:44:59,209 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:44:59,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49978 states. [2019-12-07 15:45:00,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49978 to 49978. [2019-12-07 15:45:00,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49978 states. [2019-12-07 15:45:00,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49978 states to 49978 states and 176124 transitions. [2019-12-07 15:45:00,333 INFO L78 Accepts]: Start accepts. Automaton has 49978 states and 176124 transitions. Word has length 28 [2019-12-07 15:45:00,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:00,333 INFO L462 AbstractCegarLoop]: Abstraction has 49978 states and 176124 transitions. [2019-12-07 15:45:00,334 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:45:00,334 INFO L276 IsEmpty]: Start isEmpty. Operand 49978 states and 176124 transitions. [2019-12-07 15:45:00,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:45:00,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:00,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:00,351 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:00,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:00,351 INFO L82 PathProgramCache]: Analyzing trace with hash -1493897438, now seen corresponding path program 1 times [2019-12-07 15:45:00,351 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:00,351 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266087245] [2019-12-07 15:45:00,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:00,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:00,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:00,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1266087245] [2019-12-07 15:45:00,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:00,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:45:00,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [838309780] [2019-12-07 15:45:00,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:45:00,434 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:00,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:45:00,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:45:00,434 INFO L87 Difference]: Start difference. First operand 49978 states and 176124 transitions. Second operand 5 states. [2019-12-07 15:45:00,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:00,545 INFO L93 Difference]: Finished difference Result 21608 states and 73711 transitions. [2019-12-07 15:45:00,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:45:00,546 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 15:45:00,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:01,109 INFO L225 Difference]: With dead ends: 21608 [2019-12-07 15:45:01,110 INFO L226 Difference]: Without dead ends: 19332 [2019-12-07 15:45:01,110 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:45:01,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19332 states. [2019-12-07 15:45:01,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19332 to 19332. [2019-12-07 15:45:01,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19332 states. [2019-12-07 15:45:01,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19332 states to 19332 states and 65883 transitions. [2019-12-07 15:45:01,502 INFO L78 Accepts]: Start accepts. Automaton has 19332 states and 65883 transitions. Word has length 29 [2019-12-07 15:45:01,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:01,502 INFO L462 AbstractCegarLoop]: Abstraction has 19332 states and 65883 transitions. [2019-12-07 15:45:01,502 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:45:01,502 INFO L276 IsEmpty]: Start isEmpty. Operand 19332 states and 65883 transitions. [2019-12-07 15:45:01,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 15:45:01,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:01,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:01,526 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:01,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:01,527 INFO L82 PathProgramCache]: Analyzing trace with hash -541366890, now seen corresponding path program 1 times [2019-12-07 15:45:01,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:01,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75194546] [2019-12-07 15:45:01,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:01,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:01,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:01,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75194546] [2019-12-07 15:45:01,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:01,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:45:01,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1878039538] [2019-12-07 15:45:01,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:45:01,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:01,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:45:01,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:45:01,624 INFO L87 Difference]: Start difference. First operand 19332 states and 65883 transitions. Second operand 6 states. [2019-12-07 15:45:01,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:01,726 INFO L93 Difference]: Finished difference Result 18215 states and 63249 transitions. [2019-12-07 15:45:01,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:45:01,727 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-12-07 15:45:01,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:01,752 INFO L225 Difference]: With dead ends: 18215 [2019-12-07 15:45:01,752 INFO L226 Difference]: Without dead ends: 18128 [2019-12-07 15:45:01,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:45:01,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18128 states. [2019-12-07 15:45:02,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18128 to 18128. [2019-12-07 15:45:02,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18128 states. [2019-12-07 15:45:02,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18128 states to 18128 states and 63053 transitions. [2019-12-07 15:45:02,147 INFO L78 Accepts]: Start accepts. Automaton has 18128 states and 63053 transitions. Word has length 45 [2019-12-07 15:45:02,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:02,148 INFO L462 AbstractCegarLoop]: Abstraction has 18128 states and 63053 transitions. [2019-12-07 15:45:02,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:45:02,148 INFO L276 IsEmpty]: Start isEmpty. Operand 18128 states and 63053 transitions. [2019-12-07 15:45:02,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 15:45:02,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:02,171 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:02,171 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:02,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:02,171 INFO L82 PathProgramCache]: Analyzing trace with hash -1488532936, now seen corresponding path program 1 times [2019-12-07 15:45:02,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:02,171 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239568377] [2019-12-07 15:45:02,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:02,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:02,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:02,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239568377] [2019-12-07 15:45:02,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:02,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:45:02,228 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [71305261] [2019-12-07 15:45:02,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:45:02,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:02,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:45:02,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:45:02,228 INFO L87 Difference]: Start difference. First operand 18128 states and 63053 transitions. Second operand 3 states. [2019-12-07 15:45:02,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:02,322 INFO L93 Difference]: Finished difference Result 17744 states and 61429 transitions. [2019-12-07 15:45:02,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:45:02,322 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-12-07 15:45:02,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:02,350 INFO L225 Difference]: With dead ends: 17744 [2019-12-07 15:45:02,350 INFO L226 Difference]: Without dead ends: 17744 [2019-12-07 15:45:02,351 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:45:02,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17744 states. [2019-12-07 15:45:02,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17744 to 17744. [2019-12-07 15:45:02,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17744 states. [2019-12-07 15:45:02,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17744 states to 17744 states and 61429 transitions. [2019-12-07 15:45:02,746 INFO L78 Accepts]: Start accepts. Automaton has 17744 states and 61429 transitions. Word has length 70 [2019-12-07 15:45:02,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:02,747 INFO L462 AbstractCegarLoop]: Abstraction has 17744 states and 61429 transitions. [2019-12-07 15:45:02,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:45:02,747 INFO L276 IsEmpty]: Start isEmpty. Operand 17744 states and 61429 transitions. [2019-12-07 15:45:02,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 15:45:02,766 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:02,766 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:02,766 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:02,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:02,766 INFO L82 PathProgramCache]: Analyzing trace with hash 726610784, now seen corresponding path program 1 times [2019-12-07 15:45:02,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:02,767 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137610474] [2019-12-07 15:45:02,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:02,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:02,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:02,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137610474] [2019-12-07 15:45:02,827 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:02,827 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:45:02,827 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125037973] [2019-12-07 15:45:02,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:45:02,828 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:02,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:45:02,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:45:02,828 INFO L87 Difference]: Start difference. First operand 17744 states and 61429 transitions. Second operand 3 states. [2019-12-07 15:45:02,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:02,898 INFO L93 Difference]: Finished difference Result 17743 states and 61427 transitions. [2019-12-07 15:45:02,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:45:02,898 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 71 [2019-12-07 15:45:02,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:02,923 INFO L225 Difference]: With dead ends: 17743 [2019-12-07 15:45:02,923 INFO L226 Difference]: Without dead ends: 17743 [2019-12-07 15:45:02,923 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:45:03,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17743 states. [2019-12-07 15:45:03,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17743 to 17743. [2019-12-07 15:45:03,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17743 states. [2019-12-07 15:45:03,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17743 states to 17743 states and 61427 transitions. [2019-12-07 15:45:03,310 INFO L78 Accepts]: Start accepts. Automaton has 17743 states and 61427 transitions. Word has length 71 [2019-12-07 15:45:03,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:03,310 INFO L462 AbstractCegarLoop]: Abstraction has 17743 states and 61427 transitions. [2019-12-07 15:45:03,310 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:45:03,311 INFO L276 IsEmpty]: Start isEmpty. Operand 17743 states and 61427 transitions. [2019-12-07 15:45:03,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:03,328 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:03,328 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:03,328 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:03,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:03,329 INFO L82 PathProgramCache]: Analyzing trace with hash 1049534817, now seen corresponding path program 1 times [2019-12-07 15:45:03,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:03,329 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469272248] [2019-12-07 15:45:03,329 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:03,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:03,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:03,414 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469272248] [2019-12-07 15:45:03,414 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:03,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:45:03,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204504658] [2019-12-07 15:45:03,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:45:03,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:03,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:45:03,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:45:03,415 INFO L87 Difference]: Start difference. First operand 17743 states and 61427 transitions. Second operand 5 states. [2019-12-07 15:45:03,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:03,516 INFO L93 Difference]: Finished difference Result 21847 states and 74322 transitions. [2019-12-07 15:45:03,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:45:03,517 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2019-12-07 15:45:03,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:03,524 INFO L225 Difference]: With dead ends: 21847 [2019-12-07 15:45:03,524 INFO L226 Difference]: Without dead ends: 4661 [2019-12-07 15:45:03,524 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:45:03,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4661 states. [2019-12-07 15:45:03,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4661 to 4661. [2019-12-07 15:45:03,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4661 states. [2019-12-07 15:45:03,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4661 states to 4661 states and 14222 transitions. [2019-12-07 15:45:03,611 INFO L78 Accepts]: Start accepts. Automaton has 4661 states and 14222 transitions. Word has length 72 [2019-12-07 15:45:03,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:03,612 INFO L462 AbstractCegarLoop]: Abstraction has 4661 states and 14222 transitions. [2019-12-07 15:45:03,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:45:03,612 INFO L276 IsEmpty]: Start isEmpty. Operand 4661 states and 14222 transitions. [2019-12-07 15:45:03,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:03,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:03,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:03,617 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:03,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:03,618 INFO L82 PathProgramCache]: Analyzing trace with hash 1176538835, now seen corresponding path program 2 times [2019-12-07 15:45:03,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:03,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186448836] [2019-12-07 15:45:03,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:03,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:04,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:04,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [186448836] [2019-12-07 15:45:04,173 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:04,173 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2019-12-07 15:45:04,173 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169343962] [2019-12-07 15:45:04,173 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 15:45:04,173 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:04,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 15:45:04,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=449, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:45:04,174 INFO L87 Difference]: Start difference. First operand 4661 states and 14222 transitions. Second operand 23 states. [2019-12-07 15:45:05,595 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 21 [2019-12-07 15:45:06,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:06,767 INFO L93 Difference]: Finished difference Result 11183 states and 33744 transitions. [2019-12-07 15:45:06,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 15:45:06,767 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 72 [2019-12-07 15:45:06,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:06,776 INFO L225 Difference]: With dead ends: 11183 [2019-12-07 15:45:06,776 INFO L226 Difference]: Without dead ends: 8559 [2019-12-07 15:45:06,777 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 841 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=372, Invalid=3050, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 15:45:06,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8559 states. [2019-12-07 15:45:06,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8559 to 7425. [2019-12-07 15:45:06,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7425 states. [2019-12-07 15:45:06,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7425 states to 7425 states and 22527 transitions. [2019-12-07 15:45:06,918 INFO L78 Accepts]: Start accepts. Automaton has 7425 states and 22527 transitions. Word has length 72 [2019-12-07 15:45:06,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:06,918 INFO L462 AbstractCegarLoop]: Abstraction has 7425 states and 22527 transitions. [2019-12-07 15:45:06,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 15:45:06,918 INFO L276 IsEmpty]: Start isEmpty. Operand 7425 states and 22527 transitions. [2019-12-07 15:45:06,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:06,925 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:06,925 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:06,925 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:06,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:06,926 INFO L82 PathProgramCache]: Analyzing trace with hash -631520119, now seen corresponding path program 3 times [2019-12-07 15:45:06,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:06,926 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778797832] [2019-12-07 15:45:06,926 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:06,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:07,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:07,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778797832] [2019-12-07 15:45:07,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:07,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 15:45:07,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872795468] [2019-12-07 15:45:07,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 15:45:07,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:07,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 15:45:07,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2019-12-07 15:45:07,172 INFO L87 Difference]: Start difference. First operand 7425 states and 22527 transitions. Second operand 14 states. [2019-12-07 15:45:09,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:09,008 INFO L93 Difference]: Finished difference Result 13973 states and 42067 transitions. [2019-12-07 15:45:09,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:45:09,008 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 72 [2019-12-07 15:45:09,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:09,021 INFO L225 Difference]: With dead ends: 13973 [2019-12-07 15:45:09,022 INFO L226 Difference]: Without dead ends: 11468 [2019-12-07 15:45:09,022 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 283 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=247, Invalid=1159, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 15:45:09,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11468 states. [2019-12-07 15:45:09,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11468 to 9708. [2019-12-07 15:45:09,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9708 states. [2019-12-07 15:45:09,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9708 states to 9708 states and 29454 transitions. [2019-12-07 15:45:09,174 INFO L78 Accepts]: Start accepts. Automaton has 9708 states and 29454 transitions. Word has length 72 [2019-12-07 15:45:09,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:09,174 INFO L462 AbstractCegarLoop]: Abstraction has 9708 states and 29454 transitions. [2019-12-07 15:45:09,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 15:45:09,174 INFO L276 IsEmpty]: Start isEmpty. Operand 9708 states and 29454 transitions. [2019-12-07 15:45:09,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:09,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:09,183 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:09,183 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:09,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:09,183 INFO L82 PathProgramCache]: Analyzing trace with hash -162566405, now seen corresponding path program 4 times [2019-12-07 15:45:09,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:09,184 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642173499] [2019-12-07 15:45:09,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:09,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:09,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:09,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642173499] [2019-12-07 15:45:09,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:09,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:45:09,575 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094260265] [2019-12-07 15:45:09,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:45:09,575 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:09,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:45:09,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:45:09,575 INFO L87 Difference]: Start difference. First operand 9708 states and 29454 transitions. Second operand 18 states. [2019-12-07 15:45:11,772 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 25 [2019-12-07 15:45:12,672 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification that was a NOOP. DAG size: 34 [2019-12-07 15:45:13,294 WARN L192 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 30 [2019-12-07 15:45:14,917 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:45:15,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:15,922 INFO L93 Difference]: Finished difference Result 16629 states and 49817 transitions. [2019-12-07 15:45:15,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 15:45:15,922 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:45:15,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:15,937 INFO L225 Difference]: With dead ends: 16629 [2019-12-07 15:45:15,937 INFO L226 Difference]: Without dead ends: 13811 [2019-12-07 15:45:15,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 721 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=405, Invalid=2675, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 15:45:15,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13811 states. [2019-12-07 15:45:16,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13811 to 10000. [2019-12-07 15:45:16,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10000 states. [2019-12-07 15:45:16,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10000 states to 10000 states and 30368 transitions. [2019-12-07 15:45:16,101 INFO L78 Accepts]: Start accepts. Automaton has 10000 states and 30368 transitions. Word has length 72 [2019-12-07 15:45:16,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:16,102 INFO L462 AbstractCegarLoop]: Abstraction has 10000 states and 30368 transitions. [2019-12-07 15:45:16,102 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:45:16,102 INFO L276 IsEmpty]: Start isEmpty. Operand 10000 states and 30368 transitions. [2019-12-07 15:45:16,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:16,110 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:16,111 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:16,111 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:16,111 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:16,111 INFO L82 PathProgramCache]: Analyzing trace with hash 210711269, now seen corresponding path program 5 times [2019-12-07 15:45:16,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:16,111 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324638846] [2019-12-07 15:45:16,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:16,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:17,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:17,017 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324638846] [2019-12-07 15:45:17,017 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:17,017 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 15:45:17,017 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792388854] [2019-12-07 15:45:17,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 15:45:17,017 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:17,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 15:45:17,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=535, Unknown=0, NotChecked=0, Total=600 [2019-12-07 15:45:17,018 INFO L87 Difference]: Start difference. First operand 10000 states and 30368 transitions. Second operand 25 states. [2019-12-07 15:45:20,942 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:45:21,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:21,816 INFO L93 Difference]: Finished difference Result 14969 states and 45313 transitions. [2019-12-07 15:45:21,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 15:45:21,817 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 72 [2019-12-07 15:45:21,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:21,848 INFO L225 Difference]: With dead ends: 14969 [2019-12-07 15:45:21,848 INFO L226 Difference]: Without dead ends: 13025 [2019-12-07 15:45:21,850 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 477 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=301, Invalid=2149, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:45:21,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13025 states. [2019-12-07 15:45:22,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13025 to 11415. [2019-12-07 15:45:22,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11415 states. [2019-12-07 15:45:22,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11415 states to 11415 states and 34408 transitions. [2019-12-07 15:45:22,022 INFO L78 Accepts]: Start accepts. Automaton has 11415 states and 34408 transitions. Word has length 72 [2019-12-07 15:45:22,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:22,022 INFO L462 AbstractCegarLoop]: Abstraction has 11415 states and 34408 transitions. [2019-12-07 15:45:22,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 15:45:22,022 INFO L276 IsEmpty]: Start isEmpty. Operand 11415 states and 34408 transitions. [2019-12-07 15:45:22,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:22,032 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:22,032 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:22,032 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:22,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:22,032 INFO L82 PathProgramCache]: Analyzing trace with hash -875416119, now seen corresponding path program 6 times [2019-12-07 15:45:22,032 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:22,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891595614] [2019-12-07 15:45:22,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:22,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:22,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:22,281 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [891595614] [2019-12-07 15:45:22,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:22,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:45:22,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857620424] [2019-12-07 15:45:22,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:45:22,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:22,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:45:22,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:45:22,282 INFO L87 Difference]: Start difference. First operand 11415 states and 34408 transitions. Second operand 15 states. [2019-12-07 15:45:25,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:25,540 INFO L93 Difference]: Finished difference Result 18093 states and 54045 transitions. [2019-12-07 15:45:25,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 15:45:25,540 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:45:25,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:25,561 INFO L225 Difference]: With dead ends: 18093 [2019-12-07 15:45:25,561 INFO L226 Difference]: Without dead ends: 14850 [2019-12-07 15:45:25,562 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=168, Invalid=954, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 15:45:25,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14850 states. [2019-12-07 15:45:25,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14850 to 11341. [2019-12-07 15:45:25,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11341 states. [2019-12-07 15:45:25,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11341 states to 11341 states and 34012 transitions. [2019-12-07 15:45:25,745 INFO L78 Accepts]: Start accepts. Automaton has 11341 states and 34012 transitions. Word has length 72 [2019-12-07 15:45:25,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:25,746 INFO L462 AbstractCegarLoop]: Abstraction has 11341 states and 34012 transitions. [2019-12-07 15:45:25,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:45:25,746 INFO L276 IsEmpty]: Start isEmpty. Operand 11341 states and 34012 transitions. [2019-12-07 15:45:25,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:25,755 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:25,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:25,756 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:25,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:25,756 INFO L82 PathProgramCache]: Analyzing trace with hash 723143141, now seen corresponding path program 7 times [2019-12-07 15:45:25,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:25,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387714982] [2019-12-07 15:45:25,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:25,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:26,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:26,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387714982] [2019-12-07 15:45:26,237 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:26,237 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2019-12-07 15:45:26,238 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1998868692] [2019-12-07 15:45:26,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 15:45:26,238 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:26,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 15:45:26,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=449, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:45:26,238 INFO L87 Difference]: Start difference. First operand 11341 states and 34012 transitions. Second operand 23 states. [2019-12-07 15:45:28,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:28,982 INFO L93 Difference]: Finished difference Result 19264 states and 57593 transitions. [2019-12-07 15:45:28,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 15:45:28,982 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 72 [2019-12-07 15:45:28,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:28,998 INFO L225 Difference]: With dead ends: 19264 [2019-12-07 15:45:28,998 INFO L226 Difference]: Without dead ends: 15688 [2019-12-07 15:45:28,999 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 436 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=253, Invalid=1817, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 15:45:29,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15688 states. [2019-12-07 15:45:29,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15688 to 12634. [2019-12-07 15:45:29,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12634 states. [2019-12-07 15:45:29,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12634 states to 12634 states and 37249 transitions. [2019-12-07 15:45:29,205 INFO L78 Accepts]: Start accepts. Automaton has 12634 states and 37249 transitions. Word has length 72 [2019-12-07 15:45:29,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:29,206 INFO L462 AbstractCegarLoop]: Abstraction has 12634 states and 37249 transitions. [2019-12-07 15:45:29,206 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 15:45:29,206 INFO L276 IsEmpty]: Start isEmpty. Operand 12634 states and 37249 transitions. [2019-12-07 15:45:29,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:29,217 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:29,218 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:29,218 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:29,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:29,218 INFO L82 PathProgramCache]: Analyzing trace with hash 1878751243, now seen corresponding path program 8 times [2019-12-07 15:45:29,218 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:29,218 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881983491] [2019-12-07 15:45:29,218 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:29,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:29,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:29,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881983491] [2019-12-07 15:45:29,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:29,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:45:29,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048893476] [2019-12-07 15:45:29,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:45:29,410 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:29,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:45:29,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:45:29,411 INFO L87 Difference]: Start difference. First operand 12634 states and 37249 transitions. Second operand 12 states. [2019-12-07 15:45:30,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:30,034 INFO L93 Difference]: Finished difference Result 19579 states and 57598 transitions. [2019-12-07 15:45:30,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 15:45:30,034 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 72 [2019-12-07 15:45:30,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:30,051 INFO L225 Difference]: With dead ends: 19579 [2019-12-07 15:45:30,052 INFO L226 Difference]: Without dead ends: 16489 [2019-12-07 15:45:30,052 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=449, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:45:30,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16489 states. [2019-12-07 15:45:30,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16489 to 12753. [2019-12-07 15:45:30,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12753 states. [2019-12-07 15:45:30,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12753 states to 12753 states and 37643 transitions. [2019-12-07 15:45:30,255 INFO L78 Accepts]: Start accepts. Automaton has 12753 states and 37643 transitions. Word has length 72 [2019-12-07 15:45:30,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:30,255 INFO L462 AbstractCegarLoop]: Abstraction has 12753 states and 37643 transitions. [2019-12-07 15:45:30,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:45:30,255 INFO L276 IsEmpty]: Start isEmpty. Operand 12753 states and 37643 transitions. [2019-12-07 15:45:30,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:30,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:30,267 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:30,267 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:30,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:30,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1848286879, now seen corresponding path program 9 times [2019-12-07 15:45:30,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:30,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169509800] [2019-12-07 15:45:30,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:30,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:30,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:30,534 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169509800] [2019-12-07 15:45:30,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:30,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:45:30,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1997467947] [2019-12-07 15:45:30,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:45:30,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:30,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:45:30,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:45:30,535 INFO L87 Difference]: Start difference. First operand 12753 states and 37643 transitions. Second operand 15 states. [2019-12-07 15:45:31,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:31,660 INFO L93 Difference]: Finished difference Result 18192 states and 53544 transitions. [2019-12-07 15:45:31,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 15:45:31,660 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:45:31,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:31,676 INFO L225 Difference]: With dead ends: 18192 [2019-12-07 15:45:31,676 INFO L226 Difference]: Without dead ends: 15916 [2019-12-07 15:45:31,676 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=122, Invalid=690, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:45:31,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15916 states. [2019-12-07 15:45:31,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15916 to 13062. [2019-12-07 15:45:31,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13062 states. [2019-12-07 15:45:31,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13062 states to 13062 states and 38649 transitions. [2019-12-07 15:45:31,872 INFO L78 Accepts]: Start accepts. Automaton has 13062 states and 38649 transitions. Word has length 72 [2019-12-07 15:45:31,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:31,872 INFO L462 AbstractCegarLoop]: Abstraction has 13062 states and 38649 transitions. [2019-12-07 15:45:31,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:45:31,872 INFO L276 IsEmpty]: Start isEmpty. Operand 13062 states and 38649 transitions. [2019-12-07 15:45:31,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:31,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:31,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:31,884 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:31,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:31,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1360553029, now seen corresponding path program 10 times [2019-12-07 15:45:31,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:31,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730339899] [2019-12-07 15:45:31,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:31,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:32,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:32,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730339899] [2019-12-07 15:45:32,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:32,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:45:32,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [725257305] [2019-12-07 15:45:32,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:45:32,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:32,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:45:32,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:45:32,413 INFO L87 Difference]: Start difference. First operand 13062 states and 38649 transitions. Second operand 24 states. [2019-12-07 15:45:34,207 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 27 [2019-12-07 15:45:34,426 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 25 [2019-12-07 15:45:34,625 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 15:45:34,809 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 25 [2019-12-07 15:45:36,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:36,969 INFO L93 Difference]: Finished difference Result 18802 states and 55283 transitions. [2019-12-07 15:45:36,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 15:45:36,969 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:45:36,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:36,985 INFO L225 Difference]: With dead ends: 18802 [2019-12-07 15:45:36,985 INFO L226 Difference]: Without dead ends: 15294 [2019-12-07 15:45:36,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 512 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=313, Invalid=2137, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:45:37,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15294 states. [2019-12-07 15:45:37,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15294 to 12822. [2019-12-07 15:45:37,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12822 states. [2019-12-07 15:45:37,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12822 states to 12822 states and 38008 transitions. [2019-12-07 15:45:37,188 INFO L78 Accepts]: Start accepts. Automaton has 12822 states and 38008 transitions. Word has length 72 [2019-12-07 15:45:37,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:37,189 INFO L462 AbstractCegarLoop]: Abstraction has 12822 states and 38008 transitions. [2019-12-07 15:45:37,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:45:37,189 INFO L276 IsEmpty]: Start isEmpty. Operand 12822 states and 38008 transitions. [2019-12-07 15:45:37,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:37,200 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:37,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:37,201 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:37,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:37,201 INFO L82 PathProgramCache]: Analyzing trace with hash 982526783, now seen corresponding path program 11 times [2019-12-07 15:45:37,201 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:37,201 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [768351305] [2019-12-07 15:45:37,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:37,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:37,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:37,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [768351305] [2019-12-07 15:45:37,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:37,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 15:45:37,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [967266058] [2019-12-07 15:45:37,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 15:45:37,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:37,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 15:45:37,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2019-12-07 15:45:37,423 INFO L87 Difference]: Start difference. First operand 12822 states and 38008 transitions. Second operand 14 states. [2019-12-07 15:45:38,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:38,273 INFO L93 Difference]: Finished difference Result 18563 states and 54565 transitions. [2019-12-07 15:45:38,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 15:45:38,273 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 72 [2019-12-07 15:45:38,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:38,289 INFO L225 Difference]: With dead ends: 18563 [2019-12-07 15:45:38,289 INFO L226 Difference]: Without dead ends: 16051 [2019-12-07 15:45:38,290 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=130, Invalid=682, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:45:38,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16051 states. [2019-12-07 15:45:38,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16051 to 12706. [2019-12-07 15:45:38,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12706 states. [2019-12-07 15:45:38,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12706 states to 12706 states and 37621 transitions. [2019-12-07 15:45:38,507 INFO L78 Accepts]: Start accepts. Automaton has 12706 states and 37621 transitions. Word has length 72 [2019-12-07 15:45:38,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:38,507 INFO L462 AbstractCegarLoop]: Abstraction has 12706 states and 37621 transitions. [2019-12-07 15:45:38,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 15:45:38,507 INFO L276 IsEmpty]: Start isEmpty. Operand 12706 states and 37621 transitions. [2019-12-07 15:45:38,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:38,518 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:38,518 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:38,519 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:38,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:38,519 INFO L82 PathProgramCache]: Analyzing trace with hash -970803151, now seen corresponding path program 12 times [2019-12-07 15:45:38,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:38,519 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939257302] [2019-12-07 15:45:38,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:38,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:38,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:38,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1939257302] [2019-12-07 15:45:38,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:38,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:45:38,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992724243] [2019-12-07 15:45:38,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:45:38,839 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:38,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:45:38,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:45:38,839 INFO L87 Difference]: Start difference. First operand 12706 states and 37621 transitions. Second operand 17 states. [2019-12-07 15:45:40,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:40,221 INFO L93 Difference]: Finished difference Result 16427 states and 48067 transitions. [2019-12-07 15:45:40,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 15:45:40,222 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:45:40,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:40,236 INFO L225 Difference]: With dead ends: 16427 [2019-12-07 15:45:40,236 INFO L226 Difference]: Without dead ends: 14878 [2019-12-07 15:45:40,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 202 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=173, Invalid=1087, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:45:40,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14878 states. [2019-12-07 15:45:40,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14878 to 12678. [2019-12-07 15:45:40,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12678 states. [2019-12-07 15:45:40,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12678 states to 12678 states and 37533 transitions. [2019-12-07 15:45:40,421 INFO L78 Accepts]: Start accepts. Automaton has 12678 states and 37533 transitions. Word has length 72 [2019-12-07 15:45:40,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:40,421 INFO L462 AbstractCegarLoop]: Abstraction has 12678 states and 37533 transitions. [2019-12-07 15:45:40,421 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:45:40,421 INFO L276 IsEmpty]: Start isEmpty. Operand 12678 states and 37533 transitions. [2019-12-07 15:45:40,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:40,432 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:40,433 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:40,433 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:40,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:40,433 INFO L82 PathProgramCache]: Analyzing trace with hash 1194594085, now seen corresponding path program 13 times [2019-12-07 15:45:40,433 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:40,433 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174435339] [2019-12-07 15:45:40,433 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:40,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:40,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:40,682 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174435339] [2019-12-07 15:45:40,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:40,682 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:45:40,682 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205779754] [2019-12-07 15:45:40,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:45:40,683 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:40,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:45:40,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:45:40,683 INFO L87 Difference]: Start difference. First operand 12678 states and 37533 transitions. Second operand 17 states. [2019-12-07 15:45:41,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:41,954 INFO L93 Difference]: Finished difference Result 18851 states and 55551 transitions. [2019-12-07 15:45:41,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:45:41,954 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:45:41,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:41,969 INFO L225 Difference]: With dead ends: 18851 [2019-12-07 15:45:41,969 INFO L226 Difference]: Without dead ends: 15613 [2019-12-07 15:45:41,970 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=140, Invalid=916, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 15:45:42,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15613 states. [2019-12-07 15:45:42,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15613 to 12610. [2019-12-07 15:45:42,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12610 states. [2019-12-07 15:45:42,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12610 states to 12610 states and 37306 transitions. [2019-12-07 15:45:42,167 INFO L78 Accepts]: Start accepts. Automaton has 12610 states and 37306 transitions. Word has length 72 [2019-12-07 15:45:42,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:42,167 INFO L462 AbstractCegarLoop]: Abstraction has 12610 states and 37306 transitions. [2019-12-07 15:45:42,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:45:42,167 INFO L276 IsEmpty]: Start isEmpty. Operand 12610 states and 37306 transitions. [2019-12-07 15:45:42,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:42,178 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:42,178 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:42,178 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:42,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:42,178 INFO L82 PathProgramCache]: Analyzing trace with hash 1219459465, now seen corresponding path program 14 times [2019-12-07 15:45:42,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:42,179 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551590497] [2019-12-07 15:45:42,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:42,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:42,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:42,597 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1551590497] [2019-12-07 15:45:42,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:42,597 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:45:42,597 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1133161076] [2019-12-07 15:45:42,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:45:42,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:42,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:45:42,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=335, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:45:42,598 INFO L87 Difference]: Start difference. First operand 12610 states and 37306 transitions. Second operand 20 states. [2019-12-07 15:45:45,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:45:45,664 INFO L93 Difference]: Finished difference Result 26521 states and 80198 transitions. [2019-12-07 15:45:45,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2019-12-07 15:45:45,664 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:45:45,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:45:45,695 INFO L225 Difference]: With dead ends: 26521 [2019-12-07 15:45:45,695 INFO L226 Difference]: Without dead ends: 25075 [2019-12-07 15:45:45,697 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 874 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=408, Invalid=3132, Unknown=0, NotChecked=0, Total=3540 [2019-12-07 15:45:45,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25075 states. [2019-12-07 15:45:45,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25075 to 17872. [2019-12-07 15:45:45,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17872 states. [2019-12-07 15:45:46,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17872 states to 17872 states and 54097 transitions. [2019-12-07 15:45:46,020 INFO L78 Accepts]: Start accepts. Automaton has 17872 states and 54097 transitions. Word has length 72 [2019-12-07 15:45:46,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:45:46,021 INFO L462 AbstractCegarLoop]: Abstraction has 17872 states and 54097 transitions. [2019-12-07 15:45:46,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:45:46,021 INFO L276 IsEmpty]: Start isEmpty. Operand 17872 states and 54097 transitions. [2019-12-07 15:45:46,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:45:46,037 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:45:46,037 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:45:46,037 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:45:46,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:45:46,037 INFO L82 PathProgramCache]: Analyzing trace with hash 92504751, now seen corresponding path program 15 times [2019-12-07 15:45:46,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:45:46,038 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084939684] [2019-12-07 15:45:46,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:45:46,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:45:47,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:45:47,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084939684] [2019-12-07 15:45:47,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:45:47,401 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [28] imperfect sequences [] total 28 [2019-12-07 15:45:47,401 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806321339] [2019-12-07 15:45:47,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2019-12-07 15:45:47,401 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:45:47,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2019-12-07 15:45:47,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=797, Unknown=0, NotChecked=0, Total=870 [2019-12-07 15:45:47,402 INFO L87 Difference]: Start difference. First operand 17872 states and 54097 transitions. Second operand 30 states. [2019-12-07 15:45:51,174 WARN L192 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 36 [2019-12-07 15:45:52,472 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2019-12-07 15:45:53,319 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 15:45:53,910 WARN L192 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 36 [2019-12-07 15:45:54,190 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 36 [2019-12-07 15:45:54,935 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 36 [2019-12-07 15:45:56,461 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 15:46:03,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:03,295 INFO L93 Difference]: Finished difference Result 29114 states and 88927 transitions. [2019-12-07 15:46:03,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 122 states. [2019-12-07 15:46:03,296 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 72 [2019-12-07 15:46:03,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:03,329 INFO L225 Difference]: With dead ends: 29114 [2019-12-07 15:46:03,329 INFO L226 Difference]: Without dead ends: 28153 [2019-12-07 15:46:03,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 8 SyntacticMatches, 6 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5378 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=1503, Invalid=15789, Unknown=0, NotChecked=0, Total=17292 [2019-12-07 15:46:03,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28153 states. [2019-12-07 15:46:03,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28153 to 23318. [2019-12-07 15:46:03,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23318 states. [2019-12-07 15:46:03,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23318 states to 23318 states and 71630 transitions. [2019-12-07 15:46:03,716 INFO L78 Accepts]: Start accepts. Automaton has 23318 states and 71630 transitions. Word has length 72 [2019-12-07 15:46:03,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:03,716 INFO L462 AbstractCegarLoop]: Abstraction has 23318 states and 71630 transitions. [2019-12-07 15:46:03,716 INFO L463 AbstractCegarLoop]: Interpolant automaton has 30 states. [2019-12-07 15:46:03,716 INFO L276 IsEmpty]: Start isEmpty. Operand 23318 states and 71630 transitions. [2019-12-07 15:46:03,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:03,739 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:03,739 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:03,740 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:03,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:03,740 INFO L82 PathProgramCache]: Analyzing trace with hash -365694621, now seen corresponding path program 16 times [2019-12-07 15:46:03,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:03,740 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538335453] [2019-12-07 15:46:03,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:03,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:04,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:04,123 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538335453] [2019-12-07 15:46:04,123 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:04,123 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:46:04,123 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837518779] [2019-12-07 15:46:04,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:46:04,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:04,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:46:04,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:46:04,124 INFO L87 Difference]: Start difference. First operand 23318 states and 71630 transitions. Second operand 17 states. [2019-12-07 15:46:05,155 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 26 [2019-12-07 15:46:09,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:09,918 INFO L93 Difference]: Finished difference Result 36119 states and 110724 transitions. [2019-12-07 15:46:09,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 15:46:09,918 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:46:09,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:09,948 INFO L225 Difference]: With dead ends: 36119 [2019-12-07 15:46:09,948 INFO L226 Difference]: Without dead ends: 24620 [2019-12-07 15:46:09,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 568 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=290, Invalid=2062, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 15:46:10,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24620 states. [2019-12-07 15:46:10,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24620 to 16612. [2019-12-07 15:46:10,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16612 states. [2019-12-07 15:46:10,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16612 states to 16612 states and 49493 transitions. [2019-12-07 15:46:10,238 INFO L78 Accepts]: Start accepts. Automaton has 16612 states and 49493 transitions. Word has length 72 [2019-12-07 15:46:10,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:10,239 INFO L462 AbstractCegarLoop]: Abstraction has 16612 states and 49493 transitions. [2019-12-07 15:46:10,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:46:10,239 INFO L276 IsEmpty]: Start isEmpty. Operand 16612 states and 49493 transitions. [2019-12-07 15:46:10,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:10,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:10,254 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:10,254 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:10,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:10,254 INFO L82 PathProgramCache]: Analyzing trace with hash 1458520325, now seen corresponding path program 17 times [2019-12-07 15:46:10,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:10,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854122278] [2019-12-07 15:46:10,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:10,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:10,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:10,646 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854122278] [2019-12-07 15:46:10,646 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:10,646 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:46:10,646 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592877174] [2019-12-07 15:46:10,646 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:46:10,646 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:10,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:46:10,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:46:10,647 INFO L87 Difference]: Start difference. First operand 16612 states and 49493 transitions. Second operand 18 states. [2019-12-07 15:46:14,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:14,203 INFO L93 Difference]: Finished difference Result 23815 states and 70758 transitions. [2019-12-07 15:46:14,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 15:46:14,203 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:46:14,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:14,227 INFO L225 Difference]: With dead ends: 23815 [2019-12-07 15:46:14,227 INFO L226 Difference]: Without dead ends: 23148 [2019-12-07 15:46:14,229 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 697 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=339, Invalid=2523, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 15:46:14,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23148 states. [2019-12-07 15:46:14,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23148 to 18901. [2019-12-07 15:46:14,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18901 states. [2019-12-07 15:46:14,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18901 states to 18901 states and 56695 transitions. [2019-12-07 15:46:14,529 INFO L78 Accepts]: Start accepts. Automaton has 18901 states and 56695 transitions. Word has length 72 [2019-12-07 15:46:14,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:14,529 INFO L462 AbstractCegarLoop]: Abstraction has 18901 states and 56695 transitions. [2019-12-07 15:46:14,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:46:14,529 INFO L276 IsEmpty]: Start isEmpty. Operand 18901 states and 56695 transitions. [2019-12-07 15:46:14,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:14,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:14,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:14,547 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:14,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:14,547 INFO L82 PathProgramCache]: Analyzing trace with hash -1627753649, now seen corresponding path program 18 times [2019-12-07 15:46:14,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:14,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943759125] [2019-12-07 15:46:14,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:14,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:15,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:15,108 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943759125] [2019-12-07 15:46:15,108 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:15,108 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:46:15,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700817044] [2019-12-07 15:46:15,109 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:46:15,109 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:15,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:46:15,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:46:15,109 INFO L87 Difference]: Start difference. First operand 18901 states and 56695 transitions. Second operand 24 states. [2019-12-07 15:46:18,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:18,711 INFO L93 Difference]: Finished difference Result 34896 states and 103957 transitions. [2019-12-07 15:46:18,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 15:46:18,712 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:46:18,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:18,753 INFO L225 Difference]: With dead ends: 34896 [2019-12-07 15:46:18,753 INFO L226 Difference]: Without dead ends: 31917 [2019-12-07 15:46:18,754 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1085 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=432, Invalid=3858, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 15:46:18,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31917 states. [2019-12-07 15:46:19,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31917 to 21930. [2019-12-07 15:46:19,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21930 states. [2019-12-07 15:46:19,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21930 states to 21930 states and 65643 transitions. [2019-12-07 15:46:19,217 INFO L78 Accepts]: Start accepts. Automaton has 21930 states and 65643 transitions. Word has length 72 [2019-12-07 15:46:19,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:19,217 INFO L462 AbstractCegarLoop]: Abstraction has 21930 states and 65643 transitions. [2019-12-07 15:46:19,217 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:46:19,217 INFO L276 IsEmpty]: Start isEmpty. Operand 21930 states and 65643 transitions. [2019-12-07 15:46:19,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:19,236 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:19,236 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:19,236 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:19,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:19,237 INFO L82 PathProgramCache]: Analyzing trace with hash -784729055, now seen corresponding path program 19 times [2019-12-07 15:46:19,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:19,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831559911] [2019-12-07 15:46:19,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:19,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:19,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:19,673 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831559911] [2019-12-07 15:46:19,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:19,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:46:19,674 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700911939] [2019-12-07 15:46:19,674 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:46:19,674 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:19,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:46:19,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=301, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:46:19,675 INFO L87 Difference]: Start difference. First operand 21930 states and 65643 transitions. Second operand 19 states. [2019-12-07 15:46:22,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:22,573 INFO L93 Difference]: Finished difference Result 29637 states and 88236 transitions. [2019-12-07 15:46:22,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 15:46:22,573 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:46:22,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:22,605 INFO L225 Difference]: With dead ends: 29637 [2019-12-07 15:46:22,605 INFO L226 Difference]: Without dead ends: 26527 [2019-12-07 15:46:22,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 720 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=334, Invalid=2746, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 15:46:22,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26527 states. [2019-12-07 15:46:22,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26527 to 22304. [2019-12-07 15:46:22,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22304 states. [2019-12-07 15:46:22,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22304 states to 22304 states and 66862 transitions. [2019-12-07 15:46:22,964 INFO L78 Accepts]: Start accepts. Automaton has 22304 states and 66862 transitions. Word has length 72 [2019-12-07 15:46:22,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:22,964 INFO L462 AbstractCegarLoop]: Abstraction has 22304 states and 66862 transitions. [2019-12-07 15:46:22,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:46:22,964 INFO L276 IsEmpty]: Start isEmpty. Operand 22304 states and 66862 transitions. [2019-12-07 15:46:22,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:22,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:22,986 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:22,986 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:22,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:22,986 INFO L82 PathProgramCache]: Analyzing trace with hash -253609075, now seen corresponding path program 20 times [2019-12-07 15:46:22,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:22,986 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429595208] [2019-12-07 15:46:22,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:23,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:23,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:23,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1429595208] [2019-12-07 15:46:23,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:23,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:46:23,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [178600347] [2019-12-07 15:46:23,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:46:23,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:23,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:46:23,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:46:23,305 INFO L87 Difference]: Start difference. First operand 22304 states and 66862 transitions. Second operand 17 states. [2019-12-07 15:46:26,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:26,126 INFO L93 Difference]: Finished difference Result 27210 states and 80734 transitions. [2019-12-07 15:46:26,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 15:46:26,126 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:46:26,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:26,158 INFO L225 Difference]: With dead ends: 27210 [2019-12-07 15:46:26,159 INFO L226 Difference]: Without dead ends: 26475 [2019-12-07 15:46:26,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 667 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=303, Invalid=2453, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 15:46:26,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26475 states. [2019-12-07 15:46:26,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26475 to 24070. [2019-12-07 15:46:26,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24070 states. [2019-12-07 15:46:26,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24070 states to 24070 states and 72236 transitions. [2019-12-07 15:46:26,514 INFO L78 Accepts]: Start accepts. Automaton has 24070 states and 72236 transitions. Word has length 72 [2019-12-07 15:46:26,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:26,514 INFO L462 AbstractCegarLoop]: Abstraction has 24070 states and 72236 transitions. [2019-12-07 15:46:26,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:46:26,514 INFO L276 IsEmpty]: Start isEmpty. Operand 24070 states and 72236 transitions. [2019-12-07 15:46:26,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:26,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:26,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:26,536 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:26,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:26,537 INFO L82 PathProgramCache]: Analyzing trace with hash 242372367, now seen corresponding path program 21 times [2019-12-07 15:46:26,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:26,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1693498672] [2019-12-07 15:46:26,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:26,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:26,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:26,936 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1693498672] [2019-12-07 15:46:26,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:26,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:46:26,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1554581260] [2019-12-07 15:46:26,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:46:26,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:26,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:46:26,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:46:26,937 INFO L87 Difference]: Start difference. First operand 24070 states and 72236 transitions. Second operand 20 states. [2019-12-07 15:46:32,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:32,908 INFO L93 Difference]: Finished difference Result 32961 states and 97957 transitions. [2019-12-07 15:46:32,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 15:46:32,908 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:46:32,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:32,944 INFO L225 Difference]: With dead ends: 32961 [2019-12-07 15:46:32,945 INFO L226 Difference]: Without dead ends: 30387 [2019-12-07 15:46:32,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 866 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=406, Invalid=3254, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 15:46:33,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30387 states. [2019-12-07 15:46:33,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30387 to 24901. [2019-12-07 15:46:33,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24901 states. [2019-12-07 15:46:33,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24901 states to 24901 states and 74642 transitions. [2019-12-07 15:46:33,346 INFO L78 Accepts]: Start accepts. Automaton has 24901 states and 74642 transitions. Word has length 72 [2019-12-07 15:46:33,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:33,346 INFO L462 AbstractCegarLoop]: Abstraction has 24901 states and 74642 transitions. [2019-12-07 15:46:33,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:46:33,346 INFO L276 IsEmpty]: Start isEmpty. Operand 24901 states and 74642 transitions. [2019-12-07 15:46:33,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:33,372 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:33,372 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:33,372 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:33,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:33,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1728861651, now seen corresponding path program 22 times [2019-12-07 15:46:33,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:33,372 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249603564] [2019-12-07 15:46:33,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:33,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:33,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:33,776 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249603564] [2019-12-07 15:46:33,776 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:33,776 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:46:33,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933369277] [2019-12-07 15:46:33,776 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:46:33,776 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:33,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:46:33,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=336, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:46:33,777 INFO L87 Difference]: Start difference. First operand 24901 states and 74642 transitions. Second operand 20 states. [2019-12-07 15:46:37,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:37,922 INFO L93 Difference]: Finished difference Result 32591 states and 97632 transitions. [2019-12-07 15:46:37,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 15:46:37,922 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:46:37,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:37,960 INFO L225 Difference]: With dead ends: 32591 [2019-12-07 15:46:37,960 INFO L226 Difference]: Without dead ends: 32268 [2019-12-07 15:46:37,961 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 604 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=316, Invalid=2440, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 15:46:38,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32268 states. [2019-12-07 15:46:38,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32268 to 27164. [2019-12-07 15:46:38,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27164 states. [2019-12-07 15:46:38,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27164 states to 27164 states and 81762 transitions. [2019-12-07 15:46:38,402 INFO L78 Accepts]: Start accepts. Automaton has 27164 states and 81762 transitions. Word has length 72 [2019-12-07 15:46:38,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:38,402 INFO L462 AbstractCegarLoop]: Abstraction has 27164 states and 81762 transitions. [2019-12-07 15:46:38,402 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:46:38,402 INFO L276 IsEmpty]: Start isEmpty. Operand 27164 states and 81762 transitions. [2019-12-07 15:46:38,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:38,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:38,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:38,430 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:38,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:38,430 INFO L82 PathProgramCache]: Analyzing trace with hash 1728790821, now seen corresponding path program 23 times [2019-12-07 15:46:38,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:38,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392135710] [2019-12-07 15:46:38,431 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:38,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:39,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:39,380 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392135710] [2019-12-07 15:46:39,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:39,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:46:39,381 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078321087] [2019-12-07 15:46:39,381 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:46:39,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:39,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:46:39,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:46:39,381 INFO L87 Difference]: Start difference. First operand 27164 states and 81762 transitions. Second operand 27 states. [2019-12-07 15:46:46,787 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 26 [2019-12-07 15:46:47,035 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2019-12-07 15:46:48,919 WARN L192 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 32 [2019-12-07 15:46:50,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:46:50,120 INFO L93 Difference]: Finished difference Result 42957 states and 128619 transitions. [2019-12-07 15:46:50,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2019-12-07 15:46:50,120 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:46:50,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:46:50,170 INFO L225 Difference]: With dead ends: 42957 [2019-12-07 15:46:50,170 INFO L226 Difference]: Without dead ends: 41085 [2019-12-07 15:46:50,170 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 5 SyntacticMatches, 5 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2089 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=771, Invalid=6885, Unknown=0, NotChecked=0, Total=7656 [2019-12-07 15:46:50,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41085 states. [2019-12-07 15:46:50,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41085 to 32948. [2019-12-07 15:46:50,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32948 states. [2019-12-07 15:46:50,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32948 states to 32948 states and 100355 transitions. [2019-12-07 15:46:50,767 INFO L78 Accepts]: Start accepts. Automaton has 32948 states and 100355 transitions. Word has length 72 [2019-12-07 15:46:50,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:46:50,767 INFO L462 AbstractCegarLoop]: Abstraction has 32948 states and 100355 transitions. [2019-12-07 15:46:50,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:46:50,767 INFO L276 IsEmpty]: Start isEmpty. Operand 32948 states and 100355 transitions. [2019-12-07 15:46:50,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:46:50,800 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:46:50,801 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:46:50,801 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:46:50,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:46:50,801 INFO L82 PathProgramCache]: Analyzing trace with hash 2099061977, now seen corresponding path program 24 times [2019-12-07 15:46:50,801 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:46:50,801 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323674865] [2019-12-07 15:46:50,801 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:46:50,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:46:51,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:46:51,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323674865] [2019-12-07 15:46:51,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:46:51,595 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2019-12-07 15:46:51,595 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1503346275] [2019-12-07 15:46:51,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 15:46:51,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:46:51,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 15:46:51,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=681, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:46:51,595 INFO L87 Difference]: Start difference. First operand 32948 states and 100355 transitions. Second operand 28 states. [2019-12-07 15:46:54,815 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:46:55,899 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:46:56,987 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 27 [2019-12-07 15:46:58,029 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:46:58,431 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:46:58,944 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 29 [2019-12-07 15:46:59,579 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:47:00,811 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:47:02,310 WARN L192 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:47:03,000 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:47:03,311 WARN L192 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:47:04,046 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:47:04,698 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:47:05,390 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:47:08,072 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 15:47:09,504 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 27 [2019-12-07 15:47:15,591 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 27 [2019-12-07 15:47:15,819 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 27 [2019-12-07 15:47:16,421 WARN L192 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 25 [2019-12-07 15:47:16,839 WARN L192 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 31 [2019-12-07 15:47:18,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:18,485 INFO L93 Difference]: Finished difference Result 68915 states and 204856 transitions. [2019-12-07 15:47:18,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 124 states. [2019-12-07 15:47:18,486 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 72 [2019-12-07 15:47:18,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:18,541 INFO L225 Difference]: With dead ends: 68915 [2019-12-07 15:47:18,541 INFO L226 Difference]: Without dead ends: 46422 [2019-12-07 15:47:18,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 7 SyntacticMatches, 3 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5484 ImplicationChecksByTransitivity, 9.8s TimeCoverageRelationStatistics Valid=1428, Invalid=15342, Unknown=0, NotChecked=0, Total=16770 [2019-12-07 15:47:18,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46422 states. [2019-12-07 15:47:19,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46422 to 32578. [2019-12-07 15:47:19,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32578 states. [2019-12-07 15:47:19,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32578 states to 32578 states and 95744 transitions. [2019-12-07 15:47:19,178 INFO L78 Accepts]: Start accepts. Automaton has 32578 states and 95744 transitions. Word has length 72 [2019-12-07 15:47:19,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:19,178 INFO L462 AbstractCegarLoop]: Abstraction has 32578 states and 95744 transitions. [2019-12-07 15:47:19,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 15:47:19,178 INFO L276 IsEmpty]: Start isEmpty. Operand 32578 states and 95744 transitions. [2019-12-07 15:47:19,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:19,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:19,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:19,210 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:19,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:19,210 INFO L82 PathProgramCache]: Analyzing trace with hash 93100351, now seen corresponding path program 25 times [2019-12-07 15:47:19,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:19,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957688212] [2019-12-07 15:47:19,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:19,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:19,416 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:19,416 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957688212] [2019-12-07 15:47:19,416 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:19,416 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 15:47:19,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856370051] [2019-12-07 15:47:19,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 15:47:19,417 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:19,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 15:47:19,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2019-12-07 15:47:19,417 INFO L87 Difference]: Start difference. First operand 32578 states and 95744 transitions. Second operand 14 states. [2019-12-07 15:47:21,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:21,113 INFO L93 Difference]: Finished difference Result 41903 states and 124022 transitions. [2019-12-07 15:47:21,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 15:47:21,114 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 72 [2019-12-07 15:47:21,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:21,182 INFO L225 Difference]: With dead ends: 41903 [2019-12-07 15:47:21,182 INFO L226 Difference]: Without dead ends: 41416 [2019-12-07 15:47:21,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 181 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2019-12-07 15:47:21,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41416 states. [2019-12-07 15:47:21,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41416 to 36558. [2019-12-07 15:47:21,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36558 states. [2019-12-07 15:47:21,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36558 states to 36558 states and 108350 transitions. [2019-12-07 15:47:21,736 INFO L78 Accepts]: Start accepts. Automaton has 36558 states and 108350 transitions. Word has length 72 [2019-12-07 15:47:21,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:21,736 INFO L462 AbstractCegarLoop]: Abstraction has 36558 states and 108350 transitions. [2019-12-07 15:47:21,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 15:47:21,736 INFO L276 IsEmpty]: Start isEmpty. Operand 36558 states and 108350 transitions. [2019-12-07 15:47:21,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:21,772 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:21,772 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:21,772 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:21,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:21,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1033854363, now seen corresponding path program 26 times [2019-12-07 15:47:21,772 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:21,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247795143] [2019-12-07 15:47:21,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:21,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:21,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:21,950 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247795143] [2019-12-07 15:47:21,950 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:21,950 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 15:47:21,950 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227265250] [2019-12-07 15:47:21,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 15:47:21,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:21,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 15:47:21,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2019-12-07 15:47:21,951 INFO L87 Difference]: Start difference. First operand 36558 states and 108350 transitions. Second operand 14 states. [2019-12-07 15:47:23,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:23,197 INFO L93 Difference]: Finished difference Result 42226 states and 124272 transitions. [2019-12-07 15:47:23,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 15:47:23,198 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 72 [2019-12-07 15:47:23,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:23,242 INFO L225 Difference]: With dead ends: 42226 [2019-12-07 15:47:23,242 INFO L226 Difference]: Without dead ends: 37593 [2019-12-07 15:47:23,242 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=130, Invalid=740, Unknown=0, NotChecked=0, Total=870 [2019-12-07 15:47:23,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37593 states. [2019-12-07 15:47:23,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37593 to 33137. [2019-12-07 15:47:23,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33137 states. [2019-12-07 15:47:23,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33137 states to 33137 states and 97316 transitions. [2019-12-07 15:47:23,759 INFO L78 Accepts]: Start accepts. Automaton has 33137 states and 97316 transitions. Word has length 72 [2019-12-07 15:47:23,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:23,759 INFO L462 AbstractCegarLoop]: Abstraction has 33137 states and 97316 transitions. [2019-12-07 15:47:23,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 15:47:23,759 INFO L276 IsEmpty]: Start isEmpty. Operand 33137 states and 97316 transitions. [2019-12-07 15:47:23,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:23,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:23,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:23,794 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:23,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:23,794 INFO L82 PathProgramCache]: Analyzing trace with hash -156257871, now seen corresponding path program 27 times [2019-12-07 15:47:23,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:23,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810468537] [2019-12-07 15:47:23,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:23,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:24,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:24,149 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810468537] [2019-12-07 15:47:24,149 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:24,149 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:47:24,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [741287423] [2019-12-07 15:47:24,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:47:24,149 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:24,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:47:24,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:47:24,150 INFO L87 Difference]: Start difference. First operand 33137 states and 97316 transitions. Second operand 18 states. [2019-12-07 15:47:30,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:30,262 INFO L93 Difference]: Finished difference Result 38873 states and 113905 transitions. [2019-12-07 15:47:30,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 15:47:30,262 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:47:30,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:30,306 INFO L225 Difference]: With dead ends: 38873 [2019-12-07 15:47:30,306 INFO L226 Difference]: Without dead ends: 38367 [2019-12-07 15:47:30,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 555 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=290, Invalid=2160, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:47:30,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38367 states. [2019-12-07 15:47:30,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38367 to 34625. [2019-12-07 15:47:30,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34625 states. [2019-12-07 15:47:30,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34625 states to 34625 states and 102041 transitions. [2019-12-07 15:47:30,832 INFO L78 Accepts]: Start accepts. Automaton has 34625 states and 102041 transitions. Word has length 72 [2019-12-07 15:47:30,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:30,832 INFO L462 AbstractCegarLoop]: Abstraction has 34625 states and 102041 transitions. [2019-12-07 15:47:30,832 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:47:30,832 INFO L276 IsEmpty]: Start isEmpty. Operand 34625 states and 102041 transitions. [2019-12-07 15:47:30,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:30,866 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:30,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:30,866 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:30,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:30,866 INFO L82 PathProgramCache]: Analyzing trace with hash -1283212585, now seen corresponding path program 28 times [2019-12-07 15:47:30,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:30,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237879331] [2019-12-07 15:47:30,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:30,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:31,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:31,367 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1237879331] [2019-12-07 15:47:31,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:31,367 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:47:31,367 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810777327] [2019-12-07 15:47:31,368 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:47:31,368 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:31,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:47:31,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=490, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:47:31,368 INFO L87 Difference]: Start difference. First operand 34625 states and 102041 transitions. Second operand 24 states. [2019-12-07 15:47:33,918 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 23 [2019-12-07 15:47:34,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:34,858 INFO L93 Difference]: Finished difference Result 49802 states and 146544 transitions. [2019-12-07 15:47:34,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 15:47:34,858 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:47:34,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:34,904 INFO L225 Difference]: With dead ends: 49802 [2019-12-07 15:47:34,905 INFO L226 Difference]: Without dead ends: 40142 [2019-12-07 15:47:34,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 815 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=367, Invalid=2939, Unknown=0, NotChecked=0, Total=3306 [2019-12-07 15:47:35,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40142 states. [2019-12-07 15:47:35,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40142 to 31128. [2019-12-07 15:47:35,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31128 states. [2019-12-07 15:47:35,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31128 states to 31128 states and 90386 transitions. [2019-12-07 15:47:35,427 INFO L78 Accepts]: Start accepts. Automaton has 31128 states and 90386 transitions. Word has length 72 [2019-12-07 15:47:35,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:35,428 INFO L462 AbstractCegarLoop]: Abstraction has 31128 states and 90386 transitions. [2019-12-07 15:47:35,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:47:35,428 INFO L276 IsEmpty]: Start isEmpty. Operand 31128 states and 90386 transitions. [2019-12-07 15:47:35,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:35,459 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:35,459 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:35,460 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:35,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:35,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1389596133, now seen corresponding path program 29 times [2019-12-07 15:47:35,460 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:35,460 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150141135] [2019-12-07 15:47:35,460 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:35,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:35,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:35,731 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150141135] [2019-12-07 15:47:35,731 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:35,731 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:47:35,731 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002598732] [2019-12-07 15:47:35,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:47:35,731 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:35,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:47:35,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:47:35,731 INFO L87 Difference]: Start difference. First operand 31128 states and 90386 transitions. Second operand 18 states. [2019-12-07 15:47:39,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:39,684 INFO L93 Difference]: Finished difference Result 36103 states and 103730 transitions. [2019-12-07 15:47:39,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 15:47:39,684 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:47:39,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:39,780 INFO L225 Difference]: With dead ends: 36103 [2019-12-07 15:47:39,780 INFO L226 Difference]: Without dead ends: 34198 [2019-12-07 15:47:39,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 483 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=288, Invalid=1874, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 15:47:39,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34198 states. [2019-12-07 15:47:40,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34198 to 30508. [2019-12-07 15:47:40,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30508 states. [2019-12-07 15:47:40,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30508 states to 30508 states and 88405 transitions. [2019-12-07 15:47:40,218 INFO L78 Accepts]: Start accepts. Automaton has 30508 states and 88405 transitions. Word has length 72 [2019-12-07 15:47:40,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:40,218 INFO L462 AbstractCegarLoop]: Abstraction has 30508 states and 88405 transitions. [2019-12-07 15:47:40,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:47:40,219 INFO L276 IsEmpty]: Start isEmpty. Operand 30508 states and 88405 transitions. [2019-12-07 15:47:40,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:40,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:40,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:40,249 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:40,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:40,249 INFO L82 PathProgramCache]: Analyzing trace with hash 312823295, now seen corresponding path program 30 times [2019-12-07 15:47:40,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:40,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937144567] [2019-12-07 15:47:40,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:40,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:40,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:40,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937144567] [2019-12-07 15:47:40,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:40,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:47:40,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299035148] [2019-12-07 15:47:40,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:47:40,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:40,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:47:40,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:47:40,635 INFO L87 Difference]: Start difference. First operand 30508 states and 88405 transitions. Second operand 19 states. [2019-12-07 15:47:43,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:43,122 INFO L93 Difference]: Finished difference Result 35676 states and 102830 transitions. [2019-12-07 15:47:43,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 15:47:43,122 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:47:43,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:43,157 INFO L225 Difference]: With dead ends: 35676 [2019-12-07 15:47:43,157 INFO L226 Difference]: Without dead ends: 30974 [2019-12-07 15:47:43,158 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 582 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=321, Invalid=2331, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 15:47:43,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30974 states. [2019-12-07 15:47:43,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30974 to 28411. [2019-12-07 15:47:43,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28411 states. [2019-12-07 15:47:43,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28411 states to 28411 states and 82139 transitions. [2019-12-07 15:47:43,594 INFO L78 Accepts]: Start accepts. Automaton has 28411 states and 82139 transitions. Word has length 72 [2019-12-07 15:47:43,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:43,594 INFO L462 AbstractCegarLoop]: Abstraction has 28411 states and 82139 transitions. [2019-12-07 15:47:43,594 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:47:43,594 INFO L276 IsEmpty]: Start isEmpty. Operand 28411 states and 82139 transitions. [2019-12-07 15:47:43,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:43,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:43,623 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:43,623 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:43,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:43,623 INFO L82 PathProgramCache]: Analyzing trace with hash -1326041155, now seen corresponding path program 31 times [2019-12-07 15:47:43,624 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:43,624 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125790267] [2019-12-07 15:47:43,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:43,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:44,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:44,198 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125790267] [2019-12-07 15:47:44,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:44,198 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:47:44,198 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499527392] [2019-12-07 15:47:44,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:47:44,198 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:44,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:47:44,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=583, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:47:44,199 INFO L87 Difference]: Start difference. First operand 28411 states and 82139 transitions. Second operand 26 states. [2019-12-07 15:47:47,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:47,299 INFO L93 Difference]: Finished difference Result 36917 states and 105469 transitions. [2019-12-07 15:47:47,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 15:47:47,299 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:47:47,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:47,340 INFO L225 Difference]: With dead ends: 36917 [2019-12-07 15:47:47,340 INFO L226 Difference]: Without dead ends: 34207 [2019-12-07 15:47:47,341 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 786 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=377, Invalid=3045, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 15:47:47,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34207 states. [2019-12-07 15:47:47,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34207 to 27870. [2019-12-07 15:47:47,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27870 states. [2019-12-07 15:47:47,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27870 states to 27870 states and 80361 transitions. [2019-12-07 15:47:47,817 INFO L78 Accepts]: Start accepts. Automaton has 27870 states and 80361 transitions. Word has length 72 [2019-12-07 15:47:47,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:47,817 INFO L462 AbstractCegarLoop]: Abstraction has 27870 states and 80361 transitions. [2019-12-07 15:47:47,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:47:47,818 INFO L276 IsEmpty]: Start isEmpty. Operand 27870 states and 80361 transitions. [2019-12-07 15:47:47,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:47,845 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:47,846 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:47,846 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:47,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:47,846 INFO L82 PathProgramCache]: Analyzing trace with hash -116411483, now seen corresponding path program 32 times [2019-12-07 15:47:47,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:47,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258960710] [2019-12-07 15:47:47,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:47,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:48,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:48,306 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258960710] [2019-12-07 15:47:48,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:48,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:47:48,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812934200] [2019-12-07 15:47:48,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:47:48,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:48,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:47:48,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:47:48,306 INFO L87 Difference]: Start difference. First operand 27870 states and 80361 transitions. Second operand 22 states. [2019-12-07 15:47:50,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:50,905 INFO L93 Difference]: Finished difference Result 39400 states and 112536 transitions. [2019-12-07 15:47:50,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:47:50,905 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:47:50,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:50,947 INFO L225 Difference]: With dead ends: 39400 [2019-12-07 15:47:50,947 INFO L226 Difference]: Without dead ends: 37280 [2019-12-07 15:47:50,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 338 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=208, Invalid=1514, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:47:51,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37280 states. [2019-12-07 15:47:51,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37280 to 28864. [2019-12-07 15:47:51,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28864 states. [2019-12-07 15:47:51,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28864 states to 28864 states and 82948 transitions. [2019-12-07 15:47:51,411 INFO L78 Accepts]: Start accepts. Automaton has 28864 states and 82948 transitions. Word has length 72 [2019-12-07 15:47:51,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:51,411 INFO L462 AbstractCegarLoop]: Abstraction has 28864 states and 82948 transitions. [2019-12-07 15:47:51,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:47:51,411 INFO L276 IsEmpty]: Start isEmpty. Operand 28864 states and 82948 transitions. [2019-12-07 15:47:51,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:51,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:51,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:51,439 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:51,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:51,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1202538871, now seen corresponding path program 33 times [2019-12-07 15:47:51,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:51,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810480034] [2019-12-07 15:47:51,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:51,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:51,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:51,732 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [810480034] [2019-12-07 15:47:51,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:51,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:47:51,732 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335709988] [2019-12-07 15:47:51,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:47:51,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:51,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:47:51,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:47:51,733 INFO L87 Difference]: Start difference. First operand 28864 states and 82948 transitions. Second operand 15 states. [2019-12-07 15:47:53,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:53,459 INFO L93 Difference]: Finished difference Result 36161 states and 103940 transitions. [2019-12-07 15:47:53,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 15:47:53,460 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:47:53,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:53,498 INFO L225 Difference]: With dead ends: 36161 [2019-12-07 15:47:53,499 INFO L226 Difference]: Without dead ends: 34357 [2019-12-07 15:47:53,499 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=186, Invalid=1004, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 15:47:53,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34357 states. [2019-12-07 15:47:53,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34357 to 30170. [2019-12-07 15:47:53,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30170 states. [2019-12-07 15:47:53,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30170 states to 30170 states and 86576 transitions. [2019-12-07 15:47:53,958 INFO L78 Accepts]: Start accepts. Automaton has 30170 states and 86576 transitions. Word has length 72 [2019-12-07 15:47:53,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:53,959 INFO L462 AbstractCegarLoop]: Abstraction has 30170 states and 86576 transitions. [2019-12-07 15:47:53,959 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:47:53,959 INFO L276 IsEmpty]: Start isEmpty. Operand 30170 states and 86576 transitions. [2019-12-07 15:47:53,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:53,988 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:53,988 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:53,988 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:53,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:53,989 INFO L82 PathProgramCache]: Analyzing trace with hash 1152058709, now seen corresponding path program 34 times [2019-12-07 15:47:53,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:53,989 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828000594] [2019-12-07 15:47:53,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:54,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:54,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:54,194 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828000594] [2019-12-07 15:47:54,194 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:54,194 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:47:54,195 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694442214] [2019-12-07 15:47:54,195 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:47:54,195 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:54,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:47:54,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:47:54,195 INFO L87 Difference]: Start difference. First operand 30170 states and 86576 transitions. Second operand 15 states. [2019-12-07 15:47:55,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:55,533 INFO L93 Difference]: Finished difference Result 37007 states and 106262 transitions. [2019-12-07 15:47:55,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 15:47:55,533 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:47:55,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:55,566 INFO L225 Difference]: With dead ends: 37007 [2019-12-07 15:47:55,566 INFO L226 Difference]: Without dead ends: 33930 [2019-12-07 15:47:55,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=118, Invalid=638, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:47:55,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33930 states. [2019-12-07 15:47:55,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33930 to 29933. [2019-12-07 15:47:55,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29933 states. [2019-12-07 15:47:56,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29933 states to 29933 states and 85975 transitions. [2019-12-07 15:47:56,001 INFO L78 Accepts]: Start accepts. Automaton has 29933 states and 85975 transitions. Word has length 72 [2019-12-07 15:47:56,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:56,001 INFO L462 AbstractCegarLoop]: Abstraction has 29933 states and 85975 transitions. [2019-12-07 15:47:56,001 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:47:56,002 INFO L276 IsEmpty]: Start isEmpty. Operand 29933 states and 85975 transitions. [2019-12-07 15:47:56,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:56,030 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:56,030 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:56,030 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:56,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:56,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1544349327, now seen corresponding path program 35 times [2019-12-07 15:47:56,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:56,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [906546922] [2019-12-07 15:47:56,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:56,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:56,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:56,335 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [906546922] [2019-12-07 15:47:56,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:56,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:47:56,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1969382410] [2019-12-07 15:47:56,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:47:56,336 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:56,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:47:56,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:47:56,336 INFO L87 Difference]: Start difference. First operand 29933 states and 85975 transitions. Second operand 16 states. [2019-12-07 15:47:58,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:47:58,392 INFO L93 Difference]: Finished difference Result 32725 states and 93314 transitions. [2019-12-07 15:47:58,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 15:47:58,392 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:47:58,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:47:58,428 INFO L225 Difference]: With dead ends: 32725 [2019-12-07 15:47:58,429 INFO L226 Difference]: Without dead ends: 32689 [2019-12-07 15:47:58,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=223, Invalid=1337, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 15:47:58,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32689 states. [2019-12-07 15:47:58,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32689 to 30590. [2019-12-07 15:47:58,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30590 states. [2019-12-07 15:47:58,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30590 states to 30590 states and 87740 transitions. [2019-12-07 15:47:58,871 INFO L78 Accepts]: Start accepts. Automaton has 30590 states and 87740 transitions. Word has length 72 [2019-12-07 15:47:58,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:47:58,872 INFO L462 AbstractCegarLoop]: Abstraction has 30590 states and 87740 transitions. [2019-12-07 15:47:58,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:47:58,872 INFO L276 IsEmpty]: Start isEmpty. Operand 30590 states and 87740 transitions. [2019-12-07 15:47:58,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:47:58,901 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:47:58,901 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:47:58,902 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:47:58,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:47:58,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1515265477, now seen corresponding path program 36 times [2019-12-07 15:47:58,902 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:47:58,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306540925] [2019-12-07 15:47:58,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:47:58,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:47:59,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:47:59,720 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306540925] [2019-12-07 15:47:59,720 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:47:59,720 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:47:59,720 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146485017] [2019-12-07 15:47:59,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:47:59,721 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:47:59,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:47:59,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=583, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:47:59,721 INFO L87 Difference]: Start difference. First operand 30590 states and 87740 transitions. Second operand 26 states. [2019-12-07 15:48:04,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:04,646 INFO L93 Difference]: Finished difference Result 37985 states and 108395 transitions. [2019-12-07 15:48:04,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 15:48:04,646 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:48:04,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:04,684 INFO L225 Difference]: With dead ends: 37985 [2019-12-07 15:48:04,684 INFO L226 Difference]: Without dead ends: 36036 [2019-12-07 15:48:04,684 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 958 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=580, Invalid=3976, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 15:48:04,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36036 states. [2019-12-07 15:48:05,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36036 to 31369. [2019-12-07 15:48:05,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31369 states. [2019-12-07 15:48:05,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31369 states to 31369 states and 89990 transitions. [2019-12-07 15:48:05,161 INFO L78 Accepts]: Start accepts. Automaton has 31369 states and 89990 transitions. Word has length 72 [2019-12-07 15:48:05,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:05,161 INFO L462 AbstractCegarLoop]: Abstraction has 31369 states and 89990 transitions. [2019-12-07 15:48:05,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:48:05,161 INFO L276 IsEmpty]: Start isEmpty. Operand 31369 states and 89990 transitions. [2019-12-07 15:48:05,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:05,191 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:05,192 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:05,192 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:05,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:05,192 INFO L82 PathProgramCache]: Analyzing trace with hash -454557265, now seen corresponding path program 37 times [2019-12-07 15:48:05,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:05,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327270917] [2019-12-07 15:48:05,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:05,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:05,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:05,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327270917] [2019-12-07 15:48:05,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:05,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:48:05,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054630433] [2019-12-07 15:48:05,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:48:05,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:48:05,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:48:05,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:48:05,695 INFO L87 Difference]: Start difference. First operand 31369 states and 89990 transitions. Second operand 17 states. [2019-12-07 15:48:08,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:08,857 INFO L93 Difference]: Finished difference Result 36213 states and 103559 transitions. [2019-12-07 15:48:08,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 15:48:08,858 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:48:08,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:08,896 INFO L225 Difference]: With dead ends: 36213 [2019-12-07 15:48:08,897 INFO L226 Difference]: Without dead ends: 34414 [2019-12-07 15:48:08,897 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 298 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=251, Invalid=1389, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 15:48:08,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34414 states. [2019-12-07 15:48:09,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34414 to 31759. [2019-12-07 15:48:09,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31759 states. [2019-12-07 15:48:09,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31759 states to 31759 states and 91095 transitions. [2019-12-07 15:48:09,362 INFO L78 Accepts]: Start accepts. Automaton has 31759 states and 91095 transitions. Word has length 72 [2019-12-07 15:48:09,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:09,362 INFO L462 AbstractCegarLoop]: Abstraction has 31759 states and 91095 transitions. [2019-12-07 15:48:09,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:48:09,362 INFO L276 IsEmpty]: Start isEmpty. Operand 31759 states and 91095 transitions. [2019-12-07 15:48:09,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:09,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:09,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:09,393 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:09,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:09,394 INFO L82 PathProgramCache]: Analyzing trace with hash -846300151, now seen corresponding path program 38 times [2019-12-07 15:48:09,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:09,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721204982] [2019-12-07 15:48:09,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:09,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:10,481 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:10,481 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721204982] [2019-12-07 15:48:10,481 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:10,481 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:48:10,481 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429102022] [2019-12-07 15:48:10,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:48:10,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:48:10,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:48:10,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=492, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:48:10,482 INFO L87 Difference]: Start difference. First operand 31759 states and 91095 transitions. Second operand 24 states. [2019-12-07 15:48:17,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:17,929 INFO L93 Difference]: Finished difference Result 34973 states and 99405 transitions. [2019-12-07 15:48:17,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 15:48:17,930 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:48:17,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:17,986 INFO L225 Difference]: With dead ends: 34973 [2019-12-07 15:48:17,986 INFO L226 Difference]: Without dead ends: 34565 [2019-12-07 15:48:17,987 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 6 SyntacticMatches, 11 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 826 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=467, Invalid=3565, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 15:48:18,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34565 states. [2019-12-07 15:48:18,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34565 to 32012. [2019-12-07 15:48:18,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32012 states. [2019-12-07 15:48:18,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32012 states to 32012 states and 91764 transitions. [2019-12-07 15:48:18,470 INFO L78 Accepts]: Start accepts. Automaton has 32012 states and 91764 transitions. Word has length 72 [2019-12-07 15:48:18,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:18,470 INFO L462 AbstractCegarLoop]: Abstraction has 32012 states and 91764 transitions. [2019-12-07 15:48:18,470 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:48:18,470 INFO L276 IsEmpty]: Start isEmpty. Operand 32012 states and 91764 transitions. [2019-12-07 15:48:18,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:18,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:18,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:18,501 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:18,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:18,501 INFO L82 PathProgramCache]: Analyzing trace with hash -384695361, now seen corresponding path program 39 times [2019-12-07 15:48:18,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:18,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013472700] [2019-12-07 15:48:18,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:18,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:18,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:18,788 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013472700] [2019-12-07 15:48:18,788 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:18,788 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:48:18,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [547222237] [2019-12-07 15:48:18,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:48:18,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:48:18,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:48:18,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:48:18,789 INFO L87 Difference]: Start difference. First operand 32012 states and 91764 transitions. Second operand 16 states. [2019-12-07 15:48:21,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:21,202 INFO L93 Difference]: Finished difference Result 34276 states and 97594 transitions. [2019-12-07 15:48:21,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 15:48:21,204 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:48:21,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:21,260 INFO L225 Difference]: With dead ends: 34276 [2019-12-07 15:48:21,260 INFO L226 Difference]: Without dead ends: 33271 [2019-12-07 15:48:21,261 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=227, Invalid=1333, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 15:48:21,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33271 states. [2019-12-07 15:48:21,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33271 to 30911. [2019-12-07 15:48:21,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30911 states. [2019-12-07 15:48:21,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30911 states to 30911 states and 88651 transitions. [2019-12-07 15:48:21,733 INFO L78 Accepts]: Start accepts. Automaton has 30911 states and 88651 transitions. Word has length 72 [2019-12-07 15:48:21,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:21,733 INFO L462 AbstractCegarLoop]: Abstraction has 30911 states and 88651 transitions. [2019-12-07 15:48:21,733 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:48:21,733 INFO L276 IsEmpty]: Start isEmpty. Operand 30911 states and 88651 transitions. [2019-12-07 15:48:21,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:21,763 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:21,763 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:21,763 INFO L410 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:21,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:21,764 INFO L82 PathProgramCache]: Analyzing trace with hash 1089087959, now seen corresponding path program 40 times [2019-12-07 15:48:21,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:21,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280400720] [2019-12-07 15:48:21,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:21,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:22,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:22,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280400720] [2019-12-07 15:48:22,380 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:22,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:48:22,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447809974] [2019-12-07 15:48:22,380 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:48:22,380 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:48:22,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:48:22,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:48:22,380 INFO L87 Difference]: Start difference. First operand 30911 states and 88651 transitions. Second operand 24 states. [2019-12-07 15:48:27,498 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 21 [2019-12-07 15:48:28,135 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 23 [2019-12-07 15:48:31,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:31,976 INFO L93 Difference]: Finished difference Result 41983 states and 118745 transitions. [2019-12-07 15:48:31,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 15:48:31,976 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:48:31,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:32,017 INFO L225 Difference]: With dead ends: 41983 [2019-12-07 15:48:32,017 INFO L226 Difference]: Without dead ends: 41732 [2019-12-07 15:48:32,018 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 7 SyntacticMatches, 3 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 842 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=369, Invalid=3171, Unknown=0, NotChecked=0, Total=3540 [2019-12-07 15:48:32,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41732 states. [2019-12-07 15:48:32,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41732 to 33229. [2019-12-07 15:48:32,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33229 states. [2019-12-07 15:48:32,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33229 states to 33229 states and 95340 transitions. [2019-12-07 15:48:32,569 INFO L78 Accepts]: Start accepts. Automaton has 33229 states and 95340 transitions. Word has length 72 [2019-12-07 15:48:32,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:32,569 INFO L462 AbstractCegarLoop]: Abstraction has 33229 states and 95340 transitions. [2019-12-07 15:48:32,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:48:32,569 INFO L276 IsEmpty]: Start isEmpty. Operand 33229 states and 95340 transitions. [2019-12-07 15:48:32,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:32,601 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:32,601 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:32,601 INFO L410 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:32,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:32,601 INFO L82 PathProgramCache]: Analyzing trace with hash 1118171809, now seen corresponding path program 41 times [2019-12-07 15:48:32,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:32,601 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3965596] [2019-12-07 15:48:32,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:32,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:32,960 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 20 [2019-12-07 15:48:33,823 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 30 [2019-12-07 15:48:34,079 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 29 [2019-12-07 15:48:34,330 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 24 [2019-12-07 15:48:34,564 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 24 [2019-12-07 15:48:34,900 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 26 [2019-12-07 15:48:35,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:35,831 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [3965596] [2019-12-07 15:48:35,831 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:35,831 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [30] imperfect sequences [] total 30 [2019-12-07 15:48:35,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201352602] [2019-12-07 15:48:35,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2019-12-07 15:48:35,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:48:35,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2019-12-07 15:48:35,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=909, Unknown=0, NotChecked=0, Total=992 [2019-12-07 15:48:35,832 INFO L87 Difference]: Start difference. First operand 33229 states and 95340 transitions. Second operand 32 states. [2019-12-07 15:48:36,868 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:48:39,036 WARN L192 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 36 [2019-12-07 15:48:39,630 WARN L192 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 38 [2019-12-07 15:48:44,741 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 34 [2019-12-07 15:48:48,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:48,226 INFO L93 Difference]: Finished difference Result 35699 states and 101805 transitions. [2019-12-07 15:48:48,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 15:48:48,226 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 72 [2019-12-07 15:48:48,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:48,266 INFO L225 Difference]: With dead ends: 35699 [2019-12-07 15:48:48,266 INFO L226 Difference]: Without dead ends: 35560 [2019-12-07 15:48:48,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 4 SyntacticMatches, 5 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1026 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=524, Invalid=4446, Unknown=0, NotChecked=0, Total=4970 [2019-12-07 15:48:48,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35560 states. [2019-12-07 15:48:48,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35560 to 33180. [2019-12-07 15:48:48,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33180 states. [2019-12-07 15:48:48,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33180 states to 33180 states and 95214 transitions. [2019-12-07 15:48:48,783 INFO L78 Accepts]: Start accepts. Automaton has 33180 states and 95214 transitions. Word has length 72 [2019-12-07 15:48:48,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:48,783 INFO L462 AbstractCegarLoop]: Abstraction has 33180 states and 95214 transitions. [2019-12-07 15:48:48,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 32 states. [2019-12-07 15:48:48,784 INFO L276 IsEmpty]: Start isEmpty. Operand 33180 states and 95214 transitions. [2019-12-07 15:48:48,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:48,898 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:48,898 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:48,898 INFO L410 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:48,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:48,898 INFO L82 PathProgramCache]: Analyzing trace with hash 1459359115, now seen corresponding path program 42 times [2019-12-07 15:48:48,899 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:48,899 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339887986] [2019-12-07 15:48:48,899 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:48,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:49,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:49,177 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339887986] [2019-12-07 15:48:49,177 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:49,177 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:48:49,177 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2060401980] [2019-12-07 15:48:49,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:48:49,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:48:49,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:48:49,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:48:49,178 INFO L87 Difference]: Start difference. First operand 33180 states and 95214 transitions. Second operand 16 states. [2019-12-07 15:48:51,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:51,179 INFO L93 Difference]: Finished difference Result 35717 states and 101897 transitions. [2019-12-07 15:48:51,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 15:48:51,179 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:48:51,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:51,220 INFO L225 Difference]: With dead ends: 35717 [2019-12-07 15:48:51,220 INFO L226 Difference]: Without dead ends: 35681 [2019-12-07 15:48:51,220 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 257 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=215, Invalid=1267, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 15:48:51,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35681 states. [2019-12-07 15:48:51,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35681 to 33355. [2019-12-07 15:48:51,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33355 states. [2019-12-07 15:48:51,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33355 states to 33355 states and 95712 transitions. [2019-12-07 15:48:51,724 INFO L78 Accepts]: Start accepts. Automaton has 33355 states and 95712 transitions. Word has length 72 [2019-12-07 15:48:51,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:51,724 INFO L462 AbstractCegarLoop]: Abstraction has 33355 states and 95712 transitions. [2019-12-07 15:48:51,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:48:51,724 INFO L276 IsEmpty]: Start isEmpty. Operand 33355 states and 95712 transitions. [2019-12-07 15:48:51,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:51,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:51,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:51,756 INFO L410 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:51,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:51,756 INFO L82 PathProgramCache]: Analyzing trace with hash 1488442965, now seen corresponding path program 43 times [2019-12-07 15:48:51,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:51,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225670491] [2019-12-07 15:48:51,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:51,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:48:52,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:48:52,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1225670491] [2019-12-07 15:48:52,620 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:48:52,620 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:48:52,620 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096010514] [2019-12-07 15:48:52,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:48:52,621 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:48:52,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:48:52,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=588, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:48:52,621 INFO L87 Difference]: Start difference. First operand 33355 states and 95712 transitions. Second operand 26 states. [2019-12-07 15:48:54,904 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 27 [2019-12-07 15:48:59,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:48:59,171 INFO L93 Difference]: Finished difference Result 43516 states and 123807 transitions. [2019-12-07 15:48:59,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2019-12-07 15:48:59,171 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:48:59,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:48:59,219 INFO L225 Difference]: With dead ends: 43516 [2019-12-07 15:48:59,219 INFO L226 Difference]: Without dead ends: 41895 [2019-12-07 15:48:59,219 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 5 SyntacticMatches, 5 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1441 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=604, Invalid=5096, Unknown=0, NotChecked=0, Total=5700 [2019-12-07 15:48:59,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41895 states. [2019-12-07 15:48:59,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41895 to 36234. [2019-12-07 15:48:59,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36234 states. [2019-12-07 15:48:59,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36234 states to 36234 states and 104270 transitions. [2019-12-07 15:48:59,851 INFO L78 Accepts]: Start accepts. Automaton has 36234 states and 104270 transitions. Word has length 72 [2019-12-07 15:48:59,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:48:59,852 INFO L462 AbstractCegarLoop]: Abstraction has 36234 states and 104270 transitions. [2019-12-07 15:48:59,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:48:59,852 INFO L276 IsEmpty]: Start isEmpty. Operand 36234 states and 104270 transitions. [2019-12-07 15:48:59,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:48:59,887 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:48:59,888 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:48:59,888 INFO L410 AbstractCegarLoop]: === Iteration 51 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:48:59,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:48:59,888 INFO L82 PathProgramCache]: Analyzing trace with hash 2119557665, now seen corresponding path program 44 times [2019-12-07 15:48:59,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:48:59,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45965034] [2019-12-07 15:48:59,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:48:59,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:00,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:00,502 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [45965034] [2019-12-07 15:49:00,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:00,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 15:49:00,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633915300] [2019-12-07 15:49:00,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 15:49:00,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:00,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 15:49:00,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=537, Unknown=0, NotChecked=0, Total=600 [2019-12-07 15:49:00,503 INFO L87 Difference]: Start difference. First operand 36234 states and 104270 transitions. Second operand 25 states. [2019-12-07 15:49:02,241 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 15:49:02,692 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 27 [2019-12-07 15:49:03,592 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 29 [2019-12-07 15:49:07,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:49:07,121 INFO L93 Difference]: Finished difference Result 45283 states and 129942 transitions. [2019-12-07 15:49:07,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 15:49:07,121 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 72 [2019-12-07 15:49:07,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:49:07,174 INFO L225 Difference]: With dead ends: 45283 [2019-12-07 15:49:07,174 INFO L226 Difference]: Without dead ends: 43339 [2019-12-07 15:49:07,174 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 544 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=287, Invalid=2365, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 15:49:07,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43339 states. [2019-12-07 15:49:07,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43339 to 36397. [2019-12-07 15:49:07,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36397 states. [2019-12-07 15:49:07,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36397 states to 36397 states and 104773 transitions. [2019-12-07 15:49:07,734 INFO L78 Accepts]: Start accepts. Automaton has 36397 states and 104773 transitions. Word has length 72 [2019-12-07 15:49:07,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:49:07,734 INFO L462 AbstractCegarLoop]: Abstraction has 36397 states and 104773 transitions. [2019-12-07 15:49:07,734 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 15:49:07,734 INFO L276 IsEmpty]: Start isEmpty. Operand 36397 states and 104773 transitions. [2019-12-07 15:49:07,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:49:07,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:49:07,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:49:07,768 INFO L410 AbstractCegarLoop]: === Iteration 52 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:49:07,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:49:07,768 INFO L82 PathProgramCache]: Analyzing trace with hash 1033430277, now seen corresponding path program 45 times [2019-12-07 15:49:07,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:49:07,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1238634402] [2019-12-07 15:49:07,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:49:07,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:08,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:08,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1238634402] [2019-12-07 15:49:08,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:08,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:49:08,120 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629187128] [2019-12-07 15:49:08,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:49:08,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:08,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:49:08,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:49:08,120 INFO L87 Difference]: Start difference. First operand 36397 states and 104773 transitions. Second operand 17 states. [2019-12-07 15:49:10,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:49:10,161 INFO L93 Difference]: Finished difference Result 41623 states and 119857 transitions. [2019-12-07 15:49:10,162 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:49:10,162 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:49:10,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:49:10,208 INFO L225 Difference]: With dead ends: 41623 [2019-12-07 15:49:10,209 INFO L226 Difference]: Without dead ends: 39819 [2019-12-07 15:49:10,209 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=198, Invalid=1208, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 15:49:10,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39819 states. [2019-12-07 15:49:10,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39819 to 36529. [2019-12-07 15:49:10,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36529 states. [2019-12-07 15:49:10,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36529 states to 36529 states and 105225 transitions. [2019-12-07 15:49:10,846 INFO L78 Accepts]: Start accepts. Automaton has 36529 states and 105225 transitions. Word has length 72 [2019-12-07 15:49:10,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:49:10,846 INFO L462 AbstractCegarLoop]: Abstraction has 36529 states and 105225 transitions. [2019-12-07 15:49:10,846 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:49:10,846 INFO L276 IsEmpty]: Start isEmpty. Operand 36529 states and 105225 transitions. [2019-12-07 15:49:10,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:49:10,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:49:10,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:49:10,878 INFO L410 AbstractCegarLoop]: === Iteration 53 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:49:10,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:49:10,878 INFO L82 PathProgramCache]: Analyzing trace with hash -906939439, now seen corresponding path program 46 times [2019-12-07 15:49:10,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:49:10,878 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913781316] [2019-12-07 15:49:10,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:49:10,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:11,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:11,493 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913781316] [2019-12-07 15:49:11,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:11,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 15:49:11,493 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347039626] [2019-12-07 15:49:11,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 15:49:11,494 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:11,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 15:49:11,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2019-12-07 15:49:11,494 INFO L87 Difference]: Start difference. First operand 36529 states and 105225 transitions. Second operand 25 states. [2019-12-07 15:49:16,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:49:16,404 INFO L93 Difference]: Finished difference Result 51954 states and 148541 transitions. [2019-12-07 15:49:16,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 15:49:16,404 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 72 [2019-12-07 15:49:16,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:49:16,461 INFO L225 Difference]: With dead ends: 51954 [2019-12-07 15:49:16,461 INFO L226 Difference]: Without dead ends: 48946 [2019-12-07 15:49:16,462 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 635 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=306, Invalid=2664, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 15:49:16,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48946 states. [2019-12-07 15:49:17,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48946 to 37673. [2019-12-07 15:49:17,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37673 states. [2019-12-07 15:49:17,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37673 states to 37673 states and 108658 transitions. [2019-12-07 15:49:17,084 INFO L78 Accepts]: Start accepts. Automaton has 37673 states and 108658 transitions. Word has length 72 [2019-12-07 15:49:17,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:49:17,084 INFO L462 AbstractCegarLoop]: Abstraction has 37673 states and 108658 transitions. [2019-12-07 15:49:17,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 15:49:17,084 INFO L276 IsEmpty]: Start isEmpty. Operand 37673 states and 108658 transitions. [2019-12-07 15:49:17,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:49:17,120 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:49:17,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:49:17,120 INFO L410 AbstractCegarLoop]: === Iteration 54 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:49:17,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:49:17,120 INFO L82 PathProgramCache]: Analyzing trace with hash 153768773, now seen corresponding path program 47 times [2019-12-07 15:49:17,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:49:17,121 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813908803] [2019-12-07 15:49:17,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:49:17,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:17,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:17,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813908803] [2019-12-07 15:49:17,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:17,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:49:17,381 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84237747] [2019-12-07 15:49:17,381 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:49:17,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:17,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:49:17,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:49:17,382 INFO L87 Difference]: Start difference. First operand 37673 states and 108658 transitions. Second operand 17 states. [2019-12-07 15:49:18,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:49:18,893 INFO L93 Difference]: Finished difference Result 41604 states and 119226 transitions. [2019-12-07 15:49:18,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 15:49:18,893 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:49:18,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:49:18,941 INFO L225 Difference]: With dead ends: 41604 [2019-12-07 15:49:18,942 INFO L226 Difference]: Without dead ends: 41112 [2019-12-07 15:49:18,942 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=151, Invalid=971, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 15:49:19,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41112 states. [2019-12-07 15:49:19,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41112 to 37747. [2019-12-07 15:49:19,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37747 states. [2019-12-07 15:49:19,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37747 states to 37747 states and 108871 transitions. [2019-12-07 15:49:19,509 INFO L78 Accepts]: Start accepts. Automaton has 37747 states and 108871 transitions. Word has length 72 [2019-12-07 15:49:19,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:49:19,509 INFO L462 AbstractCegarLoop]: Abstraction has 37747 states and 108871 transitions. [2019-12-07 15:49:19,509 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:49:19,509 INFO L276 IsEmpty]: Start isEmpty. Operand 37747 states and 108871 transitions. [2019-12-07 15:49:19,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:49:19,544 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:49:19,544 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:49:19,545 INFO L410 AbstractCegarLoop]: === Iteration 55 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:49:19,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:49:19,545 INFO L82 PathProgramCache]: Analyzing trace with hash -1662977759, now seen corresponding path program 48 times [2019-12-07 15:49:19,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:49:19,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541888263] [2019-12-07 15:49:19,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:49:19,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:20,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:20,068 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541888263] [2019-12-07 15:49:20,068 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:20,068 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:49:20,068 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302931013] [2019-12-07 15:49:20,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:49:20,069 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:20,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:49:20,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:49:20,069 INFO L87 Difference]: Start difference. First operand 37747 states and 108871 transitions. Second operand 18 states. [2019-12-07 15:49:23,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:49:23,388 INFO L93 Difference]: Finished difference Result 42577 states and 122025 transitions. [2019-12-07 15:49:23,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 15:49:23,388 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:49:23,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:49:23,435 INFO L225 Difference]: With dead ends: 42577 [2019-12-07 15:49:23,435 INFO L226 Difference]: Without dead ends: 40902 [2019-12-07 15:49:23,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 427 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=296, Invalid=1866, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 15:49:23,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40902 states. [2019-12-07 15:49:23,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40902 to 37014. [2019-12-07 15:49:23,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37014 states. [2019-12-07 15:49:23,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37014 states to 37014 states and 106681 transitions. [2019-12-07 15:49:23,999 INFO L78 Accepts]: Start accepts. Automaton has 37014 states and 106681 transitions. Word has length 72 [2019-12-07 15:49:23,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:49:23,999 INFO L462 AbstractCegarLoop]: Abstraction has 37014 states and 106681 transitions. [2019-12-07 15:49:24,000 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:49:24,000 INFO L276 IsEmpty]: Start isEmpty. Operand 37014 states and 106681 transitions. [2019-12-07 15:49:24,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:49:24,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:49:24,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:49:24,035 INFO L410 AbstractCegarLoop]: === Iteration 56 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:49:24,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:49:24,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1384350895, now seen corresponding path program 49 times [2019-12-07 15:49:24,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:49:24,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354184382] [2019-12-07 15:49:24,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:49:24,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:25,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:25,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354184382] [2019-12-07 15:49:25,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:25,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2019-12-07 15:49:25,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438646656] [2019-12-07 15:49:25,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 15:49:25,472 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:25,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 15:49:25,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:49:25,472 INFO L87 Difference]: Start difference. First operand 37014 states and 106681 transitions. Second operand 28 states. [2019-12-07 15:49:33,419 WARN L192 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:49:34,108 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 31 [2019-12-07 15:49:34,692 WARN L192 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 33 [2019-12-07 15:49:35,052 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 25 [2019-12-07 15:49:36,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:49:36,544 INFO L93 Difference]: Finished difference Result 46763 states and 133697 transitions. [2019-12-07 15:49:36,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2019-12-07 15:49:36,546 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 72 [2019-12-07 15:49:36,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:49:36,595 INFO L225 Difference]: With dead ends: 46763 [2019-12-07 15:49:36,595 INFO L226 Difference]: Without dead ends: 46679 [2019-12-07 15:49:36,596 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1753 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=637, Invalid=6169, Unknown=0, NotChecked=0, Total=6806 [2019-12-07 15:49:36,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46679 states. [2019-12-07 15:49:37,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46679 to 41697. [2019-12-07 15:49:37,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41697 states. [2019-12-07 15:49:37,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41697 states to 41697 states and 120425 transitions. [2019-12-07 15:49:37,250 INFO L78 Accepts]: Start accepts. Automaton has 41697 states and 120425 transitions. Word has length 72 [2019-12-07 15:49:37,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:49:37,251 INFO L462 AbstractCegarLoop]: Abstraction has 41697 states and 120425 transitions. [2019-12-07 15:49:37,251 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 15:49:37,251 INFO L276 IsEmpty]: Start isEmpty. Operand 41697 states and 120425 transitions. [2019-12-07 15:49:37,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:49:37,290 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:49:37,290 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:49:37,290 INFO L410 AbstractCegarLoop]: === Iteration 57 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:49:37,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:49:37,291 INFO L82 PathProgramCache]: Analyzing trace with hash -1056441955, now seen corresponding path program 50 times [2019-12-07 15:49:37,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:49:37,291 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [285425891] [2019-12-07 15:49:37,291 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:49:37,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:38,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:38,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [285425891] [2019-12-07 15:49:38,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:38,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:49:38,024 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1870983557] [2019-12-07 15:49:38,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:49:38,024 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:38,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:49:38,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=590, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:49:38,024 INFO L87 Difference]: Start difference. First operand 41697 states and 120425 transitions. Second operand 26 states. [2019-12-07 15:49:40,828 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 27 [2019-12-07 15:49:41,215 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 25 [2019-12-07 15:49:41,937 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 25 [2019-12-07 15:49:43,048 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 27 [2019-12-07 15:49:44,422 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:49:44,780 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:49:45,454 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:49:46,630 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 27 [2019-12-07 15:49:52,713 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:49:53,017 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2019-12-07 15:49:55,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:49:55,294 INFO L93 Difference]: Finished difference Result 46561 states and 133258 transitions. [2019-12-07 15:49:55,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-12-07 15:49:55,295 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:49:55,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:49:55,363 INFO L225 Difference]: With dead ends: 46561 [2019-12-07 15:49:55,364 INFO L226 Difference]: Without dead ends: 46501 [2019-12-07 15:49:55,364 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1504 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=525, Invalid=5327, Unknown=0, NotChecked=0, Total=5852 [2019-12-07 15:49:55,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46501 states. [2019-12-07 15:49:55,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46501 to 41152. [2019-12-07 15:49:55,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41152 states. [2019-12-07 15:49:56,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41152 states to 41152 states and 118821 transitions. [2019-12-07 15:49:56,140 INFO L78 Accepts]: Start accepts. Automaton has 41152 states and 118821 transitions. Word has length 72 [2019-12-07 15:49:56,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:49:56,140 INFO L462 AbstractCegarLoop]: Abstraction has 41152 states and 118821 transitions. [2019-12-07 15:49:56,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:49:56,140 INFO L276 IsEmpty]: Start isEmpty. Operand 41152 states and 118821 transitions. [2019-12-07 15:49:56,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:49:56,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:49:56,175 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:49:56,175 INFO L410 AbstractCegarLoop]: === Iteration 58 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:49:56,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:49:56,176 INFO L82 PathProgramCache]: Analyzing trace with hash -1052167713, now seen corresponding path program 51 times [2019-12-07 15:49:56,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:49:56,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84492755] [2019-12-07 15:49:56,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:49:56,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:49:57,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:49:57,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84492755] [2019-12-07 15:49:57,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:49:57,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2019-12-07 15:49:57,217 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1917353139] [2019-12-07 15:49:57,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 15:49:57,217 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:49:57,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 15:49:57,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=689, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:49:57,217 INFO L87 Difference]: Start difference. First operand 41152 states and 118821 transitions. Second operand 28 states. [2019-12-07 15:50:02,952 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:50:07,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:07,526 INFO L93 Difference]: Finished difference Result 45929 states and 131431 transitions. [2019-12-07 15:50:07,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2019-12-07 15:50:07,527 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 72 [2019-12-07 15:50:07,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:07,580 INFO L225 Difference]: With dead ends: 45929 [2019-12-07 15:50:07,580 INFO L226 Difference]: Without dead ends: 45889 [2019-12-07 15:50:07,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1697 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=582, Invalid=6060, Unknown=0, NotChecked=0, Total=6642 [2019-12-07 15:50:07,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45889 states. [2019-12-07 15:50:08,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45889 to 41101. [2019-12-07 15:50:08,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41101 states. [2019-12-07 15:50:08,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41101 states to 41101 states and 118691 transitions. [2019-12-07 15:50:08,241 INFO L78 Accepts]: Start accepts. Automaton has 41101 states and 118691 transitions. Word has length 72 [2019-12-07 15:50:08,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:08,241 INFO L462 AbstractCegarLoop]: Abstraction has 41101 states and 118691 transitions. [2019-12-07 15:50:08,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 15:50:08,241 INFO L276 IsEmpty]: Start isEmpty. Operand 41101 states and 118691 transitions. [2019-12-07 15:50:08,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:08,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:08,280 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:08,280 INFO L410 AbstractCegarLoop]: === Iteration 59 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:08,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:08,280 INFO L82 PathProgramCache]: Analyzing trace with hash 1296490627, now seen corresponding path program 52 times [2019-12-07 15:50:08,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:08,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862903482] [2019-12-07 15:50:08,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:08,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:08,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:08,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862903482] [2019-12-07 15:50:08,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:08,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:50:08,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786549874] [2019-12-07 15:50:08,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:50:08,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:08,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:50:08,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:50:08,567 INFO L87 Difference]: Start difference. First operand 41101 states and 118691 transitions. Second operand 17 states. [2019-12-07 15:50:11,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:11,571 INFO L93 Difference]: Finished difference Result 50208 states and 144472 transitions. [2019-12-07 15:50:11,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 15:50:11,571 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:50:11,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:11,633 INFO L225 Difference]: With dead ends: 50208 [2019-12-07 15:50:11,633 INFO L226 Difference]: Without dead ends: 49877 [2019-12-07 15:50:11,634 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=163, Invalid=1097, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:50:11,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49877 states. [2019-12-07 15:50:12,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49877 to 44286. [2019-12-07 15:50:12,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44286 states. [2019-12-07 15:50:12,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44286 states to 44286 states and 128511 transitions. [2019-12-07 15:50:12,311 INFO L78 Accepts]: Start accepts. Automaton has 44286 states and 128511 transitions. Word has length 72 [2019-12-07 15:50:12,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:12,311 INFO L462 AbstractCegarLoop]: Abstraction has 44286 states and 128511 transitions. [2019-12-07 15:50:12,311 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:50:12,311 INFO L276 IsEmpty]: Start isEmpty. Operand 44286 states and 128511 transitions. [2019-12-07 15:50:12,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:12,352 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:12,352 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:12,352 INFO L410 AbstractCegarLoop]: === Iteration 60 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:12,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:12,353 INFO L82 PathProgramCache]: Analyzing trace with hash -2009017051, now seen corresponding path program 53 times [2019-12-07 15:50:12,353 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:12,353 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399286051] [2019-12-07 15:50:12,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:12,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:12,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:12,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399286051] [2019-12-07 15:50:12,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:12,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:50:12,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [518125168] [2019-12-07 15:50:12,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:50:12,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:12,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:50:12,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:50:12,623 INFO L87 Difference]: Start difference. First operand 44286 states and 128511 transitions. Second operand 17 states. [2019-12-07 15:50:14,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:14,955 INFO L93 Difference]: Finished difference Result 48976 states and 141585 transitions. [2019-12-07 15:50:14,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 15:50:14,956 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 72 [2019-12-07 15:50:14,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:15,015 INFO L225 Difference]: With dead ends: 48976 [2019-12-07 15:50:15,015 INFO L226 Difference]: Without dead ends: 46094 [2019-12-07 15:50:15,015 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 314 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=230, Invalid=1492, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:50:15,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46094 states. [2019-12-07 15:50:15,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46094 to 43910. [2019-12-07 15:50:15,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43910 states. [2019-12-07 15:50:15,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43910 states to 43910 states and 127399 transitions. [2019-12-07 15:50:15,667 INFO L78 Accepts]: Start accepts. Automaton has 43910 states and 127399 transitions. Word has length 72 [2019-12-07 15:50:15,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:15,667 INFO L462 AbstractCegarLoop]: Abstraction has 43910 states and 127399 transitions. [2019-12-07 15:50:15,667 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:50:15,667 INFO L276 IsEmpty]: Start isEmpty. Operand 43910 states and 127399 transitions. [2019-12-07 15:50:15,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:15,708 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:15,708 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:15,708 INFO L410 AbstractCegarLoop]: === Iteration 61 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:15,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:15,708 INFO L82 PathProgramCache]: Analyzing trace with hash 1027799373, now seen corresponding path program 54 times [2019-12-07 15:50:15,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:15,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70372140] [2019-12-07 15:50:15,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:15,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:16,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:16,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70372140] [2019-12-07 15:50:16,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:16,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:50:16,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818426184] [2019-12-07 15:50:16,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:50:16,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:16,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:50:16,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:50:16,101 INFO L87 Difference]: Start difference. First operand 43910 states and 127399 transitions. Second operand 19 states. [2019-12-07 15:50:16,526 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 21 [2019-12-07 15:50:17,092 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 24 [2019-12-07 15:50:17,384 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 24 [2019-12-07 15:50:21,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:21,153 INFO L93 Difference]: Finished difference Result 48344 states and 139629 transitions. [2019-12-07 15:50:21,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 15:50:21,154 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:50:21,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:21,222 INFO L225 Difference]: With dead ends: 48344 [2019-12-07 15:50:21,222 INFO L226 Difference]: Without dead ends: 45902 [2019-12-07 15:50:21,222 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 453 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=262, Invalid=1994, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 15:50:21,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45902 states. [2019-12-07 15:50:21,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45902 to 43637. [2019-12-07 15:50:21,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43637 states. [2019-12-07 15:50:21,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43637 states to 43637 states and 126581 transitions. [2019-12-07 15:50:21,908 INFO L78 Accepts]: Start accepts. Automaton has 43637 states and 126581 transitions. Word has length 72 [2019-12-07 15:50:21,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:21,908 INFO L462 AbstractCegarLoop]: Abstraction has 43637 states and 126581 transitions. [2019-12-07 15:50:21,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:50:21,908 INFO L276 IsEmpty]: Start isEmpty. Operand 43637 states and 126581 transitions. [2019-12-07 15:50:21,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:21,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:21,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:21,949 INFO L410 AbstractCegarLoop]: === Iteration 62 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:21,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:21,949 INFO L82 PathProgramCache]: Analyzing trace with hash -1297925903, now seen corresponding path program 55 times [2019-12-07 15:50:21,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:21,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779882221] [2019-12-07 15:50:21,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:21,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:23,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:23,741 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [779882221] [2019-12-07 15:50:23,741 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:23,742 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2019-12-07 15:50:23,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879731996] [2019-12-07 15:50:23,742 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-12-07 15:50:23,742 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:23,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 15:50:23,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=584, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:50:23,742 INFO L87 Difference]: Start difference. First operand 43637 states and 126581 transitions. Second operand 26 states. [2019-12-07 15:50:29,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:29,744 INFO L93 Difference]: Finished difference Result 47975 states and 138489 transitions. [2019-12-07 15:50:29,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 15:50:29,744 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 72 [2019-12-07 15:50:29,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:29,798 INFO L225 Difference]: With dead ends: 47975 [2019-12-07 15:50:29,799 INFO L226 Difference]: Without dead ends: 47355 [2019-12-07 15:50:29,799 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 565 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=311, Invalid=2659, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 15:50:29,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47355 states. [2019-12-07 15:50:30,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47355 to 44169. [2019-12-07 15:50:30,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44169 states. [2019-12-07 15:50:30,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44169 states to 44169 states and 128147 transitions. [2019-12-07 15:50:30,430 INFO L78 Accepts]: Start accepts. Automaton has 44169 states and 128147 transitions. Word has length 72 [2019-12-07 15:50:30,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:30,430 INFO L462 AbstractCegarLoop]: Abstraction has 44169 states and 128147 transitions. [2019-12-07 15:50:30,430 INFO L463 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-12-07 15:50:30,430 INFO L276 IsEmpty]: Start isEmpty. Operand 44169 states and 128147 transitions. [2019-12-07 15:50:30,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:30,471 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:30,471 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:30,471 INFO L410 AbstractCegarLoop]: === Iteration 63 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:30,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:30,471 INFO L82 PathProgramCache]: Analyzing trace with hash 867471333, now seen corresponding path program 56 times [2019-12-07 15:50:30,472 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:30,472 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29882638] [2019-12-07 15:50:30,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:30,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:31,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:31,026 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [29882638] [2019-12-07 15:50:31,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:31,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:50:31,026 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1270464901] [2019-12-07 15:50:31,027 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:50:31,027 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:31,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:50:31,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=492, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:50:31,027 INFO L87 Difference]: Start difference. First operand 44169 states and 128147 transitions. Second operand 24 states. [2019-12-07 15:50:34,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:34,492 INFO L93 Difference]: Finished difference Result 63287 states and 182435 transitions. [2019-12-07 15:50:34,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 15:50:34,493 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:50:34,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:34,578 INFO L225 Difference]: With dead ends: 63287 [2019-12-07 15:50:34,578 INFO L226 Difference]: Without dead ends: 54015 [2019-12-07 15:50:34,578 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 684 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=318, Invalid=2652, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 15:50:34,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54015 states. [2019-12-07 15:50:35,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54015 to 39677. [2019-12-07 15:50:35,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39677 states. [2019-12-07 15:50:35,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39677 states to 39677 states and 115388 transitions. [2019-12-07 15:50:35,302 INFO L78 Accepts]: Start accepts. Automaton has 39677 states and 115388 transitions. Word has length 72 [2019-12-07 15:50:35,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:35,302 INFO L462 AbstractCegarLoop]: Abstraction has 39677 states and 115388 transitions. [2019-12-07 15:50:35,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:50:35,302 INFO L276 IsEmpty]: Start isEmpty. Operand 39677 states and 115388 transitions. [2019-12-07 15:50:35,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:35,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:35,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:35,340 INFO L410 AbstractCegarLoop]: === Iteration 64 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:35,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:35,340 INFO L82 PathProgramCache]: Analyzing trace with hash -1691712103, now seen corresponding path program 57 times [2019-12-07 15:50:35,341 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:35,341 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028407180] [2019-12-07 15:50:35,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:35,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:36,901 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 23 [2019-12-07 15:50:37,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:37,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028407180] [2019-12-07 15:50:37,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:37,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2019-12-07 15:50:37,285 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557632652] [2019-12-07 15:50:37,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 15:50:37,286 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:37,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 15:50:37,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=686, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:50:37,286 INFO L87 Difference]: Start difference. First operand 39677 states and 115388 transitions. Second operand 28 states. [2019-12-07 15:50:37,725 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:50:39,401 WARN L192 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2019-12-07 15:50:42,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:42,614 INFO L93 Difference]: Finished difference Result 42254 states and 122223 transitions. [2019-12-07 15:50:42,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 15:50:42,614 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 72 [2019-12-07 15:50:42,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:42,661 INFO L225 Difference]: With dead ends: 42254 [2019-12-07 15:50:42,662 INFO L226 Difference]: Without dead ends: 41338 [2019-12-07 15:50:42,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 708 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=374, Invalid=3166, Unknown=0, NotChecked=0, Total=3540 [2019-12-07 15:50:42,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41338 states. [2019-12-07 15:50:43,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41338 to 39407. [2019-12-07 15:50:43,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39407 states. [2019-12-07 15:50:43,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39407 states to 39407 states and 114649 transitions. [2019-12-07 15:50:43,250 INFO L78 Accepts]: Start accepts. Automaton has 39407 states and 114649 transitions. Word has length 72 [2019-12-07 15:50:43,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:43,251 INFO L462 AbstractCegarLoop]: Abstraction has 39407 states and 114649 transitions. [2019-12-07 15:50:43,251 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 15:50:43,251 INFO L276 IsEmpty]: Start isEmpty. Operand 39407 states and 114649 transitions. [2019-12-07 15:50:43,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:43,288 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:43,288 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:43,288 INFO L410 AbstractCegarLoop]: === Iteration 65 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:43,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:43,288 INFO L82 PathProgramCache]: Analyzing trace with hash 187048729, now seen corresponding path program 58 times [2019-12-07 15:50:43,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:43,289 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2128999053] [2019-12-07 15:50:43,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:43,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:43,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:43,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2128999053] [2019-12-07 15:50:43,529 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:43,529 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:50:43,529 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2131543008] [2019-12-07 15:50:43,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:50:43,529 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:43,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:50:43,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:50:43,529 INFO L87 Difference]: Start difference. First operand 39407 states and 114649 transitions. Second operand 16 states. [2019-12-07 15:50:45,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:45,205 INFO L93 Difference]: Finished difference Result 43869 states and 126717 transitions. [2019-12-07 15:50:45,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:50:45,206 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:50:45,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:45,255 INFO L225 Difference]: With dead ends: 43869 [2019-12-07 15:50:45,255 INFO L226 Difference]: Without dead ends: 42777 [2019-12-07 15:50:45,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=188, Invalid=1144, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 15:50:45,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42777 states. [2019-12-07 15:50:45,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42777 to 39350. [2019-12-07 15:50:45,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39350 states. [2019-12-07 15:50:45,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39350 states to 39350 states and 114448 transitions. [2019-12-07 15:50:45,859 INFO L78 Accepts]: Start accepts. Automaton has 39350 states and 114448 transitions. Word has length 72 [2019-12-07 15:50:45,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:45,859 INFO L462 AbstractCegarLoop]: Abstraction has 39350 states and 114448 transitions. [2019-12-07 15:50:45,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:50:45,859 INFO L276 IsEmpty]: Start isEmpty. Operand 39350 states and 114448 transitions. [2019-12-07 15:50:45,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:45,896 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:45,896 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:45,896 INFO L410 AbstractCegarLoop]: === Iteration 66 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:45,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:45,896 INFO L82 PathProgramCache]: Analyzing trace with hash 557319885, now seen corresponding path program 59 times [2019-12-07 15:50:45,896 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:45,896 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023983940] [2019-12-07 15:50:45,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:45,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:46,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:46,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2023983940] [2019-12-07 15:50:46,131 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:46,131 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:50:46,131 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1903696196] [2019-12-07 15:50:46,132 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:50:46,132 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:46,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:50:46,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:50:46,132 INFO L87 Difference]: Start difference. First operand 39350 states and 114448 transitions. Second operand 16 states. [2019-12-07 15:50:48,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:48,658 INFO L93 Difference]: Finished difference Result 41994 states and 121375 transitions. [2019-12-07 15:50:48,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:50:48,658 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:50:48,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:48,707 INFO L225 Difference]: With dead ends: 41994 [2019-12-07 15:50:48,707 INFO L226 Difference]: Without dead ends: 41727 [2019-12-07 15:50:48,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=206, Invalid=1200, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 15:50:48,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41727 states. [2019-12-07 15:50:49,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41727 to 39184. [2019-12-07 15:50:49,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39184 states. [2019-12-07 15:50:49,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39184 states to 39184 states and 114034 transitions. [2019-12-07 15:50:49,302 INFO L78 Accepts]: Start accepts. Automaton has 39184 states and 114034 transitions. Word has length 72 [2019-12-07 15:50:49,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:49,302 INFO L462 AbstractCegarLoop]: Abstraction has 39184 states and 114034 transitions. [2019-12-07 15:50:49,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:50:49,302 INFO L276 IsEmpty]: Start isEmpty. Operand 39184 states and 114034 transitions. [2019-12-07 15:50:49,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:49,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:49,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:49,339 INFO L410 AbstractCegarLoop]: === Iteration 67 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:49,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:49,340 INFO L82 PathProgramCache]: Analyzing trace with hash 2065918313, now seen corresponding path program 60 times [2019-12-07 15:50:49,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:49,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907281931] [2019-12-07 15:50:49,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:49,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:49,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:49,612 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1907281931] [2019-12-07 15:50:49,612 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:49,612 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:50:49,612 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614977774] [2019-12-07 15:50:49,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:50:49,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:49,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:50:49,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:50:49,612 INFO L87 Difference]: Start difference. First operand 39184 states and 114034 transitions. Second operand 16 states. [2019-12-07 15:50:53,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:53,543 INFO L93 Difference]: Finished difference Result 42424 states and 122999 transitions. [2019-12-07 15:50:53,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:50:53,544 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:50:53,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:53,593 INFO L225 Difference]: With dead ends: 42424 [2019-12-07 15:50:53,593 INFO L226 Difference]: Without dead ends: 41396 [2019-12-07 15:50:53,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=181, Invalid=1079, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:50:53,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41396 states. [2019-12-07 15:50:54,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41396 to 39074. [2019-12-07 15:50:54,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39074 states. [2019-12-07 15:50:54,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39074 states to 39074 states and 113714 transitions. [2019-12-07 15:50:54,157 INFO L78 Accepts]: Start accepts. Automaton has 39074 states and 113714 transitions. Word has length 72 [2019-12-07 15:50:54,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:54,157 INFO L462 AbstractCegarLoop]: Abstraction has 39074 states and 113714 transitions. [2019-12-07 15:50:54,157 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:50:54,157 INFO L276 IsEmpty]: Start isEmpty. Operand 39074 states and 113714 transitions. [2019-12-07 15:50:54,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:50:54,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:54,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:54,194 INFO L410 AbstractCegarLoop]: === Iteration 68 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:54,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:54,194 INFO L82 PathProgramCache]: Analyzing trace with hash -63651747, now seen corresponding path program 61 times [2019-12-07 15:50:54,194 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:54,194 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002623498] [2019-12-07 15:50:54,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:54,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:54,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:54,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002623498] [2019-12-07 15:50:54,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:54,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:50:54,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333357853] [2019-12-07 15:50:54,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:50:54,436 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:54,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:50:54,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:50:54,437 INFO L87 Difference]: Start difference. First operand 39074 states and 113714 transitions. Second operand 16 states. [2019-12-07 15:50:55,729 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 21 [2019-12-07 15:50:59,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:59,528 INFO L93 Difference]: Finished difference Result 42095 states and 121757 transitions. [2019-12-07 15:50:59,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:50:59,529 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:50:59,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:59,586 INFO L225 Difference]: With dead ends: 42095 [2019-12-07 15:50:59,586 INFO L226 Difference]: Without dead ends: 41575 [2019-12-07 15:50:59,586 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=188, Invalid=1144, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 15:50:59,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41575 states. [2019-12-07 15:51:00,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41575 to 39026. [2019-12-07 15:51:00,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39026 states. [2019-12-07 15:51:00,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39026 states to 39026 states and 113562 transitions. [2019-12-07 15:51:00,160 INFO L78 Accepts]: Start accepts. Automaton has 39026 states and 113562 transitions. Word has length 72 [2019-12-07 15:51:00,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:00,161 INFO L462 AbstractCegarLoop]: Abstraction has 39026 states and 113562 transitions. [2019-12-07 15:51:00,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:51:00,161 INFO L276 IsEmpty]: Start isEmpty. Operand 39026 states and 113562 transitions. [2019-12-07 15:51:00,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:00,197 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:00,197 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:00,197 INFO L410 AbstractCegarLoop]: === Iteration 69 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:00,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:00,197 INFO L82 PathProgramCache]: Analyzing trace with hash 1672132113, now seen corresponding path program 62 times [2019-12-07 15:51:00,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:00,198 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561120821] [2019-12-07 15:51:00,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:00,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:01,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:01,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561120821] [2019-12-07 15:51:01,414 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:01,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2019-12-07 15:51:01,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [991955512] [2019-12-07 15:51:01,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-12-07 15:51:01,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:01,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-12-07 15:51:01,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=735, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:51:01,414 INFO L87 Difference]: Start difference. First operand 39026 states and 113562 transitions. Second operand 29 states. [2019-12-07 15:51:02,721 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2019-12-07 15:51:04,010 WARN L192 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2019-12-07 15:51:06,081 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 36 [2019-12-07 15:51:07,169 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 38 [2019-12-07 15:51:10,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:10,339 INFO L93 Difference]: Finished difference Result 44717 states and 129885 transitions. [2019-12-07 15:51:10,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 15:51:10,339 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 72 [2019-12-07 15:51:10,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:10,388 INFO L225 Difference]: With dead ends: 44717 [2019-12-07 15:51:10,389 INFO L226 Difference]: Without dead ends: 42595 [2019-12-07 15:51:10,389 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 727 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=419, Invalid=3241, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 15:51:10,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42595 states. [2019-12-07 15:51:10,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42595 to 39769. [2019-12-07 15:51:10,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39769 states. [2019-12-07 15:51:10,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39769 states to 39769 states and 115599 transitions. [2019-12-07 15:51:10,971 INFO L78 Accepts]: Start accepts. Automaton has 39769 states and 115599 transitions. Word has length 72 [2019-12-07 15:51:10,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:10,972 INFO L462 AbstractCegarLoop]: Abstraction has 39769 states and 115599 transitions. [2019-12-07 15:51:10,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-12-07 15:51:10,972 INFO L276 IsEmpty]: Start isEmpty. Operand 39769 states and 115599 transitions. [2019-12-07 15:51:11,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:11,010 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:11,010 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:11,010 INFO L410 AbstractCegarLoop]: === Iteration 70 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:11,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:11,010 INFO L82 PathProgramCache]: Analyzing trace with hash -1000376109, now seen corresponding path program 63 times [2019-12-07 15:51:11,011 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:11,011 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064749307] [2019-12-07 15:51:11,011 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:11,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:11,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:11,458 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064749307] [2019-12-07 15:51:11,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:11,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:51:11,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430461227] [2019-12-07 15:51:11,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:51:11,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:11,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:51:11,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:51:11,458 INFO L87 Difference]: Start difference. First operand 39769 states and 115599 transitions. Second operand 19 states. [2019-12-07 15:51:15,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:15,460 INFO L93 Difference]: Finished difference Result 42738 states and 123553 transitions. [2019-12-07 15:51:15,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 15:51:15,460 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:51:15,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:15,510 INFO L225 Difference]: With dead ends: 42738 [2019-12-07 15:51:15,510 INFO L226 Difference]: Without dead ends: 42218 [2019-12-07 15:51:15,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 312 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=252, Invalid=1554, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 15:51:15,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42218 states. [2019-12-07 15:51:16,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42218 to 39643. [2019-12-07 15:51:16,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39643 states. [2019-12-07 15:51:16,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39643 states to 39643 states and 115225 transitions. [2019-12-07 15:51:16,082 INFO L78 Accepts]: Start accepts. Automaton has 39643 states and 115225 transitions. Word has length 72 [2019-12-07 15:51:16,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:16,082 INFO L462 AbstractCegarLoop]: Abstraction has 39643 states and 115225 transitions. [2019-12-07 15:51:16,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:51:16,082 INFO L276 IsEmpty]: Start isEmpty. Operand 39643 states and 115225 transitions. [2019-12-07 15:51:16,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:16,120 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:16,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:16,120 INFO L410 AbstractCegarLoop]: === Iteration 71 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:16,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:16,120 INFO L82 PathProgramCache]: Analyzing trace with hash -1868459225, now seen corresponding path program 64 times [2019-12-07 15:51:16,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:16,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [656661439] [2019-12-07 15:51:16,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:16,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:16,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:16,420 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [656661439] [2019-12-07 15:51:16,420 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:16,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:51:16,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029830239] [2019-12-07 15:51:16,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:51:16,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:16,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:51:16,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:51:16,421 INFO L87 Difference]: Start difference. First operand 39643 states and 115225 transitions. Second operand 15 states. [2019-12-07 15:51:18,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:18,992 INFO L93 Difference]: Finished difference Result 43816 states and 125846 transitions. [2019-12-07 15:51:18,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:51:18,993 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:51:18,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:19,044 INFO L225 Difference]: With dead ends: 43816 [2019-12-07 15:51:19,044 INFO L226 Difference]: Without dead ends: 43484 [2019-12-07 15:51:19,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 260 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=187, Invalid=1145, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 15:51:19,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43484 states. [2019-12-07 15:51:19,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43484 to 39647. [2019-12-07 15:51:19,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39647 states. [2019-12-07 15:51:19,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39647 states to 39647 states and 115232 transitions. [2019-12-07 15:51:19,648 INFO L78 Accepts]: Start accepts. Automaton has 39647 states and 115232 transitions. Word has length 72 [2019-12-07 15:51:19,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:19,648 INFO L462 AbstractCegarLoop]: Abstraction has 39647 states and 115232 transitions. [2019-12-07 15:51:19,648 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:51:19,648 INFO L276 IsEmpty]: Start isEmpty. Operand 39647 states and 115232 transitions. [2019-12-07 15:51:19,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:19,685 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:19,685 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:19,685 INFO L410 AbstractCegarLoop]: === Iteration 72 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:19,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:19,685 INFO L82 PathProgramCache]: Analyzing trace with hash -1511141711, now seen corresponding path program 65 times [2019-12-07 15:51:19,685 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:19,685 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749062607] [2019-12-07 15:51:19,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:19,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:19,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:19,940 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749062607] [2019-12-07 15:51:19,940 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:19,940 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:51:19,940 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732422117] [2019-12-07 15:51:19,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:51:19,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:19,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:51:19,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:51:19,941 INFO L87 Difference]: Start difference. First operand 39647 states and 115232 transitions. Second operand 18 states. [2019-12-07 15:51:20,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:20,721 INFO L93 Difference]: Finished difference Result 51552 states and 149352 transitions. [2019-12-07 15:51:20,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 15:51:20,721 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:51:20,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:20,783 INFO L225 Difference]: With dead ends: 51552 [2019-12-07 15:51:20,784 INFO L226 Difference]: Without dead ends: 49328 [2019-12-07 15:51:20,784 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=136, Invalid=734, Unknown=0, NotChecked=0, Total=870 [2019-12-07 15:51:20,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49328 states. [2019-12-07 15:51:21,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49328 to 40206. [2019-12-07 15:51:21,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40206 states. [2019-12-07 15:51:21,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40206 states to 40206 states and 116856 transitions. [2019-12-07 15:51:21,414 INFO L78 Accepts]: Start accepts. Automaton has 40206 states and 116856 transitions. Word has length 72 [2019-12-07 15:51:21,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:21,414 INFO L462 AbstractCegarLoop]: Abstraction has 40206 states and 116856 transitions. [2019-12-07 15:51:21,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:51:21,414 INFO L276 IsEmpty]: Start isEmpty. Operand 40206 states and 116856 transitions. [2019-12-07 15:51:21,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:21,452 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:21,452 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:21,452 INFO L410 AbstractCegarLoop]: === Iteration 73 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:21,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:21,452 INFO L82 PathProgramCache]: Analyzing trace with hash 1552027135, now seen corresponding path program 66 times [2019-12-07 15:51:21,452 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:21,453 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1678725684] [2019-12-07 15:51:21,453 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:21,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:22,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:22,039 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1678725684] [2019-12-07 15:51:22,040 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:22,040 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 15:51:22,040 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382489558] [2019-12-07 15:51:22,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 15:51:22,040 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:22,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 15:51:22,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=535, Unknown=0, NotChecked=0, Total=600 [2019-12-07 15:51:22,040 INFO L87 Difference]: Start difference. First operand 40206 states and 116856 transitions. Second operand 25 states. [2019-12-07 15:51:23,491 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 30 [2019-12-07 15:51:25,080 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 26 [2019-12-07 15:51:25,907 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 30 [2019-12-07 15:51:28,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:28,788 INFO L93 Difference]: Finished difference Result 56944 states and 165023 transitions. [2019-12-07 15:51:28,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 15:51:28,789 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 72 [2019-12-07 15:51:28,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:28,858 INFO L225 Difference]: With dead ends: 56944 [2019-12-07 15:51:28,858 INFO L226 Difference]: Without dead ends: 53644 [2019-12-07 15:51:28,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 795 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=325, Invalid=3097, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 15:51:29,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53644 states. [2019-12-07 15:51:29,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53644 to 40668. [2019-12-07 15:51:29,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40668 states. [2019-12-07 15:51:29,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40668 states to 40668 states and 118348 transitions. [2019-12-07 15:51:29,574 INFO L78 Accepts]: Start accepts. Automaton has 40668 states and 118348 transitions. Word has length 72 [2019-12-07 15:51:29,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:29,575 INFO L462 AbstractCegarLoop]: Abstraction has 40668 states and 118348 transitions. [2019-12-07 15:51:29,575 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 15:51:29,575 INFO L276 IsEmpty]: Start isEmpty. Operand 40668 states and 118348 transitions. [2019-12-07 15:51:29,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:29,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:29,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:29,613 INFO L410 AbstractCegarLoop]: === Iteration 74 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:29,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:29,613 INFO L82 PathProgramCache]: Analyzing trace with hash -170689627, now seen corresponding path program 67 times [2019-12-07 15:51:29,613 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:29,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357489636] [2019-12-07 15:51:29,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:29,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:30,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:30,062 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357489636] [2019-12-07 15:51:30,062 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:30,062 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:51:30,062 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207902537] [2019-12-07 15:51:30,062 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:51:30,062 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:30,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:51:30,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=494, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:51:30,063 INFO L87 Difference]: Start difference. First operand 40668 states and 118348 transitions. Second operand 24 states. [2019-12-07 15:51:32,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:32,423 INFO L93 Difference]: Finished difference Result 57798 states and 166937 transitions. [2019-12-07 15:51:32,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 15:51:32,423 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:51:32,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:32,495 INFO L225 Difference]: With dead ends: 57798 [2019-12-07 15:51:32,495 INFO L226 Difference]: Without dead ends: 56036 [2019-12-07 15:51:32,495 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 539 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=252, Invalid=2198, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:51:32,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56036 states. [2019-12-07 15:51:33,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56036 to 42956. [2019-12-07 15:51:33,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42956 states. [2019-12-07 15:51:33,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42956 states to 42956 states and 125101 transitions. [2019-12-07 15:51:33,206 INFO L78 Accepts]: Start accepts. Automaton has 42956 states and 125101 transitions. Word has length 72 [2019-12-07 15:51:33,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:33,206 INFO L462 AbstractCegarLoop]: Abstraction has 42956 states and 125101 transitions. [2019-12-07 15:51:33,206 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:51:33,206 INFO L276 IsEmpty]: Start isEmpty. Operand 42956 states and 125101 transitions. [2019-12-07 15:51:33,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:33,247 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:33,247 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:33,247 INFO L410 AbstractCegarLoop]: === Iteration 75 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:33,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:33,248 INFO L82 PathProgramCache]: Analyzing trace with hash 1732953689, now seen corresponding path program 68 times [2019-12-07 15:51:33,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:33,248 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948785497] [2019-12-07 15:51:33,248 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:33,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:33,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:33,713 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948785497] [2019-12-07 15:51:33,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:33,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:51:33,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721592632] [2019-12-07 15:51:33,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:51:33,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:33,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:51:33,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=335, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:51:33,713 INFO L87 Difference]: Start difference. First operand 42956 states and 125101 transitions. Second operand 20 states. [2019-12-07 15:51:35,798 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 24 [2019-12-07 15:51:41,879 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 23 [2019-12-07 15:51:44,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:44,041 INFO L93 Difference]: Finished difference Result 48240 states and 139153 transitions. [2019-12-07 15:51:44,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2019-12-07 15:51:44,042 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:51:44,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:44,096 INFO L225 Difference]: With dead ends: 48240 [2019-12-07 15:51:44,096 INFO L226 Difference]: Without dead ends: 47838 [2019-12-07 15:51:44,097 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1072 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=495, Invalid=3795, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 15:51:44,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47838 states. [2019-12-07 15:51:44,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47838 to 42988. [2019-12-07 15:51:44,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42988 states. [2019-12-07 15:51:44,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42988 states to 42988 states and 125153 transitions. [2019-12-07 15:51:44,741 INFO L78 Accepts]: Start accepts. Automaton has 42988 states and 125153 transitions. Word has length 72 [2019-12-07 15:51:44,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:44,742 INFO L462 AbstractCegarLoop]: Abstraction has 42988 states and 125153 transitions. [2019-12-07 15:51:44,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:51:44,742 INFO L276 IsEmpty]: Start isEmpty. Operand 42988 states and 125153 transitions. [2019-12-07 15:51:44,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:44,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:44,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:44,873 INFO L410 AbstractCegarLoop]: === Iteration 76 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:44,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:44,873 INFO L82 PathProgramCache]: Analyzing trace with hash 2090271203, now seen corresponding path program 69 times [2019-12-07 15:51:44,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:44,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978598763] [2019-12-07 15:51:44,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:44,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:45,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:45,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [978598763] [2019-12-07 15:51:45,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:45,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:51:45,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030333885] [2019-12-07 15:51:45,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:51:45,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:45,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:51:45,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=367, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:51:45,202 INFO L87 Difference]: Start difference. First operand 42988 states and 125153 transitions. Second operand 21 states. [2019-12-07 15:51:46,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:46,709 INFO L93 Difference]: Finished difference Result 59553 states and 172478 transitions. [2019-12-07 15:51:46,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 15:51:46,709 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 72 [2019-12-07 15:51:46,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:46,782 INFO L225 Difference]: With dead ends: 59553 [2019-12-07 15:51:46,783 INFO L226 Difference]: Without dead ends: 58194 [2019-12-07 15:51:46,783 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 387 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=194, Invalid=1528, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:51:46,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58194 states. [2019-12-07 15:51:47,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58194 to 43451. [2019-12-07 15:51:47,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43451 states. [2019-12-07 15:51:47,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43451 states to 43451 states and 126467 transitions. [2019-12-07 15:51:47,487 INFO L78 Accepts]: Start accepts. Automaton has 43451 states and 126467 transitions. Word has length 72 [2019-12-07 15:51:47,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:47,487 INFO L462 AbstractCegarLoop]: Abstraction has 43451 states and 126467 transitions. [2019-12-07 15:51:47,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:51:47,487 INFO L276 IsEmpty]: Start isEmpty. Operand 43451 states and 126467 transitions. [2019-12-07 15:51:47,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:47,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:47,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:47,527 INFO L410 AbstractCegarLoop]: === Iteration 77 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:47,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:47,527 INFO L82 PathProgramCache]: Analyzing trace with hash 1405145805, now seen corresponding path program 70 times [2019-12-07 15:51:47,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:47,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672258432] [2019-12-07 15:51:47,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:47,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:48,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:48,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672258432] [2019-12-07 15:51:48,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:48,037 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 15:51:48,037 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201331490] [2019-12-07 15:51:48,037 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 15:51:48,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:48,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 15:51:48,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2019-12-07 15:51:48,037 INFO L87 Difference]: Start difference. First operand 43451 states and 126467 transitions. Second operand 25 states. [2019-12-07 15:51:52,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:52,186 INFO L93 Difference]: Finished difference Result 55088 states and 158569 transitions. [2019-12-07 15:51:52,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 15:51:52,187 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 72 [2019-12-07 15:51:52,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:52,267 INFO L225 Difference]: With dead ends: 55088 [2019-12-07 15:51:52,267 INFO L226 Difference]: Without dead ends: 54924 [2019-12-07 15:51:52,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 566 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=250, Invalid=2300, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 15:51:52,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54924 states. [2019-12-07 15:51:52,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54924 to 43472. [2019-12-07 15:51:52,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43472 states. [2019-12-07 15:51:52,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43472 states to 43472 states and 126516 transitions. [2019-12-07 15:51:52,972 INFO L78 Accepts]: Start accepts. Automaton has 43472 states and 126516 transitions. Word has length 72 [2019-12-07 15:51:52,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:52,972 INFO L462 AbstractCegarLoop]: Abstraction has 43472 states and 126516 transitions. [2019-12-07 15:51:52,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 15:51:52,972 INFO L276 IsEmpty]: Start isEmpty. Operand 43472 states and 126516 transitions. [2019-12-07 15:51:53,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:51:53,013 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:53,013 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:53,013 INFO L410 AbstractCegarLoop]: === Iteration 78 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:53,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:53,013 INFO L82 PathProgramCache]: Analyzing trace with hash 858472753, now seen corresponding path program 71 times [2019-12-07 15:51:53,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:53,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470724149] [2019-12-07 15:51:53,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:53,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:53,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:53,355 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1470724149] [2019-12-07 15:51:53,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:53,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:51:53,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079067973] [2019-12-07 15:51:53,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:51:53,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:53,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:51:53,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:51:53,355 INFO L87 Difference]: Start difference. First operand 43472 states and 126516 transitions. Second operand 19 states. [2019-12-07 15:51:54,064 WARN L192 SmtUtils]: Spent 137.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2019-12-07 15:51:54,369 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 22 [2019-12-07 15:51:55,941 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2019-12-07 15:51:58,452 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 34 [2019-12-07 15:51:59,130 WARN L192 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 26 [2019-12-07 15:52:00,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:00,989 INFO L93 Difference]: Finished difference Result 48595 states and 139613 transitions. [2019-12-07 15:52:00,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 15:52:00,990 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:52:00,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:01,065 INFO L225 Difference]: With dead ends: 48595 [2019-12-07 15:52:01,065 INFO L226 Difference]: Without dead ends: 48179 [2019-12-07 15:52:01,065 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 818 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=421, Invalid=3001, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 15:52:01,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48179 states. [2019-12-07 15:52:01,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48179 to 43480. [2019-12-07 15:52:01,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43480 states. [2019-12-07 15:52:01,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43480 states to 43480 states and 126506 transitions. [2019-12-07 15:52:01,728 INFO L78 Accepts]: Start accepts. Automaton has 43480 states and 126506 transitions. Word has length 72 [2019-12-07 15:52:01,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:01,728 INFO L462 AbstractCegarLoop]: Abstraction has 43480 states and 126506 transitions. [2019-12-07 15:52:01,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:52:01,729 INFO L276 IsEmpty]: Start isEmpty. Operand 43480 states and 126506 transitions. [2019-12-07 15:52:01,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:01,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:01,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:01,769 INFO L410 AbstractCegarLoop]: === Iteration 79 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:01,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:01,769 INFO L82 PathProgramCache]: Analyzing trace with hash 1468449479, now seen corresponding path program 72 times [2019-12-07 15:52:01,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:01,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697383086] [2019-12-07 15:52:01,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:01,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:02,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:02,146 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697383086] [2019-12-07 15:52:02,146 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:02,146 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:52:02,146 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945596371] [2019-12-07 15:52:02,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:52:02,146 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:02,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:52:02,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:52:02,147 INFO L87 Difference]: Start difference. First operand 43480 states and 126506 transitions. Second operand 18 states. [2019-12-07 15:52:03,060 WARN L192 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 30 [2019-12-07 15:52:03,286 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 20 [2019-12-07 15:52:03,748 WARN L192 SmtUtils]: Spent 332.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 36 [2019-12-07 15:52:04,078 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 22 [2019-12-07 15:52:08,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:08,603 INFO L93 Difference]: Finished difference Result 51028 states and 147121 transitions. [2019-12-07 15:52:08,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:52:08,603 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:52:08,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:08,657 INFO L225 Difference]: With dead ends: 51028 [2019-12-07 15:52:08,657 INFO L226 Difference]: Without dead ends: 48477 [2019-12-07 15:52:08,657 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 293 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=217, Invalid=1343, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 15:52:08,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48477 states. [2019-12-07 15:52:09,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48477 to 43595. [2019-12-07 15:52:09,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43595 states. [2019-12-07 15:52:09,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43595 states to 43595 states and 126767 transitions. [2019-12-07 15:52:09,315 INFO L78 Accepts]: Start accepts. Automaton has 43595 states and 126767 transitions. Word has length 72 [2019-12-07 15:52:09,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:09,315 INFO L462 AbstractCegarLoop]: Abstraction has 43595 states and 126767 transitions. [2019-12-07 15:52:09,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:52:09,315 INFO L276 IsEmpty]: Start isEmpty. Operand 43595 states and 126767 transitions. [2019-12-07 15:52:09,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:09,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:09,356 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:09,356 INFO L410 AbstractCegarLoop]: === Iteration 80 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:09,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:09,356 INFO L82 PathProgramCache]: Analyzing trace with hash -339609475, now seen corresponding path program 73 times [2019-12-07 15:52:09,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:09,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040454411] [2019-12-07 15:52:09,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:09,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:09,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:09,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1040454411] [2019-12-07 15:52:09,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:09,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:52:09,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8524805] [2019-12-07 15:52:09,719 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:52:09,719 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:09,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:52:09,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=408, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:52:09,720 INFO L87 Difference]: Start difference. First operand 43595 states and 126767 transitions. Second operand 22 states. [2019-12-07 15:52:11,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:11,463 INFO L93 Difference]: Finished difference Result 59518 states and 172456 transitions. [2019-12-07 15:52:11,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:52:11,464 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:52:11,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:11,538 INFO L225 Difference]: With dead ends: 59518 [2019-12-07 15:52:11,538 INFO L226 Difference]: Without dead ends: 58159 [2019-12-07 15:52:11,538 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 281 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=153, Invalid=1179, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 15:52:11,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58159 states. [2019-12-07 15:52:12,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58159 to 43573. [2019-12-07 15:52:12,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43573 states. [2019-12-07 15:52:12,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43573 states to 43573 states and 126717 transitions. [2019-12-07 15:52:12,356 INFO L78 Accepts]: Start accepts. Automaton has 43573 states and 126717 transitions. Word has length 72 [2019-12-07 15:52:12,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:12,357 INFO L462 AbstractCegarLoop]: Abstraction has 43573 states and 126717 transitions. [2019-12-07 15:52:12,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:52:12,357 INFO L276 IsEmpty]: Start isEmpty. Operand 43573 states and 126717 transitions. [2019-12-07 15:52:12,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:12,396 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:12,396 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:12,397 INFO L410 AbstractCegarLoop]: === Iteration 81 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:12,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:12,397 INFO L82 PathProgramCache]: Analyzing trace with hash 129344239, now seen corresponding path program 74 times [2019-12-07 15:52:12,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:12,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457834586] [2019-12-07 15:52:12,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:12,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:14,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:14,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457834586] [2019-12-07 15:52:14,050 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:14,050 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:52:14,050 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2095654194] [2019-12-07 15:52:14,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:52:14,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:14,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:52:14,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=640, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:52:14,050 INFO L87 Difference]: Start difference. First operand 43573 states and 126717 transitions. Second operand 27 states. [2019-12-07 15:52:14,486 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 20 [2019-12-07 15:52:14,801 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 23 [2019-12-07 15:52:15,029 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 25 [2019-12-07 15:52:15,619 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 27 [2019-12-07 15:52:16,069 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 27 [2019-12-07 15:52:16,777 WARN L192 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2019-12-07 15:52:17,107 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 26 [2019-12-07 15:52:19,577 WARN L192 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 37 [2019-12-07 15:52:20,419 WARN L192 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 39 [2019-12-07 15:52:22,276 WARN L192 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 33 [2019-12-07 15:52:22,702 WARN L192 SmtUtils]: Spent 204.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 33 [2019-12-07 15:52:23,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:23,877 INFO L93 Difference]: Finished difference Result 50904 states and 147604 transitions. [2019-12-07 15:52:23,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 15:52:23,877 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:52:23,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:23,940 INFO L225 Difference]: With dead ends: 50904 [2019-12-07 15:52:23,940 INFO L226 Difference]: Without dead ends: 49089 [2019-12-07 15:52:23,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1166 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=438, Invalid=4532, Unknown=0, NotChecked=0, Total=4970 [2019-12-07 15:52:24,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49089 states. [2019-12-07 15:52:24,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49089 to 44173. [2019-12-07 15:52:24,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44173 states. [2019-12-07 15:52:24,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44173 states to 44173 states and 128346 transitions. [2019-12-07 15:52:24,588 INFO L78 Accepts]: Start accepts. Automaton has 44173 states and 128346 transitions. Word has length 72 [2019-12-07 15:52:24,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:24,588 INFO L462 AbstractCegarLoop]: Abstraction has 44173 states and 128346 transitions. [2019-12-07 15:52:24,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:52:24,589 INFO L276 IsEmpty]: Start isEmpty. Operand 44173 states and 128346 transitions. [2019-12-07 15:52:24,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:24,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:24,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:24,629 INFO L410 AbstractCegarLoop]: === Iteration 82 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:24,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:24,629 INFO L82 PathProgramCache]: Analyzing trace with hash -1735267831, now seen corresponding path program 75 times [2019-12-07 15:52:24,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:24,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308073607] [2019-12-07 15:52:24,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:24,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:25,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:25,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [308073607] [2019-12-07 15:52:25,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:25,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:52:25,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195444406] [2019-12-07 15:52:25,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:52:25,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:25,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:52:25,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:52:25,052 INFO L87 Difference]: Start difference. First operand 44173 states and 128346 transitions. Second operand 19 states. [2019-12-07 15:52:26,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:26,881 INFO L93 Difference]: Finished difference Result 48925 states and 140157 transitions. [2019-12-07 15:52:26,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:52:26,881 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 72 [2019-12-07 15:52:26,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:26,937 INFO L225 Difference]: With dead ends: 48925 [2019-12-07 15:52:26,937 INFO L226 Difference]: Without dead ends: 48465 [2019-12-07 15:52:26,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 256 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=208, Invalid=1274, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 15:52:27,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48465 states. [2019-12-07 15:52:27,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48465 to 44376. [2019-12-07 15:52:27,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44376 states. [2019-12-07 15:52:27,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44376 states to 44376 states and 128834 transitions. [2019-12-07 15:52:27,665 INFO L78 Accepts]: Start accepts. Automaton has 44376 states and 128834 transitions. Word has length 72 [2019-12-07 15:52:27,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:27,665 INFO L462 AbstractCegarLoop]: Abstraction has 44376 states and 128834 transitions. [2019-12-07 15:52:27,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:52:27,665 INFO L276 IsEmpty]: Start isEmpty. Operand 44376 states and 128834 transitions. [2019-12-07 15:52:27,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:27,706 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:27,706 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:27,706 INFO L410 AbstractCegarLoop]: === Iteration 83 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:27,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:27,707 INFO L82 PathProgramCache]: Analyzing trace with hash 1214698527, now seen corresponding path program 76 times [2019-12-07 15:52:27,707 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:27,707 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [430260407] [2019-12-07 15:52:27,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:27,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:28,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:28,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [430260407] [2019-12-07 15:52:28,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:28,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:52:28,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030638112] [2019-12-07 15:52:28,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:52:28,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:28,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:52:28,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:52:28,068 INFO L87 Difference]: Start difference. First operand 44376 states and 128834 transitions. Second operand 18 states. [2019-12-07 15:52:30,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:30,055 INFO L93 Difference]: Finished difference Result 49545 states and 142673 transitions. [2019-12-07 15:52:30,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 15:52:30,055 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:52:30,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:30,111 INFO L225 Difference]: With dead ends: 49545 [2019-12-07 15:52:30,111 INFO L226 Difference]: Without dead ends: 48445 [2019-12-07 15:52:30,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=204, Invalid=1128, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 15:52:30,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48445 states. [2019-12-07 15:52:30,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48445 to 44669. [2019-12-07 15:52:30,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44669 states. [2019-12-07 15:52:30,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44669 states to 44669 states and 129491 transitions. [2019-12-07 15:52:30,778 INFO L78 Accepts]: Start accepts. Automaton has 44669 states and 129491 transitions. Word has length 72 [2019-12-07 15:52:30,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:30,778 INFO L462 AbstractCegarLoop]: Abstraction has 44669 states and 129491 transitions. [2019-12-07 15:52:30,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:52:30,778 INFO L276 IsEmpty]: Start isEmpty. Operand 44669 states and 129491 transitions. [2019-12-07 15:52:30,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:30,821 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:30,821 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:30,821 INFO L410 AbstractCegarLoop]: === Iteration 84 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:30,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:30,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1204792811, now seen corresponding path program 77 times [2019-12-07 15:52:30,822 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:30,822 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896579317] [2019-12-07 15:52:30,822 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:30,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:31,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:31,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896579317] [2019-12-07 15:52:31,082 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:31,082 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:52:31,082 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166227477] [2019-12-07 15:52:31,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:52:31,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:31,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:52:31,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:52:31,082 INFO L87 Difference]: Start difference. First operand 44669 states and 129491 transitions. Second operand 16 states. [2019-12-07 15:52:32,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:32,876 INFO L93 Difference]: Finished difference Result 55976 states and 160722 transitions. [2019-12-07 15:52:32,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 15:52:32,877 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:52:32,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:32,944 INFO L225 Difference]: With dead ends: 55976 [2019-12-07 15:52:32,944 INFO L226 Difference]: Without dead ends: 52993 [2019-12-07 15:52:32,944 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 408 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=304, Invalid=1588, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 15:52:33,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52993 states. [2019-12-07 15:52:33,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52993 to 44653. [2019-12-07 15:52:33,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44653 states. [2019-12-07 15:52:33,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44653 states to 44653 states and 129385 transitions. [2019-12-07 15:52:33,614 INFO L78 Accepts]: Start accepts. Automaton has 44653 states and 129385 transitions. Word has length 72 [2019-12-07 15:52:33,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:33,614 INFO L462 AbstractCegarLoop]: Abstraction has 44653 states and 129385 transitions. [2019-12-07 15:52:33,614 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:52:33,614 INFO L276 IsEmpty]: Start isEmpty. Operand 44653 states and 129385 transitions. [2019-12-07 15:52:33,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:33,655 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:33,655 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:33,655 INFO L410 AbstractCegarLoop]: === Iteration 85 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:33,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:33,655 INFO L82 PathProgramCache]: Analyzing trace with hash 456837829, now seen corresponding path program 78 times [2019-12-07 15:52:33,656 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:33,656 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979818205] [2019-12-07 15:52:33,656 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:33,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:34,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:34,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979818205] [2019-12-07 15:52:34,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:34,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2019-12-07 15:52:34,439 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1095806061] [2019-12-07 15:52:34,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-12-07 15:52:34,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:34,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-12-07 15:52:34,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=742, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:52:34,439 INFO L87 Difference]: Start difference. First operand 44653 states and 129385 transitions. Second operand 29 states. [2019-12-07 15:52:38,154 WARN L192 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 32 [2019-12-07 15:52:40,572 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 27 [2019-12-07 15:52:41,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:41,986 INFO L93 Difference]: Finished difference Result 53644 states and 155867 transitions. [2019-12-07 15:52:41,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 15:52:41,986 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 72 [2019-12-07 15:52:41,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:42,049 INFO L225 Difference]: With dead ends: 53644 [2019-12-07 15:52:42,050 INFO L226 Difference]: Without dead ends: 49760 [2019-12-07 15:52:42,050 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1141 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=486, Invalid=4626, Unknown=0, NotChecked=0, Total=5112 [2019-12-07 15:52:42,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49760 states. [2019-12-07 15:52:42,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49760 to 44361. [2019-12-07 15:52:42,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44361 states. [2019-12-07 15:52:42,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44361 states to 44361 states and 128543 transitions. [2019-12-07 15:52:42,721 INFO L78 Accepts]: Start accepts. Automaton has 44361 states and 128543 transitions. Word has length 72 [2019-12-07 15:52:42,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:42,722 INFO L462 AbstractCegarLoop]: Abstraction has 44361 states and 128543 transitions. [2019-12-07 15:52:42,722 INFO L463 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-12-07 15:52:42,722 INFO L276 IsEmpty]: Start isEmpty. Operand 44361 states and 128543 transitions. [2019-12-07 15:52:42,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:42,763 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:42,763 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:42,763 INFO L410 AbstractCegarLoop]: === Iteration 86 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:42,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:42,763 INFO L82 PathProgramCache]: Analyzing trace with hash 689842401, now seen corresponding path program 79 times [2019-12-07 15:52:42,763 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:42,763 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141828515] [2019-12-07 15:52:42,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:42,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:43,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:43,211 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141828515] [2019-12-07 15:52:43,212 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:43,212 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:52:43,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853587778] [2019-12-07 15:52:43,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:52:43,212 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:43,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:52:43,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=411, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:52:43,212 INFO L87 Difference]: Start difference. First operand 44361 states and 128543 transitions. Second operand 22 states. [2019-12-07 15:52:48,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:48,700 INFO L93 Difference]: Finished difference Result 48542 states and 139841 transitions. [2019-12-07 15:52:48,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:52:48,701 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2019-12-07 15:52:48,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:48,755 INFO L225 Difference]: With dead ends: 48542 [2019-12-07 15:52:48,755 INFO L226 Difference]: Without dead ends: 48330 [2019-12-07 15:52:48,755 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 293 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=194, Invalid=1446, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 15:52:48,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48330 states. [2019-12-07 15:52:49,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48330 to 44349. [2019-12-07 15:52:49,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44349 states. [2019-12-07 15:52:49,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44349 states to 44349 states and 128522 transitions. [2019-12-07 15:52:49,404 INFO L78 Accepts]: Start accepts. Automaton has 44349 states and 128522 transitions. Word has length 72 [2019-12-07 15:52:49,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:49,404 INFO L462 AbstractCegarLoop]: Abstraction has 44349 states and 128522 transitions. [2019-12-07 15:52:49,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:52:49,405 INFO L276 IsEmpty]: Start isEmpty. Operand 44349 states and 128522 transitions. [2019-12-07 15:52:49,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:49,445 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:49,445 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:49,445 INFO L410 AbstractCegarLoop]: === Iteration 87 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:49,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:49,445 INFO L82 PathProgramCache]: Analyzing trace with hash -786217295, now seen corresponding path program 80 times [2019-12-07 15:52:49,445 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:49,445 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500086614] [2019-12-07 15:52:49,446 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:49,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:50,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:50,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500086614] [2019-12-07 15:52:50,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:50,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:52:50,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409074653] [2019-12-07 15:52:50,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:52:50,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:50,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:52:50,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=636, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:52:50,120 INFO L87 Difference]: Start difference. First operand 44349 states and 128522 transitions. Second operand 27 states. [2019-12-07 15:52:53,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:53,609 INFO L93 Difference]: Finished difference Result 45992 states and 132758 transitions. [2019-12-07 15:52:53,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:52:53,610 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:52:53,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:53,678 INFO L225 Difference]: With dead ends: 45992 [2019-12-07 15:52:53,679 INFO L226 Difference]: Without dead ends: 45828 [2019-12-07 15:52:53,679 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=185, Invalid=1707, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 15:52:53,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45828 states. [2019-12-07 15:52:54,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45828 to 44389. [2019-12-07 15:52:54,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44389 states. [2019-12-07 15:52:54,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44389 states to 44389 states and 128613 transitions. [2019-12-07 15:52:54,341 INFO L78 Accepts]: Start accepts. Automaton has 44389 states and 128613 transitions. Word has length 72 [2019-12-07 15:52:54,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:54,342 INFO L462 AbstractCegarLoop]: Abstraction has 44389 states and 128613 transitions. [2019-12-07 15:52:54,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:52:54,342 INFO L276 IsEmpty]: Start isEmpty. Operand 44389 states and 128613 transitions. [2019-12-07 15:52:54,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:54,382 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:54,382 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:54,383 INFO L410 AbstractCegarLoop]: === Iteration 88 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:54,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:54,383 INFO L82 PathProgramCache]: Analyzing trace with hash -1111774425, now seen corresponding path program 81 times [2019-12-07 15:52:54,383 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:54,383 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091341394] [2019-12-07 15:52:54,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:54,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:54,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:54,988 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091341394] [2019-12-07 15:52:54,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:54,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:52:54,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076615979] [2019-12-07 15:52:54,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:52:54,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:54,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:52:54,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:52:54,989 INFO L87 Difference]: Start difference. First operand 44389 states and 128613 transitions. Second operand 20 states. [2019-12-07 15:52:58,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:52:58,038 INFO L93 Difference]: Finished difference Result 50403 states and 145756 transitions. [2019-12-07 15:52:58,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 15:52:58,039 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:52:58,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:52:58,097 INFO L225 Difference]: With dead ends: 50403 [2019-12-07 15:52:58,097 INFO L226 Difference]: Without dead ends: 48031 [2019-12-07 15:52:58,097 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=231, Invalid=1491, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:52:58,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48031 states. [2019-12-07 15:52:58,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48031 to 44875. [2019-12-07 15:52:58,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44875 states. [2019-12-07 15:52:58,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44875 states to 44875 states and 129850 transitions. [2019-12-07 15:52:58,746 INFO L78 Accepts]: Start accepts. Automaton has 44875 states and 129850 transitions. Word has length 72 [2019-12-07 15:52:58,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:52:58,746 INFO L462 AbstractCegarLoop]: Abstraction has 44875 states and 129850 transitions. [2019-12-07 15:52:58,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:52:58,746 INFO L276 IsEmpty]: Start isEmpty. Operand 44875 states and 129850 transitions. [2019-12-07 15:52:58,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:52:58,788 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:52:58,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:52:58,788 INFO L410 AbstractCegarLoop]: === Iteration 89 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:52:58,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:52:58,788 INFO L82 PathProgramCache]: Analyzing trace with hash 1460760679, now seen corresponding path program 82 times [2019-12-07 15:52:58,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:52:58,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340218036] [2019-12-07 15:52:58,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:52:58,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:52:59,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:52:59,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340218036] [2019-12-07 15:52:59,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:52:59,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 15:52:59,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [71912484] [2019-12-07 15:52:59,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 15:52:59,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:52:59,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 15:52:59,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2019-12-07 15:52:59,363 INFO L87 Difference]: Start difference. First operand 44875 states and 129850 transitions. Second operand 25 states. [2019-12-07 15:53:01,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:01,105 INFO L93 Difference]: Finished difference Result 46495 states and 134033 transitions. [2019-12-07 15:53:01,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:53:01,105 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 72 [2019-12-07 15:53:01,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:01,158 INFO L225 Difference]: With dead ends: 46495 [2019-12-07 15:53:01,158 INFO L226 Difference]: Without dead ends: 46331 [2019-12-07 15:53:01,158 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 284 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=140, Invalid=1420, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 15:53:01,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46331 states. [2019-12-07 15:53:01,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46331 to 44884. [2019-12-07 15:53:01,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44884 states. [2019-12-07 15:53:01,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44884 states to 44884 states and 129869 transitions. [2019-12-07 15:53:01,787 INFO L78 Accepts]: Start accepts. Automaton has 44884 states and 129869 transitions. Word has length 72 [2019-12-07 15:53:01,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:01,787 INFO L462 AbstractCegarLoop]: Abstraction has 44884 states and 129869 transitions. [2019-12-07 15:53:01,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 15:53:01,787 INFO L276 IsEmpty]: Start isEmpty. Operand 44884 states and 129869 transitions. [2019-12-07 15:53:01,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:01,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:01,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:01,828 INFO L410 AbstractCegarLoop]: === Iteration 90 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:01,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:01,829 INFO L82 PathProgramCache]: Analyzing trace with hash 1703635355, now seen corresponding path program 83 times [2019-12-07 15:53:01,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:01,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146058179] [2019-12-07 15:53:01,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:01,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:02,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:02,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [146058179] [2019-12-07 15:53:02,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:02,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:53:02,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1558483139] [2019-12-07 15:53:02,168 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:53:02,168 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:02,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:53:02,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=268, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:53:02,169 INFO L87 Difference]: Start difference. First operand 44884 states and 129869 transitions. Second operand 18 states. [2019-12-07 15:53:02,675 WARN L192 SmtUtils]: Spent 236.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 30 [2019-12-07 15:53:02,958 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 20 [2019-12-07 15:53:08,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:08,609 INFO L93 Difference]: Finished difference Result 50350 states and 145578 transitions. [2019-12-07 15:53:08,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 15:53:08,610 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:53:08,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:08,678 INFO L225 Difference]: With dead ends: 50350 [2019-12-07 15:53:08,678 INFO L226 Difference]: Without dead ends: 47234 [2019-12-07 15:53:08,678 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=154, Invalid=1106, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:53:08,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47234 states. [2019-12-07 15:53:09,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47234 to 44462. [2019-12-07 15:53:09,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44462 states. [2019-12-07 15:53:09,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44462 states to 44462 states and 128840 transitions. [2019-12-07 15:53:09,338 INFO L78 Accepts]: Start accepts. Automaton has 44462 states and 128840 transitions. Word has length 72 [2019-12-07 15:53:09,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:09,338 INFO L462 AbstractCegarLoop]: Abstraction has 44462 states and 128840 transitions. [2019-12-07 15:53:09,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:53:09,338 INFO L276 IsEmpty]: Start isEmpty. Operand 44462 states and 128840 transitions. [2019-12-07 15:53:09,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:09,379 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:09,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:09,379 INFO L410 AbstractCegarLoop]: === Iteration 91 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:09,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:09,379 INFO L82 PathProgramCache]: Analyzing trace with hash 1249072583, now seen corresponding path program 84 times [2019-12-07 15:53:09,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:09,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544868721] [2019-12-07 15:53:09,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:09,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:09,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:09,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544868721] [2019-12-07 15:53:09,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:09,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:53:09,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681120898] [2019-12-07 15:53:09,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:53:09,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:09,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:53:09,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:53:09,737 INFO L87 Difference]: Start difference. First operand 44462 states and 128840 transitions. Second operand 18 states. [2019-12-07 15:53:12,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:12,162 INFO L93 Difference]: Finished difference Result 51762 states and 149194 transitions. [2019-12-07 15:53:12,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 15:53:12,163 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 72 [2019-12-07 15:53:12,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:12,235 INFO L225 Difference]: With dead ends: 51762 [2019-12-07 15:53:12,235 INFO L226 Difference]: Without dead ends: 48903 [2019-12-07 15:53:12,235 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 510 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=304, Invalid=2048, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 15:53:12,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48903 states. [2019-12-07 15:53:12,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48903 to 44586. [2019-12-07 15:53:12,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44586 states. [2019-12-07 15:53:12,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44586 states to 44586 states and 129101 transitions. [2019-12-07 15:53:12,895 INFO L78 Accepts]: Start accepts. Automaton has 44586 states and 129101 transitions. Word has length 72 [2019-12-07 15:53:12,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:12,895 INFO L462 AbstractCegarLoop]: Abstraction has 44586 states and 129101 transitions. [2019-12-07 15:53:12,895 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:53:12,895 INFO L276 IsEmpty]: Start isEmpty. Operand 44586 states and 129101 transitions. [2019-12-07 15:53:12,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:12,936 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:12,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:12,936 INFO L410 AbstractCegarLoop]: === Iteration 92 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:12,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:12,936 INFO L82 PathProgramCache]: Analyzing trace with hash -558986371, now seen corresponding path program 85 times [2019-12-07 15:53:12,936 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:12,936 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510525487] [2019-12-07 15:53:12,936 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:12,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:13,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:13,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510525487] [2019-12-07 15:53:13,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:13,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:53:13,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696064853] [2019-12-07 15:53:13,172 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:53:13,172 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:13,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:53:13,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:53:13,173 INFO L87 Difference]: Start difference. First operand 44586 states and 129101 transitions. Second operand 15 states. [2019-12-07 15:53:14,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:14,691 INFO L93 Difference]: Finished difference Result 60011 states and 171759 transitions. [2019-12-07 15:53:14,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:53:14,692 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 72 [2019-12-07 15:53:14,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:14,765 INFO L225 Difference]: With dead ends: 60011 [2019-12-07 15:53:14,765 INFO L226 Difference]: Without dead ends: 57699 [2019-12-07 15:53:14,765 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=161, Invalid=831, Unknown=0, NotChecked=0, Total=992 [2019-12-07 15:53:14,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57699 states. [2019-12-07 15:53:15,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57699 to 44859. [2019-12-07 15:53:15,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44859 states. [2019-12-07 15:53:15,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44859 states to 44859 states and 129763 transitions. [2019-12-07 15:53:15,463 INFO L78 Accepts]: Start accepts. Automaton has 44859 states and 129763 transitions. Word has length 72 [2019-12-07 15:53:15,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:15,463 INFO L462 AbstractCegarLoop]: Abstraction has 44859 states and 129763 transitions. [2019-12-07 15:53:15,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:53:15,463 INFO L276 IsEmpty]: Start isEmpty. Operand 44859 states and 129763 transitions. [2019-12-07 15:53:15,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:15,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:15,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:15,504 INFO L410 AbstractCegarLoop]: === Iteration 93 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:15,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:15,504 INFO L82 PathProgramCache]: Analyzing trace with hash -90032657, now seen corresponding path program 86 times [2019-12-07 15:53:15,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:15,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863654378] [2019-12-07 15:53:15,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:15,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:16,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:16,653 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1863654378] [2019-12-07 15:53:16,653 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:16,653 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 15:53:16,654 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2066578812] [2019-12-07 15:53:16,654 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 15:53:16,654 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:16,654 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 15:53:16,654 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:53:16,654 INFO L87 Difference]: Start difference. First operand 44859 states and 129763 transitions. Second operand 27 states. [2019-12-07 15:53:17,237 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 26 [2019-12-07 15:53:17,514 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 26 [2019-12-07 15:53:17,824 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 28 [2019-12-07 15:53:20,918 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 33 [2019-12-07 15:53:21,553 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 33 [2019-12-07 15:53:23,747 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 15:53:24,197 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:53:25,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:25,258 INFO L93 Difference]: Finished difference Result 48350 states and 138712 transitions. [2019-12-07 15:53:25,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 15:53:25,258 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2019-12-07 15:53:25,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:25,313 INFO L225 Difference]: With dead ends: 48350 [2019-12-07 15:53:25,313 INFO L226 Difference]: Without dead ends: 47882 [2019-12-07 15:53:25,314 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 726 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=411, Invalid=3249, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 15:53:25,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47882 states. [2019-12-07 15:53:25,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47882 to 44111. [2019-12-07 15:53:25,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44111 states. [2019-12-07 15:53:25,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44111 states to 44111 states and 127948 transitions. [2019-12-07 15:53:25,971 INFO L78 Accepts]: Start accepts. Automaton has 44111 states and 127948 transitions. Word has length 72 [2019-12-07 15:53:25,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:25,971 INFO L462 AbstractCegarLoop]: Abstraction has 44111 states and 127948 transitions. [2019-12-07 15:53:25,971 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 15:53:25,971 INFO L276 IsEmpty]: Start isEmpty. Operand 44111 states and 127948 transitions. [2019-12-07 15:53:26,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:26,011 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:26,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:26,012 INFO L410 AbstractCegarLoop]: === Iteration 94 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:26,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:26,012 INFO L82 PathProgramCache]: Analyzing trace with hash -1203761779, now seen corresponding path program 87 times [2019-12-07 15:53:26,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:26,012 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911774229] [2019-12-07 15:53:26,012 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:26,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:26,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:26,775 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911774229] [2019-12-07 15:53:26,775 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:26,775 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 15:53:26,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902342579] [2019-12-07 15:53:26,776 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 15:53:26,776 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:26,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 15:53:26,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=495, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:53:26,776 INFO L87 Difference]: Start difference. First operand 44111 states and 127948 transitions. Second operand 24 states. [2019-12-07 15:53:30,926 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 32 [2019-12-07 15:53:31,172 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 32 [2019-12-07 15:53:31,502 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 34 [2019-12-07 15:53:32,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:32,232 INFO L93 Difference]: Finished difference Result 48715 states and 140892 transitions. [2019-12-07 15:53:32,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 15:53:32,232 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 72 [2019-12-07 15:53:32,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:32,287 INFO L225 Difference]: With dead ends: 48715 [2019-12-07 15:53:32,287 INFO L226 Difference]: Without dead ends: 47800 [2019-12-07 15:53:32,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 433 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=245, Invalid=2107, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 15:53:32,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47800 states. [2019-12-07 15:53:32,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47800 to 44401. [2019-12-07 15:53:32,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44401 states. [2019-12-07 15:53:32,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44401 states to 44401 states and 128750 transitions. [2019-12-07 15:53:32,929 INFO L78 Accepts]: Start accepts. Automaton has 44401 states and 128750 transitions. Word has length 72 [2019-12-07 15:53:32,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:32,929 INFO L462 AbstractCegarLoop]: Abstraction has 44401 states and 128750 transitions. [2019-12-07 15:53:32,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 15:53:32,929 INFO L276 IsEmpty]: Start isEmpty. Operand 44401 states and 128750 transitions. [2019-12-07 15:53:32,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:32,970 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:32,970 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:32,970 INFO L410 AbstractCegarLoop]: === Iteration 95 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:32,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:32,971 INFO L82 PathProgramCache]: Analyzing trace with hash -846444265, now seen corresponding path program 88 times [2019-12-07 15:53:32,971 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:32,971 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68186305] [2019-12-07 15:53:32,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:32,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:33,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:33,232 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68186305] [2019-12-07 15:53:33,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:33,233 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:53:33,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274377331] [2019-12-07 15:53:33,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:53:33,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:33,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:53:33,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:53:33,233 INFO L87 Difference]: Start difference. First operand 44401 states and 128750 transitions. Second operand 16 states. [2019-12-07 15:53:34,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:34,316 INFO L93 Difference]: Finished difference Result 48280 states and 139158 transitions. [2019-12-07 15:53:34,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:53:34,317 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2019-12-07 15:53:34,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:34,372 INFO L225 Difference]: With dead ends: 48280 [2019-12-07 15:53:34,373 INFO L226 Difference]: Without dead ends: 47954 [2019-12-07 15:53:34,373 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 263 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=223, Invalid=1259, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 15:53:34,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47954 states. [2019-12-07 15:53:34,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47954 to 44469. [2019-12-07 15:53:34,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44469 states. [2019-12-07 15:53:35,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44469 states to 44469 states and 128870 transitions. [2019-12-07 15:53:35,044 INFO L78 Accepts]: Start accepts. Automaton has 44469 states and 128870 transitions. Word has length 72 [2019-12-07 15:53:35,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:35,044 INFO L462 AbstractCegarLoop]: Abstraction has 44469 states and 128870 transitions. [2019-12-07 15:53:35,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:53:35,044 INFO L276 IsEmpty]: Start isEmpty. Operand 44469 states and 128870 transitions. [2019-12-07 15:53:35,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:35,085 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:35,085 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:35,085 INFO L410 AbstractCegarLoop]: === Iteration 96 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:35,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:35,086 INFO L82 PathProgramCache]: Analyzing trace with hash -2078242715, now seen corresponding path program 89 times [2019-12-07 15:53:35,086 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:35,086 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952455035] [2019-12-07 15:53:35,086 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:35,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:53:35,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:53:35,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [952455035] [2019-12-07 15:53:35,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:53:35,473 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 15:53:35,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808581869] [2019-12-07 15:53:35,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 15:53:35,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:53:35,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 15:53:35,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=338, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:53:35,473 INFO L87 Difference]: Start difference. First operand 44469 states and 128870 transitions. Second operand 20 states. [2019-12-07 15:53:37,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:53:37,661 INFO L93 Difference]: Finished difference Result 47532 states and 136623 transitions. [2019-12-07 15:53:37,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 15:53:37,661 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2019-12-07 15:53:37,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:53:37,717 INFO L225 Difference]: With dead ends: 47532 [2019-12-07 15:53:37,717 INFO L226 Difference]: Without dead ends: 47132 [2019-12-07 15:53:37,718 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 616 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=353, Invalid=2617, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 15:53:37,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47132 states. [2019-12-07 15:53:38,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47132 to 44342. [2019-12-07 15:53:38,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44342 states. [2019-12-07 15:53:38,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44342 states to 44342 states and 128643 transitions. [2019-12-07 15:53:38,370 INFO L78 Accepts]: Start accepts. Automaton has 44342 states and 128643 transitions. Word has length 72 [2019-12-07 15:53:38,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:53:38,370 INFO L462 AbstractCegarLoop]: Abstraction has 44342 states and 128643 transitions. [2019-12-07 15:53:38,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 15:53:38,370 INFO L276 IsEmpty]: Start isEmpty. Operand 44342 states and 128643 transitions. [2019-12-07 15:53:38,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 15:53:38,411 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:53:38,411 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:53:38,412 INFO L410 AbstractCegarLoop]: === Iteration 97 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:53:38,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:53:38,412 INFO L82 PathProgramCache]: Analyzing trace with hash 959991305, now seen corresponding path program 90 times [2019-12-07 15:53:38,412 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:53:38,412 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915157626] [2019-12-07 15:53:38,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:53:38,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:53:38,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:53:38,503 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 15:53:38,504 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:53:38,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1160] [1160] ULTIMATE.startENTRY-->L838: Formula: (let ((.cse1 (store |v_#valid_73| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_244| 1))) (and (= v_~__unbuffered_cnt~0_104 0) (= 0 v_~x$r_buff0_thd3~0_278) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8) (= v_~main$tmp_guard1~0_31 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p2_EAX$w_buff0~0_7) (= (select (select |v_#memory_int_395| |v_~#x~0.base_244|) |v_~#x~0.offset_244|) 0) (= v_~x$r_buff1_thd0~0_77 0) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd2~0_8) (= 0 v_~__unbuffered_p2_EAX$w_buff0_used~0_7) (= 0 v_~__unbuffered_p2_EAX$w_buff1~0_7) (= 0 v_~x$w_buff1~0_137) (= 0 |v_~#x~0.offset_244|) (= (select .cse0 |v_ULTIMATE.start_main_~#t2461~0.base_22|) 0) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_70) (= v_~x$r_buff1_thd2~0_55 0) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6) (= v_~weak$$choice2~0_140 0) (= 0 v_~x$read_delayed~0_8) (= v_~x$mem_tmp~0_82 0) (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~x$r_buff0_thd0~0_89) (= |v_#length_36| (store (store |v_#length_37| |v_~#x~0.base_244| 4) |v_ULTIMATE.start_main_~#t2461~0.base_22| 4)) (= 0 v_~x$w_buff1_used~0_483) (= 0 v_~__unbuffered_p2_EAX$mem_tmp~0_8) (= v_~main$tmp_guard0~0_33 0) (= 0 v_~x$w_buff0~0_164) (= 0 v_~x$r_buff1_thd3~0_181) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t2461~0.base_22| 1)) (= v_~y~0_51 0) (= 0 v_~x$read_delayed_var~0.offset_7) (< |v_#StackHeapBarrier_24| |v_~#x~0.base_244|) (= 0 v_~x$w_buff0_used~0_778) (= v_~x$r_buff0_thd1~0_285 0) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd1~0_7) (< 0 |v_#StackHeapBarrier_24|) (= 0 v_~__unbuffered_p2_EAX$flush_delayed~0_7) (= 0 (select .cse1 |v_~#x~0.base_244|)) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd2~0_7) (= 0 v_~__unbuffered_p2_EAX~0_77) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_44) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6) (= 0 v_~__unbuffered_p2_EAX$w_buff1_used~0_7) (= |v_ULTIMATE.start_main_~#t2461~0.offset_17| 0) (= 0 v_~weak$$choice0~0_74) (= 0 v_~weak$$choice1~0_28) (= v_~__unbuffered_p2_EAX$read_delayed~0_57 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.base_44) (= |v_#memory_int_394| (store |v_#memory_int_395| |v_ULTIMATE.start_main_~#t2461~0.base_22| (store (select |v_#memory_int_395| |v_ULTIMATE.start_main_~#t2461~0.base_22|) |v_ULTIMATE.start_main_~#t2461~0.offset_17| 0))) (< |v_#StackHeapBarrier_24| |v_ULTIMATE.start_main_~#t2461~0.base_22|) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8) (= v_~x$r_buff1_thd1~0_182 0) (= v_~x$flush_delayed~0_108 0) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd3~0_7) (= 0 v_~x$r_buff0_thd2~0_71)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_24|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_395|, #length=|v_#length_37|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_164, ~x$flush_delayed~0=v_~x$flush_delayed~0_108, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_44, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_44, #NULL.offset=|v_#NULL.offset_6|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_182, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_278, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_7|, ULTIMATE.start_main_~#t2461~0.base=|v_ULTIMATE.start_main_~#t2461~0.base_22|, ~weak$$choice1~0=v_~weak$$choice1~0_28, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_70, ~__unbuffered_p2_EAX$w_buff0_used~0=v_~__unbuffered_p2_EAX$w_buff0_used~0_7, #length=|v_#length_36|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_77, ~__unbuffered_p2_EAX$r_buff1_thd2~0=v_~__unbuffered_p2_EAX$r_buff1_thd2~0_7, ULTIMATE.start_main_~#t2461~0.offset=|v_ULTIMATE.start_main_~#t2461~0.offset_17|, ~__unbuffered_p2_EAX$r_buff0_thd0~0=v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_89, ~__unbuffered_p2_EAX$w_buff0~0=v_~__unbuffered_p2_EAX$w_buff0~0_7, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~#x~0.offset=|v_~#x~0.offset_244|, ~x$w_buff1~0=v_~x$w_buff1~0_137, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_483, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_21|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_115|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_21|, ULTIMATE.start_main_#t~nondet81=|v_ULTIMATE.start_main_#t~nondet81_33|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_51|, ~weak$$choice0~0=v_~weak$$choice0~0_74, #StackHeapBarrier=|v_#StackHeapBarrier_24|, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_32|, ~__unbuffered_p2_EAX$r_buff0_thd1~0=v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_104, ~__unbuffered_p2_EAX$r_buff1_thd3~0=v_~__unbuffered_p2_EAX$r_buff1_thd3~0_7, ULTIMATE.start_main_~#t2463~0.offset=|v_ULTIMATE.start_main_~#t2463~0.offset_21|, ULTIMATE.start_main_~#t2462~0.offset=|v_ULTIMATE.start_main_~#t2462~0.offset_28|, ~__unbuffered_p2_EAX$w_buff1~0=v_~__unbuffered_p2_EAX$w_buff1~0_7, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_285, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_20|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_181, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_82, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_8|, ULTIMATE.start_main_~#t2462~0.base=|v_ULTIMATE.start_main_~#t2462~0.base_31|, ~__unbuffered_p2_EAX$w_buff1_used~0=v_~__unbuffered_p2_EAX$w_buff1_used~0_7, ~__unbuffered_p2_EAX$r_buff0_thd2~0=v_~__unbuffered_p2_EAX$r_buff0_thd2~0_8, ~__unbuffered_p2_EAX$r_buff1_thd0~0=v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6, ~y~0=v_~y~0_51, ULTIMATE.start_main_#t~mem74=|v_ULTIMATE.start_main_#t~mem74_20|, ~__unbuffered_p2_EAX$mem_tmp~0=v_~__unbuffered_p2_EAX$mem_tmp~0_8, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_77, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_71, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_299|, ~__unbuffered_p2_EAX$flush_delayed~0=v_~__unbuffered_p2_EAX$flush_delayed~0_7, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_24|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_778, ~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_57, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_50|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_71|, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_37|, #memory_int=|v_#memory_int_394|, ~#x~0.base=|v_~#x~0.base_244|, ULTIMATE.start_main_~#t2463~0.base=|v_ULTIMATE.start_main_~#t2463~0.base_24|, ~__unbuffered_p2_EAX$r_buff1_thd1~0=v_~__unbuffered_p2_EAX$r_buff1_thd1~0_7, ~__unbuffered_p2_EAX$r_buff0_thd3~0=v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_140, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, ~__unbuffered_p2_EAX$read_delayed_var~0.base, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2461~0.base, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p2_EAX$w_buff0_used~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EAX$r_buff1_thd2~0, ULTIMATE.start_main_~#t2461~0.offset, ~__unbuffered_p2_EAX$r_buff0_thd0~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EAX$w_buff0~0, ~__unbuffered_p2_EBX~0, ~#x~0.offset, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~nondet81, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite84, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite80, ~__unbuffered_p2_EAX$r_buff0_thd1~0, ~__unbuffered_cnt~0, ~__unbuffered_p2_EAX$r_buff1_thd3~0, ULTIMATE.start_main_~#t2463~0.offset, ULTIMATE.start_main_~#t2462~0.offset, ~__unbuffered_p2_EAX$w_buff1~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet73, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~nondet71, ULTIMATE.start_main_~#t2462~0.base, ~__unbuffered_p2_EAX$w_buff1_used~0, ~__unbuffered_p2_EAX$r_buff0_thd2~0, ~__unbuffered_p2_EAX$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_#t~mem74, ~__unbuffered_p2_EAX$mem_tmp~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite78, ~__unbuffered_p2_EAX$flush_delayed~0, #NULL.base, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0, ~__unbuffered_p2_EAX$read_delayed~0, ULTIMATE.start_main_#t~ite83, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem82, #memory_int, ~#x~0.base, ULTIMATE.start_main_~#t2463~0.base, ~__unbuffered_p2_EAX$r_buff1_thd1~0, ~__unbuffered_p2_EAX$r_buff0_thd3~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 15:53:38,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1126] [1126] L838-1-->L840: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2462~0.base_23| 0)) (= |v_ULTIMATE.start_main_~#t2462~0.offset_22| 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t2462~0.base_23|) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t2462~0.base_23|)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2462~0.base_23| 4)) (= (store |v_#memory_int_282| |v_ULTIMATE.start_main_~#t2462~0.base_23| (store (select |v_#memory_int_282| |v_ULTIMATE.start_main_~#t2462~0.base_23|) |v_ULTIMATE.start_main_~#t2462~0.offset_22| 1)) |v_#memory_int_281|) (= (store |v_#valid_36| |v_ULTIMATE.start_main_~#t2462~0.base_23| 1) |v_#valid_35|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_282|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t2462~0.base=|v_ULTIMATE.start_main_~#t2462~0.base_23|, ULTIMATE.start_main_~#t2462~0.offset=|v_ULTIMATE.start_main_~#t2462~0.offset_22|, #StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_281|, #length=|v_#length_21|, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2462~0.base, ULTIMATE.start_main_~#t2462~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet71] because there is no mapped edge [2019-12-07 15:53:38,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1125] [1125] L840-1-->L842: Formula: (and (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2463~0.base_14| 4)) (= 0 |v_ULTIMATE.start_main_~#t2463~0.offset_14|) (not (= 0 |v_ULTIMATE.start_main_~#t2463~0.base_14|)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2463~0.base_14|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2463~0.base_14| 1)) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2463~0.base_14|) 0) (= |v_#memory_int_279| (store |v_#memory_int_280| |v_ULTIMATE.start_main_~#t2463~0.base_14| (store (select |v_#memory_int_280| |v_ULTIMATE.start_main_~#t2463~0.base_14|) |v_ULTIMATE.start_main_~#t2463~0.offset_14| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_280|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_279|, ULTIMATE.start_main_~#t2463~0.base=|v_ULTIMATE.start_main_~#t2463~0.base_14|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_3|, ULTIMATE.start_main_~#t2463~0.offset=|v_ULTIMATE.start_main_~#t2463~0.offset_14|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2463~0.base, #length, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2463~0.offset] because there is no mapped edge [2019-12-07 15:53:38,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1087] [1087] L780-2-->L780-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1291052940 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1291052940 256)))) (or (and (= |P1Thread1of1ForFork1_#t~mem30_Out-1291052940| |P1Thread1of1ForFork1_#t~ite31_Out-1291052940|) (or .cse0 .cse1) (= (select (select |#memory_int_In-1291052940| |~#x~0.base_In-1291052940|) |~#x~0.offset_In-1291052940|) |P1Thread1of1ForFork1_#t~mem30_Out-1291052940|)) (and (not .cse0) (= ~x$w_buff1~0_In-1291052940 |P1Thread1of1ForFork1_#t~ite31_Out-1291052940|) (= |P1Thread1of1ForFork1_#t~mem30_In-1291052940| |P1Thread1of1ForFork1_#t~mem30_Out-1291052940|) (not .cse1)))) InVars {P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_In-1291052940|, ~#x~0.offset=|~#x~0.offset_In-1291052940|, ~x$w_buff1~0=~x$w_buff1~0_In-1291052940, ~#x~0.base=|~#x~0.base_In-1291052940|, #memory_int=|#memory_int_In-1291052940|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1291052940, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1291052940} OutVars{P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_Out-1291052940|, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out-1291052940|, ~#x~0.offset=|~#x~0.offset_In-1291052940|, ~x$w_buff1~0=~x$w_buff1~0_In-1291052940, ~#x~0.base=|~#x~0.base_In-1291052940|, #memory_int=|#memory_int_In-1291052940|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1291052940, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1291052940} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 15:53:38,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L780-4-->L781: Formula: (= (store |v_#memory_int_69| |v_~#x~0.base_42| (store (select |v_#memory_int_69| |v_~#x~0.base_42|) |v_~#x~0.offset_42| |v_P1Thread1of1ForFork1_#t~ite31_6|)) |v_#memory_int_68|) InVars {~#x~0.offset=|v_~#x~0.offset_42|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_6|, #memory_int=|v_#memory_int_69|, ~#x~0.base=|v_~#x~0.base_42|} OutVars{P1Thread1of1ForFork1_#t~mem30=|v_P1Thread1of1ForFork1_#t~mem30_3|, ~#x~0.offset=|v_~#x~0.offset_42|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, #memory_int=|v_#memory_int_68|, ~#x~0.base=|v_~#x~0.base_42|, P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_7|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31, #memory_int, P1Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 15:53:38,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1084] [1084] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-657281502 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-657281502 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite33_Out-657281502| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite33_Out-657281502| ~x$w_buff0_used~0_In-657281502)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-657281502, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-657281502} OutVars{P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-657281502|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-657281502, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-657281502} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 15:53:38,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1081] [1081] L782-->L782-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-1394838492 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1394838492 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1394838492 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1394838492 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite34_Out-1394838492| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite34_Out-1394838492| ~x$w_buff1_used~0_In-1394838492)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1394838492, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1394838492, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1394838492, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1394838492} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-1394838492|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1394838492, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1394838492, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1394838492, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1394838492} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 15:53:38,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1093] [1093] L783-->L784: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-294974088 256))) (.cse0 (= ~x$r_buff0_thd2~0_In-294974088 ~x$r_buff0_thd2~0_Out-294974088)) (.cse2 (= (mod ~x$w_buff0_used~0_In-294974088 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out-294974088) (not .cse2)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-294974088, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-294974088} OutVars{P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out-294974088|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-294974088, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-294974088} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 15:53:38,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1097] [1097] L784-->L784-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In858377533 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In858377533 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In858377533 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In858377533 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite36_Out858377533| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite36_Out858377533| ~x$r_buff1_thd2~0_In858377533)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In858377533, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In858377533, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In858377533, ~x$w_buff0_used~0=~x$w_buff0_used~0_In858377533} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In858377533, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In858377533, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In858377533, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out858377533|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In858377533} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 15:53:38,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1032] [1032] L803-->L804: Formula: (and (= v_~x$r_buff0_thd3~0_105 v_~x$r_buff0_thd3~0_104) (not (= (mod v_~weak$$choice2~0_77 256) 0))) InVars {~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_105, ~weak$$choice2~0=v_~weak$$choice2~0_77} OutVars{P2Thread1of1ForFork2_#t~ite56=|v_P2Thread1of1ForFork2_#t~ite56_9|, P2Thread1of1ForFork2_#t~ite57=|v_P2Thread1of1ForFork2_#t~ite57_9|, P2Thread1of1ForFork2_#t~ite55=|v_P2Thread1of1ForFork2_#t~ite55_10|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_77} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite56, P2Thread1of1ForFork2_#t~ite57, P2Thread1of1ForFork2_#t~ite55, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 15:53:38,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1083] [1083] L808-->L808-2: Formula: (let ((.cse0 (= (mod ~x$flush_delayed~0_In-167513845 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~mem62_In-167513845| |P2Thread1of1ForFork2_#t~mem62_Out-167513845|) (= |P2Thread1of1ForFork2_#t~ite63_Out-167513845| ~x$mem_tmp~0_In-167513845)) (and (= |P2Thread1of1ForFork2_#t~mem62_Out-167513845| (select (select |#memory_int_In-167513845| |~#x~0.base_In-167513845|) |~#x~0.offset_In-167513845|)) (= |P2Thread1of1ForFork2_#t~mem62_Out-167513845| |P2Thread1of1ForFork2_#t~ite63_Out-167513845|) .cse0))) InVars {~x$flush_delayed~0=~x$flush_delayed~0_In-167513845, ~#x~0.offset=|~#x~0.offset_In-167513845|, ~#x~0.base=|~#x~0.base_In-167513845|, #memory_int=|#memory_int_In-167513845|, ~x$mem_tmp~0=~x$mem_tmp~0_In-167513845, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_In-167513845|} OutVars{~x$flush_delayed~0=~x$flush_delayed~0_In-167513845, ~#x~0.offset=|~#x~0.offset_In-167513845|, P2Thread1of1ForFork2_#t~ite63=|P2Thread1of1ForFork2_#t~ite63_Out-167513845|, ~#x~0.base=|~#x~0.base_In-167513845|, #memory_int=|#memory_int_In-167513845|, ~x$mem_tmp~0=~x$mem_tmp~0_In-167513845, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_Out-167513845|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite63, P2Thread1of1ForFork2_#t~mem62] because there is no mapped edge [2019-12-07 15:53:38,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1079] [1079] L815-2-->L815-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-2008711111 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-2008711111 256)))) (or (and (= |P2Thread1of1ForFork2_#t~mem64_In-2008711111| |P2Thread1of1ForFork2_#t~mem64_Out-2008711111|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite65_Out-2008711111| ~x$w_buff1~0_In-2008711111) (not .cse1)) (and (= (select (select |#memory_int_In-2008711111| |~#x~0.base_In-2008711111|) |~#x~0.offset_In-2008711111|) |P2Thread1of1ForFork2_#t~mem64_Out-2008711111|) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite65_Out-2008711111| |P2Thread1of1ForFork2_#t~mem64_Out-2008711111|)))) InVars {~#x~0.offset=|~#x~0.offset_In-2008711111|, ~x$w_buff1~0=~x$w_buff1~0_In-2008711111, ~#x~0.base=|~#x~0.base_In-2008711111|, #memory_int=|#memory_int_In-2008711111|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2008711111, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2008711111, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_In-2008711111|} OutVars{P2Thread1of1ForFork2_#t~ite65=|P2Thread1of1ForFork2_#t~ite65_Out-2008711111|, ~#x~0.offset=|~#x~0.offset_In-2008711111|, ~x$w_buff1~0=~x$w_buff1~0_In-2008711111, ~#x~0.base=|~#x~0.base_In-2008711111|, #memory_int=|#memory_int_In-2008711111|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2008711111, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2008711111, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_Out-2008711111|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite65, P2Thread1of1ForFork2_#t~mem64] because there is no mapped edge [2019-12-07 15:53:38,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1033] [1033] L815-4-->L816: Formula: (= (store |v_#memory_int_131| |v_~#x~0.base_85| (store (select |v_#memory_int_131| |v_~#x~0.base_85|) |v_~#x~0.offset_85| |v_P2Thread1of1ForFork2_#t~ite65_10|)) |v_#memory_int_130|) InVars {P2Thread1of1ForFork2_#t~ite65=|v_P2Thread1of1ForFork2_#t~ite65_10|, ~#x~0.offset=|v_~#x~0.offset_85|, #memory_int=|v_#memory_int_131|, ~#x~0.base=|v_~#x~0.base_85|} OutVars{P2Thread1of1ForFork2_#t~ite65=|v_P2Thread1of1ForFork2_#t~ite65_9|, P2Thread1of1ForFork2_#t~ite66=|v_P2Thread1of1ForFork2_#t~ite66_5|, ~#x~0.offset=|v_~#x~0.offset_85|, #memory_int=|v_#memory_int_130|, ~#x~0.base=|v_~#x~0.base_85|, P2Thread1of1ForFork2_#t~mem64=|v_P2Thread1of1ForFork2_#t~mem64_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite65, P2Thread1of1ForFork2_#t~ite66, #memory_int, P2Thread1of1ForFork2_#t~mem64] because there is no mapped edge [2019-12-07 15:53:38,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1086] [1086] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1234400312 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1234400312 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite67_Out1234400312| ~x$w_buff0_used~0_In1234400312)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite67_Out1234400312| 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1234400312, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1234400312} OutVars{P2Thread1of1ForFork2_#t~ite67=|P2Thread1of1ForFork2_#t~ite67_Out1234400312|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1234400312, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1234400312} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite67] because there is no mapped edge [2019-12-07 15:53:38,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1095] [1095] L817-->L817-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-962396148 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In-962396148 256))) (.cse0 (= (mod ~x$r_buff1_thd3~0_In-962396148 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-962396148 256)))) (or (and (= ~x$w_buff1_used~0_In-962396148 |P2Thread1of1ForFork2_#t~ite68_Out-962396148|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite68_Out-962396148|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-962396148, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-962396148, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-962396148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-962396148} OutVars{P2Thread1of1ForFork2_#t~ite68=|P2Thread1of1ForFork2_#t~ite68_Out-962396148|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-962396148, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-962396148, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-962396148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-962396148} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite68] because there is no mapped edge [2019-12-07 15:53:38,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1077] [1077] L818-->L819: Formula: (let ((.cse1 (= ~x$r_buff0_thd3~0_Out557555560 ~x$r_buff0_thd3~0_In557555560)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In557555560 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In557555560 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd3~0_Out557555560 0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In557555560, ~x$w_buff0_used~0=~x$w_buff0_used~0_In557555560} OutVars{P2Thread1of1ForFork2_#t~ite69=|P2Thread1of1ForFork2_#t~ite69_Out557555560|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out557555560, ~x$w_buff0_used~0=~x$w_buff0_used~0_In557555560} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite69, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 15:53:38,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1089] [1089] L819-->L819-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-1330316371 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1330316371 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1330316371 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1330316371 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite70_Out-1330316371| ~x$r_buff1_thd3~0_In-1330316371) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite70_Out-1330316371| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1330316371, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1330316371, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1330316371, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1330316371} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1330316371, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1330316371, P2Thread1of1ForFork2_#t~ite70=|P2Thread1of1ForFork2_#t~ite70_Out-1330316371|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1330316371, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1330316371} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite70] because there is no mapped edge [2019-12-07 15:53:38,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1122] [1122] L819-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite70_34| v_~x$r_buff1_thd3~0_127) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68} OutVars{~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_127, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, P2Thread1of1ForFork2_#t~ite70, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 15:53:38,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L761-->L762: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_97 256))) (= v_~x$r_buff0_thd1~0_107 v_~x$r_buff0_thd1~0_106)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_97} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_7|, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_97, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, ~x$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 15:53:38,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] L764-->L764-2: Formula: (let ((.cse0 (= (mod ~x$flush_delayed~0_In-2140133997 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~mem28_In-2140133997| |P0Thread1of1ForFork0_#t~mem28_Out-2140133997|) (= ~x$mem_tmp~0_In-2140133997 |P0Thread1of1ForFork0_#t~ite29_Out-2140133997|) (not .cse0)) (and (= (select (select |#memory_int_In-2140133997| |~#x~0.base_In-2140133997|) |~#x~0.offset_In-2140133997|) |P0Thread1of1ForFork0_#t~mem28_Out-2140133997|) .cse0 (= |P0Thread1of1ForFork0_#t~mem28_Out-2140133997| |P0Thread1of1ForFork0_#t~ite29_Out-2140133997|)))) InVars {P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_In-2140133997|, ~x$flush_delayed~0=~x$flush_delayed~0_In-2140133997, ~#x~0.offset=|~#x~0.offset_In-2140133997|, ~#x~0.base=|~#x~0.base_In-2140133997|, #memory_int=|#memory_int_In-2140133997|, ~x$mem_tmp~0=~x$mem_tmp~0_In-2140133997} OutVars{P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_Out-2140133997|, ~x$flush_delayed~0=~x$flush_delayed~0_In-2140133997, ~#x~0.offset=|~#x~0.offset_In-2140133997|, P0Thread1of1ForFork0_#t~ite29=|P0Thread1of1ForFork0_#t~ite29_Out-2140133997|, ~#x~0.base=|~#x~0.base_In-2140133997|, #memory_int=|#memory_int_In-2140133997|, ~x$mem_tmp~0=~x$mem_tmp~0_In-2140133997} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 15:53:38,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1117] [1117] L764-2-->P0EXIT: Formula: (and (= |v_#memory_int_248| (store |v_#memory_int_249| |v_~#x~0.base_160| (store (select |v_#memory_int_249| |v_~#x~0.base_160|) |v_~#x~0.offset_160| |v_P0Thread1of1ForFork0_#t~ite29_28|))) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$flush_delayed~0_92 0)) InVars {~#x~0.offset=|v_~#x~0.offset_160|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_28|, #memory_int=|v_#memory_int_249|, ~#x~0.base=|v_~#x~0.base_160|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork0_#t~mem28=|v_P0Thread1of1ForFork0_#t~mem28_17|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_92, ~#x~0.offset=|v_~#x~0.offset_160|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_27|, #memory_int=|v_#memory_int_248|, ~#x~0.base=|v_~#x~0.base_160|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#res.offset, ~x$flush_delayed~0, P0Thread1of1ForFork0_#t~ite29, #memory_int, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:53:38,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1103] [1103] L784-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_28 |v_P1Thread1of1ForFork1_#t~ite36_22|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_28, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 15:53:38,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [984] [984] L846-->L848-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_118 256) 0) (= (mod v_~x$r_buff0_thd0~0_14 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_118} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_118} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:53:38,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1098] [1098] L848-2-->L848-5: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1150267551 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite76_Out-1150267551| |ULTIMATE.start_main_#t~ite75_Out-1150267551|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1150267551 256)))) (or (and (= |ULTIMATE.start_main_#t~mem74_Out-1150267551| |ULTIMATE.start_main_#t~ite75_Out-1150267551|) .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~mem74_Out-1150267551| (select (select |#memory_int_In-1150267551| |~#x~0.base_In-1150267551|) |~#x~0.offset_In-1150267551|))) (and (= |ULTIMATE.start_main_#t~ite75_Out-1150267551| ~x$w_buff1~0_In-1150267551) (not .cse2) .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~mem74_In-1150267551| |ULTIMATE.start_main_#t~mem74_Out-1150267551|)))) InVars {~#x~0.offset=|~#x~0.offset_In-1150267551|, ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_In-1150267551|, ~x$w_buff1~0=~x$w_buff1~0_In-1150267551, ~#x~0.base=|~#x~0.base_In-1150267551|, #memory_int=|#memory_int_In-1150267551|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1150267551, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1150267551} OutVars{ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_Out-1150267551|, ~#x~0.offset=|~#x~0.offset_In-1150267551|, ~x$w_buff1~0=~x$w_buff1~0_In-1150267551, ~#x~0.base=|~#x~0.base_In-1150267551|, #memory_int=|#memory_int_In-1150267551|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1150267551, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1150267551, ULTIMATE.start_main_#t~ite75=|ULTIMATE.start_main_#t~ite75_Out-1150267551|, ULTIMATE.start_main_#t~ite76=|ULTIMATE.start_main_#t~ite76_Out-1150267551|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem74, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76] because there is no mapped edge [2019-12-07 15:53:38,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1080] [1080] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-666982391 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-666982391 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite77_Out-666982391| ~x$w_buff0_used~0_In-666982391)) (and (= 0 |ULTIMATE.start_main_#t~ite77_Out-666982391|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-666982391, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666982391} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-666982391, ULTIMATE.start_main_#t~ite77=|ULTIMATE.start_main_#t~ite77_Out-666982391|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666982391} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] because there is no mapped edge [2019-12-07 15:53:38,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1082] [1082] L850-->L850-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In359675492 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In359675492 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In359675492 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In359675492 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite78_Out359675492| ~x$w_buff1_used~0_In359675492) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite78_Out359675492| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In359675492, ~x$w_buff1_used~0=~x$w_buff1_used~0_In359675492, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In359675492, ~x$w_buff0_used~0=~x$w_buff0_used~0_In359675492} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In359675492, ~x$w_buff1_used~0=~x$w_buff1_used~0_In359675492, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In359675492, ULTIMATE.start_main_#t~ite78=|ULTIMATE.start_main_#t~ite78_Out359675492|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In359675492} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite78] because there is no mapped edge [2019-12-07 15:53:38,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1078] [1078] L851-->L852: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In723145697 256) 0)) (.cse0 (= ~x$r_buff0_thd0~0_In723145697 ~x$r_buff0_thd0~0_Out723145697)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In723145697 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= 0 ~x$r_buff0_thd0~0_Out723145697)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In723145697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In723145697} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out723145697, ULTIMATE.start_main_#t~ite79=|ULTIMATE.start_main_#t~ite79_Out723145697|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In723145697} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite79] because there is no mapped edge [2019-12-07 15:53:38,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1096] [1096] L852-->L856: Formula: (let ((.cse0 (= 0 ~x$r_buff1_thd0~0_Out2096252441)) (.cse4 (= 0 (mod ~x$r_buff0_thd0~0_In2096252441 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In2096252441 256) 0)) (.cse5 (= ~x$r_buff1_thd0~0_Out2096252441 ~x$r_buff1_thd0~0_In2096252441)) (.cse1 (= ~weak$$choice1~0_Out2096252441 |ULTIMATE.start_main_#t~nondet81_In2096252441|)) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In2096252441 256))) (.cse6 (= (mod ~x$w_buff0_used~0_In2096252441 256) 0))) (or (and .cse0 .cse1 (not .cse2) (not .cse3)) (and .cse4 .cse5 .cse1 .cse3) (and (not .cse4) .cse0 .cse1 (not .cse6)) (and .cse4 .cse2 .cse5 .cse1) (and .cse2 .cse5 .cse1 .cse6) (and .cse5 .cse1 .cse3 .cse6))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2096252441, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2096252441, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2096252441, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_In2096252441|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096252441} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2096252441, ~weak$$choice1~0=~weak$$choice1~0_Out2096252441, ULTIMATE.start_main_#t~ite80=|ULTIMATE.start_main_#t~ite80_Out2096252441|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2096252441, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out2096252441, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_Out2096252441|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096252441} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite80, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet81] because there is no mapped edge [2019-12-07 15:53:38,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1069] [1069] L856-->L856-3: Formula: (let ((.cse1 (not (= 0 (mod ~__unbuffered_p2_EAX$read_delayed~0_In-49709838 256)))) (.cse0 (= (mod ~weak$$choice1~0_In-49709838 256) 0))) (or (and (= |ULTIMATE.start_main_#t~mem82_In-49709838| |ULTIMATE.start_main_#t~mem82_Out-49709838|) (= |ULTIMATE.start_main_#t~ite83_Out-49709838| ~__unbuffered_p2_EAX~0_In-49709838) .cse0 .cse1) (and (= |ULTIMATE.start_main_#t~ite83_Out-49709838| |ULTIMATE.start_main_#t~mem82_Out-49709838|) (= (select (select |#memory_int_In-49709838| ~__unbuffered_p2_EAX$read_delayed_var~0.base_In-49709838) ~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-49709838) |ULTIMATE.start_main_#t~mem82_Out-49709838|) .cse1 (not .cse0)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-49709838, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-49709838, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_In-49709838|, #memory_int=|#memory_int_In-49709838|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-49709838} OutVars{ULTIMATE.start_main_#t~ite83=|ULTIMATE.start_main_#t~ite83_Out-49709838|, ~weak$$choice1~0=~weak$$choice1~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-49709838, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_Out-49709838|, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-49709838, #memory_int=|#memory_int_In-49709838|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-49709838} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~mem82] because there is no mapped edge [2019-12-07 15:53:38,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1130] [1130] L856-3-->L5: Formula: (and (= (mod v_~main$tmp_guard1~0_21 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (let ((.cse3 (= v_~__unbuffered_p2_EBX~0_21 0)) (.cse1 (= 1 v_~__unbuffered_p2_EAX~0_46)) (.cse0 (= v_~main$tmp_guard1~0_21 1)) (.cse4 (= 0 v_~__unbuffered_p0_EAX~0_48)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite83_36| v_~__unbuffered_p2_EAX~0_46))) (or (and .cse0 (not .cse1) .cse2) (and .cse0 (not .cse3) .cse2) (and (= v_~main$tmp_guard1~0_21 0) .cse3 .cse1 .cse4 .cse2) (and .cse0 (not .cse4) .cse2)))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_48, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_36|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21} OutVars{ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_33|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_48, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_35|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite84, ULTIMATE.start_main_#t~ite83, ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~mem82, ~main$tmp_guard1~0, ~__unbuffered_p2_EAX~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:53:38,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1131] [1131] L5-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:53:38,594 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:53:38 BasicIcfg [2019-12-07 15:53:38,594 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:53:38,594 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:53:38,594 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:53:38,595 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:53:38,595 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:42:46" (3/4) ... [2019-12-07 15:53:38,596 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:53:38,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1160] [1160] ULTIMATE.startENTRY-->L838: Formula: (let ((.cse1 (store |v_#valid_73| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_244| 1))) (and (= v_~__unbuffered_cnt~0_104 0) (= 0 v_~x$r_buff0_thd3~0_278) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8) (= v_~main$tmp_guard1~0_31 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p2_EAX$w_buff0~0_7) (= (select (select |v_#memory_int_395| |v_~#x~0.base_244|) |v_~#x~0.offset_244|) 0) (= v_~x$r_buff1_thd0~0_77 0) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd2~0_8) (= 0 v_~__unbuffered_p2_EAX$w_buff0_used~0_7) (= 0 v_~__unbuffered_p2_EAX$w_buff1~0_7) (= 0 v_~x$w_buff1~0_137) (= 0 |v_~#x~0.offset_244|) (= (select .cse0 |v_ULTIMATE.start_main_~#t2461~0.base_22|) 0) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_70) (= v_~x$r_buff1_thd2~0_55 0) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6) (= v_~weak$$choice2~0_140 0) (= 0 v_~x$read_delayed~0_8) (= v_~x$mem_tmp~0_82 0) (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~x$r_buff0_thd0~0_89) (= |v_#length_36| (store (store |v_#length_37| |v_~#x~0.base_244| 4) |v_ULTIMATE.start_main_~#t2461~0.base_22| 4)) (= 0 v_~x$w_buff1_used~0_483) (= 0 v_~__unbuffered_p2_EAX$mem_tmp~0_8) (= v_~main$tmp_guard0~0_33 0) (= 0 v_~x$w_buff0~0_164) (= 0 v_~x$r_buff1_thd3~0_181) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t2461~0.base_22| 1)) (= v_~y~0_51 0) (= 0 v_~x$read_delayed_var~0.offset_7) (< |v_#StackHeapBarrier_24| |v_~#x~0.base_244|) (= 0 v_~x$w_buff0_used~0_778) (= v_~x$r_buff0_thd1~0_285 0) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd1~0_7) (< 0 |v_#StackHeapBarrier_24|) (= 0 v_~__unbuffered_p2_EAX$flush_delayed~0_7) (= 0 (select .cse1 |v_~#x~0.base_244|)) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd2~0_7) (= 0 v_~__unbuffered_p2_EAX~0_77) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_44) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6) (= 0 v_~__unbuffered_p2_EAX$w_buff1_used~0_7) (= |v_ULTIMATE.start_main_~#t2461~0.offset_17| 0) (= 0 v_~weak$$choice0~0_74) (= 0 v_~weak$$choice1~0_28) (= v_~__unbuffered_p2_EAX$read_delayed~0_57 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX$read_delayed_var~0.base_44) (= |v_#memory_int_394| (store |v_#memory_int_395| |v_ULTIMATE.start_main_~#t2461~0.base_22| (store (select |v_#memory_int_395| |v_ULTIMATE.start_main_~#t2461~0.base_22|) |v_ULTIMATE.start_main_~#t2461~0.offset_17| 0))) (< |v_#StackHeapBarrier_24| |v_ULTIMATE.start_main_~#t2461~0.base_22|) (= 0 v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8) (= v_~x$r_buff1_thd1~0_182 0) (= v_~x$flush_delayed~0_108 0) (= 0 v_~__unbuffered_p2_EAX$r_buff1_thd3~0_7) (= 0 v_~x$r_buff0_thd2~0_71)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_24|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_395|, #length=|v_#length_37|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_164, ~x$flush_delayed~0=v_~x$flush_delayed~0_108, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_44, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_44, #NULL.offset=|v_#NULL.offset_6|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_182, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_278, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_7|, ULTIMATE.start_main_~#t2461~0.base=|v_ULTIMATE.start_main_~#t2461~0.base_22|, ~weak$$choice1~0=v_~weak$$choice1~0_28, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_70, ~__unbuffered_p2_EAX$w_buff0_used~0=v_~__unbuffered_p2_EAX$w_buff0_used~0_7, #length=|v_#length_36|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_77, ~__unbuffered_p2_EAX$r_buff1_thd2~0=v_~__unbuffered_p2_EAX$r_buff1_thd2~0_7, ULTIMATE.start_main_~#t2461~0.offset=|v_ULTIMATE.start_main_~#t2461~0.offset_17|, ~__unbuffered_p2_EAX$r_buff0_thd0~0=v_~__unbuffered_p2_EAX$r_buff0_thd0~0_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_89, ~__unbuffered_p2_EAX$w_buff0~0=v_~__unbuffered_p2_EAX$w_buff0~0_7, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~#x~0.offset=|v_~#x~0.offset_244|, ~x$w_buff1~0=v_~x$w_buff1~0_137, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_483, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_21|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_115|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_21|, ULTIMATE.start_main_#t~nondet81=|v_ULTIMATE.start_main_#t~nondet81_33|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_51|, ~weak$$choice0~0=v_~weak$$choice0~0_74, #StackHeapBarrier=|v_#StackHeapBarrier_24|, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_32|, ~__unbuffered_p2_EAX$r_buff0_thd1~0=v_~__unbuffered_p2_EAX$r_buff0_thd1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_104, ~__unbuffered_p2_EAX$r_buff1_thd3~0=v_~__unbuffered_p2_EAX$r_buff1_thd3~0_7, ULTIMATE.start_main_~#t2463~0.offset=|v_ULTIMATE.start_main_~#t2463~0.offset_21|, ULTIMATE.start_main_~#t2462~0.offset=|v_ULTIMATE.start_main_~#t2462~0.offset_28|, ~__unbuffered_p2_EAX$w_buff1~0=v_~__unbuffered_p2_EAX$w_buff1~0_7, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_285, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_20|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_181, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_82, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_8|, ULTIMATE.start_main_~#t2462~0.base=|v_ULTIMATE.start_main_~#t2462~0.base_31|, ~__unbuffered_p2_EAX$w_buff1_used~0=v_~__unbuffered_p2_EAX$w_buff1_used~0_7, ~__unbuffered_p2_EAX$r_buff0_thd2~0=v_~__unbuffered_p2_EAX$r_buff0_thd2~0_8, ~__unbuffered_p2_EAX$r_buff1_thd0~0=v_~__unbuffered_p2_EAX$r_buff1_thd0~0_6, ~y~0=v_~y~0_51, ULTIMATE.start_main_#t~mem74=|v_ULTIMATE.start_main_#t~mem74_20|, ~__unbuffered_p2_EAX$mem_tmp~0=v_~__unbuffered_p2_EAX$mem_tmp~0_8, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_77, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_71, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_299|, ~__unbuffered_p2_EAX$flush_delayed~0=v_~__unbuffered_p2_EAX$flush_delayed~0_7, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_24|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_778, ~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_57, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_50|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_71|, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_37|, #memory_int=|v_#memory_int_394|, ~#x~0.base=|v_~#x~0.base_244|, ULTIMATE.start_main_~#t2463~0.base=|v_ULTIMATE.start_main_~#t2463~0.base_24|, ~__unbuffered_p2_EAX$r_buff1_thd1~0=v_~__unbuffered_p2_EAX$r_buff1_thd1~0_7, ~__unbuffered_p2_EAX$r_buff0_thd3~0=v_~__unbuffered_p2_EAX$r_buff0_thd3~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_140, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, ~__unbuffered_p2_EAX$read_delayed_var~0.base, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2461~0.base, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p2_EAX$w_buff0_used~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EAX$r_buff1_thd2~0, ULTIMATE.start_main_~#t2461~0.offset, ~__unbuffered_p2_EAX$r_buff0_thd0~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EAX$w_buff0~0, ~__unbuffered_p2_EBX~0, ~#x~0.offset, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~nondet81, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite84, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite80, ~__unbuffered_p2_EAX$r_buff0_thd1~0, ~__unbuffered_cnt~0, ~__unbuffered_p2_EAX$r_buff1_thd3~0, ULTIMATE.start_main_~#t2463~0.offset, ULTIMATE.start_main_~#t2462~0.offset, ~__unbuffered_p2_EAX$w_buff1~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet73, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~nondet71, ULTIMATE.start_main_~#t2462~0.base, ~__unbuffered_p2_EAX$w_buff1_used~0, ~__unbuffered_p2_EAX$r_buff0_thd2~0, ~__unbuffered_p2_EAX$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_#t~mem74, ~__unbuffered_p2_EAX$mem_tmp~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite78, ~__unbuffered_p2_EAX$flush_delayed~0, #NULL.base, ULTIMATE.start_main_#t~ite76, ~x$w_buff0_used~0, ~__unbuffered_p2_EAX$read_delayed~0, ULTIMATE.start_main_#t~ite83, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem82, #memory_int, ~#x~0.base, ULTIMATE.start_main_~#t2463~0.base, ~__unbuffered_p2_EAX$r_buff1_thd1~0, ~__unbuffered_p2_EAX$r_buff0_thd3~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 15:53:38,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1126] [1126] L838-1-->L840: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2462~0.base_23| 0)) (= |v_ULTIMATE.start_main_~#t2462~0.offset_22| 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t2462~0.base_23|) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t2462~0.base_23|)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2462~0.base_23| 4)) (= (store |v_#memory_int_282| |v_ULTIMATE.start_main_~#t2462~0.base_23| (store (select |v_#memory_int_282| |v_ULTIMATE.start_main_~#t2462~0.base_23|) |v_ULTIMATE.start_main_~#t2462~0.offset_22| 1)) |v_#memory_int_281|) (= (store |v_#valid_36| |v_ULTIMATE.start_main_~#t2462~0.base_23| 1) |v_#valid_35|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_282|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t2462~0.base=|v_ULTIMATE.start_main_~#t2462~0.base_23|, ULTIMATE.start_main_~#t2462~0.offset=|v_ULTIMATE.start_main_~#t2462~0.offset_22|, #StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_281|, #length=|v_#length_21|, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2462~0.base, ULTIMATE.start_main_~#t2462~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet71] because there is no mapped edge [2019-12-07 15:53:38,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1125] [1125] L840-1-->L842: Formula: (and (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2463~0.base_14| 4)) (= 0 |v_ULTIMATE.start_main_~#t2463~0.offset_14|) (not (= 0 |v_ULTIMATE.start_main_~#t2463~0.base_14|)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2463~0.base_14|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2463~0.base_14| 1)) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2463~0.base_14|) 0) (= |v_#memory_int_279| (store |v_#memory_int_280| |v_ULTIMATE.start_main_~#t2463~0.base_14| (store (select |v_#memory_int_280| |v_ULTIMATE.start_main_~#t2463~0.base_14|) |v_ULTIMATE.start_main_~#t2463~0.offset_14| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_280|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_279|, ULTIMATE.start_main_~#t2463~0.base=|v_ULTIMATE.start_main_~#t2463~0.base_14|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet72=|v_ULTIMATE.start_main_#t~nondet72_3|, ULTIMATE.start_main_~#t2463~0.offset=|v_ULTIMATE.start_main_~#t2463~0.offset_14|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2463~0.base, #length, ULTIMATE.start_main_#t~nondet72, ULTIMATE.start_main_~#t2463~0.offset] because there is no mapped edge [2019-12-07 15:53:38,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1087] [1087] L780-2-->L780-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1291052940 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1291052940 256)))) (or (and (= |P1Thread1of1ForFork1_#t~mem30_Out-1291052940| |P1Thread1of1ForFork1_#t~ite31_Out-1291052940|) (or .cse0 .cse1) (= (select (select |#memory_int_In-1291052940| |~#x~0.base_In-1291052940|) |~#x~0.offset_In-1291052940|) |P1Thread1of1ForFork1_#t~mem30_Out-1291052940|)) (and (not .cse0) (= ~x$w_buff1~0_In-1291052940 |P1Thread1of1ForFork1_#t~ite31_Out-1291052940|) (= |P1Thread1of1ForFork1_#t~mem30_In-1291052940| |P1Thread1of1ForFork1_#t~mem30_Out-1291052940|) (not .cse1)))) InVars {P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_In-1291052940|, ~#x~0.offset=|~#x~0.offset_In-1291052940|, ~x$w_buff1~0=~x$w_buff1~0_In-1291052940, ~#x~0.base=|~#x~0.base_In-1291052940|, #memory_int=|#memory_int_In-1291052940|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1291052940, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1291052940} OutVars{P1Thread1of1ForFork1_#t~mem30=|P1Thread1of1ForFork1_#t~mem30_Out-1291052940|, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out-1291052940|, ~#x~0.offset=|~#x~0.offset_In-1291052940|, ~x$w_buff1~0=~x$w_buff1~0_In-1291052940, ~#x~0.base=|~#x~0.base_In-1291052940|, #memory_int=|#memory_int_In-1291052940|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1291052940, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1291052940} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 15:53:38,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L780-4-->L781: Formula: (= (store |v_#memory_int_69| |v_~#x~0.base_42| (store (select |v_#memory_int_69| |v_~#x~0.base_42|) |v_~#x~0.offset_42| |v_P1Thread1of1ForFork1_#t~ite31_6|)) |v_#memory_int_68|) InVars {~#x~0.offset=|v_~#x~0.offset_42|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_6|, #memory_int=|v_#memory_int_69|, ~#x~0.base=|v_~#x~0.base_42|} OutVars{P1Thread1of1ForFork1_#t~mem30=|v_P1Thread1of1ForFork1_#t~mem30_3|, ~#x~0.offset=|v_~#x~0.offset_42|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, #memory_int=|v_#memory_int_68|, ~#x~0.base=|v_~#x~0.base_42|, P1Thread1of1ForFork1_#t~ite32=|v_P1Thread1of1ForFork1_#t~ite32_7|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~mem30, P1Thread1of1ForFork1_#t~ite31, #memory_int, P1Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 15:53:38,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1084] [1084] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-657281502 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-657281502 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite33_Out-657281502| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite33_Out-657281502| ~x$w_buff0_used~0_In-657281502)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-657281502, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-657281502} OutVars{P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-657281502|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-657281502, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-657281502} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 15:53:38,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1081] [1081] L782-->L782-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-1394838492 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1394838492 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1394838492 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1394838492 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite34_Out-1394838492| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite34_Out-1394838492| ~x$w_buff1_used~0_In-1394838492)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1394838492, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1394838492, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1394838492, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1394838492} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out-1394838492|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1394838492, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1394838492, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1394838492, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1394838492} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 15:53:38,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1093] [1093] L783-->L784: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-294974088 256))) (.cse0 (= ~x$r_buff0_thd2~0_In-294974088 ~x$r_buff0_thd2~0_Out-294974088)) (.cse2 (= (mod ~x$w_buff0_used~0_In-294974088 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out-294974088) (not .cse2)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-294974088, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-294974088} OutVars{P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out-294974088|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-294974088, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-294974088} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 15:53:38,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1097] [1097] L784-->L784-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In858377533 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In858377533 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In858377533 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In858377533 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite36_Out858377533| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite36_Out858377533| ~x$r_buff1_thd2~0_In858377533)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In858377533, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In858377533, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In858377533, ~x$w_buff0_used~0=~x$w_buff0_used~0_In858377533} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In858377533, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In858377533, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In858377533, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out858377533|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In858377533} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 15:53:38,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1032] [1032] L803-->L804: Formula: (and (= v_~x$r_buff0_thd3~0_105 v_~x$r_buff0_thd3~0_104) (not (= (mod v_~weak$$choice2~0_77 256) 0))) InVars {~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_105, ~weak$$choice2~0=v_~weak$$choice2~0_77} OutVars{P2Thread1of1ForFork2_#t~ite56=|v_P2Thread1of1ForFork2_#t~ite56_9|, P2Thread1of1ForFork2_#t~ite57=|v_P2Thread1of1ForFork2_#t~ite57_9|, P2Thread1of1ForFork2_#t~ite55=|v_P2Thread1of1ForFork2_#t~ite55_10|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_77} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite56, P2Thread1of1ForFork2_#t~ite57, P2Thread1of1ForFork2_#t~ite55, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 15:53:38,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1083] [1083] L808-->L808-2: Formula: (let ((.cse0 (= (mod ~x$flush_delayed~0_In-167513845 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~mem62_In-167513845| |P2Thread1of1ForFork2_#t~mem62_Out-167513845|) (= |P2Thread1of1ForFork2_#t~ite63_Out-167513845| ~x$mem_tmp~0_In-167513845)) (and (= |P2Thread1of1ForFork2_#t~mem62_Out-167513845| (select (select |#memory_int_In-167513845| |~#x~0.base_In-167513845|) |~#x~0.offset_In-167513845|)) (= |P2Thread1of1ForFork2_#t~mem62_Out-167513845| |P2Thread1of1ForFork2_#t~ite63_Out-167513845|) .cse0))) InVars {~x$flush_delayed~0=~x$flush_delayed~0_In-167513845, ~#x~0.offset=|~#x~0.offset_In-167513845|, ~#x~0.base=|~#x~0.base_In-167513845|, #memory_int=|#memory_int_In-167513845|, ~x$mem_tmp~0=~x$mem_tmp~0_In-167513845, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_In-167513845|} OutVars{~x$flush_delayed~0=~x$flush_delayed~0_In-167513845, ~#x~0.offset=|~#x~0.offset_In-167513845|, P2Thread1of1ForFork2_#t~ite63=|P2Thread1of1ForFork2_#t~ite63_Out-167513845|, ~#x~0.base=|~#x~0.base_In-167513845|, #memory_int=|#memory_int_In-167513845|, ~x$mem_tmp~0=~x$mem_tmp~0_In-167513845, P2Thread1of1ForFork2_#t~mem62=|P2Thread1of1ForFork2_#t~mem62_Out-167513845|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite63, P2Thread1of1ForFork2_#t~mem62] because there is no mapped edge [2019-12-07 15:53:38,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1079] [1079] L815-2-->L815-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-2008711111 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-2008711111 256)))) (or (and (= |P2Thread1of1ForFork2_#t~mem64_In-2008711111| |P2Thread1of1ForFork2_#t~mem64_Out-2008711111|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite65_Out-2008711111| ~x$w_buff1~0_In-2008711111) (not .cse1)) (and (= (select (select |#memory_int_In-2008711111| |~#x~0.base_In-2008711111|) |~#x~0.offset_In-2008711111|) |P2Thread1of1ForFork2_#t~mem64_Out-2008711111|) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite65_Out-2008711111| |P2Thread1of1ForFork2_#t~mem64_Out-2008711111|)))) InVars {~#x~0.offset=|~#x~0.offset_In-2008711111|, ~x$w_buff1~0=~x$w_buff1~0_In-2008711111, ~#x~0.base=|~#x~0.base_In-2008711111|, #memory_int=|#memory_int_In-2008711111|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2008711111, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2008711111, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_In-2008711111|} OutVars{P2Thread1of1ForFork2_#t~ite65=|P2Thread1of1ForFork2_#t~ite65_Out-2008711111|, ~#x~0.offset=|~#x~0.offset_In-2008711111|, ~x$w_buff1~0=~x$w_buff1~0_In-2008711111, ~#x~0.base=|~#x~0.base_In-2008711111|, #memory_int=|#memory_int_In-2008711111|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2008711111, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2008711111, P2Thread1of1ForFork2_#t~mem64=|P2Thread1of1ForFork2_#t~mem64_Out-2008711111|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite65, P2Thread1of1ForFork2_#t~mem64] because there is no mapped edge [2019-12-07 15:53:38,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1033] [1033] L815-4-->L816: Formula: (= (store |v_#memory_int_131| |v_~#x~0.base_85| (store (select |v_#memory_int_131| |v_~#x~0.base_85|) |v_~#x~0.offset_85| |v_P2Thread1of1ForFork2_#t~ite65_10|)) |v_#memory_int_130|) InVars {P2Thread1of1ForFork2_#t~ite65=|v_P2Thread1of1ForFork2_#t~ite65_10|, ~#x~0.offset=|v_~#x~0.offset_85|, #memory_int=|v_#memory_int_131|, ~#x~0.base=|v_~#x~0.base_85|} OutVars{P2Thread1of1ForFork2_#t~ite65=|v_P2Thread1of1ForFork2_#t~ite65_9|, P2Thread1of1ForFork2_#t~ite66=|v_P2Thread1of1ForFork2_#t~ite66_5|, ~#x~0.offset=|v_~#x~0.offset_85|, #memory_int=|v_#memory_int_130|, ~#x~0.base=|v_~#x~0.base_85|, P2Thread1of1ForFork2_#t~mem64=|v_P2Thread1of1ForFork2_#t~mem64_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite65, P2Thread1of1ForFork2_#t~ite66, #memory_int, P2Thread1of1ForFork2_#t~mem64] because there is no mapped edge [2019-12-07 15:53:38,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1086] [1086] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1234400312 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1234400312 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite67_Out1234400312| ~x$w_buff0_used~0_In1234400312)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite67_Out1234400312| 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1234400312, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1234400312} OutVars{P2Thread1of1ForFork2_#t~ite67=|P2Thread1of1ForFork2_#t~ite67_Out1234400312|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1234400312, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1234400312} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite67] because there is no mapped edge [2019-12-07 15:53:38,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1095] [1095] L817-->L817-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-962396148 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In-962396148 256))) (.cse0 (= (mod ~x$r_buff1_thd3~0_In-962396148 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-962396148 256)))) (or (and (= ~x$w_buff1_used~0_In-962396148 |P2Thread1of1ForFork2_#t~ite68_Out-962396148|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite68_Out-962396148|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-962396148, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-962396148, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-962396148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-962396148} OutVars{P2Thread1of1ForFork2_#t~ite68=|P2Thread1of1ForFork2_#t~ite68_Out-962396148|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-962396148, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-962396148, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-962396148, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-962396148} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite68] because there is no mapped edge [2019-12-07 15:53:38,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1077] [1077] L818-->L819: Formula: (let ((.cse1 (= ~x$r_buff0_thd3~0_Out557555560 ~x$r_buff0_thd3~0_In557555560)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In557555560 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In557555560 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd3~0_Out557555560 0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In557555560, ~x$w_buff0_used~0=~x$w_buff0_used~0_In557555560} OutVars{P2Thread1of1ForFork2_#t~ite69=|P2Thread1of1ForFork2_#t~ite69_Out557555560|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out557555560, ~x$w_buff0_used~0=~x$w_buff0_used~0_In557555560} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite69, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 15:53:38,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1089] [1089] L819-->L819-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-1330316371 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1330316371 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1330316371 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1330316371 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite70_Out-1330316371| ~x$r_buff1_thd3~0_In-1330316371) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite70_Out-1330316371| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1330316371, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1330316371, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1330316371, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1330316371} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1330316371, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1330316371, P2Thread1of1ForFork2_#t~ite70=|P2Thread1of1ForFork2_#t~ite70_Out-1330316371|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1330316371, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1330316371} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite70] because there is no mapped edge [2019-12-07 15:53:38,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1122] [1122] L819-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite70_34| v_~x$r_buff1_thd3~0_127) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68} OutVars{~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_127, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, P2Thread1of1ForFork2_#t~ite70=|v_P2Thread1of1ForFork2_#t~ite70_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, P2Thread1of1ForFork2_#t~ite70, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 15:53:38,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L761-->L762: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_97 256))) (= v_~x$r_buff0_thd1~0_107 v_~x$r_buff0_thd1~0_106)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_97} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_7|, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_97, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, ~x$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 15:53:38,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] L764-->L764-2: Formula: (let ((.cse0 (= (mod ~x$flush_delayed~0_In-2140133997 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~mem28_In-2140133997| |P0Thread1of1ForFork0_#t~mem28_Out-2140133997|) (= ~x$mem_tmp~0_In-2140133997 |P0Thread1of1ForFork0_#t~ite29_Out-2140133997|) (not .cse0)) (and (= (select (select |#memory_int_In-2140133997| |~#x~0.base_In-2140133997|) |~#x~0.offset_In-2140133997|) |P0Thread1of1ForFork0_#t~mem28_Out-2140133997|) .cse0 (= |P0Thread1of1ForFork0_#t~mem28_Out-2140133997| |P0Thread1of1ForFork0_#t~ite29_Out-2140133997|)))) InVars {P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_In-2140133997|, ~x$flush_delayed~0=~x$flush_delayed~0_In-2140133997, ~#x~0.offset=|~#x~0.offset_In-2140133997|, ~#x~0.base=|~#x~0.base_In-2140133997|, #memory_int=|#memory_int_In-2140133997|, ~x$mem_tmp~0=~x$mem_tmp~0_In-2140133997} OutVars{P0Thread1of1ForFork0_#t~mem28=|P0Thread1of1ForFork0_#t~mem28_Out-2140133997|, ~x$flush_delayed~0=~x$flush_delayed~0_In-2140133997, ~#x~0.offset=|~#x~0.offset_In-2140133997|, P0Thread1of1ForFork0_#t~ite29=|P0Thread1of1ForFork0_#t~ite29_Out-2140133997|, ~#x~0.base=|~#x~0.base_In-2140133997|, #memory_int=|#memory_int_In-2140133997|, ~x$mem_tmp~0=~x$mem_tmp~0_In-2140133997} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 15:53:38,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1117] [1117] L764-2-->P0EXIT: Formula: (and (= |v_#memory_int_248| (store |v_#memory_int_249| |v_~#x~0.base_160| (store (select |v_#memory_int_249| |v_~#x~0.base_160|) |v_~#x~0.offset_160| |v_P0Thread1of1ForFork0_#t~ite29_28|))) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$flush_delayed~0_92 0)) InVars {~#x~0.offset=|v_~#x~0.offset_160|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_28|, #memory_int=|v_#memory_int_249|, ~#x~0.base=|v_~#x~0.base_160|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork0_#t~mem28=|v_P0Thread1of1ForFork0_#t~mem28_17|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_92, ~#x~0.offset=|v_~#x~0.offset_160|, P0Thread1of1ForFork0_#t~ite29=|v_P0Thread1of1ForFork0_#t~ite29_27|, #memory_int=|v_#memory_int_248|, ~#x~0.base=|v_~#x~0.base_160|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~mem28, P0Thread1of1ForFork0_#res.offset, ~x$flush_delayed~0, P0Thread1of1ForFork0_#t~ite29, #memory_int, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:53:38,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1103] [1103] L784-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_28 |v_P1Thread1of1ForFork1_#t~ite36_22|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_28, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite36=|v_P1Thread1of1ForFork1_#t~ite36_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 15:53:38,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [984] [984] L846-->L848-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_118 256) 0) (= (mod v_~x$r_buff0_thd0~0_14 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_118} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_118} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:53:38,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1098] [1098] L848-2-->L848-5: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1150267551 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite76_Out-1150267551| |ULTIMATE.start_main_#t~ite75_Out-1150267551|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1150267551 256)))) (or (and (= |ULTIMATE.start_main_#t~mem74_Out-1150267551| |ULTIMATE.start_main_#t~ite75_Out-1150267551|) .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~mem74_Out-1150267551| (select (select |#memory_int_In-1150267551| |~#x~0.base_In-1150267551|) |~#x~0.offset_In-1150267551|))) (and (= |ULTIMATE.start_main_#t~ite75_Out-1150267551| ~x$w_buff1~0_In-1150267551) (not .cse2) .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~mem74_In-1150267551| |ULTIMATE.start_main_#t~mem74_Out-1150267551|)))) InVars {~#x~0.offset=|~#x~0.offset_In-1150267551|, ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_In-1150267551|, ~x$w_buff1~0=~x$w_buff1~0_In-1150267551, ~#x~0.base=|~#x~0.base_In-1150267551|, #memory_int=|#memory_int_In-1150267551|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1150267551, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1150267551} OutVars{ULTIMATE.start_main_#t~mem74=|ULTIMATE.start_main_#t~mem74_Out-1150267551|, ~#x~0.offset=|~#x~0.offset_In-1150267551|, ~x$w_buff1~0=~x$w_buff1~0_In-1150267551, ~#x~0.base=|~#x~0.base_In-1150267551|, #memory_int=|#memory_int_In-1150267551|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1150267551, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1150267551, ULTIMATE.start_main_#t~ite75=|ULTIMATE.start_main_#t~ite75_Out-1150267551|, ULTIMATE.start_main_#t~ite76=|ULTIMATE.start_main_#t~ite76_Out-1150267551|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem74, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76] because there is no mapped edge [2019-12-07 15:53:38,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1080] [1080] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-666982391 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-666982391 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite77_Out-666982391| ~x$w_buff0_used~0_In-666982391)) (and (= 0 |ULTIMATE.start_main_#t~ite77_Out-666982391|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-666982391, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666982391} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-666982391, ULTIMATE.start_main_#t~ite77=|ULTIMATE.start_main_#t~ite77_Out-666982391|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666982391} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] because there is no mapped edge [2019-12-07 15:53:38,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1082] [1082] L850-->L850-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In359675492 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In359675492 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In359675492 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In359675492 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite78_Out359675492| ~x$w_buff1_used~0_In359675492) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite78_Out359675492| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In359675492, ~x$w_buff1_used~0=~x$w_buff1_used~0_In359675492, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In359675492, ~x$w_buff0_used~0=~x$w_buff0_used~0_In359675492} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In359675492, ~x$w_buff1_used~0=~x$w_buff1_used~0_In359675492, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In359675492, ULTIMATE.start_main_#t~ite78=|ULTIMATE.start_main_#t~ite78_Out359675492|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In359675492} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite78] because there is no mapped edge [2019-12-07 15:53:38,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1078] [1078] L851-->L852: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In723145697 256) 0)) (.cse0 (= ~x$r_buff0_thd0~0_In723145697 ~x$r_buff0_thd0~0_Out723145697)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In723145697 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= 0 ~x$r_buff0_thd0~0_Out723145697)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In723145697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In723145697} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out723145697, ULTIMATE.start_main_#t~ite79=|ULTIMATE.start_main_#t~ite79_Out723145697|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In723145697} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite79] because there is no mapped edge [2019-12-07 15:53:38,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1096] [1096] L852-->L856: Formula: (let ((.cse0 (= 0 ~x$r_buff1_thd0~0_Out2096252441)) (.cse4 (= 0 (mod ~x$r_buff0_thd0~0_In2096252441 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In2096252441 256) 0)) (.cse5 (= ~x$r_buff1_thd0~0_Out2096252441 ~x$r_buff1_thd0~0_In2096252441)) (.cse1 (= ~weak$$choice1~0_Out2096252441 |ULTIMATE.start_main_#t~nondet81_In2096252441|)) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In2096252441 256))) (.cse6 (= (mod ~x$w_buff0_used~0_In2096252441 256) 0))) (or (and .cse0 .cse1 (not .cse2) (not .cse3)) (and .cse4 .cse5 .cse1 .cse3) (and (not .cse4) .cse0 .cse1 (not .cse6)) (and .cse4 .cse2 .cse5 .cse1) (and .cse2 .cse5 .cse1 .cse6) (and .cse5 .cse1 .cse3 .cse6))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2096252441, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2096252441, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2096252441, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_In2096252441|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096252441} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2096252441, ~weak$$choice1~0=~weak$$choice1~0_Out2096252441, ULTIMATE.start_main_#t~ite80=|ULTIMATE.start_main_#t~ite80_Out2096252441|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2096252441, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out2096252441, ULTIMATE.start_main_#t~nondet81=|ULTIMATE.start_main_#t~nondet81_Out2096252441|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096252441} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite80, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet81] because there is no mapped edge [2019-12-07 15:53:38,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1069] [1069] L856-->L856-3: Formula: (let ((.cse1 (not (= 0 (mod ~__unbuffered_p2_EAX$read_delayed~0_In-49709838 256)))) (.cse0 (= (mod ~weak$$choice1~0_In-49709838 256) 0))) (or (and (= |ULTIMATE.start_main_#t~mem82_In-49709838| |ULTIMATE.start_main_#t~mem82_Out-49709838|) (= |ULTIMATE.start_main_#t~ite83_Out-49709838| ~__unbuffered_p2_EAX~0_In-49709838) .cse0 .cse1) (and (= |ULTIMATE.start_main_#t~ite83_Out-49709838| |ULTIMATE.start_main_#t~mem82_Out-49709838|) (= (select (select |#memory_int_In-49709838| ~__unbuffered_p2_EAX$read_delayed_var~0.base_In-49709838) ~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-49709838) |ULTIMATE.start_main_#t~mem82_Out-49709838|) .cse1 (not .cse0)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-49709838, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-49709838, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_In-49709838|, #memory_int=|#memory_int_In-49709838|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-49709838} OutVars{ULTIMATE.start_main_#t~ite83=|ULTIMATE.start_main_#t~ite83_Out-49709838|, ~weak$$choice1~0=~weak$$choice1~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=~__unbuffered_p2_EAX$read_delayed_var~0.offset_In-49709838, ULTIMATE.start_main_#t~mem82=|ULTIMATE.start_main_#t~mem82_Out-49709838|, ~__unbuffered_p2_EAX$read_delayed_var~0.base=~__unbuffered_p2_EAX$read_delayed_var~0.base_In-49709838, #memory_int=|#memory_int_In-49709838|, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_In-49709838, ~__unbuffered_p2_EAX$read_delayed~0=~__unbuffered_p2_EAX$read_delayed~0_In-49709838} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite83, ULTIMATE.start_main_#t~mem82] because there is no mapped edge [2019-12-07 15:53:38,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1130] [1130] L856-3-->L5: Formula: (and (= (mod v_~main$tmp_guard1~0_21 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (let ((.cse3 (= v_~__unbuffered_p2_EBX~0_21 0)) (.cse1 (= 1 v_~__unbuffered_p2_EAX~0_46)) (.cse0 (= v_~main$tmp_guard1~0_21 1)) (.cse4 (= 0 v_~__unbuffered_p0_EAX~0_48)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite83_36| v_~__unbuffered_p2_EAX~0_46))) (or (and .cse0 (not .cse1) .cse2) (and .cse0 (not .cse3) .cse2) (and (= v_~main$tmp_guard1~0_21 0) .cse3 .cse1 .cse4 .cse2) (and .cse0 (not .cse4) .cse2)))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_48, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_36|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21} OutVars{ULTIMATE.start_main_#t~ite84=|v_ULTIMATE.start_main_#t~ite84_33|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_48, ULTIMATE.start_main_#t~ite83=|v_ULTIMATE.start_main_#t~ite83_35|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ULTIMATE.start_main_#t~mem82=|v_ULTIMATE.start_main_#t~mem82_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite84, ULTIMATE.start_main_#t~ite83, ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~mem82, ~main$tmp_guard1~0, ~__unbuffered_p2_EAX~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:53:38,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1131] [1131] L5-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:53:38,687 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c85c47d3-0c75-4470-a522-512c5b28b591/bin/utaipan/witness.graphml [2019-12-07 15:53:38,687 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:53:38,688 INFO L168 Benchmark]: Toolchain (without parser) took 653223.22 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 935.7 MB in the beginning and 2.4 GB in the end (delta: -1.5 GB). Peak memory consumption was 5.0 GB. Max. memory is 11.5 GB. [2019-12-07 15:53:38,688 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:53:38,689 INFO L168 Benchmark]: CACSL2BoogieTranslator took 417.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 935.7 MB in the beginning and 1.1 GB in the end (delta: -121.1 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:53:38,689 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.64 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:53:38,689 INFO L168 Benchmark]: Boogie Preprocessor took 29.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:53:38,689 INFO L168 Benchmark]: RCFGBuilder took 460.86 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 985.5 MB in the end (delta: 65.9 MB). Peak memory consumption was 65.9 MB. Max. memory is 11.5 GB. [2019-12-07 15:53:38,689 INFO L168 Benchmark]: TraceAbstraction took 652182.55 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 985.5 MB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 4.9 GB. Max. memory is 11.5 GB. [2019-12-07 15:53:38,690 INFO L168 Benchmark]: Witness Printer took 93.04 ms. Allocated memory is still 7.5 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 82.7 MB). Peak memory consumption was 82.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:53:38,691 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 417.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 935.7 MB in the beginning and 1.1 GB in the end (delta: -121.1 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.64 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 29.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 460.86 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 985.5 MB in the end (delta: 65.9 MB). Peak memory consumption was 65.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 652182.55 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 985.5 MB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 4.9 GB. Max. memory is 11.5 GB. * Witness Printer took 93.04 ms. Allocated memory is still 7.5 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 82.7 MB). Peak memory consumption was 82.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.3s, 223 ProgramPointsBefore, 117 ProgramPointsAfterwards, 276 TransitionsBefore, 138 TransitionsAfterwards, 32976 CoEnabledTransitionPairs, 8 FixpointIterations, 50 TrivialSequentialCompositions, 34 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 62 ConcurrentYvCompositions, 36 ChoiceCompositions, 12209 VarBasedMoverChecksPositive, 278 VarBasedMoverChecksNegative, 32 SemBasedMoverChecksPositive, 347 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 183707 CheckedPairsTotal, 146 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L838] FCALL, FORK 0 pthread_create(&t2461, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L840] FCALL, FORK 0 pthread_create(&t2462, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L842] FCALL, FORK 0 pthread_create(&t2463, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L794] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 3 x$flush_delayed = weak$$choice2 [L797] EXPR 3 \read(x) [L797] 3 x$mem_tmp = x [L777] 2 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L780] 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L798] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) [L798] EXPR 3 \read(x) [L798] EXPR 3 !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1)=1, \read(x)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L798] 3 x = !x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff1) [L781] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L782] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L799] EXPR 3 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L799] 3 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)) [L800] EXPR 3 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L800] 3 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 3 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L801] 3 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 3 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L802] 3 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 3 weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L804] 3 x$r_buff1_thd3 = weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used || !x$r_buff0_thd3 && !x$w_buff1_used || !x$r_buff0_thd3 && !x$r_buff1_thd3 ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L805] 3 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L806] 3 __unbuffered_p2_EAX$read_delayed_var = &x [L807] EXPR 3 \read(x) [L807] 3 __unbuffered_p2_EAX = x [L808] 3 x = x$flush_delayed ? x$mem_tmp : x [L809] 3 x$flush_delayed = (_Bool)0 [L812] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 1 y = 1 [L752] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L753] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L754] 1 x$flush_delayed = weak$$choice2 [L755] EXPR 1 \read(x) [L755] 1 x$mem_tmp = x [L756] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L756] EXPR 1 \read(x) [L756] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L757] EXPR 1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L815] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L757] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L816] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L817] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L758] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L758] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L759] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L759] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L760] EXPR 1 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L760] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L762] EXPR 1 weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x={6:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L762] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L763] EXPR 1 \read(x) [L763] 1 __unbuffered_p0_EAX = x [L844] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x={6:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L848] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L849] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L850] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 214 locations, 1 error locations. Result: UNSAFE, OverallTime: 651.9s, OverallIterations: 97, TraceHistogramMax: 1, AutomataDifference: 423.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 30251 SDtfs, 56878 SDslu, 357831 SDs, 0 SdLazy, 289623 SolverSat, 6276 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 236.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 4733 GetRequests, 282 SyntacticMatches, 147 SemanticMatches, 4304 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57956 ImplicationChecksByTransitivity, 157.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=300418occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 82.2s AutomataMinimizationTime, 96 MinimizatonAttempts, 444189 StatesRemovedByMinimization, 88 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 1.9s SatisfiabilityAnalysisTime, 45.6s InterpolantComputationTime, 6758 NumberOfCodeBlocks, 6758 NumberOfCodeBlocksAsserted, 97 NumberOfCheckSat, 6590 ConstructedInterpolants, 0 QuantifiedInterpolants, 8606681 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 96 InterpolantComputations, 96 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...