./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a4926ac2dce683c4edbf3416b646f7aec42cebb1 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:08:43,816 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:08:43,818 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:08:43,826 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:08:43,826 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:08:43,827 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:08:43,828 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:08:43,830 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:08:43,832 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:08:43,832 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:08:43,833 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:08:43,834 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:08:43,835 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:08:43,835 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:08:43,836 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:08:43,837 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:08:43,838 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:08:43,839 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:08:43,840 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:08:43,842 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:08:43,844 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:08:43,845 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:08:43,846 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:08:43,847 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:08:43,849 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:08:43,849 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:08:43,849 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:08:43,850 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:08:43,850 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:08:43,851 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:08:43,851 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:08:43,852 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:08:43,852 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:08:43,853 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:08:43,853 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:08:43,854 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:08:43,854 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:08:43,854 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:08:43,854 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:08:43,855 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:08:43,856 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:08:43,856 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:08:43,869 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:08:43,869 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:08:43,869 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:08:43,870 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:08:43,870 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:08:43,870 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:08:43,870 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:08:43,870 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:08:43,870 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:08:43,870 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:08:43,870 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:08:43,871 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:08:43,871 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:08:43,871 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:08:43,871 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:08:43,872 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:08:43,872 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:08:43,872 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:08:43,872 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:08:43,872 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:08:43,872 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:08:43,872 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:08:43,873 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:08:43,873 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:08:43,874 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:08:43,874 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a4926ac2dce683c4edbf3416b646f7aec42cebb1 [2019-12-07 19:08:43,982 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:08:43,990 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:08:43,992 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:08:43,993 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:08:43,993 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:08:43,994 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i [2019-12-07 19:08:44,031 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/data/37d9a6f04/aca4ddb8764d4235a17beac603dcf096/FLAG95c98a1b0 [2019-12-07 19:08:44,503 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:08:44,504 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/sv-benchmarks/c/pthread-wmm/safe030_pso.opt.i [2019-12-07 19:08:44,513 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/data/37d9a6f04/aca4ddb8764d4235a17beac603dcf096/FLAG95c98a1b0 [2019-12-07 19:08:44,522 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/data/37d9a6f04/aca4ddb8764d4235a17beac603dcf096 [2019-12-07 19:08:44,524 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:08:44,525 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:08:44,526 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:08:44,526 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:08:44,528 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:08:44,528 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,530 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44, skipping insertion in model container [2019-12-07 19:08:44,530 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,535 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:08:44,562 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:08:44,821 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:08:44,830 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:08:44,873 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:08:44,925 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:08:44,926 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44 WrapperNode [2019-12-07 19:08:44,926 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:08:44,926 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:08:44,926 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:08:44,927 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:08:44,932 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,945 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,966 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:08:44,967 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:08:44,967 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:08:44,967 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:08:44,973 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,974 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,977 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,977 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,983 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,986 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,988 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... [2019-12-07 19:08:44,991 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:08:44,991 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:08:44,991 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:08:44,992 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:08:44,992 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:08:45,031 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:08:45,031 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:08:45,031 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:08:45,032 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:08:45,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:08:45,032 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:08:45,033 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:08:45,382 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:08:45,382 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:08:45,383 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:08:45 BoogieIcfgContainer [2019-12-07 19:08:45,383 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:08:45,384 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:08:45,384 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:08:45,386 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:08:45,386 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:08:44" (1/3) ... [2019-12-07 19:08:45,387 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@458fa38e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:08:45, skipping insertion in model container [2019-12-07 19:08:45,387 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:08:44" (2/3) ... [2019-12-07 19:08:45,388 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@458fa38e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:08:45, skipping insertion in model container [2019-12-07 19:08:45,388 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:08:45" (3/3) ... [2019-12-07 19:08:45,389 INFO L109 eAbstractionObserver]: Analyzing ICFG safe030_pso.opt.i [2019-12-07 19:08:45,396 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:08:45,396 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:08:45,400 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:08:45,401 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:08:45,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,424 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,424 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,425 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,425 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,430 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,431 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,431 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,431 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,432 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,432 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:08:45,448 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:08:45,461 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:08:45,461 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:08:45,461 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:08:45,461 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:08:45,461 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:08:45,461 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:08:45,461 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:08:45,461 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:08:45,472 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 161 places, 192 transitions [2019-12-07 19:08:45,473 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 161 places, 192 transitions [2019-12-07 19:08:45,521 INFO L134 PetriNetUnfolder]: 41/189 cut-off events. [2019-12-07 19:08:45,522 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:08:45,530 INFO L76 FinitePrefix]: Finished finitePrefix Result has 199 conditions, 189 events. 41/189 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 9/155 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 19:08:45,541 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 161 places, 192 transitions [2019-12-07 19:08:45,565 INFO L134 PetriNetUnfolder]: 41/189 cut-off events. [2019-12-07 19:08:45,565 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:08:45,569 INFO L76 FinitePrefix]: Finished finitePrefix Result has 199 conditions, 189 events. 41/189 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 9/155 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 19:08:45,579 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 19:08:45,579 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:08:48,352 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 19:08:48,430 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46210 [2019-12-07 19:08:48,430 INFO L214 etLargeBlockEncoding]: Total number of compositions: 110 [2019-12-07 19:08:48,432 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 81 places, 86 transitions [2019-12-07 19:08:49,091 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 15658 states. [2019-12-07 19:08:49,093 INFO L276 IsEmpty]: Start isEmpty. Operand 15658 states. [2019-12-07 19:08:49,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 19:08:49,097 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:49,097 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:49,098 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:49,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:49,101 INFO L82 PathProgramCache]: Analyzing trace with hash 430910871, now seen corresponding path program 1 times [2019-12-07 19:08:49,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:49,107 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943625313] [2019-12-07 19:08:49,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:49,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:49,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:49,273 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1943625313] [2019-12-07 19:08:49,274 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:49,274 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:08:49,275 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737736324] [2019-12-07 19:08:49,278 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:49,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:49,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:49,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:49,289 INFO L87 Difference]: Start difference. First operand 15658 states. Second operand 3 states. [2019-12-07 19:08:49,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:49,533 INFO L93 Difference]: Finished difference Result 15586 states and 57554 transitions. [2019-12-07 19:08:49,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:49,535 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 19:08:49,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:49,654 INFO L225 Difference]: With dead ends: 15586 [2019-12-07 19:08:49,654 INFO L226 Difference]: Without dead ends: 15248 [2019-12-07 19:08:49,655 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:49,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15248 states. [2019-12-07 19:08:50,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15248 to 15248. [2019-12-07 19:08:50,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15248 states. [2019-12-07 19:08:50,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15248 states to 15248 states and 56345 transitions. [2019-12-07 19:08:50,217 INFO L78 Accepts]: Start accepts. Automaton has 15248 states and 56345 transitions. Word has length 7 [2019-12-07 19:08:50,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:50,218 INFO L462 AbstractCegarLoop]: Abstraction has 15248 states and 56345 transitions. [2019-12-07 19:08:50,219 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:50,219 INFO L276 IsEmpty]: Start isEmpty. Operand 15248 states and 56345 transitions. [2019-12-07 19:08:50,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:08:50,223 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:50,223 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:50,223 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:50,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:50,224 INFO L82 PathProgramCache]: Analyzing trace with hash 1550259791, now seen corresponding path program 1 times [2019-12-07 19:08:50,224 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:50,224 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987864537] [2019-12-07 19:08:50,224 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:50,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:50,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:50,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987864537] [2019-12-07 19:08:50,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:50,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:08:50,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724211150] [2019-12-07 19:08:50,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:08:50,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:50,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:08:50,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:08:50,301 INFO L87 Difference]: Start difference. First operand 15248 states and 56345 transitions. Second operand 4 states. [2019-12-07 19:08:50,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:50,587 INFO L93 Difference]: Finished difference Result 24364 states and 86703 transitions. [2019-12-07 19:08:50,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:08:50,587 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:08:50,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:50,691 INFO L225 Difference]: With dead ends: 24364 [2019-12-07 19:08:50,692 INFO L226 Difference]: Without dead ends: 24350 [2019-12-07 19:08:50,692 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:08:50,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24350 states. [2019-12-07 19:08:51,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24350 to 21678. [2019-12-07 19:08:51,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21678 states. [2019-12-07 19:08:51,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21678 states to 21678 states and 78082 transitions. [2019-12-07 19:08:51,198 INFO L78 Accepts]: Start accepts. Automaton has 21678 states and 78082 transitions. Word has length 13 [2019-12-07 19:08:51,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:51,198 INFO L462 AbstractCegarLoop]: Abstraction has 21678 states and 78082 transitions. [2019-12-07 19:08:51,198 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:08:51,199 INFO L276 IsEmpty]: Start isEmpty. Operand 21678 states and 78082 transitions. [2019-12-07 19:08:51,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:08:51,201 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:51,201 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:51,202 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:51,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:51,202 INFO L82 PathProgramCache]: Analyzing trace with hash -1785022215, now seen corresponding path program 1 times [2019-12-07 19:08:51,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:51,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929332487] [2019-12-07 19:08:51,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:51,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:51,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:51,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929332487] [2019-12-07 19:08:51,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:51,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:08:51,252 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510205521] [2019-12-07 19:08:51,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:51,253 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:51,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:51,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:51,253 INFO L87 Difference]: Start difference. First operand 21678 states and 78082 transitions. Second operand 3 states. [2019-12-07 19:08:51,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:51,289 INFO L93 Difference]: Finished difference Result 12388 states and 38538 transitions. [2019-12-07 19:08:51,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:51,290 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 19:08:51,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:51,308 INFO L225 Difference]: With dead ends: 12388 [2019-12-07 19:08:51,308 INFO L226 Difference]: Without dead ends: 12388 [2019-12-07 19:08:51,309 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:51,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12388 states. [2019-12-07 19:08:51,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12388 to 12388. [2019-12-07 19:08:51,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12388 states. [2019-12-07 19:08:51,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12388 states to 12388 states and 38538 transitions. [2019-12-07 19:08:51,544 INFO L78 Accepts]: Start accepts. Automaton has 12388 states and 38538 transitions. Word has length 13 [2019-12-07 19:08:51,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:51,545 INFO L462 AbstractCegarLoop]: Abstraction has 12388 states and 38538 transitions. [2019-12-07 19:08:51,545 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:51,545 INFO L276 IsEmpty]: Start isEmpty. Operand 12388 states and 38538 transitions. [2019-12-07 19:08:51,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 19:08:51,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:51,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:51,546 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:51,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:51,546 INFO L82 PathProgramCache]: Analyzing trace with hash -1922152669, now seen corresponding path program 1 times [2019-12-07 19:08:51,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:51,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478513592] [2019-12-07 19:08:51,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:51,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:51,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:51,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478513592] [2019-12-07 19:08:51,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:51,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:08:51,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [472979928] [2019-12-07 19:08:51,589 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:08:51,589 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:51,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:08:51,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:08:51,590 INFO L87 Difference]: Start difference. First operand 12388 states and 38538 transitions. Second operand 4 states. [2019-12-07 19:08:51,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:51,606 INFO L93 Difference]: Finished difference Result 1903 states and 4374 transitions. [2019-12-07 19:08:51,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:08:51,606 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 19:08:51,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:51,608 INFO L225 Difference]: With dead ends: 1903 [2019-12-07 19:08:51,608 INFO L226 Difference]: Without dead ends: 1903 [2019-12-07 19:08:51,608 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:08:51,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1903 states. [2019-12-07 19:08:51,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1903 to 1903. [2019-12-07 19:08:51,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1903 states. [2019-12-07 19:08:51,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1903 states to 1903 states and 4374 transitions. [2019-12-07 19:08:51,627 INFO L78 Accepts]: Start accepts. Automaton has 1903 states and 4374 transitions. Word has length 14 [2019-12-07 19:08:51,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:51,627 INFO L462 AbstractCegarLoop]: Abstraction has 1903 states and 4374 transitions. [2019-12-07 19:08:51,627 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:08:51,627 INFO L276 IsEmpty]: Start isEmpty. Operand 1903 states and 4374 transitions. [2019-12-07 19:08:51,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 19:08:51,628 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:51,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:51,629 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:51,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:51,629 INFO L82 PathProgramCache]: Analyzing trace with hash -560054606, now seen corresponding path program 1 times [2019-12-07 19:08:51,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:51,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338671790] [2019-12-07 19:08:51,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:51,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:51,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:51,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338671790] [2019-12-07 19:08:51,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:51,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:08:51,763 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769878525] [2019-12-07 19:08:51,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:08:51,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:51,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:08:51,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:08:51,764 INFO L87 Difference]: Start difference. First operand 1903 states and 4374 transitions. Second operand 7 states. [2019-12-07 19:08:51,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:51,971 INFO L93 Difference]: Finished difference Result 2325 states and 5181 transitions. [2019-12-07 19:08:51,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 19:08:51,972 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2019-12-07 19:08:51,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:51,974 INFO L225 Difference]: With dead ends: 2325 [2019-12-07 19:08:51,974 INFO L226 Difference]: Without dead ends: 2325 [2019-12-07 19:08:51,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:08:51,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2325 states. [2019-12-07 19:08:51,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2325 to 2120. [2019-12-07 19:08:51,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2120 states. [2019-12-07 19:08:51,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2120 states to 2120 states and 4797 transitions. [2019-12-07 19:08:51,995 INFO L78 Accepts]: Start accepts. Automaton has 2120 states and 4797 transitions. Word has length 26 [2019-12-07 19:08:51,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:51,995 INFO L462 AbstractCegarLoop]: Abstraction has 2120 states and 4797 transitions. [2019-12-07 19:08:51,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:08:51,995 INFO L276 IsEmpty]: Start isEmpty. Operand 2120 states and 4797 transitions. [2019-12-07 19:08:51,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 19:08:51,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:51,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:51,998 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:51,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:51,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1431449310, now seen corresponding path program 1 times [2019-12-07 19:08:51,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:51,998 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267758659] [2019-12-07 19:08:51,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:52,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:52,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:52,141 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267758659] [2019-12-07 19:08:52,142 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:52,142 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:08:52,142 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712847430] [2019-12-07 19:08:52,142 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:08:52,143 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:52,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:08:52,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:08:52,143 INFO L87 Difference]: Start difference. First operand 2120 states and 4797 transitions. Second operand 8 states. [2019-12-07 19:08:52,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:52,403 INFO L93 Difference]: Finished difference Result 2411 states and 5397 transitions. [2019-12-07 19:08:52,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 19:08:52,403 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2019-12-07 19:08:52,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:52,407 INFO L225 Difference]: With dead ends: 2411 [2019-12-07 19:08:52,407 INFO L226 Difference]: Without dead ends: 2410 [2019-12-07 19:08:52,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:08:52,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2410 states. [2019-12-07 19:08:52,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2410 to 2191. [2019-12-07 19:08:52,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2191 states. [2019-12-07 19:08:52,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2191 states to 2191 states and 4962 transitions. [2019-12-07 19:08:52,430 INFO L78 Accepts]: Start accepts. Automaton has 2191 states and 4962 transitions. Word has length 40 [2019-12-07 19:08:52,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:52,431 INFO L462 AbstractCegarLoop]: Abstraction has 2191 states and 4962 transitions. [2019-12-07 19:08:52,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:08:52,431 INFO L276 IsEmpty]: Start isEmpty. Operand 2191 states and 4962 transitions. [2019-12-07 19:08:52,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 19:08:52,434 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:52,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:52,435 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:52,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:52,435 INFO L82 PathProgramCache]: Analyzing trace with hash 2147243273, now seen corresponding path program 1 times [2019-12-07 19:08:52,435 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:52,435 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132887092] [2019-12-07 19:08:52,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:52,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:52,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:52,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132887092] [2019-12-07 19:08:52,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:52,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:08:52,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129460380] [2019-12-07 19:08:52,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:52,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:52,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:52,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:52,473 INFO L87 Difference]: Start difference. First operand 2191 states and 4962 transitions. Second operand 3 states. [2019-12-07 19:08:52,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:52,502 INFO L93 Difference]: Finished difference Result 2554 states and 5774 transitions. [2019-12-07 19:08:52,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:52,502 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 19:08:52,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:52,505 INFO L225 Difference]: With dead ends: 2554 [2019-12-07 19:08:52,505 INFO L226 Difference]: Without dead ends: 2554 [2019-12-07 19:08:52,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:52,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2554 states. [2019-12-07 19:08:52,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2554 to 2409. [2019-12-07 19:08:52,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2409 states. [2019-12-07 19:08:52,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2409 states to 2409 states and 5479 transitions. [2019-12-07 19:08:52,529 INFO L78 Accepts]: Start accepts. Automaton has 2409 states and 5479 transitions. Word has length 43 [2019-12-07 19:08:52,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:52,529 INFO L462 AbstractCegarLoop]: Abstraction has 2409 states and 5479 transitions. [2019-12-07 19:08:52,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:52,529 INFO L276 IsEmpty]: Start isEmpty. Operand 2409 states and 5479 transitions. [2019-12-07 19:08:52,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 19:08:52,532 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:52,532 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:52,532 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:52,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:52,532 INFO L82 PathProgramCache]: Analyzing trace with hash -739088727, now seen corresponding path program 1 times [2019-12-07 19:08:52,533 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:52,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1571813656] [2019-12-07 19:08:52,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:52,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:52,585 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:52,586 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1571813656] [2019-12-07 19:08:52,586 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:52,586 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:08:52,586 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653084634] [2019-12-07 19:08:52,586 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:08:52,586 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:52,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:08:52,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:08:52,587 INFO L87 Difference]: Start difference. First operand 2409 states and 5479 transitions. Second operand 5 states. [2019-12-07 19:08:52,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:52,875 INFO L93 Difference]: Finished difference Result 3227 states and 7239 transitions. [2019-12-07 19:08:52,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:08:52,876 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-12-07 19:08:52,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:52,879 INFO L225 Difference]: With dead ends: 3227 [2019-12-07 19:08:52,879 INFO L226 Difference]: Without dead ends: 3227 [2019-12-07 19:08:52,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:08:52,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3227 states. [2019-12-07 19:08:52,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3227 to 2956. [2019-12-07 19:08:52,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2956 states. [2019-12-07 19:08:52,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2956 states to 2956 states and 6692 transitions. [2019-12-07 19:08:52,919 INFO L78 Accepts]: Start accepts. Automaton has 2956 states and 6692 transitions. Word has length 43 [2019-12-07 19:08:52,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:52,920 INFO L462 AbstractCegarLoop]: Abstraction has 2956 states and 6692 transitions. [2019-12-07 19:08:52,920 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:08:52,920 INFO L276 IsEmpty]: Start isEmpty. Operand 2956 states and 6692 transitions. [2019-12-07 19:08:52,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 19:08:52,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:52,924 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:52,924 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:52,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:52,924 INFO L82 PathProgramCache]: Analyzing trace with hash -461664182, now seen corresponding path program 1 times [2019-12-07 19:08:52,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:52,924 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [519441243] [2019-12-07 19:08:52,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:52,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:52,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:52,975 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [519441243] [2019-12-07 19:08:52,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:52,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:08:52,975 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678912281] [2019-12-07 19:08:52,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:52,976 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:52,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:52,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:52,976 INFO L87 Difference]: Start difference. First operand 2956 states and 6692 transitions. Second operand 3 states. [2019-12-07 19:08:52,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:52,994 INFO L93 Difference]: Finished difference Result 2956 states and 6618 transitions. [2019-12-07 19:08:52,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:52,995 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 19:08:52,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:52,997 INFO L225 Difference]: With dead ends: 2956 [2019-12-07 19:08:52,997 INFO L226 Difference]: Without dead ends: 2956 [2019-12-07 19:08:52,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:53,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2956 states. [2019-12-07 19:08:53,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2956 to 2948. [2019-12-07 19:08:53,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2948 states. [2019-12-07 19:08:53,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2948 states to 2948 states and 6602 transitions. [2019-12-07 19:08:53,076 INFO L78 Accepts]: Start accepts. Automaton has 2948 states and 6602 transitions. Word has length 44 [2019-12-07 19:08:53,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:53,076 INFO L462 AbstractCegarLoop]: Abstraction has 2948 states and 6602 transitions. [2019-12-07 19:08:53,076 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:53,076 INFO L276 IsEmpty]: Start isEmpty. Operand 2948 states and 6602 transitions. [2019-12-07 19:08:53,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 19:08:53,080 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:53,080 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:53,081 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:53,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:53,081 INFO L82 PathProgramCache]: Analyzing trace with hash -1572873003, now seen corresponding path program 1 times [2019-12-07 19:08:53,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:53,081 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542985868] [2019-12-07 19:08:53,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:53,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:53,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:53,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [542985868] [2019-12-07 19:08:53,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:53,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:08:53,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360650280] [2019-12-07 19:08:53,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:08:53,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:53,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:08:53,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:08:53,169 INFO L87 Difference]: Start difference. First operand 2948 states and 6602 transitions. Second operand 6 states. [2019-12-07 19:08:53,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:53,286 INFO L93 Difference]: Finished difference Result 5986 states and 12986 transitions. [2019-12-07 19:08:53,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 19:08:53,286 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-07 19:08:53,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:53,288 INFO L225 Difference]: With dead ends: 5986 [2019-12-07 19:08:53,288 INFO L226 Difference]: Without dead ends: 3628 [2019-12-07 19:08:53,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:08:53,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3628 states. [2019-12-07 19:08:53,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3628 to 2977. [2019-12-07 19:08:53,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2977 states. [2019-12-07 19:08:53,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2977 states to 2977 states and 6581 transitions. [2019-12-07 19:08:53,315 INFO L78 Accepts]: Start accepts. Automaton has 2977 states and 6581 transitions. Word has length 44 [2019-12-07 19:08:53,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:53,315 INFO L462 AbstractCegarLoop]: Abstraction has 2977 states and 6581 transitions. [2019-12-07 19:08:53,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:08:53,315 INFO L276 IsEmpty]: Start isEmpty. Operand 2977 states and 6581 transitions. [2019-12-07 19:08:53,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 19:08:53,318 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:53,318 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:53,318 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:53,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:53,318 INFO L82 PathProgramCache]: Analyzing trace with hash -1526417043, now seen corresponding path program 2 times [2019-12-07 19:08:53,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:53,319 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132950413] [2019-12-07 19:08:53,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:53,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:53,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:53,401 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132950413] [2019-12-07 19:08:53,401 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:53,401 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:08:53,401 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168461658] [2019-12-07 19:08:53,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:08:53,402 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:53,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:08:53,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:08:53,402 INFO L87 Difference]: Start difference. First operand 2977 states and 6581 transitions. Second operand 6 states. [2019-12-07 19:08:53,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:53,505 INFO L93 Difference]: Finished difference Result 4902 states and 10729 transitions. [2019-12-07 19:08:53,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 19:08:53,505 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-07 19:08:53,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:53,507 INFO L225 Difference]: With dead ends: 4902 [2019-12-07 19:08:53,507 INFO L226 Difference]: Without dead ends: 1996 [2019-12-07 19:08:53,507 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:08:53,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1996 states. [2019-12-07 19:08:53,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1996 to 1885. [2019-12-07 19:08:53,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1885 states. [2019-12-07 19:08:53,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1885 states to 1885 states and 4005 transitions. [2019-12-07 19:08:53,522 INFO L78 Accepts]: Start accepts. Automaton has 1885 states and 4005 transitions. Word has length 44 [2019-12-07 19:08:53,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:53,522 INFO L462 AbstractCegarLoop]: Abstraction has 1885 states and 4005 transitions. [2019-12-07 19:08:53,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:08:53,522 INFO L276 IsEmpty]: Start isEmpty. Operand 1885 states and 4005 transitions. [2019-12-07 19:08:53,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 19:08:53,524 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:53,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:53,524 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:53,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:53,524 INFO L82 PathProgramCache]: Analyzing trace with hash -955319009, now seen corresponding path program 1 times [2019-12-07 19:08:53,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:53,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540764308] [2019-12-07 19:08:53,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:53,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:53,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:53,584 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540764308] [2019-12-07 19:08:53,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:53,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:08:53,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80947272] [2019-12-07 19:08:53,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:53,585 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:53,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:53,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:53,585 INFO L87 Difference]: Start difference. First operand 1885 states and 4005 transitions. Second operand 3 states. [2019-12-07 19:08:53,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:53,620 INFO L93 Difference]: Finished difference Result 1885 states and 3977 transitions. [2019-12-07 19:08:53,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:53,620 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2019-12-07 19:08:53,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:53,622 INFO L225 Difference]: With dead ends: 1885 [2019-12-07 19:08:53,622 INFO L226 Difference]: Without dead ends: 1885 [2019-12-07 19:08:53,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:53,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1885 states. [2019-12-07 19:08:53,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1885 to 1783. [2019-12-07 19:08:53,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1783 states. [2019-12-07 19:08:53,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1783 states to 1783 states and 3776 transitions. [2019-12-07 19:08:53,637 INFO L78 Accepts]: Start accepts. Automaton has 1783 states and 3776 transitions. Word has length 45 [2019-12-07 19:08:53,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:53,638 INFO L462 AbstractCegarLoop]: Abstraction has 1783 states and 3776 transitions. [2019-12-07 19:08:53,638 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:53,638 INFO L276 IsEmpty]: Start isEmpty. Operand 1783 states and 3776 transitions. [2019-12-07 19:08:53,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 19:08:53,639 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:53,639 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:53,639 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:53,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:53,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1193320725, now seen corresponding path program 1 times [2019-12-07 19:08:53,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:53,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [729240023] [2019-12-07 19:08:53,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:53,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:53,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:53,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [729240023] [2019-12-07 19:08:53,856 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:53,856 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:08:53,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393843199] [2019-12-07 19:08:53,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:08:53,857 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:53,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:08:53,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:08:53,857 INFO L87 Difference]: Start difference. First operand 1783 states and 3776 transitions. Second operand 12 states. [2019-12-07 19:08:54,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:54,227 INFO L93 Difference]: Finished difference Result 2354 states and 4965 transitions. [2019-12-07 19:08:54,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 19:08:54,227 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 45 [2019-12-07 19:08:54,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:54,229 INFO L225 Difference]: With dead ends: 2354 [2019-12-07 19:08:54,229 INFO L226 Difference]: Without dead ends: 1930 [2019-12-07 19:08:54,229 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2019-12-07 19:08:54,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1930 states. [2019-12-07 19:08:54,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1930 to 1773. [2019-12-07 19:08:54,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1773 states. [2019-12-07 19:08:54,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1773 states to 1773 states and 3764 transitions. [2019-12-07 19:08:54,244 INFO L78 Accepts]: Start accepts. Automaton has 1773 states and 3764 transitions. Word has length 45 [2019-12-07 19:08:54,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:54,244 INFO L462 AbstractCegarLoop]: Abstraction has 1773 states and 3764 transitions. [2019-12-07 19:08:54,244 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:08:54,244 INFO L276 IsEmpty]: Start isEmpty. Operand 1773 states and 3764 transitions. [2019-12-07 19:08:54,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 19:08:54,246 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:54,246 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:54,246 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:54,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:54,246 INFO L82 PathProgramCache]: Analyzing trace with hash -1815536888, now seen corresponding path program 1 times [2019-12-07 19:08:54,247 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:54,247 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [350210954] [2019-12-07 19:08:54,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:54,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:54,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:54,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [350210954] [2019-12-07 19:08:54,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:54,394 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:08:54,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651876469] [2019-12-07 19:08:54,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:08:54,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:54,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:08:54,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:08:54,394 INFO L87 Difference]: Start difference. First operand 1773 states and 3764 transitions. Second operand 11 states. [2019-12-07 19:08:54,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:54,704 INFO L93 Difference]: Finished difference Result 2427 states and 5180 transitions. [2019-12-07 19:08:54,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:08:54,705 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 45 [2019-12-07 19:08:54,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:54,706 INFO L225 Difference]: With dead ends: 2427 [2019-12-07 19:08:54,706 INFO L226 Difference]: Without dead ends: 2121 [2019-12-07 19:08:54,707 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=105, Invalid=401, Unknown=0, NotChecked=0, Total=506 [2019-12-07 19:08:54,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2121 states. [2019-12-07 19:08:54,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2121 to 1902. [2019-12-07 19:08:54,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1902 states. [2019-12-07 19:08:54,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1902 states to 1902 states and 4012 transitions. [2019-12-07 19:08:54,723 INFO L78 Accepts]: Start accepts. Automaton has 1902 states and 4012 transitions. Word has length 45 [2019-12-07 19:08:54,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:54,723 INFO L462 AbstractCegarLoop]: Abstraction has 1902 states and 4012 transitions. [2019-12-07 19:08:54,723 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:08:54,723 INFO L276 IsEmpty]: Start isEmpty. Operand 1902 states and 4012 transitions. [2019-12-07 19:08:54,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 19:08:54,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:54,754 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:54,754 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:54,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:54,754 INFO L82 PathProgramCache]: Analyzing trace with hash 2121919124, now seen corresponding path program 2 times [2019-12-07 19:08:54,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:54,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6716266] [2019-12-07 19:08:54,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:54,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:54,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:54,797 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6716266] [2019-12-07 19:08:54,797 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:54,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:08:54,798 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1381422010] [2019-12-07 19:08:54,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:08:54,798 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:54,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:08:54,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:08:54,798 INFO L87 Difference]: Start difference. First operand 1902 states and 4012 transitions. Second operand 5 states. [2019-12-07 19:08:54,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:54,812 INFO L93 Difference]: Finished difference Result 349 states and 614 transitions. [2019-12-07 19:08:54,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:08:54,812 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-12-07 19:08:54,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:54,812 INFO L225 Difference]: With dead ends: 349 [2019-12-07 19:08:54,812 INFO L226 Difference]: Without dead ends: 285 [2019-12-07 19:08:54,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:08:54,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2019-12-07 19:08:54,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 220. [2019-12-07 19:08:54,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-12-07 19:08:54,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 387 transitions. [2019-12-07 19:08:54,815 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 387 transitions. Word has length 45 [2019-12-07 19:08:54,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:54,815 INFO L462 AbstractCegarLoop]: Abstraction has 220 states and 387 transitions. [2019-12-07 19:08:54,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:08:54,815 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 387 transitions. [2019-12-07 19:08:54,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 19:08:54,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:54,816 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:54,816 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:54,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:54,816 INFO L82 PathProgramCache]: Analyzing trace with hash -1590264344, now seen corresponding path program 1 times [2019-12-07 19:08:54,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:54,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473393790] [2019-12-07 19:08:54,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:54,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:55,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:55,010 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [473393790] [2019-12-07 19:08:55,010 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:55,010 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:08:55,011 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707605187] [2019-12-07 19:08:55,011 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:08:55,011 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:55,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:08:55,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:08:55,011 INFO L87 Difference]: Start difference. First operand 220 states and 387 transitions. Second operand 12 states. [2019-12-07 19:08:55,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:55,170 INFO L93 Difference]: Finished difference Result 368 states and 629 transitions. [2019-12-07 19:08:55,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 19:08:55,170 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 19:08:55,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:55,170 INFO L225 Difference]: With dead ends: 368 [2019-12-07 19:08:55,170 INFO L226 Difference]: Without dead ends: 338 [2019-12-07 19:08:55,171 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=270, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:08:55,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 338 states. [2019-12-07 19:08:55,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 338 to 328. [2019-12-07 19:08:55,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-12-07 19:08:55,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 572 transitions. [2019-12-07 19:08:55,173 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 572 transitions. Word has length 56 [2019-12-07 19:08:55,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:55,174 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 572 transitions. [2019-12-07 19:08:55,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:08:55,174 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 572 transitions. [2019-12-07 19:08:55,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 19:08:55,174 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:55,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:55,174 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:55,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:55,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1475134232, now seen corresponding path program 2 times [2019-12-07 19:08:55,175 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:55,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053956932] [2019-12-07 19:08:55,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:55,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:08:55,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:08:55,253 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:08:55,253 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:08:55,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] ULTIMATE.startENTRY-->L798: Formula: (let ((.cse0 (store |v_#valid_61| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27|) |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0))) (= (store .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27| 1) |v_#valid_59|) (= 0 v_~y$r_buff1_thd1~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27|) 0) (= 0 v_~y$r_buff1_thd3~0_115) (= 0 v_~y$r_buff1_thd2~0_106) (= v_~weak$$choice2~0_112 0) (= v_~y$r_buff0_thd1~0_53 0) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$w_buff0_used~0_737 0) (= v_~y$w_buff1~0_230 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff0_thd3~0_169) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2498~0.base_27|) (= |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0) (= 0 v_~y$w_buff0~0_338) (< 0 |v_#StackHeapBarrier_18|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2498~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_108) (= v_~y$mem_tmp~0_19 0) (= v_~z~0_90 0) (= v_~x~0_77 0) (= v_~y$w_buff1_used~0_407 0) (= v_~main$tmp_guard0~0_21 0) (= |v_#NULL.offset_5| 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~__unbuffered_cnt~0_90) (= v_~y$r_buff1_thd0~0_237 0) (= 0 v_~y$flush_delayed~0_38) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= 0 |v_#NULL.base_5|) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_34|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_17|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_39|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_62|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_71|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_115, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_53, ~y$flush_delayed~0=v_~y$flush_delayed~0_38, #length=|v_#length_25|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_33|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_118|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_45|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_34|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_37|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ~y$w_buff1~0=v_~y$w_buff1~0_230, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_237, ~x~0=v_~x~0_77, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_20|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_737, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_45|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_37|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_43|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_24|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_62|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_54, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~y$w_buff0~0=v_~y$w_buff0~0_338, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_169, ~y~0=v_~y~0_150, ULTIMATE.start_main_~#t2498~0.offset=|v_ULTIMATE.start_main_~#t2498~0.offset_20|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_37|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_206|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_43|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_114|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_106, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_42|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_59|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_20|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t2498~0.base=|v_ULTIMATE.start_main_~#t2498~0.base_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_90, ~weak$$choice2~0=v_~weak$$choice2~0_112, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2499~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2499~0.base, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2500~0.offset, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t2498~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, ULTIMATE.start_main_~#t2500~0.base, #memory_int, ULTIMATE.start_main_~#t2498~0.base, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:08:55,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L798-1-->L800: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2499~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2499~0.base_9| 4) |v_#length_15|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9|) |v_ULTIMATE.start_main_~#t2499~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t2499~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2499~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2499~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 19:08:55,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L800-1-->L802: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10|) |v_ULTIMATE.start_main_~#t2500~0.offset_9| 2)) |v_#memory_int_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2500~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2500~0.offset_9|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2500~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2500~0.offset] because there is no mapped edge [2019-12-07 19:08:55,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P2ENTRY-->L4-3: Formula: (and (= |P2Thread1of1ForFork0_#in~arg.offset_In1995149116| P2Thread1of1ForFork0_~arg.offset_Out1995149116) (= P2Thread1of1ForFork0_~arg.base_Out1995149116 |P2Thread1of1ForFork0_#in~arg.base_In1995149116|) (= 1 ~y$w_buff0_used~0_Out1995149116) (= ~y$w_buff0~0_Out1995149116 2) (= (ite (not (and (not (= 0 (mod ~y$w_buff0_used~0_Out1995149116 256))) (not (= 0 (mod ~y$w_buff1_used~0_Out1995149116 256))))) 1 0) |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1995149116|) (= ~y$w_buff0~0_In1995149116 ~y$w_buff1~0_Out1995149116) (= ~y$w_buff1_used~0_Out1995149116 ~y$w_buff0_used~0_In1995149116) (not (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out1995149116 0)) (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out1995149116 |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1995149116|)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In1995149116|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1995149116, ~y$w_buff0~0=~y$w_buff0~0_In1995149116, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In1995149116|} OutVars{P2Thread1of1ForFork0_~arg.base=P2Thread1of1ForFork0_~arg.base_Out1995149116, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1995149116|, P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In1995149116|, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out1995149116, ~y$w_buff1~0=~y$w_buff1~0_Out1995149116, ~y$w_buff0~0=~y$w_buff0~0_Out1995149116, P2Thread1of1ForFork0_~arg.offset=P2Thread1of1ForFork0_~arg.offset_Out1995149116, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In1995149116|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out1995149116, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out1995149116} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:08:55,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_60 1) (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= |v_P0Thread1of1ForFork1_#in~arg.base_17| v_P0Thread1of1ForFork1_~arg.base_15) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= v_P0Thread1of1ForFork1_~arg.offset_15 |v_P0Thread1of1ForFork1_#in~arg.offset_17|) (= v_~z~0_51 2) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ~z~0=v_~z~0_51, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|, ~x~0=v_~x~0_60, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_15} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 19:08:55,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In2115763753 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2115763753 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out2115763753|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In2115763753 |P2Thread1of1ForFork0_#t~ite11_Out2115763753|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2115763753, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2115763753} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2115763753, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out2115763753|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2115763753} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 19:08:55,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L746-2-->L746-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out1064713212| |P1Thread1of1ForFork2_#t~ite4_Out1064713212|)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1064713212 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1064713212 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite3_Out1064713212| ~y$w_buff1~0_In1064713212) (not .cse0) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |P1Thread1of1ForFork2_#t~ite3_Out1064713212| ~y~0_In1064713212)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1064713212, ~y$w_buff1~0=~y$w_buff1~0_In1064713212, ~y~0=~y~0_In1064713212, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1064713212} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1064713212, ~y$w_buff1~0=~y$w_buff1~0_In1064713212, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out1064713212|, ~y~0=~y~0_In1064713212, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1064713212|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1064713212} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 19:08:55,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L777-->L777-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-332330525 256))) (.cse3 (= (mod ~y$r_buff1_thd3~0_In-332330525 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-332330525 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-332330525 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-332330525 |P2Thread1of1ForFork0_#t~ite12_Out-332330525|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-332330525|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-332330525, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-332330525, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-332330525, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-332330525} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-332330525, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-332330525, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-332330525|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-332330525, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-332330525} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 19:08:55,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-211971094 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-211971094 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite5_Out-211971094|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-211971094 |P1Thread1of1ForFork2_#t~ite5_Out-211971094|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-211971094, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-211971094} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-211971094, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-211971094, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-211971094|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 19:08:55,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L748-->L748-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1444390538 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1444390538 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1444390538 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-1444390538 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1444390538 |P1Thread1of1ForFork2_#t~ite6_Out-1444390538|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite6_Out-1444390538|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1444390538, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1444390538, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1444390538, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1444390538} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1444390538, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1444390538, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1444390538, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-1444390538|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1444390538} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 19:08:55,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In659112573 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In659112573 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out659112573| 0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite7_Out659112573| ~y$r_buff0_thd2~0_In659112573) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In659112573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In659112573} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In659112573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In659112573, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out659112573|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 19:08:55,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In734023225 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In734023225 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In734023225 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In734023225 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out734023225|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In734023225 |P1Thread1of1ForFork2_#t~ite8_Out734023225|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In734023225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In734023225, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In734023225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In734023225} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In734023225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In734023225, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out734023225|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In734023225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In734023225} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:08:55,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L750-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_34| v_~y$r_buff1_thd2~0_71) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_71, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:08:55,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L778-->L779: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In730952048 256))) (.cse2 (= ~y$r_buff0_thd3~0_In730952048 ~y$r_buff0_thd3~0_Out730952048)) (.cse0 (= (mod ~y$w_buff0_used~0_In730952048 256) 0))) (or (and (= ~y$r_buff0_thd3~0_Out730952048 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In730952048, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In730952048} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In730952048, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out730952048, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out730952048|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 19:08:55,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In48365534 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In48365534 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In48365534 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In48365534 256)))) (or (and (= ~y$r_buff1_thd3~0_In48365534 |P2Thread1of1ForFork0_#t~ite14_Out48365534|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite14_Out48365534|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In48365534, ~y$w_buff0_used~0=~y$w_buff0_used~0_In48365534, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In48365534, ~y$w_buff1_used~0=~y$w_buff1_used~0_In48365534} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out48365534|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In48365534, ~y$w_buff0_used~0=~y$w_buff0_used~0_In48365534, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In48365534, ~y$w_buff1_used~0=~y$w_buff1_used~0_In48365534} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 19:08:55,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L779-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_32| v_~y$r_buff1_thd3~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_31|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_66, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:08:55,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L802-1-->L808: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:08:55,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L808-2-->L808-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1112150713| |ULTIMATE.start_main_#t~ite18_Out-1112150713|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1112150713 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1112150713 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite18_Out-1112150713| ~y$w_buff1~0_In-1112150713) .cse0 (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= ~y~0_In-1112150713 |ULTIMATE.start_main_#t~ite18_Out-1112150713|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1112150713, ~y~0=~y~0_In-1112150713, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1112150713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1112150713} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1112150713, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1112150713|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1112150713|, ~y~0=~y~0_In-1112150713, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1112150713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1112150713} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 19:08:55,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-->L809-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1915576892 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1915576892 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-1915576892| ~y$w_buff0_used~0_In-1915576892)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-1915576892| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1915576892, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1915576892} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1915576892, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1915576892, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1915576892|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 19:08:55,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L810-->L810-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In2146070796 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In2146070796 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In2146070796 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In2146070796 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out2146070796| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2146070796 |ULTIMATE.start_main_#t~ite21_Out2146070796|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2146070796, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2146070796, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2146070796, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2146070796} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2146070796, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2146070796, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out2146070796|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2146070796, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2146070796} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 19:08:55,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1350341585 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1350341585 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1350341585| 0)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd0~0_In-1350341585 |ULTIMATE.start_main_#t~ite22_Out-1350341585|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1350341585, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1350341585} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1350341585, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1350341585, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1350341585|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 19:08:55,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-1792641108 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1792641108 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1792641108 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1792641108 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite23_Out-1792641108| ~y$r_buff1_thd0~0_In-1792641108)) (and (= |ULTIMATE.start_main_#t~ite23_Out-1792641108| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792641108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1792641108, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1792641108, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792641108} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792641108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1792641108, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1792641108, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1792641108|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792641108} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 19:08:55,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L820-->L820-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In444173124 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite29_In444173124| |ULTIMATE.start_main_#t~ite29_Out444173124|) (= |ULTIMATE.start_main_#t~ite30_Out444173124| ~y$w_buff0~0_In444173124)) (and (= |ULTIMATE.start_main_#t~ite30_Out444173124| |ULTIMATE.start_main_#t~ite29_Out444173124|) .cse0 (= ~y$w_buff0~0_In444173124 |ULTIMATE.start_main_#t~ite29_Out444173124|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In444173124 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In444173124 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In444173124 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In444173124 256)))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In444173124, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In444173124|, ~y$w_buff0~0=~y$w_buff0~0_In444173124, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In444173124, ~weak$$choice2~0=~weak$$choice2~0_In444173124, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In444173124, ~y$w_buff1_used~0=~y$w_buff1_used~0_In444173124} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out444173124|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In444173124, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out444173124|, ~y$w_buff0~0=~y$w_buff0~0_In444173124, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In444173124, ~weak$$choice2~0=~weak$$choice2~0_In444173124, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In444173124, ~y$w_buff1_used~0=~y$w_buff1_used~0_In444173124} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 19:08:55,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L821-->L821-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1237046549 256)))) (or (and (= |ULTIMATE.start_main_#t~ite33_Out-1237046549| |ULTIMATE.start_main_#t~ite32_Out-1237046549|) (= ~y$w_buff1~0_In-1237046549 |ULTIMATE.start_main_#t~ite32_Out-1237046549|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1237046549 256) 0))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-1237046549 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-1237046549 256)) (and (= 0 (mod ~y$r_buff1_thd0~0_In-1237046549 256)) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In-1237046549| |ULTIMATE.start_main_#t~ite32_Out-1237046549|) (= ~y$w_buff1~0_In-1237046549 |ULTIMATE.start_main_#t~ite33_Out-1237046549|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1237046549, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1237046549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1237046549, ~weak$$choice2~0=~weak$$choice2~0_In-1237046549, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1237046549, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1237046549|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1237046549} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1237046549, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1237046549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1237046549, ~weak$$choice2~0=~weak$$choice2~0_In-1237046549, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1237046549|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1237046549, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1237046549|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1237046549} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 19:08:55,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1987365611 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite35_In-1987365611| |ULTIMATE.start_main_#t~ite35_Out-1987365611|) (not .cse0) (= |ULTIMATE.start_main_#t~ite36_Out-1987365611| ~y$w_buff0_used~0_In-1987365611)) (and (= |ULTIMATE.start_main_#t~ite35_Out-1987365611| ~y$w_buff0_used~0_In-1987365611) (= |ULTIMATE.start_main_#t~ite36_Out-1987365611| |ULTIMATE.start_main_#t~ite35_Out-1987365611|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1987365611 256) 0))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-1987365611 256) 0)) (= (mod ~y$w_buff0_used~0_In-1987365611 256) 0) (and (= (mod ~y$r_buff1_thd0~0_In-1987365611 256) 0) .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987365611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1987365611, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-1987365611|, ~weak$$choice2~0=~weak$$choice2~0_In-1987365611, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1987365611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987365611} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987365611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1987365611, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-1987365611|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1987365611|, ~weak$$choice2~0=~weak$$choice2~0_In-1987365611, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1987365611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987365611} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 19:08:55,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L824-->L825-8: Formula: (and (= v_~y$r_buff1_thd0~0_226 |v_ULTIMATE.start_main_#t~ite45_60|) (not (= 0 (mod v_~weak$$choice2~0_105 256))) (= |v_ULTIMATE.start_main_#t~ite43_49| |v_ULTIMATE.start_main_#t~ite43_48|) (= |v_ULTIMATE.start_main_#t~ite44_49| |v_ULTIMATE.start_main_#t~ite44_48|) (= v_~y$r_buff0_thd0~0_339 v_~y$r_buff0_thd0~0_338)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_339, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_49|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_35|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_338, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_19|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_48|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 19:08:55,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] L827-->L830-1: Formula: (and (= (mod v_~main$tmp_guard1~0_21 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_~y~0_89 v_~y$mem_tmp~0_11) (= 0 v_~y$flush_delayed~0_23) (not (= (mod v_~y$flush_delayed~0_24 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_23, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~y~0=v_~y~0_89, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:08:55,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L830-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:08:55,317 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:08:55 BasicIcfg [2019-12-07 19:08:55,317 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:08:55,317 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:08:55,317 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:08:55,318 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:08:55,318 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:08:45" (3/4) ... [2019-12-07 19:08:55,320 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:08:55,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] ULTIMATE.startENTRY-->L798: Formula: (let ((.cse0 (store |v_#valid_61| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2498~0.base_27|) |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0))) (= (store .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27| 1) |v_#valid_59|) (= 0 v_~y$r_buff1_thd1~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t2498~0.base_27|) 0) (= 0 v_~y$r_buff1_thd3~0_115) (= 0 v_~y$r_buff1_thd2~0_106) (= v_~weak$$choice2~0_112 0) (= v_~y$r_buff0_thd1~0_53 0) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$w_buff0_used~0_737 0) (= v_~y$w_buff1~0_230 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff0_thd3~0_169) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2498~0.base_27|) (= |v_ULTIMATE.start_main_~#t2498~0.offset_20| 0) (= 0 v_~y$w_buff0~0_338) (< 0 |v_#StackHeapBarrier_18|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2498~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_108) (= v_~y$mem_tmp~0_19 0) (= v_~z~0_90 0) (= v_~x~0_77 0) (= v_~y$w_buff1_used~0_407 0) (= v_~main$tmp_guard0~0_21 0) (= |v_#NULL.offset_5| 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~__unbuffered_cnt~0_90) (= v_~y$r_buff1_thd0~0_237 0) (= 0 v_~y$flush_delayed~0_38) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= 0 |v_#NULL.base_5|) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_34|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_17|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_39|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_62|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_31|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_71|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_115, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_53, ~y$flush_delayed~0=v_~y$flush_delayed~0_38, #length=|v_#length_25|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_33|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_118|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_45|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_34|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_37|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_40|, ~y$w_buff1~0=v_~y$w_buff1~0_230, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_237, ~x~0=v_~x~0_77, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_20|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_737, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_45|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_37|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_43|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_24|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_62|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_54, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~y$w_buff0~0=v_~y$w_buff0~0_338, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_169, ~y~0=v_~y~0_150, ULTIMATE.start_main_~#t2498~0.offset=|v_ULTIMATE.start_main_~#t2498~0.offset_20|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_37|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_206|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_43|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_114|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_106, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_42|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_59|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_20|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t2498~0.base=|v_ULTIMATE.start_main_~#t2498~0.base_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_90, ~weak$$choice2~0=v_~weak$$choice2~0_112, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2499~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2499~0.base, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2500~0.offset, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t2498~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, ULTIMATE.start_main_~#t2500~0.base, #memory_int, ULTIMATE.start_main_~#t2498~0.base, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:08:55,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L798-1-->L800: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2499~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2499~0.base_9|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2499~0.base_9| 4) |v_#length_15|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2499~0.base_9|) |v_ULTIMATE.start_main_~#t2499~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t2499~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2499~0.base=|v_ULTIMATE.start_main_~#t2499~0.base_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2499~0.offset=|v_ULTIMATE.start_main_~#t2499~0.offset_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2499~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t2499~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 19:08:55,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L800-1-->L802: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2500~0.base_10|) |v_ULTIMATE.start_main_~#t2500~0.offset_9| 2)) |v_#memory_int_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2500~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2500~0.offset_9|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2500~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t2500~0.base=|v_ULTIMATE.start_main_~#t2500~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2500~0.offset=|v_ULTIMATE.start_main_~#t2500~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2500~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2500~0.offset] because there is no mapped edge [2019-12-07 19:08:55,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P2ENTRY-->L4-3: Formula: (and (= |P2Thread1of1ForFork0_#in~arg.offset_In1995149116| P2Thread1of1ForFork0_~arg.offset_Out1995149116) (= P2Thread1of1ForFork0_~arg.base_Out1995149116 |P2Thread1of1ForFork0_#in~arg.base_In1995149116|) (= 1 ~y$w_buff0_used~0_Out1995149116) (= ~y$w_buff0~0_Out1995149116 2) (= (ite (not (and (not (= 0 (mod ~y$w_buff0_used~0_Out1995149116 256))) (not (= 0 (mod ~y$w_buff1_used~0_Out1995149116 256))))) 1 0) |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1995149116|) (= ~y$w_buff0~0_In1995149116 ~y$w_buff1~0_Out1995149116) (= ~y$w_buff1_used~0_Out1995149116 ~y$w_buff0_used~0_In1995149116) (not (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out1995149116 0)) (= P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out1995149116 |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1995149116|)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In1995149116|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1995149116, ~y$w_buff0~0=~y$w_buff0~0_In1995149116, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In1995149116|} OutVars{P2Thread1of1ForFork0_~arg.base=P2Thread1of1ForFork0_~arg.base_Out1995149116, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1995149116|, P2Thread1of1ForFork0_#in~arg.offset=|P2Thread1of1ForFork0_#in~arg.offset_In1995149116|, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out1995149116, ~y$w_buff1~0=~y$w_buff1~0_Out1995149116, ~y$w_buff0~0=~y$w_buff0~0_Out1995149116, P2Thread1of1ForFork0_~arg.offset=P2Thread1of1ForFork0_~arg.offset_Out1995149116, P2Thread1of1ForFork0_#in~arg.base=|P2Thread1of1ForFork0_#in~arg.base_In1995149116|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=P2Thread1of1ForFork0___VERIFIER_assert_~expression_Out1995149116, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out1995149116} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:08:55,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_60 1) (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= |v_P0Thread1of1ForFork1_#in~arg.base_17| v_P0Thread1of1ForFork1_~arg.base_15) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= v_P0Thread1of1ForFork1_~arg.offset_15 |v_P0Thread1of1ForFork1_#in~arg.offset_17|) (= v_~z~0_51 2) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ~z~0=v_~z~0_51, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|, ~x~0=v_~x~0_60, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_15} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 19:08:55,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In2115763753 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2115763753 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out2115763753|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In2115763753 |P2Thread1of1ForFork0_#t~ite11_Out2115763753|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2115763753, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2115763753} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2115763753, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out2115763753|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2115763753} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 19:08:55,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L746-2-->L746-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite3_Out1064713212| |P1Thread1of1ForFork2_#t~ite4_Out1064713212|)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1064713212 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1064713212 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite3_Out1064713212| ~y$w_buff1~0_In1064713212) (not .cse0) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |P1Thread1of1ForFork2_#t~ite3_Out1064713212| ~y~0_In1064713212)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1064713212, ~y$w_buff1~0=~y$w_buff1~0_In1064713212, ~y~0=~y~0_In1064713212, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1064713212} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1064713212, ~y$w_buff1~0=~y$w_buff1~0_In1064713212, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out1064713212|, ~y~0=~y~0_In1064713212, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1064713212|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1064713212} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 19:08:55,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L777-->L777-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-332330525 256))) (.cse3 (= (mod ~y$r_buff1_thd3~0_In-332330525 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-332330525 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-332330525 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-332330525 |P2Thread1of1ForFork0_#t~ite12_Out-332330525|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-332330525|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-332330525, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-332330525, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-332330525, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-332330525} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-332330525, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-332330525, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-332330525|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-332330525, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-332330525} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 19:08:55,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-211971094 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-211971094 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite5_Out-211971094|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-211971094 |P1Thread1of1ForFork2_#t~ite5_Out-211971094|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-211971094, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-211971094} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-211971094, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-211971094, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-211971094|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 19:08:55,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L748-->L748-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1444390538 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1444390538 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1444390538 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-1444390538 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1444390538 |P1Thread1of1ForFork2_#t~ite6_Out-1444390538|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite6_Out-1444390538|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1444390538, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1444390538, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1444390538, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1444390538} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1444390538, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1444390538, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1444390538, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-1444390538|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1444390538} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In659112573 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In659112573 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out659112573| 0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite7_Out659112573| ~y$r_buff0_thd2~0_In659112573) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In659112573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In659112573} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In659112573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In659112573, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out659112573|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In734023225 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In734023225 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In734023225 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In734023225 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out734023225|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In734023225 |P1Thread1of1ForFork2_#t~ite8_Out734023225|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In734023225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In734023225, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In734023225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In734023225} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In734023225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In734023225, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out734023225|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In734023225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In734023225} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L750-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_34| v_~y$r_buff1_thd2~0_71) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_71, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L778-->L779: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In730952048 256))) (.cse2 (= ~y$r_buff0_thd3~0_In730952048 ~y$r_buff0_thd3~0_Out730952048)) (.cse0 (= (mod ~y$w_buff0_used~0_In730952048 256) 0))) (or (and (= ~y$r_buff0_thd3~0_Out730952048 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In730952048, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In730952048} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In730952048, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out730952048, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out730952048|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In48365534 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In48365534 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In48365534 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In48365534 256)))) (or (and (= ~y$r_buff1_thd3~0_In48365534 |P2Thread1of1ForFork0_#t~ite14_Out48365534|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite14_Out48365534|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In48365534, ~y$w_buff0_used~0=~y$w_buff0_used~0_In48365534, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In48365534, ~y$w_buff1_used~0=~y$w_buff1_used~0_In48365534} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out48365534|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In48365534, ~y$w_buff0_used~0=~y$w_buff0_used~0_In48365534, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In48365534, ~y$w_buff1_used~0=~y$w_buff1_used~0_In48365534} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L779-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_32| v_~y$r_buff1_thd3~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_31|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_66, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L802-1-->L808: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:08:55,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L808-2-->L808-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1112150713| |ULTIMATE.start_main_#t~ite18_Out-1112150713|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1112150713 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1112150713 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite18_Out-1112150713| ~y$w_buff1~0_In-1112150713) .cse0 (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= ~y~0_In-1112150713 |ULTIMATE.start_main_#t~ite18_Out-1112150713|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1112150713, ~y~0=~y~0_In-1112150713, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1112150713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1112150713} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1112150713, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1112150713|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1112150713|, ~y~0=~y~0_In-1112150713, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1112150713, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1112150713} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 19:08:55,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L809-->L809-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1915576892 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1915576892 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-1915576892| ~y$w_buff0_used~0_In-1915576892)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-1915576892| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1915576892, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1915576892} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1915576892, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1915576892, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1915576892|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 19:08:55,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L810-->L810-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In2146070796 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In2146070796 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In2146070796 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In2146070796 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out2146070796| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2146070796 |ULTIMATE.start_main_#t~ite21_Out2146070796|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2146070796, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2146070796, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2146070796, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2146070796} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2146070796, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2146070796, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out2146070796|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2146070796, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2146070796} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 19:08:55,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1350341585 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1350341585 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1350341585| 0)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd0~0_In-1350341585 |ULTIMATE.start_main_#t~ite22_Out-1350341585|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1350341585, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1350341585} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1350341585, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1350341585, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1350341585|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 19:08:55,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-1792641108 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1792641108 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1792641108 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1792641108 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite23_Out-1792641108| ~y$r_buff1_thd0~0_In-1792641108)) (and (= |ULTIMATE.start_main_#t~ite23_Out-1792641108| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792641108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1792641108, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1792641108, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792641108} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792641108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1792641108, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1792641108, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1792641108|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792641108} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 19:08:55,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L820-->L820-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In444173124 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite29_In444173124| |ULTIMATE.start_main_#t~ite29_Out444173124|) (= |ULTIMATE.start_main_#t~ite30_Out444173124| ~y$w_buff0~0_In444173124)) (and (= |ULTIMATE.start_main_#t~ite30_Out444173124| |ULTIMATE.start_main_#t~ite29_Out444173124|) .cse0 (= ~y$w_buff0~0_In444173124 |ULTIMATE.start_main_#t~ite29_Out444173124|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In444173124 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In444173124 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In444173124 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In444173124 256)))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In444173124, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In444173124|, ~y$w_buff0~0=~y$w_buff0~0_In444173124, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In444173124, ~weak$$choice2~0=~weak$$choice2~0_In444173124, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In444173124, ~y$w_buff1_used~0=~y$w_buff1_used~0_In444173124} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out444173124|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In444173124, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out444173124|, ~y$w_buff0~0=~y$w_buff0~0_In444173124, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In444173124, ~weak$$choice2~0=~weak$$choice2~0_In444173124, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In444173124, ~y$w_buff1_used~0=~y$w_buff1_used~0_In444173124} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 19:08:55,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L821-->L821-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1237046549 256)))) (or (and (= |ULTIMATE.start_main_#t~ite33_Out-1237046549| |ULTIMATE.start_main_#t~ite32_Out-1237046549|) (= ~y$w_buff1~0_In-1237046549 |ULTIMATE.start_main_#t~ite32_Out-1237046549|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1237046549 256) 0))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-1237046549 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-1237046549 256)) (and (= 0 (mod ~y$r_buff1_thd0~0_In-1237046549 256)) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In-1237046549| |ULTIMATE.start_main_#t~ite32_Out-1237046549|) (= ~y$w_buff1~0_In-1237046549 |ULTIMATE.start_main_#t~ite33_Out-1237046549|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1237046549, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1237046549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1237046549, ~weak$$choice2~0=~weak$$choice2~0_In-1237046549, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1237046549, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1237046549|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1237046549} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1237046549, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1237046549, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1237046549, ~weak$$choice2~0=~weak$$choice2~0_In-1237046549, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1237046549|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1237046549, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1237046549|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1237046549} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 19:08:55,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1987365611 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite35_In-1987365611| |ULTIMATE.start_main_#t~ite35_Out-1987365611|) (not .cse0) (= |ULTIMATE.start_main_#t~ite36_Out-1987365611| ~y$w_buff0_used~0_In-1987365611)) (and (= |ULTIMATE.start_main_#t~ite35_Out-1987365611| ~y$w_buff0_used~0_In-1987365611) (= |ULTIMATE.start_main_#t~ite36_Out-1987365611| |ULTIMATE.start_main_#t~ite35_Out-1987365611|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1987365611 256) 0))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-1987365611 256) 0)) (= (mod ~y$w_buff0_used~0_In-1987365611 256) 0) (and (= (mod ~y$r_buff1_thd0~0_In-1987365611 256) 0) .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987365611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1987365611, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-1987365611|, ~weak$$choice2~0=~weak$$choice2~0_In-1987365611, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1987365611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987365611} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987365611, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1987365611, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-1987365611|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1987365611|, ~weak$$choice2~0=~weak$$choice2~0_In-1987365611, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1987365611, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987365611} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 19:08:55,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L824-->L825-8: Formula: (and (= v_~y$r_buff1_thd0~0_226 |v_ULTIMATE.start_main_#t~ite45_60|) (not (= 0 (mod v_~weak$$choice2~0_105 256))) (= |v_ULTIMATE.start_main_#t~ite43_49| |v_ULTIMATE.start_main_#t~ite43_48|) (= |v_ULTIMATE.start_main_#t~ite44_49| |v_ULTIMATE.start_main_#t~ite44_48|) (= v_~y$r_buff0_thd0~0_339 v_~y$r_buff0_thd0~0_338)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_339, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_49|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_35|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_338, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ~weak$$choice2~0=v_~weak$$choice2~0_105, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_226, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_19|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_48|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 19:08:55,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [701] [701] L827-->L830-1: Formula: (and (= (mod v_~main$tmp_guard1~0_21 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_~y~0_89 v_~y$mem_tmp~0_11) (= 0 v_~y$flush_delayed~0_23) (not (= (mod v_~y$flush_delayed~0_24 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_23, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ~y~0=v_~y~0_89, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:08:55,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L830-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:08:55,386 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_7faf0c8e-f62f-4d09-b337-3e95f24191f6/bin/utaipan/witness.graphml [2019-12-07 19:08:55,386 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:08:55,388 INFO L168 Benchmark]: Toolchain (without parser) took 10862.68 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 613.9 MB). Free memory was 934.0 MB in the beginning and 1.3 GB in the end (delta: -348.1 MB). Peak memory consumption was 265.8 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:55,388 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:08:55,388 INFO L168 Benchmark]: CACSL2BoogieTranslator took 400.51 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -155.8 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:55,389 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:55,389 INFO L168 Benchmark]: Boogie Preprocessor took 24.34 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:08:55,389 INFO L168 Benchmark]: RCFGBuilder took 391.90 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:55,390 INFO L168 Benchmark]: TraceAbstraction took 9933.19 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 491.8 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -272.7 MB). Peak memory consumption was 219.1 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:55,390 INFO L168 Benchmark]: Witness Printer took 69.15 ms. Allocated memory is still 1.6 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 18.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:55,392 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 400.51 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -155.8 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.34 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 391.90 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9933.19 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 491.8 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -272.7 MB). Peak memory consumption was 219.1 MB. Max. memory is 11.5 GB. * Witness Printer took 69.15 ms. Allocated memory is still 1.6 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 18.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 161 ProgramPointsBefore, 81 ProgramPointsAfterwards, 192 TransitionsBefore, 86 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 46 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 4050 VarBasedMoverChecksPositive, 194 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 227 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 46210 CheckedPairsTotal, 110 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L798] FCALL, FORK 0 pthread_create(&t2498, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L800] FCALL, FORK 0 pthread_create(&t2499, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L802] FCALL, FORK 0 pthread_create(&t2500, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L765] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L766] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L767] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L768] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L769] 3 y$r_buff0_thd3 = (_Bool)1 [L772] 3 z = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L775] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 x = 2 [L743] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L775] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L746] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L776] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L746] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L777] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L747] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L748] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L749] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L808] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L809] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L810] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L811] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L812] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L815] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L816] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L817] 0 y$flush_delayed = weak$$choice2 [L818] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L819] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L819] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L820] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L821] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L822] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L823] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L825] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L826] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 152 locations, 2 error locations. Result: UNSAFE, OverallTime: 9.7s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 2.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2155 SDtfs, 2196 SDslu, 5992 SDs, 0 SdLazy, 2218 SolverSat, 139 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 140 GetRequests, 25 SyntacticMatches, 8 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21678occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.5s AutomataMinimizationTime, 16 MinimizatonAttempts, 4835 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 623 NumberOfCodeBlocks, 623 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 551 ConstructedInterpolants, 0 QuantifiedInterpolants, 144303 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...