./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-invgen/string_concat-noarr.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a4ecdabc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/data/config -Xmx15G -Xms4m -jar /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-invgen/string_concat-noarr.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a16c5bc7f1ed4f9266e4e27b0a7ec7a93876c12a ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.0-a4ecdab [2020-11-30 01:12:32,474 INFO L177 SettingsManager]: Resetting all preferences to default values... [2020-11-30 01:12:32,485 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2020-11-30 01:12:32,526 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-11-30 01:12:32,527 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-11-30 01:12:32,528 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-11-30 01:12:32,531 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-11-30 01:12:32,535 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2020-11-30 01:12:32,538 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-11-30 01:12:32,540 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-11-30 01:12:32,542 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2020-11-30 01:12:32,544 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-11-30 01:12:32,545 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-11-30 01:12:32,547 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-11-30 01:12:32,563 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-11-30 01:12:32,565 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-11-30 01:12:32,566 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-11-30 01:12:32,578 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-11-30 01:12:32,581 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-11-30 01:12:32,585 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2020-11-30 01:12:32,588 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-11-30 01:12:32,591 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-11-30 01:12:32,593 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2020-11-30 01:12:32,594 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-11-30 01:12:32,599 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-11-30 01:12:32,600 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-11-30 01:12:32,601 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-11-30 01:12:32,602 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-11-30 01:12:32,603 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-11-30 01:12:32,605 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-11-30 01:12:32,605 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-11-30 01:12:32,607 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-11-30 01:12:32,608 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-11-30 01:12:32,610 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2020-11-30 01:12:32,611 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-11-30 01:12:32,612 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2020-11-30 01:12:32,613 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-11-30 01:12:32,614 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-11-30 01:12:32,614 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2020-11-30 01:12:32,616 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2020-11-30 01:12:32,617 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2020-11-30 01:12:32,619 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf [2020-11-30 01:12:32,651 INFO L113 SettingsManager]: Loading preferences was successful [2020-11-30 01:12:32,651 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2020-11-30 01:12:32,655 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-11-30 01:12:32,656 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2020-11-30 01:12:32,657 INFO L138 SettingsManager]: * Use SBE=true [2020-11-30 01:12:32,657 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2020-11-30 01:12:32,658 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2020-11-30 01:12:32,658 INFO L138 SettingsManager]: * Use old map elimination=false [2020-11-30 01:12:32,658 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2020-11-30 01:12:32,658 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2020-11-30 01:12:32,660 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2020-11-30 01:12:32,660 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-11-30 01:12:32,660 INFO L138 SettingsManager]: * sizeof long=4 [2020-11-30 01:12:32,661 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2020-11-30 01:12:32,661 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2020-11-30 01:12:32,661 INFO L138 SettingsManager]: * sizeof POINTER=4 [2020-11-30 01:12:32,662 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2020-11-30 01:12:32,662 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2020-11-30 01:12:32,662 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2020-11-30 01:12:32,662 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2020-11-30 01:12:32,663 INFO L138 SettingsManager]: * sizeof long double=12 [2020-11-30 01:12:32,663 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2020-11-30 01:12:32,663 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2020-11-30 01:12:32,664 INFO L138 SettingsManager]: * Use constant arrays=true [2020-11-30 01:12:32,664 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2020-11-30 01:12:32,664 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-11-30 01:12:32,664 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-11-30 01:12:32,665 INFO L138 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2020-11-30 01:12:32,665 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-11-30 01:12:32,665 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2020-11-30 01:12:32,666 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2020-11-30 01:12:32,666 INFO L138 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2020-11-30 01:12:32,669 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2020-11-30 01:12:32,669 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a16c5bc7f1ed4f9266e4e27b0a7ec7a93876c12a [2020-11-30 01:12:33,095 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2020-11-30 01:12:33,146 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-11-30 01:12:33,150 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-11-30 01:12:33,151 INFO L271 PluginConnector]: Initializing CDTParser... [2020-11-30 01:12:33,153 INFO L275 PluginConnector]: CDTParser initialized [2020-11-30 01:12:33,154 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/../../sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2020-11-30 01:12:33,286 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/data/6089e2369/eaf02e2f5892454e962bb103558c7459/FLAGf55f1c4cb [2020-11-30 01:12:33,830 INFO L306 CDTParser]: Found 1 translation units. [2020-11-30 01:12:33,831 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2020-11-30 01:12:33,839 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/data/6089e2369/eaf02e2f5892454e962bb103558c7459/FLAGf55f1c4cb [2020-11-30 01:12:34,196 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/data/6089e2369/eaf02e2f5892454e962bb103558c7459 [2020-11-30 01:12:34,199 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-11-30 01:12:34,200 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2020-11-30 01:12:34,202 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-11-30 01:12:34,202 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-11-30 01:12:34,205 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2020-11-30 01:12:34,206 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,208 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@194ffd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34, skipping insertion in model container [2020-11-30 01:12:34,208 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,215 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-11-30 01:12:34,230 INFO L178 MainTranslator]: Built tables and reachable declarations [2020-11-30 01:12:34,398 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-11-30 01:12:34,407 INFO L203 MainTranslator]: Completed pre-run [2020-11-30 01:12:34,426 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-11-30 01:12:34,444 INFO L208 MainTranslator]: Completed translation [2020-11-30 01:12:34,446 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34 WrapperNode [2020-11-30 01:12:34,448 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-11-30 01:12:34,449 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2020-11-30 01:12:34,450 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2020-11-30 01:12:34,451 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2020-11-30 01:12:34,459 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,468 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,491 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2020-11-30 01:12:34,492 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-11-30 01:12:34,492 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-11-30 01:12:34,492 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2020-11-30 01:12:34,501 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,501 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,516 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,516 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,519 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,524 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,532 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... [2020-11-30 01:12:34,534 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-11-30 01:12:34,536 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-11-30 01:12:34,541 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-11-30 01:12:34,541 INFO L275 PluginConnector]: RCFGBuilder initialized [2020-11-30 01:12:34,542 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-11-30 01:12:34,612 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2020-11-30 01:12:34,612 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2020-11-30 01:12:34,613 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-11-30 01:12:34,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-11-30 01:12:34,992 INFO L293 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-11-30 01:12:34,995 INFO L298 CfgBuilder]: Removed 10 assume(true) statements. [2020-11-30 01:12:34,996 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.11 01:12:34 BoogieIcfgContainer [2020-11-30 01:12:34,997 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-11-30 01:12:34,998 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2020-11-30 01:12:34,998 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2020-11-30 01:12:35,003 INFO L275 PluginConnector]: BuchiAutomizer initialized [2020-11-30 01:12:35,004 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-11-30 01:12:35,004 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 30.11 01:12:34" (1/3) ... [2020-11-30 01:12:35,006 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@482ed3ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 30.11 01:12:35, skipping insertion in model container [2020-11-30 01:12:35,006 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-11-30 01:12:35,006 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.11 01:12:34" (2/3) ... [2020-11-30 01:12:35,007 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@482ed3ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 30.11 01:12:35, skipping insertion in model container [2020-11-30 01:12:35,007 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-11-30 01:12:35,007 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.11 01:12:34" (3/3) ... [2020-11-30 01:12:35,009 INFO L373 chiAutomizerObserver]: Analyzing ICFG string_concat-noarr.i [2020-11-30 01:12:35,062 INFO L359 BuchiCegarLoop]: Interprodecural is true [2020-11-30 01:12:35,062 INFO L360 BuchiCegarLoop]: Hoare is false [2020-11-30 01:12:35,062 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2020-11-30 01:12:35,062 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2020-11-30 01:12:35,062 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-11-30 01:12:35,063 INFO L364 BuchiCegarLoop]: Difference is false [2020-11-30 01:12:35,063 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-11-30 01:12:35,063 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2020-11-30 01:12:35,075 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states. [2020-11-30 01:12:35,093 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:35,093 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:35,093 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:35,099 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1] [2020-11-30 01:12:35,099 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:35,099 INFO L427 BuchiCegarLoop]: ======== Iteration 1============ [2020-11-30 01:12:35,099 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states. [2020-11-30 01:12:35,101 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:35,101 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:35,101 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:35,101 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1] [2020-11-30 01:12:35,102 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:35,109 INFO L794 eck$LassoCheckResult]: Stem: 13#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 11#L-1true havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 3#L26true main_~i~0 := 0; 6#L29-1true [2020-11-30 01:12:35,109 INFO L796 eck$LassoCheckResult]: Loop: 6#L29-1true assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6#L29-1true [2020-11-30 01:12:35,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:35,115 INFO L82 PathProgramCache]: Analyzing trace with hash 29857, now seen corresponding path program 1 times [2020-11-30 01:12:35,124 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:35,125 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526391350] [2020-11-30 01:12:35,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:35,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:35,228 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:35,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:35,256 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:35,280 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:35,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:35,284 INFO L82 PathProgramCache]: Analyzing trace with hash 44, now seen corresponding path program 1 times [2020-11-30 01:12:35,285 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:35,285 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322441242] [2020-11-30 01:12:35,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:35,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:35,299 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:35,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:35,307 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:35,313 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:35,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:35,315 INFO L82 PathProgramCache]: Analyzing trace with hash 925580, now seen corresponding path program 1 times [2020-11-30 01:12:35,316 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:35,316 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270911521] [2020-11-30 01:12:35,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:35,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:35,334 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:35,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:35,350 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:35,356 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:35,461 INFO L210 LassoAnalysis]: Preferences: [2020-11-30 01:12:35,461 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2020-11-30 01:12:35,462 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2020-11-30 01:12:35,462 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2020-11-30 01:12:35,462 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2020-11-30 01:12:35,462 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-11-30 01:12:35,462 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2020-11-30 01:12:35,462 INFO L132 ssoRankerPreferences]: Path of dumped script: [2020-11-30 01:12:35,462 INFO L133 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2020-11-30 01:12:35,463 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2020-11-30 01:12:35,463 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2020-11-30 01:12:35,496 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2020-11-30 01:12:35,523 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2020-11-30 01:12:35,527 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2020-11-30 01:12:35,637 INFO L292 LassoAnalysis]: Preprocessing complete. [2020-11-30 01:12:35,638 INFO L404 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-11-30 01:12:35,643 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2020-11-30 01:12:35,644 INFO L160 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-11-30 01:12:35,671 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2020-11-30 01:12:35,671 INFO L160 nArgumentSynthesizer]: Using integer mode. [2020-11-30 01:12:35,697 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2020-11-30 01:12:35,699 INFO L210 LassoAnalysis]: Preferences: [2020-11-30 01:12:35,699 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2020-11-30 01:12:35,699 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2020-11-30 01:12:35,699 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2020-11-30 01:12:35,699 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2020-11-30 01:12:35,700 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-11-30 01:12:35,700 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2020-11-30 01:12:35,700 INFO L132 ssoRankerPreferences]: Path of dumped script: [2020-11-30 01:12:35,700 INFO L133 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2020-11-30 01:12:35,700 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2020-11-30 01:12:35,700 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2020-11-30 01:12:35,702 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2020-11-30 01:12:35,715 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2020-11-30 01:12:35,730 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2020-11-30 01:12:35,841 INFO L292 LassoAnalysis]: Preprocessing complete. [2020-11-30 01:12:35,845 INFO L489 LassoAnalysis]: Using template 'affine'. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2020-11-30 01:12:35,903 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2020-11-30 01:12:35,905 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2020-11-30 01:12:35,905 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2020-11-30 01:12:35,906 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2020-11-30 01:12:35,906 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2020-11-30 01:12:35,906 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2020-11-30 01:12:35,909 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2020-11-30 01:12:35,909 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-11-30 01:12:35,926 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2020-11-30 01:12:35,942 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2020-11-30 01:12:35,943 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-11-30 01:12:35,966 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2020-11-30 01:12:35,967 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2020-11-30 01:12:35,967 INFO L510 LassoAnalysis]: Proved termination. [2020-11-30 01:12:35,968 INFO L512 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = -2*ULTIMATE.start_main_~i~0 + 1999999 Supporting invariants [] [2020-11-30 01:12:35,990 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2020-11-30 01:12:36,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,039 INFO L263 TraceCheckSpWp]: Trace formula consists of 28 conjuncts, 2 conjunts are in the unsatisfiable core [2020-11-30 01:12:36,040 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:36,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,058 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2020-11-30 01:12:36,058 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:36,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,072 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2020-11-30 01:12:36,073 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 16 states. Second operand 2 states. [2020-11-30 01:12:36,124 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 16 states.. Second operand 2 states. Result 41 states and 62 transitions. Complement of second has 5 states. [2020-11-30 01:12:36,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2020-11-30 01:12:36,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2020-11-30 01:12:36,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 42 transitions. [2020-11-30 01:12:36,129 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 42 transitions. Stem has 3 letters. Loop has 1 letters. [2020-11-30 01:12:36,130 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2020-11-30 01:12:36,130 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 42 transitions. Stem has 4 letters. Loop has 1 letters. [2020-11-30 01:12:36,130 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2020-11-30 01:12:36,130 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 42 transitions. Stem has 3 letters. Loop has 2 letters. [2020-11-30 01:12:36,130 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2020-11-30 01:12:36,131 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 62 transitions. [2020-11-30 01:12:36,135 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:36,140 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 13 states and 19 transitions. [2020-11-30 01:12:36,141 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:36,141 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2020-11-30 01:12:36,142 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 19 transitions. [2020-11-30 01:12:36,142 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:36,142 INFO L691 BuchiCegarLoop]: Abstraction has 13 states and 19 transitions. [2020-11-30 01:12:36,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 19 transitions. [2020-11-30 01:12:36,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 12. [2020-11-30 01:12:36,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2020-11-30 01:12:36,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 18 transitions. [2020-11-30 01:12:36,168 INFO L714 BuchiCegarLoop]: Abstraction has 12 states and 18 transitions. [2020-11-30 01:12:36,169 INFO L594 BuchiCegarLoop]: Abstraction has 12 states and 18 transitions. [2020-11-30 01:12:36,169 INFO L427 BuchiCegarLoop]: ======== Iteration 2============ [2020-11-30 01:12:36,169 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 18 transitions. [2020-11-30 01:12:36,170 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:36,170 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:36,170 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:36,170 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2020-11-30 01:12:36,171 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:36,171 INFO L794 eck$LassoCheckResult]: Stem: 95#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 92#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 93#L26 main_~i~0 := 0; 94#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 96#L29-2 assume main_~i~0 >= 100; 97#L39 [2020-11-30 01:12:36,171 INFO L796 eck$LassoCheckResult]: Loop: 97#L39 assume true; 97#L39 [2020-11-30 01:12:36,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,172 INFO L82 PathProgramCache]: Analyzing trace with hash 28692937, now seen corresponding path program 1 times [2020-11-30 01:12:36,172 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,172 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [822122239] [2020-11-30 01:12:36,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,267 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [822122239] [2020-11-30 01:12:36,268 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-11-30 01:12:36,268 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-11-30 01:12:36,268 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637652476] [2020-11-30 01:12:36,270 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:36,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,271 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 1 times [2020-11-30 01:12:36,271 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,271 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073809229] [2020-11-30 01:12:36,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,274 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,279 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,280 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:36,293 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:36,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-11-30 01:12:36,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-11-30 01:12:36,297 INFO L87 Difference]: Start difference. First operand 12 states and 18 transitions. cyclomatic complexity: 9 Second operand 3 states. [2020-11-30 01:12:36,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:36,327 INFO L93 Difference]: Finished difference Result 18 states and 24 transitions. [2020-11-30 01:12:36,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-11-30 01:12:36,328 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 24 transitions. [2020-11-30 01:12:36,329 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2020-11-30 01:12:36,330 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 18 states and 24 transitions. [2020-11-30 01:12:36,330 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2020-11-30 01:12:36,330 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2020-11-30 01:12:36,330 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2020-11-30 01:12:36,330 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:36,330 INFO L691 BuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2020-11-30 01:12:36,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2020-11-30 01:12:36,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 13. [2020-11-30 01:12:36,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2020-11-30 01:12:36,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 19 transitions. [2020-11-30 01:12:36,333 INFO L714 BuchiCegarLoop]: Abstraction has 13 states and 19 transitions. [2020-11-30 01:12:36,333 INFO L594 BuchiCegarLoop]: Abstraction has 13 states and 19 transitions. [2020-11-30 01:12:36,333 INFO L427 BuchiCegarLoop]: ======== Iteration 3============ [2020-11-30 01:12:36,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 19 transitions. [2020-11-30 01:12:36,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:36,334 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:36,334 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:36,335 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2020-11-30 01:12:36,335 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:36,335 INFO L794 eck$LassoCheckResult]: Stem: 131#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 128#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 129#L26 main_~i~0 := 0; 130#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 138#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 139#L29-2 assume main_~i~0 >= 100; 137#L39 [2020-11-30 01:12:36,335 INFO L796 eck$LassoCheckResult]: Loop: 137#L39 assume true; 137#L39 [2020-11-30 01:12:36,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,336 INFO L82 PathProgramCache]: Analyzing trace with hash 889482740, now seen corresponding path program 1 times [2020-11-30 01:12:36,336 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,336 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288276991] [2020-11-30 01:12:36,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,381 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,382 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288276991] [2020-11-30 01:12:36,382 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [373123972] [2020-11-30 01:12:36,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:36,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,430 INFO L263 TraceCheckSpWp]: Trace formula consists of 34 conjuncts, 3 conjunts are in the unsatisfiable core [2020-11-30 01:12:36,431 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:36,473 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,474 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:36,474 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 4 [2020-11-30 01:12:36,474 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464318431] [2020-11-30 01:12:36,475 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:36,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,475 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 2 times [2020-11-30 01:12:36,475 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,476 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175235648] [2020-11-30 01:12:36,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,479 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,481 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,482 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:36,488 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:36,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-11-30 01:12:36,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2020-11-30 01:12:36,490 INFO L87 Difference]: Start difference. First operand 13 states and 19 transitions. cyclomatic complexity: 9 Second operand 5 states. [2020-11-30 01:12:36,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:36,578 INFO L93 Difference]: Finished difference Result 26 states and 35 transitions. [2020-11-30 01:12:36,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2020-11-30 01:12:36,579 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 35 transitions. [2020-11-30 01:12:36,581 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:36,582 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 35 transitions. [2020-11-30 01:12:36,583 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2020-11-30 01:12:36,583 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2020-11-30 01:12:36,583 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 35 transitions. [2020-11-30 01:12:36,583 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:36,583 INFO L691 BuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2020-11-30 01:12:36,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 35 transitions. [2020-11-30 01:12:36,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 14. [2020-11-30 01:12:36,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2020-11-30 01:12:36,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 22 transitions. [2020-11-30 01:12:36,586 INFO L714 BuchiCegarLoop]: Abstraction has 14 states and 22 transitions. [2020-11-30 01:12:36,586 INFO L594 BuchiCegarLoop]: Abstraction has 14 states and 22 transitions. [2020-11-30 01:12:36,587 INFO L427 BuchiCegarLoop]: ======== Iteration 4============ [2020-11-30 01:12:36,587 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 22 transitions. [2020-11-30 01:12:36,588 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:36,588 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:36,588 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:36,588 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:36,589 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:36,589 INFO L794 eck$LassoCheckResult]: Stem: 193#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 190#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 191#L26 main_~i~0 := 0; 192#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 194#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 195#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 198#L35-2 assume main_~j~0 >= 100; 199#L39 [2020-11-30 01:12:36,589 INFO L796 eck$LassoCheckResult]: Loop: 199#L39 assume true; 199#L39 [2020-11-30 01:12:36,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,590 INFO L82 PathProgramCache]: Analyzing trace with hash 1804112500, now seen corresponding path program 1 times [2020-11-30 01:12:36,590 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,590 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509770813] [2020-11-30 01:12:36,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,617 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509770813] [2020-11-30 01:12:36,617 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-11-30 01:12:36,617 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-11-30 01:12:36,617 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121019145] [2020-11-30 01:12:36,618 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:36,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,618 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 3 times [2020-11-30 01:12:36,619 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,619 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471718689] [2020-11-30 01:12:36,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,622 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,623 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,625 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:36,629 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:36,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-11-30 01:12:36,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-11-30 01:12:36,630 INFO L87 Difference]: Start difference. First operand 14 states and 22 transitions. cyclomatic complexity: 11 Second operand 3 states. [2020-11-30 01:12:36,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:36,655 INFO L93 Difference]: Finished difference Result 15 states and 22 transitions. [2020-11-30 01:12:36,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-11-30 01:12:36,656 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 22 transitions. [2020-11-30 01:12:36,657 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:36,657 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 12 states and 17 transitions. [2020-11-30 01:12:36,658 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:36,658 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:36,658 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2020-11-30 01:12:36,658 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:36,658 INFO L691 BuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2020-11-30 01:12:36,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2020-11-30 01:12:36,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2020-11-30 01:12:36,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2020-11-30 01:12:36,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 17 transitions. [2020-11-30 01:12:36,660 INFO L714 BuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2020-11-30 01:12:36,660 INFO L594 BuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2020-11-30 01:12:36,660 INFO L427 BuchiCegarLoop]: ======== Iteration 5============ [2020-11-30 01:12:36,661 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 17 transitions. [2020-11-30 01:12:36,664 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:36,664 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:36,664 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:36,666 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1] [2020-11-30 01:12:36,666 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:36,667 INFO L794 eck$LassoCheckResult]: Stem: 228#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 225#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 226#L26 main_~i~0 := 0; 227#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 234#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 235#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 229#L29-2 assume main_~i~0 >= 100; 230#L39 [2020-11-30 01:12:36,667 INFO L796 eck$LassoCheckResult]: Loop: 230#L39 assume true; 230#L39 [2020-11-30 01:12:36,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,668 INFO L82 PathProgramCache]: Analyzing trace with hash 1804162857, now seen corresponding path program 2 times [2020-11-30 01:12:36,668 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,668 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893618219] [2020-11-30 01:12:36,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,735 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,735 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1893618219] [2020-11-30 01:12:36,736 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [719787733] [2020-11-30 01:12:36,736 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:36,780 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:36,780 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:36,781 INFO L263 TraceCheckSpWp]: Trace formula consists of 38 conjuncts, 4 conjunts are in the unsatisfiable core [2020-11-30 01:12:36,783 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:36,803 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,804 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:36,804 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2020-11-30 01:12:36,804 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1805664817] [2020-11-30 01:12:36,805 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:36,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,805 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 4 times [2020-11-30 01:12:36,806 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,806 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060378723] [2020-11-30 01:12:36,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,821 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:36,822 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:36,837 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:36,840 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:36,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-11-30 01:12:36,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2020-11-30 01:12:36,842 INFO L87 Difference]: Start difference. First operand 12 states and 17 transitions. cyclomatic complexity: 8 Second operand 6 states. [2020-11-30 01:12:36,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:36,906 INFO L93 Difference]: Finished difference Result 26 states and 34 transitions. [2020-11-30 01:12:36,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2020-11-30 01:12:36,907 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 34 transitions. [2020-11-30 01:12:36,908 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:36,909 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 25 states and 33 transitions. [2020-11-30 01:12:36,909 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:36,909 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:36,909 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 33 transitions. [2020-11-30 01:12:36,910 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:36,910 INFO L691 BuchiCegarLoop]: Abstraction has 25 states and 33 transitions. [2020-11-30 01:12:36,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 33 transitions. [2020-11-30 01:12:36,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 13. [2020-11-30 01:12:36,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2020-11-30 01:12:36,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 19 transitions. [2020-11-30 01:12:36,912 INFO L714 BuchiCegarLoop]: Abstraction has 13 states and 19 transitions. [2020-11-30 01:12:36,912 INFO L594 BuchiCegarLoop]: Abstraction has 13 states and 19 transitions. [2020-11-30 01:12:36,912 INFO L427 BuchiCegarLoop]: ======== Iteration 6============ [2020-11-30 01:12:36,912 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 19 transitions. [2020-11-30 01:12:36,913 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:36,913 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:36,913 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:36,913 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:36,914 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:36,914 INFO L794 eck$LassoCheckResult]: Stem: 293#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 290#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 291#L26 main_~i~0 := 0; 292#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 296#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 297#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 301#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 298#L35-2 assume main_~j~0 >= 100; 295#L39 [2020-11-30 01:12:36,919 INFO L796 eck$LassoCheckResult]: Loop: 295#L39 assume true; 295#L39 [2020-11-30 01:12:36,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:36,919 INFO L82 PathProgramCache]: Analyzing trace with hash 92914363, now seen corresponding path program 1 times [2020-11-30 01:12:36,920 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:36,920 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845282809] [2020-11-30 01:12:36,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:36,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:36,952 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:36,953 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845282809] [2020-11-30 01:12:36,953 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [591991151] [2020-11-30 01:12:36,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:37,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:37,004 INFO L263 TraceCheckSpWp]: Trace formula consists of 40 conjuncts, 3 conjunts are in the unsatisfiable core [2020-11-30 01:12:37,006 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:37,018 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,018 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:37,018 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 4 [2020-11-30 01:12:37,019 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1933504725] [2020-11-30 01:12:37,019 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:37,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,019 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 5 times [2020-11-30 01:12:37,020 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,020 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023626810] [2020-11-30 01:12:37,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,022 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,023 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,024 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:37,030 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:37,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-11-30 01:12:37,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2020-11-30 01:12:37,031 INFO L87 Difference]: Start difference. First operand 13 states and 19 transitions. cyclomatic complexity: 9 Second operand 5 states. [2020-11-30 01:12:37,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:37,043 INFO L93 Difference]: Finished difference Result 15 states and 21 transitions. [2020-11-30 01:12:37,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2020-11-30 01:12:37,044 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 21 transitions. [2020-11-30 01:12:37,045 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,045 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 14 states and 20 transitions. [2020-11-30 01:12:37,045 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:37,045 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:37,045 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 20 transitions. [2020-11-30 01:12:37,046 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:37,046 INFO L691 BuchiCegarLoop]: Abstraction has 14 states and 20 transitions. [2020-11-30 01:12:37,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 20 transitions. [2020-11-30 01:12:37,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2020-11-30 01:12:37,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2020-11-30 01:12:37,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 20 transitions. [2020-11-30 01:12:37,048 INFO L714 BuchiCegarLoop]: Abstraction has 14 states and 20 transitions. [2020-11-30 01:12:37,048 INFO L594 BuchiCegarLoop]: Abstraction has 14 states and 20 transitions. [2020-11-30 01:12:37,048 INFO L427 BuchiCegarLoop]: ======== Iteration 7============ [2020-11-30 01:12:37,048 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 20 transitions. [2020-11-30 01:12:37,048 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,049 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:37,049 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:37,049 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [3, 1, 1, 1, 1, 1] [2020-11-30 01:12:37,049 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:37,049 INFO L794 eck$LassoCheckResult]: Stem: 350#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 347#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 348#L26 main_~i~0 := 0; 349#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 356#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 357#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 359#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 351#L29-2 assume main_~i~0 >= 100; 352#L39 [2020-11-30 01:12:37,049 INFO L796 eck$LassoCheckResult]: Loop: 352#L39 assume true; 352#L39 [2020-11-30 01:12:37,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,050 INFO L82 PathProgramCache]: Analyzing trace with hash 94475412, now seen corresponding path program 3 times [2020-11-30 01:12:37,050 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,050 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329469607] [2020-11-30 01:12:37,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:37,125 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,125 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329469607] [2020-11-30 01:12:37,125 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1938734614] [2020-11-30 01:12:37,126 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:37,168 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-11-30 01:12:37,169 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:37,169 INFO L263 TraceCheckSpWp]: Trace formula consists of 42 conjuncts, 5 conjunts are in the unsatisfiable core [2020-11-30 01:12:37,171 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:37,196 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,196 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:37,196 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2020-11-30 01:12:37,199 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [563655415] [2020-11-30 01:12:37,200 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:37,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,200 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 6 times [2020-11-30 01:12:37,201 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,201 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38745842] [2020-11-30 01:12:37,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,209 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,211 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,212 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:37,216 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:37,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-11-30 01:12:37,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2020-11-30 01:12:37,216 INFO L87 Difference]: Start difference. First operand 14 states and 20 transitions. cyclomatic complexity: 9 Second operand 7 states. [2020-11-30 01:12:37,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:37,280 INFO L93 Difference]: Finished difference Result 33 states and 42 transitions. [2020-11-30 01:12:37,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-11-30 01:12:37,280 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 42 transitions. [2020-11-30 01:12:37,282 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:37,282 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 32 states and 41 transitions. [2020-11-30 01:12:37,282 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:37,282 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:37,283 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 41 transitions. [2020-11-30 01:12:37,283 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:37,283 INFO L691 BuchiCegarLoop]: Abstraction has 32 states and 41 transitions. [2020-11-30 01:12:37,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 41 transitions. [2020-11-30 01:12:37,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 15. [2020-11-30 01:12:37,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2020-11-30 01:12:37,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 22 transitions. [2020-11-30 01:12:37,285 INFO L714 BuchiCegarLoop]: Abstraction has 15 states and 22 transitions. [2020-11-30 01:12:37,285 INFO L594 BuchiCegarLoop]: Abstraction has 15 states and 22 transitions. [2020-11-30 01:12:37,285 INFO L427 BuchiCegarLoop]: ======== Iteration 8============ [2020-11-30 01:12:37,285 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 22 transitions. [2020-11-30 01:12:37,286 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,286 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:37,286 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:37,286 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:37,286 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:37,286 INFO L794 eck$LassoCheckResult]: Stem: 428#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 425#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 426#L26 main_~i~0 := 0; 427#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 431#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 432#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 436#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 439#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 433#L35-2 assume main_~j~0 >= 100; 430#L39 [2020-11-30 01:12:37,286 INFO L796 eck$LassoCheckResult]: Loop: 430#L39 assume true; 430#L39 [2020-11-30 01:12:37,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,287 INFO L82 PathProgramCache]: Analyzing trace with hash -1414620332, now seen corresponding path program 2 times [2020-11-30 01:12:37,287 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,287 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513339845] [2020-11-30 01:12:37,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:37,342 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,343 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513339845] [2020-11-30 01:12:37,343 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1057165977] [2020-11-30 01:12:37,343 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:37,405 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:37,405 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:37,406 INFO L263 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 4 conjunts are in the unsatisfiable core [2020-11-30 01:12:37,408 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:37,431 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,431 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:37,431 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2020-11-30 01:12:37,432 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1458922186] [2020-11-30 01:12:37,432 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:37,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,432 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 7 times [2020-11-30 01:12:37,433 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,433 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1099175750] [2020-11-30 01:12:37,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,435 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,436 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,437 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:37,440 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:37,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-11-30 01:12:37,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2020-11-30 01:12:37,441 INFO L87 Difference]: Start difference. First operand 15 states and 22 transitions. cyclomatic complexity: 10 Second operand 6 states. [2020-11-30 01:12:37,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:37,461 INFO L93 Difference]: Finished difference Result 17 states and 24 transitions. [2020-11-30 01:12:37,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2020-11-30 01:12:37,461 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 24 transitions. [2020-11-30 01:12:37,462 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,462 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 16 states and 23 transitions. [2020-11-30 01:12:37,462 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:37,462 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:37,462 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 23 transitions. [2020-11-30 01:12:37,463 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:37,463 INFO L691 BuchiCegarLoop]: Abstraction has 16 states and 23 transitions. [2020-11-30 01:12:37,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 23 transitions. [2020-11-30 01:12:37,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2020-11-30 01:12:37,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2020-11-30 01:12:37,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 23 transitions. [2020-11-30 01:12:37,465 INFO L714 BuchiCegarLoop]: Abstraction has 16 states and 23 transitions. [2020-11-30 01:12:37,465 INFO L594 BuchiCegarLoop]: Abstraction has 16 states and 23 transitions. [2020-11-30 01:12:37,465 INFO L427 BuchiCegarLoop]: ======== Iteration 9============ [2020-11-30 01:12:37,465 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 23 transitions. [2020-11-30 01:12:37,465 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,465 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:37,465 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:37,466 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [4, 1, 1, 1, 1, 1] [2020-11-30 01:12:37,466 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:37,466 INFO L794 eck$LassoCheckResult]: Stem: 493#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 490#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 491#L26 main_~i~0 := 0; 492#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 499#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 500#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 504#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 502#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 494#L29-2 assume main_~i~0 >= 100; 495#L39 [2020-11-30 01:12:37,466 INFO L796 eck$LassoCheckResult]: Loop: 495#L39 assume true; 495#L39 [2020-11-30 01:12:37,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,467 INFO L82 PathProgramCache]: Analyzing trace with hash -1366227831, now seen corresponding path program 4 times [2020-11-30 01:12:37,467 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,467 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754525666] [2020-11-30 01:12:37,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:37,548 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,548 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754525666] [2020-11-30 01:12:37,548 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [511746259] [2020-11-30 01:12:37,548 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:37,597 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:37,597 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:37,598 INFO L263 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 6 conjunts are in the unsatisfiable core [2020-11-30 01:12:37,599 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:37,627 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,627 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:37,627 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2020-11-30 01:12:37,628 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67830077] [2020-11-30 01:12:37,628 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:37,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,628 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 8 times [2020-11-30 01:12:37,628 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,629 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651464215] [2020-11-30 01:12:37,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,639 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,640 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,641 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:37,646 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:37,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-11-30 01:12:37,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2020-11-30 01:12:37,647 INFO L87 Difference]: Start difference. First operand 16 states and 23 transitions. cyclomatic complexity: 10 Second operand 8 states. [2020-11-30 01:12:37,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:37,718 INFO L93 Difference]: Finished difference Result 41 states and 51 transitions. [2020-11-30 01:12:37,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2020-11-30 01:12:37,720 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 51 transitions. [2020-11-30 01:12:37,721 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:37,722 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 40 states and 50 transitions. [2020-11-30 01:12:37,722 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:37,722 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:37,722 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 50 transitions. [2020-11-30 01:12:37,723 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:37,723 INFO L691 BuchiCegarLoop]: Abstraction has 40 states and 50 transitions. [2020-11-30 01:12:37,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 50 transitions. [2020-11-30 01:12:37,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 17. [2020-11-30 01:12:37,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2020-11-30 01:12:37,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 25 transitions. [2020-11-30 01:12:37,725 INFO L714 BuchiCegarLoop]: Abstraction has 17 states and 25 transitions. [2020-11-30 01:12:37,725 INFO L594 BuchiCegarLoop]: Abstraction has 17 states and 25 transitions. [2020-11-30 01:12:37,725 INFO L427 BuchiCegarLoop]: ======== Iteration 10============ [2020-11-30 01:12:37,725 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 25 transitions. [2020-11-30 01:12:37,726 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,726 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:37,726 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:37,726 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [3, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:37,726 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:37,727 INFO L794 eck$LassoCheckResult]: Stem: 585#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 582#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 583#L26 main_~i~0 := 0; 584#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 588#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 589#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 593#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 598#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 597#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 590#L35-2 assume main_~j~0 >= 100; 587#L39 [2020-11-30 01:12:37,727 INFO L796 eck$LassoCheckResult]: Loop: 587#L39 assume true; 587#L39 [2020-11-30 01:12:37,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,727 INFO L82 PathProgramCache]: Analyzing trace with hash -903555621, now seen corresponding path program 3 times [2020-11-30 01:12:37,727 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,728 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164514720] [2020-11-30 01:12:37,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:37,792 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,793 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164514720] [2020-11-30 01:12:37,793 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1673441996] [2020-11-30 01:12:37,793 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:37,838 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-11-30 01:12:37,838 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:37,839 INFO L263 TraceCheckSpWp]: Trace formula consists of 52 conjuncts, 5 conjunts are in the unsatisfiable core [2020-11-30 01:12:37,840 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:37,857 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,860 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:37,860 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2020-11-30 01:12:37,860 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76774362] [2020-11-30 01:12:37,861 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:37,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,861 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 9 times [2020-11-30 01:12:37,861 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,861 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956444679] [2020-11-30 01:12:37,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,863 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:37,864 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:37,865 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:37,872 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:37,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-11-30 01:12:37,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2020-11-30 01:12:37,873 INFO L87 Difference]: Start difference. First operand 17 states and 25 transitions. cyclomatic complexity: 11 Second operand 7 states. [2020-11-30 01:12:37,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:37,906 INFO L93 Difference]: Finished difference Result 19 states and 27 transitions. [2020-11-30 01:12:37,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-11-30 01:12:37,907 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 27 transitions. [2020-11-30 01:12:37,907 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,908 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 26 transitions. [2020-11-30 01:12:37,908 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:37,908 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:37,908 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 26 transitions. [2020-11-30 01:12:37,908 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:37,908 INFO L691 BuchiCegarLoop]: Abstraction has 18 states and 26 transitions. [2020-11-30 01:12:37,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 26 transitions. [2020-11-30 01:12:37,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2020-11-30 01:12:37,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2020-11-30 01:12:37,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 26 transitions. [2020-11-30 01:12:37,910 INFO L714 BuchiCegarLoop]: Abstraction has 18 states and 26 transitions. [2020-11-30 01:12:37,911 INFO L594 BuchiCegarLoop]: Abstraction has 18 states and 26 transitions. [2020-11-30 01:12:37,911 INFO L427 BuchiCegarLoop]: ======== Iteration 11============ [2020-11-30 01:12:37,911 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 26 transitions. [2020-11-30 01:12:37,911 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:37,911 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:37,911 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:37,911 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [5, 1, 1, 1, 1, 1] [2020-11-30 01:12:37,912 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:37,912 INFO L794 eck$LassoCheckResult]: Stem: 658#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 655#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 656#L26 main_~i~0 := 0; 657#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 664#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 665#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 671#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 669#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 667#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 659#L29-2 assume main_~i~0 >= 100; 660#L39 [2020-11-30 01:12:37,912 INFO L796 eck$LassoCheckResult]: Loop: 660#L39 assume true; 660#L39 [2020-11-30 01:12:37,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:37,912 INFO L82 PathProgramCache]: Analyzing trace with hash 596611892, now seen corresponding path program 5 times [2020-11-30 01:12:37,912 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:37,912 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445130215] [2020-11-30 01:12:37,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:37,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:37,977 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:37,978 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445130215] [2020-11-30 01:12:37,978 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [599660503] [2020-11-30 01:12:37,978 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:38,024 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-11-30 01:12:38,024 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:38,025 INFO L263 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 7 conjunts are in the unsatisfiable core [2020-11-30 01:12:38,026 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:38,060 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,060 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:38,060 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2020-11-30 01:12:38,061 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747623761] [2020-11-30 01:12:38,061 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:38,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,061 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 10 times [2020-11-30 01:12:38,062 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,062 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1815270389] [2020-11-30 01:12:38,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,064 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,065 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,074 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:38,078 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:38,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-11-30 01:12:38,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2020-11-30 01:12:38,079 INFO L87 Difference]: Start difference. First operand 18 states and 26 transitions. cyclomatic complexity: 11 Second operand 9 states. [2020-11-30 01:12:38,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:38,169 INFO L93 Difference]: Finished difference Result 50 states and 61 transitions. [2020-11-30 01:12:38,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2020-11-30 01:12:38,171 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 50 states and 61 transitions. [2020-11-30 01:12:38,172 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:38,173 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 50 states to 49 states and 60 transitions. [2020-11-30 01:12:38,173 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:38,173 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:38,173 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 60 transitions. [2020-11-30 01:12:38,174 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:38,174 INFO L691 BuchiCegarLoop]: Abstraction has 49 states and 60 transitions. [2020-11-30 01:12:38,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 60 transitions. [2020-11-30 01:12:38,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 19. [2020-11-30 01:12:38,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2020-11-30 01:12:38,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 28 transitions. [2020-11-30 01:12:38,176 INFO L714 BuchiCegarLoop]: Abstraction has 19 states and 28 transitions. [2020-11-30 01:12:38,176 INFO L594 BuchiCegarLoop]: Abstraction has 19 states and 28 transitions. [2020-11-30 01:12:38,176 INFO L427 BuchiCegarLoop]: ======== Iteration 12============ [2020-11-30 01:12:38,176 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 28 transitions. [2020-11-30 01:12:38,177 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:38,177 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:38,177 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:38,177 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [4, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:38,177 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:38,177 INFO L794 eck$LassoCheckResult]: Stem: 765#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 762#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 763#L26 main_~i~0 := 0; 764#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 768#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 769#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 773#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 780#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 779#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 778#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 770#L35-2 assume main_~j~0 >= 100; 767#L39 [2020-11-30 01:12:38,177 INFO L796 eck$LassoCheckResult]: Loop: 767#L39 assume true; 767#L39 [2020-11-30 01:12:38,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,178 INFO L82 PathProgramCache]: Analyzing trace with hash 2054548532, now seen corresponding path program 4 times [2020-11-30 01:12:38,178 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,178 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10173826] [2020-11-30 01:12:38,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:38,251 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,251 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10173826] [2020-11-30 01:12:38,251 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [274226075] [2020-11-30 01:12:38,251 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:38,295 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:38,295 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:38,296 INFO L263 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 6 conjunts are in the unsatisfiable core [2020-11-30 01:12:38,297 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:38,330 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,334 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:38,334 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2020-11-30 01:12:38,335 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271025494] [2020-11-30 01:12:38,336 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:38,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,337 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 11 times [2020-11-30 01:12:38,337 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,337 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96124192] [2020-11-30 01:12:38,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,340 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,344 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,345 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:38,354 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:38,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-11-30 01:12:38,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2020-11-30 01:12:38,355 INFO L87 Difference]: Start difference. First operand 19 states and 28 transitions. cyclomatic complexity: 12 Second operand 8 states. [2020-11-30 01:12:38,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:38,376 INFO L93 Difference]: Finished difference Result 21 states and 30 transitions. [2020-11-30 01:12:38,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2020-11-30 01:12:38,377 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 30 transitions. [2020-11-30 01:12:38,378 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:38,378 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 20 states and 29 transitions. [2020-11-30 01:12:38,378 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:38,378 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:38,378 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 29 transitions. [2020-11-30 01:12:38,379 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:38,379 INFO L691 BuchiCegarLoop]: Abstraction has 20 states and 29 transitions. [2020-11-30 01:12:38,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 29 transitions. [2020-11-30 01:12:38,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2020-11-30 01:12:38,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2020-11-30 01:12:38,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 29 transitions. [2020-11-30 01:12:38,381 INFO L714 BuchiCegarLoop]: Abstraction has 20 states and 29 transitions. [2020-11-30 01:12:38,381 INFO L594 BuchiCegarLoop]: Abstraction has 20 states and 29 transitions. [2020-11-30 01:12:38,381 INFO L427 BuchiCegarLoop]: ======== Iteration 13============ [2020-11-30 01:12:38,381 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 29 transitions. [2020-11-30 01:12:38,381 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:38,381 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:38,381 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:38,382 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [6, 1, 1, 1, 1, 1] [2020-11-30 01:12:38,382 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:38,382 INFO L794 eck$LassoCheckResult]: Stem: 846#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 843#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 844#L26 main_~i~0 := 0; 845#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 852#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 853#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 861#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 859#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 857#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 855#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 847#L29-2 assume main_~i~0 >= 100; 848#L39 [2020-11-30 01:12:38,382 INFO L796 eck$LassoCheckResult]: Loop: 848#L39 assume true; 848#L39 [2020-11-30 01:12:38,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,383 INFO L82 PathProgramCache]: Analyzing trace with hash 1315101161, now seen corresponding path program 6 times [2020-11-30 01:12:38,383 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,383 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268060679] [2020-11-30 01:12:38,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:38,489 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,489 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268060679] [2020-11-30 01:12:38,489 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2131544349] [2020-11-30 01:12:38,489 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:38,546 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-11-30 01:12:38,546 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:38,547 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 8 conjunts are in the unsatisfiable core [2020-11-30 01:12:38,548 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:38,572 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,572 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:38,572 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2020-11-30 01:12:38,573 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582366113] [2020-11-30 01:12:38,573 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:38,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,574 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 12 times [2020-11-30 01:12:38,574 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,574 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201656142] [2020-11-30 01:12:38,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,576 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,577 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,578 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:38,581 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:38,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-11-30 01:12:38,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2020-11-30 01:12:38,582 INFO L87 Difference]: Start difference. First operand 20 states and 29 transitions. cyclomatic complexity: 12 Second operand 10 states. [2020-11-30 01:12:38,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:38,673 INFO L93 Difference]: Finished difference Result 60 states and 72 transitions. [2020-11-30 01:12:38,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2020-11-30 01:12:38,674 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 60 states and 72 transitions. [2020-11-30 01:12:38,675 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:38,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 60 states to 59 states and 71 transitions. [2020-11-30 01:12:38,676 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:38,676 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:38,676 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59 states and 71 transitions. [2020-11-30 01:12:38,676 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:38,676 INFO L691 BuchiCegarLoop]: Abstraction has 59 states and 71 transitions. [2020-11-30 01:12:38,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states and 71 transitions. [2020-11-30 01:12:38,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 21. [2020-11-30 01:12:38,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2020-11-30 01:12:38,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 31 transitions. [2020-11-30 01:12:38,679 INFO L714 BuchiCegarLoop]: Abstraction has 21 states and 31 transitions. [2020-11-30 01:12:38,679 INFO L594 BuchiCegarLoop]: Abstraction has 21 states and 31 transitions. [2020-11-30 01:12:38,679 INFO L427 BuchiCegarLoop]: ======== Iteration 14============ [2020-11-30 01:12:38,679 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 31 transitions. [2020-11-30 01:12:38,679 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:38,680 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:38,680 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:38,680 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [5, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:38,680 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:38,680 INFO L794 eck$LassoCheckResult]: Stem: 969#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 966#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 967#L26 main_~i~0 := 0; 968#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 972#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 973#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 977#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 986#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 985#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 984#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 983#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 974#L35-2 assume main_~j~0 >= 100; 971#L39 [2020-11-30 01:12:38,680 INFO L796 eck$LassoCheckResult]: Loop: 971#L39 assume true; 971#L39 [2020-11-30 01:12:38,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,681 INFO L82 PathProgramCache]: Analyzing trace with hash -733503237, now seen corresponding path program 5 times [2020-11-30 01:12:38,681 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,681 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834823403] [2020-11-30 01:12:38,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:38,751 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,751 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834823403] [2020-11-30 01:12:38,751 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1843002432] [2020-11-30 01:12:38,751 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:38,800 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-11-30 01:12:38,800 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:38,801 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2020-11-30 01:12:38,802 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:38,820 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,821 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:38,821 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2020-11-30 01:12:38,821 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522915794] [2020-11-30 01:12:38,822 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:38,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,822 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 13 times [2020-11-30 01:12:38,822 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,822 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229620320] [2020-11-30 01:12:38,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,824 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:38,825 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:38,826 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:38,829 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:38,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-11-30 01:12:38,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2020-11-30 01:12:38,830 INFO L87 Difference]: Start difference. First operand 21 states and 31 transitions. cyclomatic complexity: 13 Second operand 9 states. [2020-11-30 01:12:38,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:38,848 INFO L93 Difference]: Finished difference Result 23 states and 33 transitions. [2020-11-30 01:12:38,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2020-11-30 01:12:38,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 33 transitions. [2020-11-30 01:12:38,849 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:38,849 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 22 states and 32 transitions. [2020-11-30 01:12:38,850 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:38,850 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:38,850 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 32 transitions. [2020-11-30 01:12:38,850 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:38,850 INFO L691 BuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2020-11-30 01:12:38,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 32 transitions. [2020-11-30 01:12:38,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2020-11-30 01:12:38,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2020-11-30 01:12:38,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 32 transitions. [2020-11-30 01:12:38,852 INFO L714 BuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2020-11-30 01:12:38,852 INFO L594 BuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2020-11-30 01:12:38,852 INFO L427 BuchiCegarLoop]: ======== Iteration 15============ [2020-11-30 01:12:38,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 32 transitions. [2020-11-30 01:12:38,852 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:38,852 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:38,852 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:38,853 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [7, 1, 1, 1, 1, 1] [2020-11-30 01:12:38,853 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:38,853 INFO L794 eck$LassoCheckResult]: Stem: 1058#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 1055#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 1056#L26 main_~i~0 := 0; 1057#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1064#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1065#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1075#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1073#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1071#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1069#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1067#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 1059#L29-2 assume main_~i~0 >= 100; 1060#L39 [2020-11-30 01:12:38,853 INFO L796 eck$LassoCheckResult]: Loop: 1060#L39 assume true; 1060#L39 [2020-11-30 01:12:38,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:38,853 INFO L82 PathProgramCache]: Analyzing trace with hash 2113432020, now seen corresponding path program 7 times [2020-11-30 01:12:38,854 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:38,854 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579774705] [2020-11-30 01:12:38,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:38,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:38,951 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:38,952 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579774705] [2020-11-30 01:12:38,952 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1120136827] [2020-11-30 01:12:38,952 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:38,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:38,985 INFO L263 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 9 conjunts are in the unsatisfiable core [2020-11-30 01:12:38,985 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:39,010 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:39,010 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:39,010 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2020-11-30 01:12:39,010 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127720317] [2020-11-30 01:12:39,011 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:39,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:39,011 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 14 times [2020-11-30 01:12:39,011 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:39,011 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495876235] [2020-11-30 01:12:39,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:39,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:39,013 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:39,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:39,014 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:39,015 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:39,023 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:39,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-11-30 01:12:39,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2020-11-30 01:12:39,026 INFO L87 Difference]: Start difference. First operand 22 states and 32 transitions. cyclomatic complexity: 13 Second operand 11 states. [2020-11-30 01:12:39,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:39,156 INFO L93 Difference]: Finished difference Result 71 states and 84 transitions. [2020-11-30 01:12:39,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2020-11-30 01:12:39,158 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 84 transitions. [2020-11-30 01:12:39,159 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:39,159 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 70 states and 83 transitions. [2020-11-30 01:12:39,160 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:39,160 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:39,160 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 83 transitions. [2020-11-30 01:12:39,160 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:39,160 INFO L691 BuchiCegarLoop]: Abstraction has 70 states and 83 transitions. [2020-11-30 01:12:39,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 83 transitions. [2020-11-30 01:12:39,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 23. [2020-11-30 01:12:39,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2020-11-30 01:12:39,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 34 transitions. [2020-11-30 01:12:39,164 INFO L714 BuchiCegarLoop]: Abstraction has 23 states and 34 transitions. [2020-11-30 01:12:39,164 INFO L594 BuchiCegarLoop]: Abstraction has 23 states and 34 transitions. [2020-11-30 01:12:39,164 INFO L427 BuchiCegarLoop]: ======== Iteration 16============ [2020-11-30 01:12:39,164 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 34 transitions. [2020-11-30 01:12:39,164 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:39,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:39,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:39,165 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [6, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:39,165 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:39,165 INFO L794 eck$LassoCheckResult]: Stem: 1198#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 1195#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 1196#L26 main_~i~0 := 0; 1197#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 1201#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 1202#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1206#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1217#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1216#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1215#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1214#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1213#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 1203#L35-2 assume main_~j~0 >= 100; 1200#L39 [2020-11-30 01:12:39,165 INFO L796 eck$LassoCheckResult]: Loop: 1200#L39 assume true; 1200#L39 [2020-11-30 01:12:39,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:39,166 INFO L82 PathProgramCache]: Analyzing trace with hash -1263762156, now seen corresponding path program 6 times [2020-11-30 01:12:39,166 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:39,166 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956381038] [2020-11-30 01:12:39,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:39,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:39,282 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:39,282 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956381038] [2020-11-30 01:12:39,282 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [916334089] [2020-11-30 01:12:39,283 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:39,336 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-11-30 01:12:39,336 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:39,337 INFO L263 TraceCheckSpWp]: Trace formula consists of 70 conjuncts, 8 conjunts are in the unsatisfiable core [2020-11-30 01:12:39,339 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:39,372 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:39,380 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:39,380 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2020-11-30 01:12:39,381 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947740229] [2020-11-30 01:12:39,381 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:39,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:39,382 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 15 times [2020-11-30 01:12:39,383 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:39,383 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704440537] [2020-11-30 01:12:39,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:39,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:39,388 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:39,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:39,390 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:39,394 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:39,401 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:39,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-11-30 01:12:39,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2020-11-30 01:12:39,402 INFO L87 Difference]: Start difference. First operand 23 states and 34 transitions. cyclomatic complexity: 14 Second operand 10 states. [2020-11-30 01:12:39,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:39,437 INFO L93 Difference]: Finished difference Result 25 states and 36 transitions. [2020-11-30 01:12:39,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2020-11-30 01:12:39,438 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 36 transitions. [2020-11-30 01:12:39,439 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:39,439 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 24 states and 35 transitions. [2020-11-30 01:12:39,440 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:39,440 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:39,440 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 35 transitions. [2020-11-30 01:12:39,440 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:39,440 INFO L691 BuchiCegarLoop]: Abstraction has 24 states and 35 transitions. [2020-11-30 01:12:39,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 35 transitions. [2020-11-30 01:12:39,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2020-11-30 01:12:39,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2020-11-30 01:12:39,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 35 transitions. [2020-11-30 01:12:39,443 INFO L714 BuchiCegarLoop]: Abstraction has 24 states and 35 transitions. [2020-11-30 01:12:39,443 INFO L594 BuchiCegarLoop]: Abstraction has 24 states and 35 transitions. [2020-11-30 01:12:39,443 INFO L427 BuchiCegarLoop]: ======== Iteration 17============ [2020-11-30 01:12:39,443 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 35 transitions. [2020-11-30 01:12:39,443 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:39,443 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:39,443 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:39,444 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [8, 1, 1, 1, 1, 1] [2020-11-30 01:12:39,444 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:39,444 INFO L794 eck$LassoCheckResult]: Stem: 1295#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 1292#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 1293#L26 main_~i~0 := 0; 1294#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1301#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1302#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1314#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1312#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1310#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1308#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1306#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1304#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 1296#L29-2 assume main_~i~0 >= 100; 1297#L39 [2020-11-30 01:12:39,444 INFO L796 eck$LassoCheckResult]: Loop: 1297#L39 assume true; 1297#L39 [2020-11-30 01:12:39,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:39,445 INFO L82 PathProgramCache]: Analyzing trace with hash 1091884873, now seen corresponding path program 8 times [2020-11-30 01:12:39,445 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:39,445 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089965632] [2020-11-30 01:12:39,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:39,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:39,575 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:39,576 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089965632] [2020-11-30 01:12:39,576 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [638394262] [2020-11-30 01:12:39,576 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:39,628 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:39,628 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:39,629 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 10 conjunts are in the unsatisfiable core [2020-11-30 01:12:39,631 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:39,665 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:39,671 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:39,671 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2020-11-30 01:12:39,671 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1608424655] [2020-11-30 01:12:39,672 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:39,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:39,672 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 16 times [2020-11-30 01:12:39,673 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:39,673 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863496776] [2020-11-30 01:12:39,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:39,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:39,676 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:39,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:39,678 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:39,680 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:39,684 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:39,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-11-30 01:12:39,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2020-11-30 01:12:39,685 INFO L87 Difference]: Start difference. First operand 24 states and 35 transitions. cyclomatic complexity: 14 Second operand 12 states. [2020-11-30 01:12:39,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:39,830 INFO L93 Difference]: Finished difference Result 83 states and 97 transitions. [2020-11-30 01:12:39,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2020-11-30 01:12:39,831 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 97 transitions. [2020-11-30 01:12:39,832 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:39,833 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 82 states and 96 transitions. [2020-11-30 01:12:39,833 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:39,833 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:39,833 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 96 transitions. [2020-11-30 01:12:39,834 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:39,834 INFO L691 BuchiCegarLoop]: Abstraction has 82 states and 96 transitions. [2020-11-30 01:12:39,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 96 transitions. [2020-11-30 01:12:39,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 25. [2020-11-30 01:12:39,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2020-11-30 01:12:39,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 37 transitions. [2020-11-30 01:12:39,840 INFO L714 BuchiCegarLoop]: Abstraction has 25 states and 37 transitions. [2020-11-30 01:12:39,840 INFO L594 BuchiCegarLoop]: Abstraction has 25 states and 37 transitions. [2020-11-30 01:12:39,840 INFO L427 BuchiCegarLoop]: ======== Iteration 18============ [2020-11-30 01:12:39,841 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 37 transitions. [2020-11-30 01:12:39,841 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:39,841 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:39,841 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:39,843 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [7, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:39,843 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:39,845 INFO L794 eck$LassoCheckResult]: Stem: 1453#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 1450#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 1451#L26 main_~i~0 := 0; 1452#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 1456#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 1457#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1461#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1474#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1473#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1472#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1471#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1470#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1469#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 1458#L35-2 assume main_~j~0 >= 100; 1455#L39 [2020-11-30 01:12:39,845 INFO L796 eck$LassoCheckResult]: Loop: 1455#L39 assume true; 1455#L39 [2020-11-30 01:12:39,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:39,846 INFO L82 PathProgramCache]: Analyzing trace with hash -521919461, now seen corresponding path program 7 times [2020-11-30 01:12:39,846 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:39,846 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863518319] [2020-11-30 01:12:39,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:39,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:39,955 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:39,955 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1863518319] [2020-11-30 01:12:39,956 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [272668306] [2020-11-30 01:12:39,956 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:40,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:40,006 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 9 conjunts are in the unsatisfiable core [2020-11-30 01:12:40,008 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:40,048 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:40,049 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:40,049 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2020-11-30 01:12:40,050 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [784410671] [2020-11-30 01:12:40,051 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:40,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:40,052 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 17 times [2020-11-30 01:12:40,052 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:40,052 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966506076] [2020-11-30 01:12:40,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:40,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:40,054 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:40,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:40,056 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:40,059 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:40,069 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:40,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-11-30 01:12:40,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2020-11-30 01:12:40,070 INFO L87 Difference]: Start difference. First operand 25 states and 37 transitions. cyclomatic complexity: 15 Second operand 11 states. [2020-11-30 01:12:40,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:40,104 INFO L93 Difference]: Finished difference Result 27 states and 39 transitions. [2020-11-30 01:12:40,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2020-11-30 01:12:40,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 39 transitions. [2020-11-30 01:12:40,105 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:40,106 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 26 states and 38 transitions. [2020-11-30 01:12:40,106 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:40,106 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:40,106 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 38 transitions. [2020-11-30 01:12:40,106 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:40,106 INFO L691 BuchiCegarLoop]: Abstraction has 26 states and 38 transitions. [2020-11-30 01:12:40,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 38 transitions. [2020-11-30 01:12:40,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2020-11-30 01:12:40,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2020-11-30 01:12:40,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 38 transitions. [2020-11-30 01:12:40,109 INFO L714 BuchiCegarLoop]: Abstraction has 26 states and 38 transitions. [2020-11-30 01:12:40,109 INFO L594 BuchiCegarLoop]: Abstraction has 26 states and 38 transitions. [2020-11-30 01:12:40,109 INFO L427 BuchiCegarLoop]: ======== Iteration 19============ [2020-11-30 01:12:40,109 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 38 transitions. [2020-11-30 01:12:40,112 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:40,112 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:40,112 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:40,112 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [9, 1, 1, 1, 1, 1] [2020-11-30 01:12:40,113 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:40,114 INFO L794 eck$LassoCheckResult]: Stem: 1558#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 1555#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 1556#L26 main_~i~0 := 0; 1557#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1564#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1565#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1577#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1575#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1573#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1571#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1569#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1567#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 1559#L29-2 assume main_~i~0 >= 100; 1560#L39 [2020-11-30 01:12:40,114 INFO L796 eck$LassoCheckResult]: Loop: 1560#L39 assume true; 1560#L39 [2020-11-30 01:12:40,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:40,115 INFO L82 PathProgramCache]: Analyzing trace with hash -511305612, now seen corresponding path program 9 times [2020-11-30 01:12:40,115 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:40,115 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541579516] [2020-11-30 01:12:40,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:40,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:40,271 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:40,271 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541579516] [2020-11-30 01:12:40,272 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1380765652] [2020-11-30 01:12:40,272 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:40,319 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2020-11-30 01:12:40,320 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:40,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 66 conjuncts, 11 conjunts are in the unsatisfiable core [2020-11-30 01:12:40,322 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:40,360 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:40,361 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:40,361 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2020-11-30 01:12:40,361 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466068010] [2020-11-30 01:12:40,367 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:40,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:40,368 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 18 times [2020-11-30 01:12:40,368 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:40,371 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366270441] [2020-11-30 01:12:40,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:40,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:40,373 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:40,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:40,374 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:40,376 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:40,384 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:40,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-11-30 01:12:40,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2020-11-30 01:12:40,385 INFO L87 Difference]: Start difference. First operand 26 states and 38 transitions. cyclomatic complexity: 15 Second operand 13 states. [2020-11-30 01:12:40,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:40,537 INFO L93 Difference]: Finished difference Result 96 states and 111 transitions. [2020-11-30 01:12:40,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-11-30 01:12:40,538 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 111 transitions. [2020-11-30 01:12:40,540 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:40,541 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 95 states and 110 transitions. [2020-11-30 01:12:40,541 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:40,541 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:40,541 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 110 transitions. [2020-11-30 01:12:40,542 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:40,542 INFO L691 BuchiCegarLoop]: Abstraction has 95 states and 110 transitions. [2020-11-30 01:12:40,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 110 transitions. [2020-11-30 01:12:40,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 27. [2020-11-30 01:12:40,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2020-11-30 01:12:40,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 40 transitions. [2020-11-30 01:12:40,545 INFO L714 BuchiCegarLoop]: Abstraction has 27 states and 40 transitions. [2020-11-30 01:12:40,545 INFO L594 BuchiCegarLoop]: Abstraction has 27 states and 40 transitions. [2020-11-30 01:12:40,545 INFO L427 BuchiCegarLoop]: ======== Iteration 20============ [2020-11-30 01:12:40,545 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 40 transitions. [2020-11-30 01:12:40,546 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:40,546 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:40,546 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:40,547 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [8, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:40,547 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:40,547 INFO L794 eck$LassoCheckResult]: Stem: 1735#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 1732#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 1733#L26 main_~i~0 := 0; 1734#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 1738#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 1739#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1743#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1758#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1757#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1756#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1755#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1754#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1753#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 1752#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 1740#L35-2 assume main_~j~0 >= 100; 1737#L39 [2020-11-30 01:12:40,547 INFO L796 eck$LassoCheckResult]: Loop: 1737#L39 assume true; 1737#L39 [2020-11-30 01:12:40,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:40,548 INFO L82 PathProgramCache]: Analyzing trace with hash 1000367604, now seen corresponding path program 8 times [2020-11-30 01:12:40,548 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:40,548 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29114328] [2020-11-30 01:12:40,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:40,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:40,700 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:40,700 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [29114328] [2020-11-30 01:12:40,700 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [51232238] [2020-11-30 01:12:40,700 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:40,761 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:40,761 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:40,762 INFO L263 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 10 conjunts are in the unsatisfiable core [2020-11-30 01:12:40,764 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:40,796 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:40,797 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:40,797 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2020-11-30 01:12:40,797 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [586898208] [2020-11-30 01:12:40,798 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:40,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:40,798 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 19 times [2020-11-30 01:12:40,798 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:40,799 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165027965] [2020-11-30 01:12:40,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:40,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:40,805 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:40,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:40,810 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:40,811 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:40,815 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:40,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-11-30 01:12:40,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2020-11-30 01:12:40,816 INFO L87 Difference]: Start difference. First operand 27 states and 40 transitions. cyclomatic complexity: 16 Second operand 12 states. [2020-11-30 01:12:40,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:40,851 INFO L93 Difference]: Finished difference Result 29 states and 42 transitions. [2020-11-30 01:12:40,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2020-11-30 01:12:40,852 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 42 transitions. [2020-11-30 01:12:40,853 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:40,853 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 28 states and 41 transitions. [2020-11-30 01:12:40,853 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:40,854 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:40,854 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 41 transitions. [2020-11-30 01:12:40,854 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:40,854 INFO L691 BuchiCegarLoop]: Abstraction has 28 states and 41 transitions. [2020-11-30 01:12:40,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 41 transitions. [2020-11-30 01:12:40,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2020-11-30 01:12:40,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2020-11-30 01:12:40,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 41 transitions. [2020-11-30 01:12:40,856 INFO L714 BuchiCegarLoop]: Abstraction has 28 states and 41 transitions. [2020-11-30 01:12:40,856 INFO L594 BuchiCegarLoop]: Abstraction has 28 states and 41 transitions. [2020-11-30 01:12:40,857 INFO L427 BuchiCegarLoop]: ======== Iteration 21============ [2020-11-30 01:12:40,857 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 41 transitions. [2020-11-30 01:12:40,857 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:40,857 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:40,857 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:40,858 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [10, 1, 1, 1, 1, 1] [2020-11-30 01:12:40,858 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:40,858 INFO L794 eck$LassoCheckResult]: Stem: 1848#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 1845#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 1846#L26 main_~i~0 := 0; 1847#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1854#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1855#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1871#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1869#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1867#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1865#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1863#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1861#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1859#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 1857#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 1849#L29-2 assume main_~i~0 >= 100; 1850#L39 [2020-11-30 01:12:40,858 INFO L796 eck$LassoCheckResult]: Loop: 1850#L39 assume true; 1850#L39 [2020-11-30 01:12:40,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:40,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1329396905, now seen corresponding path program 10 times [2020-11-30 01:12:40,859 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:40,859 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995595652] [2020-11-30 01:12:40,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:40,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:41,039 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:41,039 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995595652] [2020-11-30 01:12:41,039 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [442173509] [2020-11-30 01:12:41,039 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:41,100 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:41,100 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:41,101 INFO L263 TraceCheckSpWp]: Trace formula consists of 70 conjuncts, 12 conjunts are in the unsatisfiable core [2020-11-30 01:12:41,112 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:41,143 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:41,144 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:41,144 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2020-11-30 01:12:41,145 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102422986] [2020-11-30 01:12:41,148 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:41,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:41,149 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 20 times [2020-11-30 01:12:41,149 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:41,149 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266980446] [2020-11-30 01:12:41,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:41,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:41,152 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:41,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:41,153 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:41,154 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:41,159 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:41,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-11-30 01:12:41,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2020-11-30 01:12:41,160 INFO L87 Difference]: Start difference. First operand 28 states and 41 transitions. cyclomatic complexity: 16 Second operand 14 states. [2020-11-30 01:12:41,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:41,332 INFO L93 Difference]: Finished difference Result 110 states and 126 transitions. [2020-11-30 01:12:41,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-11-30 01:12:41,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 110 states and 126 transitions. [2020-11-30 01:12:41,335 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:41,336 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 110 states to 109 states and 125 transitions. [2020-11-30 01:12:41,337 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:41,337 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:41,337 INFO L73 IsDeterministic]: Start isDeterministic. Operand 109 states and 125 transitions. [2020-11-30 01:12:41,338 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:41,338 INFO L691 BuchiCegarLoop]: Abstraction has 109 states and 125 transitions. [2020-11-30 01:12:41,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states and 125 transitions. [2020-11-30 01:12:41,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 29. [2020-11-30 01:12:41,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2020-11-30 01:12:41,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 43 transitions. [2020-11-30 01:12:41,342 INFO L714 BuchiCegarLoop]: Abstraction has 29 states and 43 transitions. [2020-11-30 01:12:41,342 INFO L594 BuchiCegarLoop]: Abstraction has 29 states and 43 transitions. [2020-11-30 01:12:41,342 INFO L427 BuchiCegarLoop]: ======== Iteration 22============ [2020-11-30 01:12:41,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 43 transitions. [2020-11-30 01:12:41,343 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:41,343 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:41,343 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:41,344 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [9, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:41,344 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:41,344 INFO L794 eck$LassoCheckResult]: Stem: 2045#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 2042#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 2043#L26 main_~i~0 := 0; 2044#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 2048#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 2049#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2053#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2070#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2069#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2068#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2067#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2066#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2065#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2064#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2063#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 2050#L35-2 assume main_~j~0 >= 100; 2047#L39 [2020-11-30 01:12:41,345 INFO L796 eck$LassoCheckResult]: Loop: 2047#L39 assume true; 2047#L39 [2020-11-30 01:12:41,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:41,345 INFO L82 PathProgramCache]: Analyzing trace with hash 946626363, now seen corresponding path program 9 times [2020-11-30 01:12:41,346 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:41,346 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656189851] [2020-11-30 01:12:41,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:41,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:41,502 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:41,502 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656189851] [2020-11-30 01:12:41,502 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [71520185] [2020-11-30 01:12:41,502 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:41,558 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2020-11-30 01:12:41,558 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:41,559 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 11 conjunts are in the unsatisfiable core [2020-11-30 01:12:41,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:41,586 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:41,586 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:41,586 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2020-11-30 01:12:41,586 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370735973] [2020-11-30 01:12:41,587 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:41,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:41,587 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 21 times [2020-11-30 01:12:41,587 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:41,587 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374843683] [2020-11-30 01:12:41,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:41,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:41,589 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:41,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:41,590 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:41,591 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:41,602 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:41,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-11-30 01:12:41,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2020-11-30 01:12:41,603 INFO L87 Difference]: Start difference. First operand 29 states and 43 transitions. cyclomatic complexity: 17 Second operand 13 states. [2020-11-30 01:12:41,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:41,637 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2020-11-30 01:12:41,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-11-30 01:12:41,638 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 45 transitions. [2020-11-30 01:12:41,638 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:41,639 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 30 states and 44 transitions. [2020-11-30 01:12:41,639 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:41,639 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:41,639 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 44 transitions. [2020-11-30 01:12:41,639 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:41,639 INFO L691 BuchiCegarLoop]: Abstraction has 30 states and 44 transitions. [2020-11-30 01:12:41,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 44 transitions. [2020-11-30 01:12:41,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2020-11-30 01:12:41,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2020-11-30 01:12:41,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 44 transitions. [2020-11-30 01:12:41,642 INFO L714 BuchiCegarLoop]: Abstraction has 30 states and 44 transitions. [2020-11-30 01:12:41,642 INFO L594 BuchiCegarLoop]: Abstraction has 30 states and 44 transitions. [2020-11-30 01:12:41,642 INFO L427 BuchiCegarLoop]: ======== Iteration 23============ [2020-11-30 01:12:41,642 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 44 transitions. [2020-11-30 01:12:41,642 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:41,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:41,643 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:41,643 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [11, 1, 1, 1, 1, 1] [2020-11-30 01:12:41,643 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:41,644 INFO L794 eck$LassoCheckResult]: Stem: 2166#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 2163#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 2164#L26 main_~i~0 := 0; 2165#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2172#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2173#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2191#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2189#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2187#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2185#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2183#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2181#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2179#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2177#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2175#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 2167#L29-2 assume main_~i~0 >= 100; 2168#L39 [2020-11-30 01:12:41,644 INFO L796 eck$LassoCheckResult]: Loop: 2168#L39 assume true; 2168#L39 [2020-11-30 01:12:41,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:41,644 INFO L82 PathProgramCache]: Analyzing trace with hash -1738367212, now seen corresponding path program 11 times [2020-11-30 01:12:41,644 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:41,644 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658780047] [2020-11-30 01:12:41,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:41,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:41,822 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:41,822 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658780047] [2020-11-30 01:12:41,822 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [167975144] [2020-11-30 01:12:41,822 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:41,863 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2020-11-30 01:12:41,864 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:41,865 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 13 conjunts are in the unsatisfiable core [2020-11-30 01:12:41,866 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:41,905 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:41,905 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:41,906 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2020-11-30 01:12:41,906 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263555196] [2020-11-30 01:12:41,906 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:41,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:41,907 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 22 times [2020-11-30 01:12:41,907 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:41,907 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547317890] [2020-11-30 01:12:41,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:41,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:41,910 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:41,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:41,911 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:41,912 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:41,915 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:41,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-11-30 01:12:41,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2020-11-30 01:12:41,916 INFO L87 Difference]: Start difference. First operand 30 states and 44 transitions. cyclomatic complexity: 17 Second operand 15 states. [2020-11-30 01:12:42,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:42,091 INFO L93 Difference]: Finished difference Result 125 states and 142 transitions. [2020-11-30 01:12:42,091 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2020-11-30 01:12:42,092 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 125 states and 142 transitions. [2020-11-30 01:12:42,093 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:42,095 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 125 states to 124 states and 141 transitions. [2020-11-30 01:12:42,095 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:42,095 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:42,095 INFO L73 IsDeterministic]: Start isDeterministic. Operand 124 states and 141 transitions. [2020-11-30 01:12:42,095 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:42,096 INFO L691 BuchiCegarLoop]: Abstraction has 124 states and 141 transitions. [2020-11-30 01:12:42,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states and 141 transitions. [2020-11-30 01:12:42,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 31. [2020-11-30 01:12:42,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2020-11-30 01:12:42,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 46 transitions. [2020-11-30 01:12:42,100 INFO L714 BuchiCegarLoop]: Abstraction has 31 states and 46 transitions. [2020-11-30 01:12:42,100 INFO L594 BuchiCegarLoop]: Abstraction has 31 states and 46 transitions. [2020-11-30 01:12:42,100 INFO L427 BuchiCegarLoop]: ======== Iteration 24============ [2020-11-30 01:12:42,103 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 46 transitions. [2020-11-30 01:12:42,104 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:42,104 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:42,104 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:42,108 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [10, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:42,110 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:42,110 INFO L794 eck$LassoCheckResult]: Stem: 2384#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 2381#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 2382#L26 main_~i~0 := 0; 2383#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 2387#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 2388#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2392#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2411#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2410#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2409#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2408#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2407#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2406#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2405#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2404#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2403#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 2389#L35-2 assume main_~j~0 >= 100; 2386#L39 [2020-11-30 01:12:42,110 INFO L796 eck$LassoCheckResult]: Loop: 2386#L39 assume true; 2386#L39 [2020-11-30 01:12:42,111 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:42,111 INFO L82 PathProgramCache]: Analyzing trace with hash -719352108, now seen corresponding path program 10 times [2020-11-30 01:12:42,111 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:42,111 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167966921] [2020-11-30 01:12:42,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:42,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:42,300 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:42,300 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167966921] [2020-11-30 01:12:42,300 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1320187975] [2020-11-30 01:12:42,300 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:42,367 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:42,367 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:42,369 INFO L263 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 12 conjunts are in the unsatisfiable core [2020-11-30 01:12:42,372 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:42,423 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:42,426 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:42,426 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2020-11-30 01:12:42,426 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119174032] [2020-11-30 01:12:42,427 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:42,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:42,427 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 23 times [2020-11-30 01:12:42,428 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:42,428 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1031489221] [2020-11-30 01:12:42,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:42,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:42,431 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:42,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:42,432 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:42,434 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:42,448 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:42,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-11-30 01:12:42,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2020-11-30 01:12:42,449 INFO L87 Difference]: Start difference. First operand 31 states and 46 transitions. cyclomatic complexity: 18 Second operand 14 states. [2020-11-30 01:12:42,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:42,500 INFO L93 Difference]: Finished difference Result 33 states and 48 transitions. [2020-11-30 01:12:42,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-11-30 01:12:42,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 48 transitions. [2020-11-30 01:12:42,502 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:42,502 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 32 states and 47 transitions. [2020-11-30 01:12:42,502 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:42,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:42,503 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 47 transitions. [2020-11-30 01:12:42,503 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:42,503 INFO L691 BuchiCegarLoop]: Abstraction has 32 states and 47 transitions. [2020-11-30 01:12:42,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 47 transitions. [2020-11-30 01:12:42,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2020-11-30 01:12:42,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2020-11-30 01:12:42,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 47 transitions. [2020-11-30 01:12:42,505 INFO L714 BuchiCegarLoop]: Abstraction has 32 states and 47 transitions. [2020-11-30 01:12:42,505 INFO L594 BuchiCegarLoop]: Abstraction has 32 states and 47 transitions. [2020-11-30 01:12:42,505 INFO L427 BuchiCegarLoop]: ======== Iteration 25============ [2020-11-30 01:12:42,505 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 47 transitions. [2020-11-30 01:12:42,506 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:42,506 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:42,507 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:42,508 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [12, 1, 1, 1, 1, 1] [2020-11-30 01:12:42,508 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:42,508 INFO L794 eck$LassoCheckResult]: Stem: 2513#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 2510#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 2511#L26 main_~i~0 := 0; 2512#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2519#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2520#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2540#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2538#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2536#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2534#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2532#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2530#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2528#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2526#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2524#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2522#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 2514#L29-2 assume main_~i~0 >= 100; 2515#L39 [2020-11-30 01:12:42,508 INFO L796 eck$LassoCheckResult]: Loop: 2515#L39 assume true; 2515#L39 [2020-11-30 01:12:42,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:42,509 INFO L82 PathProgramCache]: Analyzing trace with hash 1945192969, now seen corresponding path program 12 times [2020-11-30 01:12:42,509 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:42,509 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931571511] [2020-11-30 01:12:42,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:42,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:42,723 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:42,723 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931571511] [2020-11-30 01:12:42,723 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1326893325] [2020-11-30 01:12:42,723 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:42,789 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2020-11-30 01:12:42,789 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:42,791 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 14 conjunts are in the unsatisfiable core [2020-11-30 01:12:42,801 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:42,869 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:42,870 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:42,870 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2020-11-30 01:12:42,870 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1618257818] [2020-11-30 01:12:42,871 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:42,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:42,872 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 24 times [2020-11-30 01:12:42,872 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:42,872 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150029152] [2020-11-30 01:12:42,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:42,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:42,876 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:42,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:42,877 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:42,878 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:42,891 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:42,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2020-11-30 01:12:42,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2020-11-30 01:12:42,892 INFO L87 Difference]: Start difference. First operand 32 states and 47 transitions. cyclomatic complexity: 18 Second operand 16 states. [2020-11-30 01:12:43,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:43,047 INFO L93 Difference]: Finished difference Result 141 states and 159 transitions. [2020-11-30 01:12:43,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2020-11-30 01:12:43,047 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 159 transitions. [2020-11-30 01:12:43,049 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:43,051 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 140 states and 158 transitions. [2020-11-30 01:12:43,051 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:43,051 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:43,051 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 158 transitions. [2020-11-30 01:12:43,052 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:43,052 INFO L691 BuchiCegarLoop]: Abstraction has 140 states and 158 transitions. [2020-11-30 01:12:43,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 158 transitions. [2020-11-30 01:12:43,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 33. [2020-11-30 01:12:43,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2020-11-30 01:12:43,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 49 transitions. [2020-11-30 01:12:43,064 INFO L714 BuchiCegarLoop]: Abstraction has 33 states and 49 transitions. [2020-11-30 01:12:43,067 INFO L594 BuchiCegarLoop]: Abstraction has 33 states and 49 transitions. [2020-11-30 01:12:43,067 INFO L427 BuchiCegarLoop]: ======== Iteration 26============ [2020-11-30 01:12:43,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 49 transitions. [2020-11-30 01:12:43,068 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:43,068 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:43,068 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:43,069 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [11, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:43,069 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:43,069 INFO L794 eck$LassoCheckResult]: Stem: 2753#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 2750#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 2751#L26 main_~i~0 := 0; 2752#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 2756#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 2757#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2761#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2782#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2781#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2780#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2779#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2778#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2777#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2776#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2775#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2774#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 2773#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 2758#L35-2 assume main_~j~0 >= 100; 2755#L39 [2020-11-30 01:12:43,070 INFO L796 eck$LassoCheckResult]: Loop: 2755#L39 assume true; 2755#L39 [2020-11-30 01:12:43,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:43,070 INFO L82 PathProgramCache]: Analyzing trace with hash -825077157, now seen corresponding path program 11 times [2020-11-30 01:12:43,071 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:43,071 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541585699] [2020-11-30 01:12:43,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:43,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:43,292 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:43,292 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541585699] [2020-11-30 01:12:43,292 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [834886343] [2020-11-30 01:12:43,292 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:43,365 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2020-11-30 01:12:43,366 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:43,367 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 13 conjunts are in the unsatisfiable core [2020-11-30 01:12:43,368 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:43,415 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:43,416 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:43,416 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2020-11-30 01:12:43,416 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115386698] [2020-11-30 01:12:43,417 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:43,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:43,418 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 25 times [2020-11-30 01:12:43,418 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:43,418 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205590138] [2020-11-30 01:12:43,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:43,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:43,421 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:43,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:43,422 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:43,427 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:43,442 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:43,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-11-30 01:12:43,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2020-11-30 01:12:43,442 INFO L87 Difference]: Start difference. First operand 33 states and 49 transitions. cyclomatic complexity: 19 Second operand 15 states. [2020-11-30 01:12:43,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:43,490 INFO L93 Difference]: Finished difference Result 35 states and 51 transitions. [2020-11-30 01:12:43,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2020-11-30 01:12:43,490 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 51 transitions. [2020-11-30 01:12:43,491 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:43,492 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 34 states and 50 transitions. [2020-11-30 01:12:43,492 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:43,492 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:43,492 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 50 transitions. [2020-11-30 01:12:43,492 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:43,492 INFO L691 BuchiCegarLoop]: Abstraction has 34 states and 50 transitions. [2020-11-30 01:12:43,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 50 transitions. [2020-11-30 01:12:43,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2020-11-30 01:12:43,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2020-11-30 01:12:43,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 50 transitions. [2020-11-30 01:12:43,494 INFO L714 BuchiCegarLoop]: Abstraction has 34 states and 50 transitions. [2020-11-30 01:12:43,495 INFO L594 BuchiCegarLoop]: Abstraction has 34 states and 50 transitions. [2020-11-30 01:12:43,495 INFO L427 BuchiCegarLoop]: ======== Iteration 27============ [2020-11-30 01:12:43,495 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 50 transitions. [2020-11-30 01:12:43,495 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:43,495 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:43,495 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:43,496 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [13, 1, 1, 1, 1, 1] [2020-11-30 01:12:43,496 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:43,496 INFO L794 eck$LassoCheckResult]: Stem: 2890#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 2887#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 2888#L26 main_~i~0 := 0; 2889#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2896#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2897#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2919#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2917#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2915#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2913#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2911#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2909#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2907#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2905#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2903#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2901#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 2899#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 2891#L29-2 assume main_~i~0 >= 100; 2892#L39 [2020-11-30 01:12:43,496 INFO L796 eck$LassoCheckResult]: Loop: 2892#L39 assume true; 2892#L39 [2020-11-30 01:12:43,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:43,497 INFO L82 PathProgramCache]: Analyzing trace with hash 171441588, now seen corresponding path program 13 times [2020-11-30 01:12:43,497 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:43,497 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280939051] [2020-11-30 01:12:43,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:43,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:43,736 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:43,736 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280939051] [2020-11-30 01:12:43,736 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1176986519] [2020-11-30 01:12:43,737 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:43,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:43,826 INFO L263 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 15 conjunts are in the unsatisfiable core [2020-11-30 01:12:43,829 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:43,861 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:43,862 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:43,862 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2020-11-30 01:12:43,864 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215740228] [2020-11-30 01:12:43,865 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:43,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:43,866 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 26 times [2020-11-30 01:12:43,866 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:43,866 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760773086] [2020-11-30 01:12:43,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:43,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:43,869 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:43,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:43,870 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:43,877 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:43,882 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:43,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-11-30 01:12:43,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2020-11-30 01:12:43,883 INFO L87 Difference]: Start difference. First operand 34 states and 50 transitions. cyclomatic complexity: 19 Second operand 17 states. [2020-11-30 01:12:44,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:44,063 INFO L93 Difference]: Finished difference Result 158 states and 177 transitions. [2020-11-30 01:12:44,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2020-11-30 01:12:44,063 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 158 states and 177 transitions. [2020-11-30 01:12:44,065 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:44,067 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 158 states to 157 states and 176 transitions. [2020-11-30 01:12:44,067 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:44,067 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:44,067 INFO L73 IsDeterministic]: Start isDeterministic. Operand 157 states and 176 transitions. [2020-11-30 01:12:44,068 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:44,068 INFO L691 BuchiCegarLoop]: Abstraction has 157 states and 176 transitions. [2020-11-30 01:12:44,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states and 176 transitions. [2020-11-30 01:12:44,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 35. [2020-11-30 01:12:44,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2020-11-30 01:12:44,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 52 transitions. [2020-11-30 01:12:44,072 INFO L714 BuchiCegarLoop]: Abstraction has 35 states and 52 transitions. [2020-11-30 01:12:44,072 INFO L594 BuchiCegarLoop]: Abstraction has 35 states and 52 transitions. [2020-11-30 01:12:44,073 INFO L427 BuchiCegarLoop]: ======== Iteration 28============ [2020-11-30 01:12:44,073 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 52 transitions. [2020-11-30 01:12:44,074 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:44,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:44,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:44,077 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [12, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:44,077 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:44,079 INFO L794 eck$LassoCheckResult]: Stem: 3153#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 3150#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 3151#L26 main_~i~0 := 0; 3152#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 3156#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 3157#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3161#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3184#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3183#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3182#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3181#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3180#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3179#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3178#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3177#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3176#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3175#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3174#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 3158#L35-2 assume main_~j~0 >= 100; 3155#L39 [2020-11-30 01:12:44,079 INFO L796 eck$LassoCheckResult]: Loop: 3155#L39 assume true; 3155#L39 [2020-11-30 01:12:44,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:44,080 INFO L82 PathProgramCache]: Analyzing trace with hash 192413620, now seen corresponding path program 12 times [2020-11-30 01:12:44,081 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:44,081 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270593481] [2020-11-30 01:12:44,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:44,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:44,256 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:44,256 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270593481] [2020-11-30 01:12:44,256 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1573831266] [2020-11-30 01:12:44,256 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:44,311 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2020-11-30 01:12:44,311 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:44,312 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 14 conjunts are in the unsatisfiable core [2020-11-30 01:12:44,313 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:44,350 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:44,350 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:44,350 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2020-11-30 01:12:44,351 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119897512] [2020-11-30 01:12:44,351 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:44,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:44,352 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 27 times [2020-11-30 01:12:44,352 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:44,352 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627406284] [2020-11-30 01:12:44,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:44,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:44,354 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:44,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:44,355 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:44,356 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:44,360 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:44,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2020-11-30 01:12:44,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2020-11-30 01:12:44,361 INFO L87 Difference]: Start difference. First operand 35 states and 52 transitions. cyclomatic complexity: 20 Second operand 16 states. [2020-11-30 01:12:44,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:44,388 INFO L93 Difference]: Finished difference Result 37 states and 54 transitions. [2020-11-30 01:12:44,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2020-11-30 01:12:44,389 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 54 transitions. [2020-11-30 01:12:44,390 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:44,390 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 36 states and 53 transitions. [2020-11-30 01:12:44,390 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:44,390 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:44,390 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36 states and 53 transitions. [2020-11-30 01:12:44,391 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:44,391 INFO L691 BuchiCegarLoop]: Abstraction has 36 states and 53 transitions. [2020-11-30 01:12:44,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states and 53 transitions. [2020-11-30 01:12:44,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2020-11-30 01:12:44,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2020-11-30 01:12:44,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 53 transitions. [2020-11-30 01:12:44,393 INFO L714 BuchiCegarLoop]: Abstraction has 36 states and 53 transitions. [2020-11-30 01:12:44,393 INFO L594 BuchiCegarLoop]: Abstraction has 36 states and 53 transitions. [2020-11-30 01:12:44,393 INFO L427 BuchiCegarLoop]: ======== Iteration 29============ [2020-11-30 01:12:44,393 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 53 transitions. [2020-11-30 01:12:44,393 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:44,394 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:44,394 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:44,394 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [14, 1, 1, 1, 1, 1] [2020-11-30 01:12:44,394 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:44,394 INFO L794 eck$LassoCheckResult]: Stem: 3298#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 3295#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 3296#L26 main_~i~0 := 0; 3297#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3304#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3305#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3329#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3327#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3325#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3323#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3321#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3319#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3317#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3315#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3313#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3311#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3309#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3307#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 3299#L29-2 assume main_~i~0 >= 100; 3300#L39 [2020-11-30 01:12:44,395 INFO L796 eck$LassoCheckResult]: Loop: 3300#L39 assume true; 3300#L39 [2020-11-30 01:12:44,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:44,395 INFO L82 PathProgramCache]: Analyzing trace with hash 1019723625, now seen corresponding path program 14 times [2020-11-30 01:12:44,395 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:44,395 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881835978] [2020-11-30 01:12:44,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:44,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:44,602 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:44,603 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881835978] [2020-11-30 01:12:44,603 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [112009697] [2020-11-30 01:12:44,603 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:44,644 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:44,644 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:44,645 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 16 conjunts are in the unsatisfiable core [2020-11-30 01:12:44,646 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:44,674 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:44,675 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:44,675 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2020-11-30 01:12:44,675 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1921194718] [2020-11-30 01:12:44,676 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:44,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:44,676 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 28 times [2020-11-30 01:12:44,677 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:44,677 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706531331] [2020-11-30 01:12:44,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:44,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:44,679 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:44,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:44,695 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:44,696 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:44,711 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:44,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-11-30 01:12:44,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2020-11-30 01:12:44,712 INFO L87 Difference]: Start difference. First operand 36 states and 53 transitions. cyclomatic complexity: 20 Second operand 18 states. [2020-11-30 01:12:44,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:44,882 INFO L93 Difference]: Finished difference Result 176 states and 196 transitions. [2020-11-30 01:12:44,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2020-11-30 01:12:44,883 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 176 states and 196 transitions. [2020-11-30 01:12:44,885 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:44,886 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 176 states to 175 states and 195 transitions. [2020-11-30 01:12:44,886 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:44,887 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:44,887 INFO L73 IsDeterministic]: Start isDeterministic. Operand 175 states and 195 transitions. [2020-11-30 01:12:44,887 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:44,887 INFO L691 BuchiCegarLoop]: Abstraction has 175 states and 195 transitions. [2020-11-30 01:12:44,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states and 195 transitions. [2020-11-30 01:12:44,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 37. [2020-11-30 01:12:44,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2020-11-30 01:12:44,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 55 transitions. [2020-11-30 01:12:44,889 INFO L714 BuchiCegarLoop]: Abstraction has 37 states and 55 transitions. [2020-11-30 01:12:44,890 INFO L594 BuchiCegarLoop]: Abstraction has 37 states and 55 transitions. [2020-11-30 01:12:44,890 INFO L427 BuchiCegarLoop]: ======== Iteration 30============ [2020-11-30 01:12:44,890 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 55 transitions. [2020-11-30 01:12:44,890 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:44,890 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:44,890 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:44,891 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [13, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:44,891 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:44,891 INFO L794 eck$LassoCheckResult]: Stem: 3585#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 3582#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 3583#L26 main_~i~0 := 0; 3584#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 3588#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 3589#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3593#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3618#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3617#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3616#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3615#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3614#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3613#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3612#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3611#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3610#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3609#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3608#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 3607#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 3590#L35-2 assume main_~j~0 >= 100; 3587#L39 [2020-11-30 01:12:44,891 INFO L796 eck$LassoCheckResult]: Loop: 3587#L39 assume true; 3587#L39 [2020-11-30 01:12:44,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:44,891 INFO L82 PathProgramCache]: Analyzing trace with hash 1669856635, now seen corresponding path program 13 times [2020-11-30 01:12:44,892 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:44,892 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [282860664] [2020-11-30 01:12:44,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:44,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:45,058 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:45,059 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [282860664] [2020-11-30 01:12:45,059 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1786213479] [2020-11-30 01:12:45,059 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:45,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:45,104 INFO L263 TraceCheckSpWp]: Trace formula consists of 112 conjuncts, 15 conjunts are in the unsatisfiable core [2020-11-30 01:12:45,105 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:45,142 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:45,142 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:45,142 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2020-11-30 01:12:45,143 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840736332] [2020-11-30 01:12:45,143 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:45,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:45,143 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 29 times [2020-11-30 01:12:45,144 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:45,144 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139245932] [2020-11-30 01:12:45,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:45,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:45,146 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:45,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:45,147 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:45,148 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:45,172 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:45,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-11-30 01:12:45,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2020-11-30 01:12:45,173 INFO L87 Difference]: Start difference. First operand 37 states and 55 transitions. cyclomatic complexity: 21 Second operand 17 states. [2020-11-30 01:12:45,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:45,231 INFO L93 Difference]: Finished difference Result 39 states and 57 transitions. [2020-11-30 01:12:45,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2020-11-30 01:12:45,232 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 57 transitions. [2020-11-30 01:12:45,232 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:45,233 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 38 states and 56 transitions. [2020-11-30 01:12:45,233 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:45,233 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:45,233 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 56 transitions. [2020-11-30 01:12:45,233 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:45,233 INFO L691 BuchiCegarLoop]: Abstraction has 38 states and 56 transitions. [2020-11-30 01:12:45,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 56 transitions. [2020-11-30 01:12:45,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2020-11-30 01:12:45,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2020-11-30 01:12:45,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 56 transitions. [2020-11-30 01:12:45,235 INFO L714 BuchiCegarLoop]: Abstraction has 38 states and 56 transitions. [2020-11-30 01:12:45,235 INFO L594 BuchiCegarLoop]: Abstraction has 38 states and 56 transitions. [2020-11-30 01:12:45,235 INFO L427 BuchiCegarLoop]: ======== Iteration 31============ [2020-11-30 01:12:45,235 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 56 transitions. [2020-11-30 01:12:45,236 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:45,236 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:45,236 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:45,236 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [15, 1, 1, 1, 1, 1] [2020-11-30 01:12:45,236 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:45,237 INFO L794 eck$LassoCheckResult]: Stem: 3738#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 3735#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 3736#L26 main_~i~0 := 0; 3737#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3744#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3745#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3771#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3769#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3767#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3765#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3763#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3761#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3759#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3757#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3755#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3753#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3751#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3749#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 3747#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 3739#L29-2 assume main_~i~0 >= 100; 3740#L39 [2020-11-30 01:12:45,237 INFO L796 eck$LassoCheckResult]: Loop: 3740#L39 assume true; 3740#L39 [2020-11-30 01:12:45,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:45,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1546662996, now seen corresponding path program 15 times [2020-11-30 01:12:45,237 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:45,237 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829037812] [2020-11-30 01:12:45,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:45,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:45,575 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:45,575 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829037812] [2020-11-30 01:12:45,575 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1465901863] [2020-11-30 01:12:45,576 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:45,641 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2020-11-30 01:12:45,642 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:45,643 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 17 conjunts are in the unsatisfiable core [2020-11-30 01:12:45,645 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:45,691 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:45,691 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:45,692 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2020-11-30 01:12:45,692 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [345849913] [2020-11-30 01:12:45,692 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:45,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:45,693 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 30 times [2020-11-30 01:12:45,693 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:45,693 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357129915] [2020-11-30 01:12:45,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:45,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:45,695 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:45,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:45,696 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:45,697 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:45,707 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:45,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-11-30 01:12:45,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2020-11-30 01:12:45,708 INFO L87 Difference]: Start difference. First operand 38 states and 56 transitions. cyclomatic complexity: 21 Second operand 19 states. [2020-11-30 01:12:45,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:45,932 INFO L93 Difference]: Finished difference Result 195 states and 216 transitions. [2020-11-30 01:12:45,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-11-30 01:12:45,933 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 216 transitions. [2020-11-30 01:12:45,935 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:45,937 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 194 states and 215 transitions. [2020-11-30 01:12:45,937 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:45,937 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:45,938 INFO L73 IsDeterministic]: Start isDeterministic. Operand 194 states and 215 transitions. [2020-11-30 01:12:45,938 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:45,938 INFO L691 BuchiCegarLoop]: Abstraction has 194 states and 215 transitions. [2020-11-30 01:12:45,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states and 215 transitions. [2020-11-30 01:12:45,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 39. [2020-11-30 01:12:45,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2020-11-30 01:12:45,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 58 transitions. [2020-11-30 01:12:45,948 INFO L714 BuchiCegarLoop]: Abstraction has 39 states and 58 transitions. [2020-11-30 01:12:45,948 INFO L594 BuchiCegarLoop]: Abstraction has 39 states and 58 transitions. [2020-11-30 01:12:45,948 INFO L427 BuchiCegarLoop]: ======== Iteration 32============ [2020-11-30 01:12:45,948 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 58 transitions. [2020-11-30 01:12:45,949 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:45,949 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:45,949 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:45,949 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [14, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:45,950 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:45,950 INFO L794 eck$LassoCheckResult]: Stem: 4050#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 4047#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 4048#L26 main_~i~0 := 0; 4049#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 4053#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 4054#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4058#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4085#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4084#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4083#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4082#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4081#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4080#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4079#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4078#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4077#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4076#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4075#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4074#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4073#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 4055#L35-2 assume main_~j~0 >= 100; 4052#L39 [2020-11-30 01:12:45,950 INFO L796 eck$LassoCheckResult]: Loop: 4052#L39 assume true; 4052#L39 [2020-11-30 01:12:45,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:45,951 INFO L82 PathProgramCache]: Analyzing trace with hash 225949844, now seen corresponding path program 14 times [2020-11-30 01:12:45,951 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:45,952 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910819633] [2020-11-30 01:12:45,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:45,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:46,162 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:46,162 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910819633] [2020-11-30 01:12:46,162 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1858970071] [2020-11-30 01:12:46,163 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:46,201 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:46,201 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:46,202 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 16 conjunts are in the unsatisfiable core [2020-11-30 01:12:46,203 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:46,224 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:46,224 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:46,224 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2020-11-30 01:12:46,224 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199683370] [2020-11-30 01:12:46,224 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:46,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:46,225 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 31 times [2020-11-30 01:12:46,225 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:46,225 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957564041] [2020-11-30 01:12:46,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:46,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:46,227 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:46,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:46,228 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:46,228 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:46,236 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:46,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-11-30 01:12:46,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2020-11-30 01:12:46,237 INFO L87 Difference]: Start difference. First operand 39 states and 58 transitions. cyclomatic complexity: 22 Second operand 18 states. [2020-11-30 01:12:46,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:46,269 INFO L93 Difference]: Finished difference Result 41 states and 60 transitions. [2020-11-30 01:12:46,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2020-11-30 01:12:46,270 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 60 transitions. [2020-11-30 01:12:46,270 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:46,270 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 40 states and 59 transitions. [2020-11-30 01:12:46,270 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:46,270 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:46,271 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 59 transitions. [2020-11-30 01:12:46,271 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:46,271 INFO L691 BuchiCegarLoop]: Abstraction has 40 states and 59 transitions. [2020-11-30 01:12:46,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 59 transitions. [2020-11-30 01:12:46,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2020-11-30 01:12:46,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2020-11-30 01:12:46,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 59 transitions. [2020-11-30 01:12:46,272 INFO L714 BuchiCegarLoop]: Abstraction has 40 states and 59 transitions. [2020-11-30 01:12:46,272 INFO L594 BuchiCegarLoop]: Abstraction has 40 states and 59 transitions. [2020-11-30 01:12:46,272 INFO L427 BuchiCegarLoop]: ======== Iteration 33============ [2020-11-30 01:12:46,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 59 transitions. [2020-11-30 01:12:46,272 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:46,272 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:46,272 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:46,273 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [16, 1, 1, 1, 1, 1] [2020-11-30 01:12:46,273 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:46,273 INFO L794 eck$LassoCheckResult]: Stem: 4211#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 4208#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 4209#L26 main_~i~0 := 0; 4210#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4217#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4218#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4246#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4244#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4242#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4240#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4238#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4236#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4234#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4232#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4230#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4228#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4226#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4224#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4222#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4220#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 4212#L29-2 assume main_~i~0 >= 100; 4213#L39 [2020-11-30 01:12:46,273 INFO L796 eck$LassoCheckResult]: Loop: 4213#L39 assume true; 4213#L39 [2020-11-30 01:12:46,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:46,273 INFO L82 PathProgramCache]: Analyzing trace with hash 701914313, now seen corresponding path program 16 times [2020-11-30 01:12:46,273 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:46,274 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443586997] [2020-11-30 01:12:46,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:46,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:46,484 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:46,484 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443586997] [2020-11-30 01:12:46,484 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [393389117] [2020-11-30 01:12:46,484 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:46,520 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:46,520 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:46,521 INFO L263 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 18 conjunts are in the unsatisfiable core [2020-11-30 01:12:46,522 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:46,572 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:46,575 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:46,575 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2020-11-30 01:12:46,575 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213457070] [2020-11-30 01:12:46,576 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:46,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:46,576 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 32 times [2020-11-30 01:12:46,576 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:46,576 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686351529] [2020-11-30 01:12:46,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:46,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:46,578 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:46,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:46,579 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:46,579 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:46,587 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:46,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2020-11-30 01:12:46,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2020-11-30 01:12:46,587 INFO L87 Difference]: Start difference. First operand 40 states and 59 transitions. cyclomatic complexity: 22 Second operand 20 states. [2020-11-30 01:12:46,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:46,761 INFO L93 Difference]: Finished difference Result 215 states and 237 transitions. [2020-11-30 01:12:46,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2020-11-30 01:12:46,761 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 215 states and 237 transitions. [2020-11-30 01:12:46,763 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:46,765 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 215 states to 214 states and 236 transitions. [2020-11-30 01:12:46,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:46,765 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:46,765 INFO L73 IsDeterministic]: Start isDeterministic. Operand 214 states and 236 transitions. [2020-11-30 01:12:46,765 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:46,765 INFO L691 BuchiCegarLoop]: Abstraction has 214 states and 236 transitions. [2020-11-30 01:12:46,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states and 236 transitions. [2020-11-30 01:12:46,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 41. [2020-11-30 01:12:46,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2020-11-30 01:12:46,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 61 transitions. [2020-11-30 01:12:46,767 INFO L714 BuchiCegarLoop]: Abstraction has 41 states and 61 transitions. [2020-11-30 01:12:46,767 INFO L594 BuchiCegarLoop]: Abstraction has 41 states and 61 transitions. [2020-11-30 01:12:46,768 INFO L427 BuchiCegarLoop]: ======== Iteration 34============ [2020-11-30 01:12:46,768 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 61 transitions. [2020-11-30 01:12:46,768 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:46,768 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:46,768 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:46,769 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [15, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:46,769 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:46,769 INFO L794 eck$LassoCheckResult]: Stem: 4549#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 4546#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 4547#L26 main_~i~0 := 0; 4548#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 4552#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 4553#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4557#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4586#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4585#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4584#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4583#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4582#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4581#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4580#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4579#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4578#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4577#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4576#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4575#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4574#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 4573#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 4554#L35-2 assume main_~j~0 >= 100; 4551#L39 [2020-11-30 01:12:46,769 INFO L796 eck$LassoCheckResult]: Loop: 4551#L39 assume true; 4551#L39 [2020-11-30 01:12:46,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:46,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1585487717, now seen corresponding path program 15 times [2020-11-30 01:12:46,772 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:46,772 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324039750] [2020-11-30 01:12:46,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:46,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:46,971 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:46,971 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324039750] [2020-11-30 01:12:46,971 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1221986073] [2020-11-30 01:12:46,971 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:47,024 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2020-11-30 01:12:47,024 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:47,025 INFO L263 TraceCheckSpWp]: Trace formula consists of 124 conjuncts, 17 conjunts are in the unsatisfiable core [2020-11-30 01:12:47,026 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:47,068 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:47,069 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:47,069 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2020-11-30 01:12:47,069 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [771052543] [2020-11-30 01:12:47,069 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:47,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:47,070 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 33 times [2020-11-30 01:12:47,070 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:47,070 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098641207] [2020-11-30 01:12:47,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:47,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:47,072 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:47,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:47,072 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:47,073 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:47,083 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:47,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-11-30 01:12:47,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2020-11-30 01:12:47,084 INFO L87 Difference]: Start difference. First operand 41 states and 61 transitions. cyclomatic complexity: 23 Second operand 19 states. [2020-11-30 01:12:47,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:47,127 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2020-11-30 01:12:47,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-11-30 01:12:47,128 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 63 transitions. [2020-11-30 01:12:47,129 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:47,129 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 42 states and 62 transitions. [2020-11-30 01:12:47,129 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:47,129 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:47,130 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42 states and 62 transitions. [2020-11-30 01:12:47,130 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:47,130 INFO L691 BuchiCegarLoop]: Abstraction has 42 states and 62 transitions. [2020-11-30 01:12:47,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states and 62 transitions. [2020-11-30 01:12:47,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2020-11-30 01:12:47,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2020-11-30 01:12:47,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 62 transitions. [2020-11-30 01:12:47,131 INFO L714 BuchiCegarLoop]: Abstraction has 42 states and 62 transitions. [2020-11-30 01:12:47,131 INFO L594 BuchiCegarLoop]: Abstraction has 42 states and 62 transitions. [2020-11-30 01:12:47,131 INFO L427 BuchiCegarLoop]: ======== Iteration 35============ [2020-11-30 01:12:47,131 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 62 transitions. [2020-11-30 01:12:47,132 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:47,132 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:47,132 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:47,132 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [17, 1, 1, 1, 1, 1] [2020-11-30 01:12:47,132 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:47,132 INFO L794 eck$LassoCheckResult]: Stem: 4718#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 4715#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 4716#L26 main_~i~0 := 0; 4717#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4724#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4725#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4755#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4753#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4751#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4749#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4747#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4745#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4743#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4741#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4739#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4737#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4735#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4733#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4731#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4729#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 4727#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 4719#L29-2 assume main_~i~0 >= 100; 4720#L39 [2020-11-30 01:12:47,133 INFO L796 eck$LassoCheckResult]: Loop: 4720#L39 assume true; 4720#L39 [2020-11-30 01:12:47,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:47,133 INFO L82 PathProgramCache]: Analyzing trace with hash 284508916, now seen corresponding path program 17 times [2020-11-30 01:12:47,133 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:47,133 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899632497] [2020-11-30 01:12:47,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:47,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:47,341 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:47,342 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899632497] [2020-11-30 01:12:47,342 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [327346536] [2020-11-30 01:12:47,342 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:47,384 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2020-11-30 01:12:47,384 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:47,385 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 19 conjunts are in the unsatisfiable core [2020-11-30 01:12:47,386 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:47,408 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:47,408 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:47,408 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2020-11-30 01:12:47,408 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422538196] [2020-11-30 01:12:47,409 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:47,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:47,409 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 34 times [2020-11-30 01:12:47,409 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:47,409 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1230224799] [2020-11-30 01:12:47,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:47,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:47,411 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:47,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:47,412 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:47,412 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:47,415 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:47,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2020-11-30 01:12:47,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2020-11-30 01:12:47,416 INFO L87 Difference]: Start difference. First operand 42 states and 62 transitions. cyclomatic complexity: 23 Second operand 21 states. [2020-11-30 01:12:47,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:47,569 INFO L93 Difference]: Finished difference Result 236 states and 259 transitions. [2020-11-30 01:12:47,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2020-11-30 01:12:47,570 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 236 states and 259 transitions. [2020-11-30 01:12:47,572 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:47,573 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 236 states to 235 states and 258 transitions. [2020-11-30 01:12:47,574 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:47,574 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:47,574 INFO L73 IsDeterministic]: Start isDeterministic. Operand 235 states and 258 transitions. [2020-11-30 01:12:47,574 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:47,575 INFO L691 BuchiCegarLoop]: Abstraction has 235 states and 258 transitions. [2020-11-30 01:12:47,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states and 258 transitions. [2020-11-30 01:12:47,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 43. [2020-11-30 01:12:47,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2020-11-30 01:12:47,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 64 transitions. [2020-11-30 01:12:47,577 INFO L714 BuchiCegarLoop]: Abstraction has 43 states and 64 transitions. [2020-11-30 01:12:47,577 INFO L594 BuchiCegarLoop]: Abstraction has 43 states and 64 transitions. [2020-11-30 01:12:47,578 INFO L427 BuchiCegarLoop]: ======== Iteration 36============ [2020-11-30 01:12:47,578 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 64 transitions. [2020-11-30 01:12:47,578 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:47,578 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:47,578 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:47,579 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [16, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:47,579 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:47,579 INFO L794 eck$LassoCheckResult]: Stem: 5083#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 5080#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 5081#L26 main_~i~0 := 0; 5082#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 5086#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 5087#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5091#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5122#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5121#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5120#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5119#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5118#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5117#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5116#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5115#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5114#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5113#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5112#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5111#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5110#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5109#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5108#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 5088#L35-2 assume main_~j~0 >= 100; 5085#L39 [2020-11-30 01:12:47,579 INFO L796 eck$LassoCheckResult]: Loop: 5085#L39 assume true; 5085#L39 [2020-11-30 01:12:47,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:47,580 INFO L82 PathProgramCache]: Analyzing trace with hash -1905477260, now seen corresponding path program 16 times [2020-11-30 01:12:47,580 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:47,580 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330009394] [2020-11-30 01:12:47,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:47,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:47,837 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:47,837 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330009394] [2020-11-30 01:12:47,837 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1029706275] [2020-11-30 01:12:47,837 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:47,881 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:47,881 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:47,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 18 conjunts are in the unsatisfiable core [2020-11-30 01:12:47,883 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:47,912 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:47,912 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:47,913 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2020-11-30 01:12:47,913 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510819461] [2020-11-30 01:12:47,913 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:47,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:47,914 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 35 times [2020-11-30 01:12:47,914 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:47,914 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047937922] [2020-11-30 01:12:47,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:47,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:47,917 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:47,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:47,917 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:47,918 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:47,921 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:47,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2020-11-30 01:12:47,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2020-11-30 01:12:47,922 INFO L87 Difference]: Start difference. First operand 43 states and 64 transitions. cyclomatic complexity: 24 Second operand 20 states. [2020-11-30 01:12:47,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:47,975 INFO L93 Difference]: Finished difference Result 45 states and 66 transitions. [2020-11-30 01:12:47,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2020-11-30 01:12:47,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 66 transitions. [2020-11-30 01:12:47,976 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:47,977 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 65 transitions. [2020-11-30 01:12:47,977 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:47,977 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:47,977 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 65 transitions. [2020-11-30 01:12:47,977 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:47,977 INFO L691 BuchiCegarLoop]: Abstraction has 44 states and 65 transitions. [2020-11-30 01:12:47,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 65 transitions. [2020-11-30 01:12:47,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2020-11-30 01:12:47,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2020-11-30 01:12:47,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 65 transitions. [2020-11-30 01:12:47,978 INFO L714 BuchiCegarLoop]: Abstraction has 44 states and 65 transitions. [2020-11-30 01:12:47,978 INFO L594 BuchiCegarLoop]: Abstraction has 44 states and 65 transitions. [2020-11-30 01:12:47,978 INFO L427 BuchiCegarLoop]: ======== Iteration 37============ [2020-11-30 01:12:47,978 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 65 transitions. [2020-11-30 01:12:47,979 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:47,979 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:47,979 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:47,979 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [18, 1, 1, 1, 1, 1] [2020-11-30 01:12:47,979 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:47,980 INFO L794 eck$LassoCheckResult]: Stem: 5260#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 5257#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 5258#L26 main_~i~0 := 0; 5259#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5266#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5267#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5299#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5297#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5295#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5293#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5291#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5289#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5287#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5285#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5283#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5281#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5279#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5277#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5275#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5273#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5271#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5269#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 5261#L29-2 assume main_~i~0 >= 100; 5262#L39 [2020-11-30 01:12:47,980 INFO L796 eck$LassoCheckResult]: Loop: 5262#L39 assume true; 5262#L39 [2020-11-30 01:12:47,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:47,980 INFO L82 PathProgramCache]: Analyzing trace with hash 229843497, now seen corresponding path program 18 times [2020-11-30 01:12:47,980 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:47,980 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328707001] [2020-11-30 01:12:47,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:47,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:48,240 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:48,240 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328707001] [2020-11-30 01:12:48,240 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1985115225] [2020-11-30 01:12:48,240 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:48,275 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2020-11-30 01:12:48,275 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:48,276 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 20 conjunts are in the unsatisfiable core [2020-11-30 01:12:48,277 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:48,316 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:48,316 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:48,316 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 21 [2020-11-30 01:12:48,317 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693845110] [2020-11-30 01:12:48,317 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:48,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:48,317 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 36 times [2020-11-30 01:12:48,317 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:48,318 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853475551] [2020-11-30 01:12:48,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:48,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:48,319 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:48,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:48,320 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:48,320 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:48,323 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:48,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2020-11-30 01:12:48,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2020-11-30 01:12:48,324 INFO L87 Difference]: Start difference. First operand 44 states and 65 transitions. cyclomatic complexity: 24 Second operand 22 states. [2020-11-30 01:12:48,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:48,546 INFO L93 Difference]: Finished difference Result 258 states and 282 transitions. [2020-11-30 01:12:48,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2020-11-30 01:12:48,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 258 states and 282 transitions. [2020-11-30 01:12:48,550 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:48,552 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 258 states to 257 states and 281 transitions. [2020-11-30 01:12:48,553 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:48,553 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:48,553 INFO L73 IsDeterministic]: Start isDeterministic. Operand 257 states and 281 transitions. [2020-11-30 01:12:48,554 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:48,554 INFO L691 BuchiCegarLoop]: Abstraction has 257 states and 281 transitions. [2020-11-30 01:12:48,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states and 281 transitions. [2020-11-30 01:12:48,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 45. [2020-11-30 01:12:48,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2020-11-30 01:12:48,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 67 transitions. [2020-11-30 01:12:48,557 INFO L714 BuchiCegarLoop]: Abstraction has 45 states and 67 transitions. [2020-11-30 01:12:48,557 INFO L594 BuchiCegarLoop]: Abstraction has 45 states and 67 transitions. [2020-11-30 01:12:48,557 INFO L427 BuchiCegarLoop]: ======== Iteration 38============ [2020-11-30 01:12:48,558 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 67 transitions. [2020-11-30 01:12:48,558 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:48,558 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:48,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:48,559 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [17, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:48,559 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:48,560 INFO L794 eck$LassoCheckResult]: Stem: 5653#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 5650#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 5651#L26 main_~i~0 := 0; 5652#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 5656#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 5657#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5661#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5694#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5693#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5692#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5691#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5690#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5689#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5688#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5687#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5686#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5685#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5684#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5683#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5682#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5681#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5680#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 5679#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 5658#L35-2 assume main_~j~0 >= 100; 5655#L39 [2020-11-30 01:12:48,560 INFO L796 eck$LassoCheckResult]: Loop: 5655#L39 assume true; 5655#L39 [2020-11-30 01:12:48,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:48,560 INFO L82 PathProgramCache]: Analyzing trace with hash 1059748795, now seen corresponding path program 17 times [2020-11-30 01:12:48,560 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:48,561 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637329508] [2020-11-30 01:12:48,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:48,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:48,820 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:48,820 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637329508] [2020-11-30 01:12:48,821 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1920614872] [2020-11-30 01:12:48,821 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:48,866 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2020-11-30 01:12:48,867 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:48,867 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 19 conjunts are in the unsatisfiable core [2020-11-30 01:12:48,868 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:48,898 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:48,898 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:48,898 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2020-11-30 01:12:48,898 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107356584] [2020-11-30 01:12:48,899 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:48,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:48,899 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 37 times [2020-11-30 01:12:48,899 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:48,899 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250997662] [2020-11-30 01:12:48,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:48,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:48,901 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:48,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:48,902 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:48,902 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:48,913 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:48,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2020-11-30 01:12:48,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2020-11-30 01:12:48,914 INFO L87 Difference]: Start difference. First operand 45 states and 67 transitions. cyclomatic complexity: 25 Second operand 21 states. [2020-11-30 01:12:48,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:48,963 INFO L93 Difference]: Finished difference Result 47 states and 69 transitions. [2020-11-30 01:12:48,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2020-11-30 01:12:48,964 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 47 states and 69 transitions. [2020-11-30 01:12:48,964 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:48,965 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 47 states to 46 states and 68 transitions. [2020-11-30 01:12:48,965 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:48,965 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:48,965 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 68 transitions. [2020-11-30 01:12:48,965 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:48,965 INFO L691 BuchiCegarLoop]: Abstraction has 46 states and 68 transitions. [2020-11-30 01:12:48,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 68 transitions. [2020-11-30 01:12:48,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2020-11-30 01:12:48,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2020-11-30 01:12:48,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 68 transitions. [2020-11-30 01:12:48,967 INFO L714 BuchiCegarLoop]: Abstraction has 46 states and 68 transitions. [2020-11-30 01:12:48,967 INFO L594 BuchiCegarLoop]: Abstraction has 46 states and 68 transitions. [2020-11-30 01:12:48,967 INFO L427 BuchiCegarLoop]: ======== Iteration 39============ [2020-11-30 01:12:48,967 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 68 transitions. [2020-11-30 01:12:48,967 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:48,968 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:48,968 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:48,968 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [19, 1, 1, 1, 1, 1] [2020-11-30 01:12:48,968 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:48,968 INFO L794 eck$LassoCheckResult]: Stem: 5838#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 5835#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 5836#L26 main_~i~0 := 0; 5837#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5844#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5845#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5879#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5877#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5875#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5873#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5871#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5869#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5867#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5865#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5863#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5861#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5859#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5857#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5855#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5853#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5851#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5849#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 5847#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 5839#L29-2 assume main_~i~0 >= 100; 5840#L39 [2020-11-30 01:12:48,968 INFO L796 eck$LassoCheckResult]: Loop: 5840#L39 assume true; 5840#L39 [2020-11-30 01:12:48,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:48,969 INFO L82 PathProgramCache]: Analyzing trace with hash -1464784492, now seen corresponding path program 19 times [2020-11-30 01:12:48,969 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:48,969 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780103611] [2020-11-30 01:12:48,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:48,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:49,283 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:49,283 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780103611] [2020-11-30 01:12:49,283 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1519047575] [2020-11-30 01:12:49,284 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:49,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:49,319 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 21 conjunts are in the unsatisfiable core [2020-11-30 01:12:49,319 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:49,339 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:49,339 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:49,340 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 22 [2020-11-30 01:12:49,340 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007758180] [2020-11-30 01:12:49,340 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:49,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:49,341 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 38 times [2020-11-30 01:12:49,345 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:49,346 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014509127] [2020-11-30 01:12:49,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:49,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:49,351 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:49,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:49,351 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:49,352 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:49,355 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:49,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2020-11-30 01:12:49,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2020-11-30 01:12:49,356 INFO L87 Difference]: Start difference. First operand 46 states and 68 transitions. cyclomatic complexity: 25 Second operand 23 states. [2020-11-30 01:12:49,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:49,546 INFO L93 Difference]: Finished difference Result 281 states and 306 transitions. [2020-11-30 01:12:49,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2020-11-30 01:12:49,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 281 states and 306 transitions. [2020-11-30 01:12:49,549 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:49,550 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 281 states to 280 states and 305 transitions. [2020-11-30 01:12:49,551 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:49,551 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:49,551 INFO L73 IsDeterministic]: Start isDeterministic. Operand 280 states and 305 transitions. [2020-11-30 01:12:49,551 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:49,551 INFO L691 BuchiCegarLoop]: Abstraction has 280 states and 305 transitions. [2020-11-30 01:12:49,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states and 305 transitions. [2020-11-30 01:12:49,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 47. [2020-11-30 01:12:49,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2020-11-30 01:12:49,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 70 transitions. [2020-11-30 01:12:49,554 INFO L714 BuchiCegarLoop]: Abstraction has 47 states and 70 transitions. [2020-11-30 01:12:49,554 INFO L594 BuchiCegarLoop]: Abstraction has 47 states and 70 transitions. [2020-11-30 01:12:49,554 INFO L427 BuchiCegarLoop]: ======== Iteration 40============ [2020-11-30 01:12:49,554 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 70 transitions. [2020-11-30 01:12:49,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:49,554 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:49,554 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:49,555 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [18, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:49,555 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:49,555 INFO L794 eck$LassoCheckResult]: Stem: 6260#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 6257#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 6258#L26 main_~i~0 := 0; 6259#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 6263#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 6264#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6268#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6303#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6302#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6301#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6300#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6299#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6298#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6297#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6296#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6295#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6294#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6293#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6292#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6291#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6290#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6289#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6288#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6287#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 6265#L35-2 assume main_~j~0 >= 100; 6262#L39 [2020-11-30 01:12:49,555 INFO L796 eck$LassoCheckResult]: Loop: 6262#L39 assume true; 6262#L39 [2020-11-30 01:12:49,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:49,555 INFO L82 PathProgramCache]: Analyzing trace with hash -1507524012, now seen corresponding path program 18 times [2020-11-30 01:12:49,555 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:49,555 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008349565] [2020-11-30 01:12:49,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:49,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:49,794 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:49,794 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008349565] [2020-11-30 01:12:49,794 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [807450210] [2020-11-30 01:12:49,795 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:49,837 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2020-11-30 01:12:49,838 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:49,838 INFO L263 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 20 conjunts are in the unsatisfiable core [2020-11-30 01:12:49,839 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:49,856 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:49,856 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:49,856 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 21 [2020-11-30 01:12:49,856 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247396474] [2020-11-30 01:12:49,857 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:49,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:49,857 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 39 times [2020-11-30 01:12:49,857 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:49,857 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887538268] [2020-11-30 01:12:49,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:49,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:49,859 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:49,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:49,860 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:49,860 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:49,872 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:49,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2020-11-30 01:12:49,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2020-11-30 01:12:49,873 INFO L87 Difference]: Start difference. First operand 47 states and 70 transitions. cyclomatic complexity: 26 Second operand 22 states. [2020-11-30 01:12:49,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:49,924 INFO L93 Difference]: Finished difference Result 49 states and 72 transitions. [2020-11-30 01:12:49,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2020-11-30 01:12:49,924 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 72 transitions. [2020-11-30 01:12:49,924 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:49,925 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 48 states and 71 transitions. [2020-11-30 01:12:49,925 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:49,925 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:49,925 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 71 transitions. [2020-11-30 01:12:49,925 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:49,926 INFO L691 BuchiCegarLoop]: Abstraction has 48 states and 71 transitions. [2020-11-30 01:12:49,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 71 transitions. [2020-11-30 01:12:49,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2020-11-30 01:12:49,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2020-11-30 01:12:49,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 71 transitions. [2020-11-30 01:12:49,927 INFO L714 BuchiCegarLoop]: Abstraction has 48 states and 71 transitions. [2020-11-30 01:12:49,927 INFO L594 BuchiCegarLoop]: Abstraction has 48 states and 71 transitions. [2020-11-30 01:12:49,927 INFO L427 BuchiCegarLoop]: ======== Iteration 41============ [2020-11-30 01:12:49,927 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 48 states and 71 transitions. [2020-11-30 01:12:49,927 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:49,928 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:49,928 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:49,928 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [20, 1, 1, 1, 1, 1] [2020-11-30 01:12:49,928 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:49,928 INFO L794 eck$LassoCheckResult]: Stem: 6453#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 6450#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 6451#L26 main_~i~0 := 0; 6452#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6459#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6460#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6496#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6494#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6492#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6490#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6488#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6486#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6484#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6482#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6480#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6478#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6476#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6474#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6472#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6470#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6468#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6466#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6464#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 6462#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 6454#L29-2 assume main_~i~0 >= 100; 6455#L39 [2020-11-30 01:12:49,928 INFO L796 eck$LassoCheckResult]: Loop: 6455#L39 assume true; 6455#L39 [2020-11-30 01:12:49,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:49,929 INFO L82 PathProgramCache]: Analyzing trace with hash 1836322697, now seen corresponding path program 20 times [2020-11-30 01:12:49,929 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:49,929 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [111461220] [2020-11-30 01:12:49,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:49,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:50,212 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:50,212 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [111461220] [2020-11-30 01:12:50,212 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1942412223] [2020-11-30 01:12:50,212 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:50,272 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:50,272 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:50,273 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 22 conjunts are in the unsatisfiable core [2020-11-30 01:12:50,273 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:50,290 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:50,290 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:50,290 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 23 [2020-11-30 01:12:50,291 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [938638082] [2020-11-30 01:12:50,291 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:50,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:50,291 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 40 times [2020-11-30 01:12:50,291 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:50,292 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [984527014] [2020-11-30 01:12:50,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:50,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:50,293 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:50,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:50,294 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:50,294 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:50,297 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:50,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2020-11-30 01:12:50,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2020-11-30 01:12:50,298 INFO L87 Difference]: Start difference. First operand 48 states and 71 transitions. cyclomatic complexity: 26 Second operand 24 states. [2020-11-30 01:12:50,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:50,488 INFO L93 Difference]: Finished difference Result 305 states and 331 transitions. [2020-11-30 01:12:50,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2020-11-30 01:12:50,489 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 305 states and 331 transitions. [2020-11-30 01:12:50,491 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:50,493 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 305 states to 304 states and 330 transitions. [2020-11-30 01:12:50,493 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:50,493 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:50,493 INFO L73 IsDeterministic]: Start isDeterministic. Operand 304 states and 330 transitions. [2020-11-30 01:12:50,493 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:50,493 INFO L691 BuchiCegarLoop]: Abstraction has 304 states and 330 transitions. [2020-11-30 01:12:50,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states and 330 transitions. [2020-11-30 01:12:50,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 49. [2020-11-30 01:12:50,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2020-11-30 01:12:50,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 73 transitions. [2020-11-30 01:12:50,496 INFO L714 BuchiCegarLoop]: Abstraction has 49 states and 73 transitions. [2020-11-30 01:12:50,496 INFO L594 BuchiCegarLoop]: Abstraction has 49 states and 73 transitions. [2020-11-30 01:12:50,496 INFO L427 BuchiCegarLoop]: ======== Iteration 42============ [2020-11-30 01:12:50,496 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 73 transitions. [2020-11-30 01:12:50,496 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:50,496 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:50,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:50,497 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [19, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:50,497 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:50,497 INFO L794 eck$LassoCheckResult]: Stem: 6905#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 6902#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 6903#L26 main_~i~0 := 0; 6904#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 6908#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 6909#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6913#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6950#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6949#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6948#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6947#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6946#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6945#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6944#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6943#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6942#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6941#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6940#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6939#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6938#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6937#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6936#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6935#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6934#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 6933#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 6910#L35-2 assume main_~j~0 >= 100; 6907#L39 [2020-11-30 01:12:50,497 INFO L796 eck$LassoCheckResult]: Loop: 6907#L39 assume true; 6907#L39 [2020-11-30 01:12:50,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:50,497 INFO L82 PathProgramCache]: Analyzing trace with hash 511397595, now seen corresponding path program 19 times [2020-11-30 01:12:50,497 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:50,498 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [645654683] [2020-11-30 01:12:50,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:50,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:50,764 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:50,764 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [645654683] [2020-11-30 01:12:50,765 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [330539211] [2020-11-30 01:12:50,765 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:50,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:50,817 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 21 conjunts are in the unsatisfiable core [2020-11-30 01:12:50,818 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:50,836 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:50,836 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:50,836 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 22 [2020-11-30 01:12:50,836 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282186785] [2020-11-30 01:12:50,837 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:50,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:50,837 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 41 times [2020-11-30 01:12:50,837 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:50,837 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442078184] [2020-11-30 01:12:50,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:50,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:50,839 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:50,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:50,840 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:50,840 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:50,844 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:50,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2020-11-30 01:12:50,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2020-11-30 01:12:50,845 INFO L87 Difference]: Start difference. First operand 49 states and 73 transitions. cyclomatic complexity: 27 Second operand 23 states. [2020-11-30 01:12:50,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:50,891 INFO L93 Difference]: Finished difference Result 51 states and 75 transitions. [2020-11-30 01:12:50,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2020-11-30 01:12:50,892 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 75 transitions. [2020-11-30 01:12:50,892 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:50,893 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 50 states and 74 transitions. [2020-11-30 01:12:50,893 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:50,893 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:50,893 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 74 transitions. [2020-11-30 01:12:50,894 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:50,894 INFO L691 BuchiCegarLoop]: Abstraction has 50 states and 74 transitions. [2020-11-30 01:12:50,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 74 transitions. [2020-11-30 01:12:50,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2020-11-30 01:12:50,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2020-11-30 01:12:50,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 74 transitions. [2020-11-30 01:12:50,895 INFO L714 BuchiCegarLoop]: Abstraction has 50 states and 74 transitions. [2020-11-30 01:12:50,895 INFO L594 BuchiCegarLoop]: Abstraction has 50 states and 74 transitions. [2020-11-30 01:12:50,895 INFO L427 BuchiCegarLoop]: ======== Iteration 43============ [2020-11-30 01:12:50,895 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 74 transitions. [2020-11-30 01:12:50,896 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:50,896 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:50,896 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:50,896 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [21, 1, 1, 1, 1, 1] [2020-11-30 01:12:50,896 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:50,896 INFO L794 eck$LassoCheckResult]: Stem: 7106#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 7103#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 7104#L26 main_~i~0 := 0; 7105#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7112#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7113#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7151#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7149#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7147#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7145#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7143#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7141#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7139#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7137#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7135#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7133#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7131#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7129#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7127#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7125#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7123#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7121#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7119#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7117#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7115#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 7107#L29-2 assume main_~i~0 >= 100; 7108#L39 [2020-11-30 01:12:50,896 INFO L796 eck$LassoCheckResult]: Loop: 7108#L39 assume true; 7108#L39 [2020-11-30 01:12:50,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:50,897 INFO L82 PathProgramCache]: Analyzing trace with hash 1091430452, now seen corresponding path program 21 times [2020-11-30 01:12:50,897 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:50,897 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830565065] [2020-11-30 01:12:50,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:50,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:51,314 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:51,314 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830565065] [2020-11-30 01:12:51,314 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1278693961] [2020-11-30 01:12:51,314 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:51,364 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2020-11-30 01:12:51,364 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:51,365 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 23 conjunts are in the unsatisfiable core [2020-11-30 01:12:51,366 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:51,387 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:51,387 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:51,387 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 24 [2020-11-30 01:12:51,387 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601701005] [2020-11-30 01:12:51,388 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:51,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:51,388 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 42 times [2020-11-30 01:12:51,388 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:51,389 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517498900] [2020-11-30 01:12:51,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:51,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:51,390 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:51,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:51,391 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:51,392 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:51,395 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:51,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2020-11-30 01:12:51,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2020-11-30 01:12:51,395 INFO L87 Difference]: Start difference. First operand 50 states and 74 transitions. cyclomatic complexity: 27 Second operand 25 states. [2020-11-30 01:12:51,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:51,588 INFO L93 Difference]: Finished difference Result 330 states and 357 transitions. [2020-11-30 01:12:51,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2020-11-30 01:12:51,588 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 330 states and 357 transitions. [2020-11-30 01:12:51,590 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:51,592 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 330 states to 329 states and 356 transitions. [2020-11-30 01:12:51,592 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:51,592 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:51,592 INFO L73 IsDeterministic]: Start isDeterministic. Operand 329 states and 356 transitions. [2020-11-30 01:12:51,593 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:51,593 INFO L691 BuchiCegarLoop]: Abstraction has 329 states and 356 transitions. [2020-11-30 01:12:51,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states and 356 transitions. [2020-11-30 01:12:51,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 51. [2020-11-30 01:12:51,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2020-11-30 01:12:51,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 76 transitions. [2020-11-30 01:12:51,595 INFO L714 BuchiCegarLoop]: Abstraction has 51 states and 76 transitions. [2020-11-30 01:12:51,595 INFO L594 BuchiCegarLoop]: Abstraction has 51 states and 76 transitions. [2020-11-30 01:12:51,595 INFO L427 BuchiCegarLoop]: ======== Iteration 44============ [2020-11-30 01:12:51,595 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 76 transitions. [2020-11-30 01:12:51,595 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:51,595 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:51,595 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:51,596 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [20, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:51,596 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:51,596 INFO L794 eck$LassoCheckResult]: Stem: 7589#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 7586#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 7587#L26 main_~i~0 := 0; 7588#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 7592#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 7593#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7597#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7636#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7635#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7634#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7633#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7632#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7631#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7630#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7629#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7628#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7627#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7626#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7625#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7624#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7623#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7622#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7621#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7620#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7619#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 7618#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 7594#L35-2 assume main_~j~0 >= 100; 7591#L39 [2020-11-30 01:12:51,596 INFO L796 eck$LassoCheckResult]: Loop: 7591#L39 assume true; 7591#L39 [2020-11-30 01:12:51,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:51,596 INFO L82 PathProgramCache]: Analyzing trace with hash -1326542028, now seen corresponding path program 20 times [2020-11-30 01:12:51,596 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:51,596 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862185270] [2020-11-30 01:12:51,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:51,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:51,857 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:51,858 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862185270] [2020-11-30 01:12:51,858 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1203920502] [2020-11-30 01:12:51,858 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:51,902 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:51,902 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:51,903 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 22 conjunts are in the unsatisfiable core [2020-11-30 01:12:51,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:51,921 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:51,921 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:51,922 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 23 [2020-11-30 01:12:51,922 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1684602923] [2020-11-30 01:12:51,922 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:51,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:51,922 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 43 times [2020-11-30 01:12:51,923 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:51,923 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266173461] [2020-11-30 01:12:51,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:51,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:51,924 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:51,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:51,925 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:51,925 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:51,959 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:51,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2020-11-30 01:12:51,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2020-11-30 01:12:51,959 INFO L87 Difference]: Start difference. First operand 51 states and 76 transitions. cyclomatic complexity: 28 Second operand 24 states. [2020-11-30 01:12:52,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:52,043 INFO L93 Difference]: Finished difference Result 53 states and 78 transitions. [2020-11-30 01:12:52,043 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2020-11-30 01:12:52,043 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 78 transitions. [2020-11-30 01:12:52,044 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:52,044 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 52 states and 77 transitions. [2020-11-30 01:12:52,044 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:52,044 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:52,044 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 77 transitions. [2020-11-30 01:12:52,044 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:52,044 INFO L691 BuchiCegarLoop]: Abstraction has 52 states and 77 transitions. [2020-11-30 01:12:52,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 77 transitions. [2020-11-30 01:12:52,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2020-11-30 01:12:52,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2020-11-30 01:12:52,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 77 transitions. [2020-11-30 01:12:52,046 INFO L714 BuchiCegarLoop]: Abstraction has 52 states and 77 transitions. [2020-11-30 01:12:52,046 INFO L594 BuchiCegarLoop]: Abstraction has 52 states and 77 transitions. [2020-11-30 01:12:52,046 INFO L427 BuchiCegarLoop]: ======== Iteration 45============ [2020-11-30 01:12:52,046 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 77 transitions. [2020-11-30 01:12:52,046 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:52,046 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:52,046 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:52,047 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [22, 1, 1, 1, 1, 1] [2020-11-30 01:12:52,047 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:52,047 INFO L794 eck$LassoCheckResult]: Stem: 7798#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 7795#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 7796#L26 main_~i~0 := 0; 7797#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7804#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7805#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7845#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7843#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7841#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7839#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7837#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7835#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7833#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7831#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7829#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7827#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7825#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7823#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7821#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7819#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7817#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7815#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7813#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7811#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7809#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 7807#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 7799#L29-2 assume main_~i~0 >= 100; 7800#L39 [2020-11-30 01:12:52,047 INFO L796 eck$LassoCheckResult]: Loop: 7800#L39 assume true; 7800#L39 [2020-11-30 01:12:52,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:52,047 INFO L82 PathProgramCache]: Analyzing trace with hash -525392663, now seen corresponding path program 22 times [2020-11-30 01:12:52,047 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:52,047 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032611143] [2020-11-30 01:12:52,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:52,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:52,460 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:52,460 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032611143] [2020-11-30 01:12:52,460 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1101360404] [2020-11-30 01:12:52,460 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:52,511 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:52,511 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:52,512 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 24 conjunts are in the unsatisfiable core [2020-11-30 01:12:52,512 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:52,530 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:52,530 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:52,530 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 25 [2020-11-30 01:12:52,530 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694419753] [2020-11-30 01:12:52,531 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:52,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:52,531 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 44 times [2020-11-30 01:12:52,531 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:52,531 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97764027] [2020-11-30 01:12:52,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:52,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:52,533 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:52,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:52,534 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:52,534 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:52,537 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:52,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2020-11-30 01:12:52,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2020-11-30 01:12:52,538 INFO L87 Difference]: Start difference. First operand 52 states and 77 transitions. cyclomatic complexity: 28 Second operand 26 states. [2020-11-30 01:12:52,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:52,748 INFO L93 Difference]: Finished difference Result 356 states and 384 transitions. [2020-11-30 01:12:52,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2020-11-30 01:12:52,748 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 356 states and 384 transitions. [2020-11-30 01:12:52,750 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:52,752 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 356 states to 355 states and 383 transitions. [2020-11-30 01:12:52,752 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:52,752 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:52,752 INFO L73 IsDeterministic]: Start isDeterministic. Operand 355 states and 383 transitions. [2020-11-30 01:12:52,752 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:52,752 INFO L691 BuchiCegarLoop]: Abstraction has 355 states and 383 transitions. [2020-11-30 01:12:52,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states and 383 transitions. [2020-11-30 01:12:52,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 53. [2020-11-30 01:12:52,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2020-11-30 01:12:52,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 79 transitions. [2020-11-30 01:12:52,755 INFO L714 BuchiCegarLoop]: Abstraction has 53 states and 79 transitions. [2020-11-30 01:12:52,755 INFO L594 BuchiCegarLoop]: Abstraction has 53 states and 79 transitions. [2020-11-30 01:12:52,755 INFO L427 BuchiCegarLoop]: ======== Iteration 46============ [2020-11-30 01:12:52,755 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 79 transitions. [2020-11-30 01:12:52,756 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:52,756 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:52,756 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:52,756 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [21, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:52,756 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:52,756 INFO L794 eck$LassoCheckResult]: Stem: 8313#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 8310#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 8311#L26 main_~i~0 := 0; 8312#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 8316#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 8317#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8321#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8362#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8361#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8360#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8359#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8358#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8357#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8356#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8355#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8354#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8353#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8352#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8351#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8350#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8349#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8348#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8347#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8346#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8345#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8344#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 8343#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 8318#L35-2 assume main_~j~0 >= 100; 8315#L39 [2020-11-30 01:12:52,756 INFO L796 eck$LassoCheckResult]: Loop: 8315#L39 assume true; 8315#L39 [2020-11-30 01:12:52,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:52,757 INFO L82 PathProgramCache]: Analyzing trace with hash 1826871803, now seen corresponding path program 21 times [2020-11-30 01:12:52,757 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:52,757 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152796736] [2020-11-30 01:12:52,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:52,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:53,102 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:53,102 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152796736] [2020-11-30 01:12:53,102 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [638550167] [2020-11-30 01:12:53,102 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:53,172 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2020-11-30 01:12:53,173 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:53,174 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 23 conjunts are in the unsatisfiable core [2020-11-30 01:12:53,175 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:53,212 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:53,212 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:53,212 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 24 [2020-11-30 01:12:53,212 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [112364469] [2020-11-30 01:12:53,213 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:53,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:53,213 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 45 times [2020-11-30 01:12:53,213 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:53,213 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139079177] [2020-11-30 01:12:53,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:53,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:53,215 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:53,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:53,216 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:53,216 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:53,230 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:53,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2020-11-30 01:12:53,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2020-11-30 01:12:53,231 INFO L87 Difference]: Start difference. First operand 53 states and 79 transitions. cyclomatic complexity: 29 Second operand 25 states. [2020-11-30 01:12:53,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:53,281 INFO L93 Difference]: Finished difference Result 55 states and 81 transitions. [2020-11-30 01:12:53,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2020-11-30 01:12:53,281 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 81 transitions. [2020-11-30 01:12:53,282 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:53,282 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 54 states and 80 transitions. [2020-11-30 01:12:53,282 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:53,282 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:53,282 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 80 transitions. [2020-11-30 01:12:53,283 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:53,283 INFO L691 BuchiCegarLoop]: Abstraction has 54 states and 80 transitions. [2020-11-30 01:12:53,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 80 transitions. [2020-11-30 01:12:53,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2020-11-30 01:12:53,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2020-11-30 01:12:53,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 80 transitions. [2020-11-30 01:12:53,284 INFO L714 BuchiCegarLoop]: Abstraction has 54 states and 80 transitions. [2020-11-30 01:12:53,284 INFO L594 BuchiCegarLoop]: Abstraction has 54 states and 80 transitions. [2020-11-30 01:12:53,284 INFO L427 BuchiCegarLoop]: ======== Iteration 47============ [2020-11-30 01:12:53,284 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 80 transitions. [2020-11-30 01:12:53,284 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:53,285 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:53,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:53,285 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [23, 1, 1, 1, 1, 1] [2020-11-30 01:12:53,285 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:53,285 INFO L794 eck$LassoCheckResult]: Stem: 8530#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 8527#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 8528#L26 main_~i~0 := 0; 8529#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8536#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8537#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8577#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8575#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8573#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8571#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8569#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8567#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8565#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8563#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8561#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8559#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8557#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8555#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8553#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8551#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8549#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8547#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8545#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8543#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8541#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 8539#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 8531#L29-2 assume main_~i~0 >= 100; 8532#L39 [2020-11-30 01:12:53,285 INFO L796 eck$LassoCheckResult]: Loop: 8532#L39 assume true; 8532#L39 [2020-11-30 01:12:53,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:53,286 INFO L82 PathProgramCache]: Analyzing trace with hash 892698324, now seen corresponding path program 23 times [2020-11-30 01:12:53,286 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:53,286 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188561001] [2020-11-30 01:12:53,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:53,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:53,623 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:53,623 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188561001] [2020-11-30 01:12:53,623 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1848286038] [2020-11-30 01:12:53,623 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:53,662 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2020-11-30 01:12:53,662 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:53,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 122 conjuncts, 25 conjunts are in the unsatisfiable core [2020-11-30 01:12:53,663 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:53,686 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:53,686 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:53,686 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 26 [2020-11-30 01:12:53,686 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570775803] [2020-11-30 01:12:53,687 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:53,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:53,687 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 46 times [2020-11-30 01:12:53,687 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:53,687 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709098835] [2020-11-30 01:12:53,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:53,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:53,689 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:53,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:53,690 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:53,690 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:53,696 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:53,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2020-11-30 01:12:53,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2020-11-30 01:12:53,696 INFO L87 Difference]: Start difference. First operand 54 states and 80 transitions. cyclomatic complexity: 29 Second operand 27 states. [2020-11-30 01:12:53,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:53,950 INFO L93 Difference]: Finished difference Result 383 states and 412 transitions. [2020-11-30 01:12:53,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-11-30 01:12:53,950 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 383 states and 412 transitions. [2020-11-30 01:12:53,952 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:53,954 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 383 states to 382 states and 411 transitions. [2020-11-30 01:12:53,954 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:53,955 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:53,955 INFO L73 IsDeterministic]: Start isDeterministic. Operand 382 states and 411 transitions. [2020-11-30 01:12:53,955 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:53,955 INFO L691 BuchiCegarLoop]: Abstraction has 382 states and 411 transitions. [2020-11-30 01:12:53,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states and 411 transitions. [2020-11-30 01:12:53,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 55. [2020-11-30 01:12:53,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2020-11-30 01:12:53,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 82 transitions. [2020-11-30 01:12:53,958 INFO L714 BuchiCegarLoop]: Abstraction has 55 states and 82 transitions. [2020-11-30 01:12:53,958 INFO L594 BuchiCegarLoop]: Abstraction has 55 states and 82 transitions. [2020-11-30 01:12:53,958 INFO L427 BuchiCegarLoop]: ======== Iteration 48============ [2020-11-30 01:12:53,958 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 82 transitions. [2020-11-30 01:12:53,959 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:53,959 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:53,959 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:53,959 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [22, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:53,959 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:53,959 INFO L794 eck$LassoCheckResult]: Stem: 9078#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 9075#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 9076#L26 main_~i~0 := 0; 9077#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 9081#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 9082#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9086#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9129#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9128#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9127#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9126#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9125#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9124#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9123#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9122#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9121#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9120#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9119#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9118#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9117#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9116#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9115#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9114#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9113#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9112#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9111#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9110#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9109#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 9083#L35-2 assume main_~j~0 >= 100; 9080#L39 [2020-11-30 01:12:53,959 INFO L796 eck$LassoCheckResult]: Loop: 9080#L39 assume true; 9080#L39 [2020-11-30 01:12:53,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:53,960 INFO L82 PathProgramCache]: Analyzing trace with hash 798452756, now seen corresponding path program 22 times [2020-11-30 01:12:53,960 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:53,960 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437932820] [2020-11-30 01:12:53,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:53,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:54,344 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:54,344 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437932820] [2020-11-30 01:12:54,344 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [759213703] [2020-11-30 01:12:54,344 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:54,446 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:12:54,446 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:54,448 INFO L263 TraceCheckSpWp]: Trace formula consists of 166 conjuncts, 24 conjunts are in the unsatisfiable core [2020-11-30 01:12:54,450 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:54,485 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:54,485 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:54,486 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 25 [2020-11-30 01:12:54,486 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338019646] [2020-11-30 01:12:54,486 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:54,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:54,487 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 47 times [2020-11-30 01:12:54,487 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:54,487 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634740581] [2020-11-30 01:12:54,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:54,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:54,489 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:54,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:54,489 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:54,490 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:54,494 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:54,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2020-11-30 01:12:54,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2020-11-30 01:12:54,495 INFO L87 Difference]: Start difference. First operand 55 states and 82 transitions. cyclomatic complexity: 30 Second operand 26 states. [2020-11-30 01:12:54,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:54,546 INFO L93 Difference]: Finished difference Result 57 states and 84 transitions. [2020-11-30 01:12:54,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2020-11-30 01:12:54,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 84 transitions. [2020-11-30 01:12:54,548 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:54,548 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 56 states and 83 transitions. [2020-11-30 01:12:54,548 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:54,548 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:54,549 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 83 transitions. [2020-11-30 01:12:54,549 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:54,549 INFO L691 BuchiCegarLoop]: Abstraction has 56 states and 83 transitions. [2020-11-30 01:12:54,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 83 transitions. [2020-11-30 01:12:54,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2020-11-30 01:12:54,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2020-11-30 01:12:54,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 83 transitions. [2020-11-30 01:12:54,551 INFO L714 BuchiCegarLoop]: Abstraction has 56 states and 83 transitions. [2020-11-30 01:12:54,551 INFO L594 BuchiCegarLoop]: Abstraction has 56 states and 83 transitions. [2020-11-30 01:12:54,551 INFO L427 BuchiCegarLoop]: ======== Iteration 49============ [2020-11-30 01:12:54,552 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 83 transitions. [2020-11-30 01:12:54,552 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:54,552 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:54,552 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:54,553 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [24, 1, 1, 1, 1, 1] [2020-11-30 01:12:54,553 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:54,553 INFO L794 eck$LassoCheckResult]: Stem: 9303#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 9300#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 9301#L26 main_~i~0 := 0; 9302#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9309#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9310#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9354#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9352#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9350#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9348#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9346#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9344#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9342#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9340#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9338#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9336#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9334#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9332#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9330#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9328#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9326#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9324#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9322#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9320#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9318#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9316#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9314#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 9312#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 9304#L29-2 assume main_~i~0 >= 100; 9305#L39 [2020-11-30 01:12:54,554 INFO L796 eck$LassoCheckResult]: Loop: 9305#L39 assume true; 9305#L39 [2020-11-30 01:12:54,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:54,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1903845961, now seen corresponding path program 24 times [2020-11-30 01:12:54,554 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:54,554 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135962732] [2020-11-30 01:12:54,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:54,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:55,128 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:55,128 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [135962732] [2020-11-30 01:12:55,128 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1277589411] [2020-11-30 01:12:55,129 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:55,196 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2020-11-30 01:12:55,197 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:55,198 INFO L263 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 26 conjunts are in the unsatisfiable core [2020-11-30 01:12:55,199 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:55,257 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:55,257 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:55,258 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 27 [2020-11-30 01:12:55,258 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857039348] [2020-11-30 01:12:55,258 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:55,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:55,259 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 48 times [2020-11-30 01:12:55,259 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:55,259 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209515019] [2020-11-30 01:12:55,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:55,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:55,261 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:55,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:55,262 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:55,263 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:55,267 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:55,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2020-11-30 01:12:55,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2020-11-30 01:12:55,268 INFO L87 Difference]: Start difference. First operand 56 states and 83 transitions. cyclomatic complexity: 30 Second operand 28 states. [2020-11-30 01:12:55,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:55,587 INFO L93 Difference]: Finished difference Result 411 states and 441 transitions. [2020-11-30 01:12:55,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2020-11-30 01:12:55,588 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 411 states and 441 transitions. [2020-11-30 01:12:55,591 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:55,594 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 411 states to 410 states and 440 transitions. [2020-11-30 01:12:55,594 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:55,594 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:55,595 INFO L73 IsDeterministic]: Start isDeterministic. Operand 410 states and 440 transitions. [2020-11-30 01:12:55,595 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:55,595 INFO L691 BuchiCegarLoop]: Abstraction has 410 states and 440 transitions. [2020-11-30 01:12:55,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states and 440 transitions. [2020-11-30 01:12:55,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 57. [2020-11-30 01:12:55,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2020-11-30 01:12:55,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 85 transitions. [2020-11-30 01:12:55,600 INFO L714 BuchiCegarLoop]: Abstraction has 57 states and 85 transitions. [2020-11-30 01:12:55,600 INFO L594 BuchiCegarLoop]: Abstraction has 57 states and 85 transitions. [2020-11-30 01:12:55,600 INFO L427 BuchiCegarLoop]: ======== Iteration 50============ [2020-11-30 01:12:55,601 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 85 transitions. [2020-11-30 01:12:55,601 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:55,601 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:55,602 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:55,602 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [23, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:55,602 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:55,603 INFO L794 eck$LassoCheckResult]: Stem: 9885#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 9882#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 9883#L26 main_~i~0 := 0; 9884#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 9888#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 9889#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9893#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9938#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9937#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9936#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9935#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9934#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9933#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9932#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9931#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9930#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9929#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9928#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9927#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9926#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9925#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9924#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9923#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9922#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9921#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9920#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9919#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9918#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 9917#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 9890#L35-2 assume main_~j~0 >= 100; 9887#L39 [2020-11-30 01:12:55,603 INFO L796 eck$LassoCheckResult]: Loop: 9887#L39 assume true; 9887#L39 [2020-11-30 01:12:55,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:55,603 INFO L82 PathProgramCache]: Analyzing trace with hash -1017766629, now seen corresponding path program 23 times [2020-11-30 01:12:55,604 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:55,604 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301187537] [2020-11-30 01:12:55,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:55,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:56,001 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:56,002 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301187537] [2020-11-30 01:12:56,002 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [350252078] [2020-11-30 01:12:56,002 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:56,052 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2020-11-30 01:12:56,052 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:56,054 INFO L263 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 25 conjunts are in the unsatisfiable core [2020-11-30 01:12:56,055 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:56,073 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:56,074 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:56,074 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 26 [2020-11-30 01:12:56,074 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522181279] [2020-11-30 01:12:56,074 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:56,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:56,075 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 49 times [2020-11-30 01:12:56,075 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:56,075 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405190272] [2020-11-30 01:12:56,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:56,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:56,079 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:56,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:56,080 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:56,081 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:56,095 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:56,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2020-11-30 01:12:56,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2020-11-30 01:12:56,096 INFO L87 Difference]: Start difference. First operand 57 states and 85 transitions. cyclomatic complexity: 31 Second operand 27 states. [2020-11-30 01:12:56,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:56,184 INFO L93 Difference]: Finished difference Result 59 states and 87 transitions. [2020-11-30 01:12:56,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-11-30 01:12:56,185 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 87 transitions. [2020-11-30 01:12:56,186 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:56,186 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 58 states and 86 transitions. [2020-11-30 01:12:56,186 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:56,187 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:56,187 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 86 transitions. [2020-11-30 01:12:56,187 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:56,187 INFO L691 BuchiCegarLoop]: Abstraction has 58 states and 86 transitions. [2020-11-30 01:12:56,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 86 transitions. [2020-11-30 01:12:56,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2020-11-30 01:12:56,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2020-11-30 01:12:56,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 86 transitions. [2020-11-30 01:12:56,189 INFO L714 BuchiCegarLoop]: Abstraction has 58 states and 86 transitions. [2020-11-30 01:12:56,189 INFO L594 BuchiCegarLoop]: Abstraction has 58 states and 86 transitions. [2020-11-30 01:12:56,189 INFO L427 BuchiCegarLoop]: ======== Iteration 51============ [2020-11-30 01:12:56,189 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 58 states and 86 transitions. [2020-11-30 01:12:56,189 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:56,190 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:56,190 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:56,190 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [25, 1, 1, 1, 1, 1] [2020-11-30 01:12:56,190 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:56,191 INFO L794 eck$LassoCheckResult]: Stem: 10118#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 10115#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 10116#L26 main_~i~0 := 0; 10117#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10124#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10125#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10171#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10169#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10167#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10165#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10163#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10161#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10159#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10157#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10155#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10153#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10151#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10149#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10147#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10145#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10143#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10141#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10139#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10137#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10135#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10133#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10131#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10129#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10127#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 10119#L29-2 assume main_~i~0 >= 100; 10120#L39 [2020-11-30 01:12:56,191 INFO L796 eck$LassoCheckResult]: Loop: 10120#L39 assume true; 10120#L39 [2020-11-30 01:12:56,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:56,191 INFO L82 PathProgramCache]: Analyzing trace with hash -1110315660, now seen corresponding path program 25 times [2020-11-30 01:12:56,192 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:56,192 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088638941] [2020-11-30 01:12:56,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:56,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:56,661 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:56,661 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088638941] [2020-11-30 01:12:56,661 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1540633427] [2020-11-30 01:12:56,661 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:56,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:56,702 INFO L263 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 27 conjunts are in the unsatisfiable core [2020-11-30 01:12:56,703 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:56,725 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:56,725 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:56,725 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 28 [2020-11-30 01:12:56,726 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594721200] [2020-11-30 01:12:56,726 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:56,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:56,727 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 50 times [2020-11-30 01:12:56,727 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:56,727 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591048173] [2020-11-30 01:12:56,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:56,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:56,729 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:56,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:56,729 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:56,730 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:56,748 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:56,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2020-11-30 01:12:56,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2020-11-30 01:12:56,749 INFO L87 Difference]: Start difference. First operand 58 states and 86 transitions. cyclomatic complexity: 31 Second operand 29 states. [2020-11-30 01:12:57,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:57,064 INFO L93 Difference]: Finished difference Result 440 states and 471 transitions. [2020-11-30 01:12:57,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2020-11-30 01:12:57,065 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 440 states and 471 transitions. [2020-11-30 01:12:57,068 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:57,071 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 440 states to 439 states and 470 transitions. [2020-11-30 01:12:57,071 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:57,071 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:57,072 INFO L73 IsDeterministic]: Start isDeterministic. Operand 439 states and 470 transitions. [2020-11-30 01:12:57,072 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:57,072 INFO L691 BuchiCegarLoop]: Abstraction has 439 states and 470 transitions. [2020-11-30 01:12:57,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states and 470 transitions. [2020-11-30 01:12:57,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 59. [2020-11-30 01:12:57,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2020-11-30 01:12:57,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 88 transitions. [2020-11-30 01:12:57,077 INFO L714 BuchiCegarLoop]: Abstraction has 59 states and 88 transitions. [2020-11-30 01:12:57,077 INFO L594 BuchiCegarLoop]: Abstraction has 59 states and 88 transitions. [2020-11-30 01:12:57,077 INFO L427 BuchiCegarLoop]: ======== Iteration 52============ [2020-11-30 01:12:57,078 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 88 transitions. [2020-11-30 01:12:57,078 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:57,078 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:57,078 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:57,079 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [24, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:57,079 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:57,079 INFO L794 eck$LassoCheckResult]: Stem: 10735#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 10732#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 10733#L26 main_~i~0 := 0; 10734#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 10738#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 10739#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10743#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10790#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10789#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10788#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10787#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10786#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10785#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10784#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10783#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10782#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10781#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10780#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10779#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10778#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10777#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10776#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10775#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10774#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10773#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10772#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10771#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10770#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10769#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 10768#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 10740#L35-2 assume main_~j~0 >= 100; 10737#L39 [2020-11-30 01:12:57,080 INFO L796 eck$LassoCheckResult]: Loop: 10737#L39 assume true; 10737#L39 [2020-11-30 01:12:57,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:57,080 INFO L82 PathProgramCache]: Analyzing trace with hash -1485992716, now seen corresponding path program 24 times [2020-11-30 01:12:57,080 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:57,080 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358302050] [2020-11-30 01:12:57,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:57,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:57,500 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:57,500 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [358302050] [2020-11-30 01:12:57,500 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [920110587] [2020-11-30 01:12:57,500 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:57,560 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2020-11-30 01:12:57,560 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:57,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 26 conjunts are in the unsatisfiable core [2020-11-30 01:12:57,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:57,583 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:57,584 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:57,584 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 27 [2020-11-30 01:12:57,584 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110427814] [2020-11-30 01:12:57,585 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:57,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:57,585 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 51 times [2020-11-30 01:12:57,585 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:57,586 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506147670] [2020-11-30 01:12:57,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:57,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:57,587 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:57,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:57,588 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:57,589 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:57,603 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:57,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2020-11-30 01:12:57,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2020-11-30 01:12:57,604 INFO L87 Difference]: Start difference. First operand 59 states and 88 transitions. cyclomatic complexity: 32 Second operand 28 states. [2020-11-30 01:12:57,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:57,666 INFO L93 Difference]: Finished difference Result 61 states and 90 transitions. [2020-11-30 01:12:57,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2020-11-30 01:12:57,667 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 61 states and 90 transitions. [2020-11-30 01:12:57,668 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:57,668 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 61 states to 60 states and 89 transitions. [2020-11-30 01:12:57,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:57,668 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:57,668 INFO L73 IsDeterministic]: Start isDeterministic. Operand 60 states and 89 transitions. [2020-11-30 01:12:57,668 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:57,669 INFO L691 BuchiCegarLoop]: Abstraction has 60 states and 89 transitions. [2020-11-30 01:12:57,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states and 89 transitions. [2020-11-30 01:12:57,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2020-11-30 01:12:57,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2020-11-30 01:12:57,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 89 transitions. [2020-11-30 01:12:57,670 INFO L714 BuchiCegarLoop]: Abstraction has 60 states and 89 transitions. [2020-11-30 01:12:57,670 INFO L594 BuchiCegarLoop]: Abstraction has 60 states and 89 transitions. [2020-11-30 01:12:57,670 INFO L427 BuchiCegarLoop]: ======== Iteration 53============ [2020-11-30 01:12:57,670 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 60 states and 89 transitions. [2020-11-30 01:12:57,670 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:57,671 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:57,671 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:57,671 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [26, 1, 1, 1, 1, 1] [2020-11-30 01:12:57,671 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:57,671 INFO L794 eck$LassoCheckResult]: Stem: 10976#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 10973#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 10974#L26 main_~i~0 := 0; 10975#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10982#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10983#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11031#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11029#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11027#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11025#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11023#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11021#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11019#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11017#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11015#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11013#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11011#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11009#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11007#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11005#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11003#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11001#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10999#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10995#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10993#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10991#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10989#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10987#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 10985#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 10977#L29-2 assume main_~i~0 >= 100; 10978#L39 [2020-11-30 01:12:57,671 INFO L796 eck$LassoCheckResult]: Loop: 10978#L39 assume true; 10978#L39 [2020-11-30 01:12:57,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:57,672 INFO L82 PathProgramCache]: Analyzing trace with hash -60045399, now seen corresponding path program 26 times [2020-11-30 01:12:57,672 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:57,672 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138278722] [2020-11-30 01:12:57,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:57,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:58,172 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:58,172 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138278722] [2020-11-30 01:12:58,173 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1448919206] [2020-11-30 01:12:58,173 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:58,209 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:12:58,209 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:58,210 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 28 conjunts are in the unsatisfiable core [2020-11-30 01:12:58,211 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:58,230 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:58,231 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:58,231 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 29 [2020-11-30 01:12:58,231 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902887761] [2020-11-30 01:12:58,231 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:58,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:58,232 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 52 times [2020-11-30 01:12:58,232 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:58,232 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649304093] [2020-11-30 01:12:58,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:58,234 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:58,235 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:58,235 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:58,246 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:58,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2020-11-30 01:12:58,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2020-11-30 01:12:58,247 INFO L87 Difference]: Start difference. First operand 60 states and 89 transitions. cyclomatic complexity: 32 Second operand 30 states. [2020-11-30 01:12:58,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:58,546 INFO L93 Difference]: Finished difference Result 470 states and 502 transitions. [2020-11-30 01:12:58,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2020-11-30 01:12:58,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 470 states and 502 transitions. [2020-11-30 01:12:58,549 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:12:58,551 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 470 states to 469 states and 501 transitions. [2020-11-30 01:12:58,552 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:12:58,552 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:12:58,552 INFO L73 IsDeterministic]: Start isDeterministic. Operand 469 states and 501 transitions. [2020-11-30 01:12:58,552 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:58,552 INFO L691 BuchiCegarLoop]: Abstraction has 469 states and 501 transitions. [2020-11-30 01:12:58,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states and 501 transitions. [2020-11-30 01:12:58,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 61. [2020-11-30 01:12:58,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2020-11-30 01:12:58,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 91 transitions. [2020-11-30 01:12:58,555 INFO L714 BuchiCegarLoop]: Abstraction has 61 states and 91 transitions. [2020-11-30 01:12:58,556 INFO L594 BuchiCegarLoop]: Abstraction has 61 states and 91 transitions. [2020-11-30 01:12:58,556 INFO L427 BuchiCegarLoop]: ======== Iteration 54============ [2020-11-30 01:12:58,556 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 91 transitions. [2020-11-30 01:12:58,556 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:58,556 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:58,556 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:58,556 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [25, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:12:58,556 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:58,557 INFO L794 eck$LassoCheckResult]: Stem: 11629#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 11626#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 11627#L26 main_~i~0 := 0; 11628#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 11632#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 11633#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11637#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11686#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11685#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11684#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11683#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11682#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11681#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11680#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11679#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11678#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11677#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11676#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11675#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11674#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11673#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11672#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11671#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11670#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11669#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11668#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11667#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11666#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11665#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11664#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 11663#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 11634#L35-2 assume main_~j~0 >= 100; 11631#L39 [2020-11-30 01:12:58,557 INFO L796 eck$LassoCheckResult]: Loop: 11631#L39 assume true; 11631#L39 [2020-11-30 01:12:58,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:58,557 INFO L82 PathProgramCache]: Analyzing trace with hash 1178867771, now seen corresponding path program 25 times [2020-11-30 01:12:58,558 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:58,558 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [197297198] [2020-11-30 01:12:58,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:58,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:58,963 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:58,963 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [197297198] [2020-11-30 01:12:58,963 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [697004873] [2020-11-30 01:12:58,963 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:59,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:59,031 INFO L263 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 27 conjunts are in the unsatisfiable core [2020-11-30 01:12:59,031 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:59,049 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:59,050 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:59,050 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 28 [2020-11-30 01:12:59,050 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818645216] [2020-11-30 01:12:59,050 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:59,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:59,051 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 53 times [2020-11-30 01:12:59,051 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:59,051 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [26580717] [2020-11-30 01:12:59,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:59,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:59,053 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:59,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:59,053 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:59,054 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:59,072 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:59,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2020-11-30 01:12:59,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2020-11-30 01:12:59,073 INFO L87 Difference]: Start difference. First operand 61 states and 91 transitions. cyclomatic complexity: 33 Second operand 29 states. [2020-11-30 01:12:59,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:12:59,114 INFO L93 Difference]: Finished difference Result 63 states and 93 transitions. [2020-11-30 01:12:59,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2020-11-30 01:12:59,115 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 93 transitions. [2020-11-30 01:12:59,115 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:59,116 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 62 states and 92 transitions. [2020-11-30 01:12:59,116 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:12:59,116 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:12:59,116 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 92 transitions. [2020-11-30 01:12:59,116 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:12:59,116 INFO L691 BuchiCegarLoop]: Abstraction has 62 states and 92 transitions. [2020-11-30 01:12:59,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 92 transitions. [2020-11-30 01:12:59,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2020-11-30 01:12:59,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2020-11-30 01:12:59,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 92 transitions. [2020-11-30 01:12:59,118 INFO L714 BuchiCegarLoop]: Abstraction has 62 states and 92 transitions. [2020-11-30 01:12:59,118 INFO L594 BuchiCegarLoop]: Abstraction has 62 states and 92 transitions. [2020-11-30 01:12:59,118 INFO L427 BuchiCegarLoop]: ======== Iteration 55============ [2020-11-30 01:12:59,118 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 92 transitions. [2020-11-30 01:12:59,118 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:12:59,119 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:12:59,119 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:12:59,119 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [27, 1, 1, 1, 1, 1] [2020-11-30 01:12:59,119 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:12:59,119 INFO L794 eck$LassoCheckResult]: Stem: 11878#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 11875#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 11876#L26 main_~i~0 := 0; 11877#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11884#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11885#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11935#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11933#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11931#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11929#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11927#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11925#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11923#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11921#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11919#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11917#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11915#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11913#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11911#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11909#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11907#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11905#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11903#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11901#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11899#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11897#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11895#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11893#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11891#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11889#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 11887#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 11879#L29-2 assume main_~i~0 >= 100; 11880#L39 [2020-11-30 01:12:59,119 INFO L796 eck$LassoCheckResult]: Loop: 11880#L39 assume true; 11880#L39 [2020-11-30 01:12:59,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:59,120 INFO L82 PathProgramCache]: Analyzing trace with hash -1861405676, now seen corresponding path program 27 times [2020-11-30 01:12:59,120 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:59,120 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135195948] [2020-11-30 01:12:59,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:59,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:12:59,704 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:59,705 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [135195948] [2020-11-30 01:12:59,705 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2049613052] [2020-11-30 01:12:59,705 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:12:59,752 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2020-11-30 01:12:59,752 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:12:59,753 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 29 conjunts are in the unsatisfiable core [2020-11-30 01:12:59,753 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:12:59,772 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:12:59,772 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:12:59,772 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 30 [2020-11-30 01:12:59,772 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [989622151] [2020-11-30 01:12:59,772 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:12:59,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:12:59,773 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 54 times [2020-11-30 01:12:59,773 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:12:59,773 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302063679] [2020-11-30 01:12:59,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:12:59,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:59,774 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:59,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:12:59,774 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:12:59,774 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:12:59,776 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:12:59,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2020-11-30 01:12:59,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2020-11-30 01:12:59,777 INFO L87 Difference]: Start difference. First operand 62 states and 92 transitions. cyclomatic complexity: 33 Second operand 31 states. [2020-11-30 01:13:00,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:00,014 INFO L93 Difference]: Finished difference Result 501 states and 534 transitions. [2020-11-30 01:13:00,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2020-11-30 01:13:00,015 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 501 states and 534 transitions. [2020-11-30 01:13:00,017 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:00,020 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 501 states to 500 states and 533 transitions. [2020-11-30 01:13:00,020 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:00,020 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:00,020 INFO L73 IsDeterministic]: Start isDeterministic. Operand 500 states and 533 transitions. [2020-11-30 01:13:00,020 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:00,021 INFO L691 BuchiCegarLoop]: Abstraction has 500 states and 533 transitions. [2020-11-30 01:13:00,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 500 states and 533 transitions. [2020-11-30 01:13:00,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 500 to 63. [2020-11-30 01:13:00,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2020-11-30 01:13:00,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 94 transitions. [2020-11-30 01:13:00,024 INFO L714 BuchiCegarLoop]: Abstraction has 63 states and 94 transitions. [2020-11-30 01:13:00,024 INFO L594 BuchiCegarLoop]: Abstraction has 63 states and 94 transitions. [2020-11-30 01:13:00,024 INFO L427 BuchiCegarLoop]: ======== Iteration 56============ [2020-11-30 01:13:00,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 94 transitions. [2020-11-30 01:13:00,025 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:00,025 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:00,025 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:00,025 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [26, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:00,025 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:00,025 INFO L794 eck$LassoCheckResult]: Stem: 12568#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 12565#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 12566#L26 main_~i~0 := 0; 12567#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 12571#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 12572#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12576#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12627#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12626#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12625#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12624#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12623#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12622#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12621#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12620#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12619#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12618#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12617#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12616#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12615#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12614#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12613#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12612#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12611#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12610#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12609#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12608#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12607#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12606#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12605#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12604#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 12603#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 12573#L35-2 assume main_~j~0 >= 100; 12570#L39 [2020-11-30 01:13:00,026 INFO L796 eck$LassoCheckResult]: Loop: 12570#L39 assume true; 12570#L39 [2020-11-30 01:13:00,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:00,026 INFO L82 PathProgramCache]: Analyzing trace with hash -2109803052, now seen corresponding path program 26 times [2020-11-30 01:13:00,026 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:00,026 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903442284] [2020-11-30 01:13:00,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:00,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:00,535 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:00,536 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903442284] [2020-11-30 01:13:00,536 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [83011165] [2020-11-30 01:13:00,536 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:00,584 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:13:00,584 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:00,585 INFO L263 TraceCheckSpWp]: Trace formula consists of 190 conjuncts, 28 conjunts are in the unsatisfiable core [2020-11-30 01:13:00,586 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:00,599 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:00,600 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:00,600 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 29 [2020-11-30 01:13:00,600 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108214316] [2020-11-30 01:13:00,600 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:00,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:00,601 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 55 times [2020-11-30 01:13:00,601 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:00,601 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523379107] [2020-11-30 01:13:00,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:00,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:00,602 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:00,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:00,603 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:00,604 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:00,611 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:00,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2020-11-30 01:13:00,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2020-11-30 01:13:00,611 INFO L87 Difference]: Start difference. First operand 63 states and 94 transitions. cyclomatic complexity: 34 Second operand 30 states. [2020-11-30 01:13:00,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:00,672 INFO L93 Difference]: Finished difference Result 65 states and 96 transitions. [2020-11-30 01:13:00,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2020-11-30 01:13:00,673 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 96 transitions. [2020-11-30 01:13:00,673 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:00,674 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 64 states and 95 transitions. [2020-11-30 01:13:00,674 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:00,674 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:00,674 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 95 transitions. [2020-11-30 01:13:00,674 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:00,674 INFO L691 BuchiCegarLoop]: Abstraction has 64 states and 95 transitions. [2020-11-30 01:13:00,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 95 transitions. [2020-11-30 01:13:00,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 64. [2020-11-30 01:13:00,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2020-11-30 01:13:00,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 95 transitions. [2020-11-30 01:13:00,676 INFO L714 BuchiCegarLoop]: Abstraction has 64 states and 95 transitions. [2020-11-30 01:13:00,676 INFO L594 BuchiCegarLoop]: Abstraction has 64 states and 95 transitions. [2020-11-30 01:13:00,676 INFO L427 BuchiCegarLoop]: ======== Iteration 57============ [2020-11-30 01:13:00,676 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 95 transitions. [2020-11-30 01:13:00,676 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:00,677 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:00,677 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:00,677 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [28, 1, 1, 1, 1, 1] [2020-11-30 01:13:00,677 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:00,677 INFO L794 eck$LassoCheckResult]: Stem: 12825#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 12822#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 12823#L26 main_~i~0 := 0; 12824#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12831#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12832#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12884#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12882#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12880#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12878#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12876#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12874#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12872#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12870#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12868#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12866#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12864#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12862#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12860#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12858#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12856#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12854#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12852#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12850#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12848#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12846#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12844#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12842#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12840#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12838#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12836#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 12834#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 12826#L29-2 assume main_~i~0 >= 100; 12827#L39 [2020-11-30 01:13:00,677 INFO L796 eck$LassoCheckResult]: Loop: 12827#L39 assume true; 12827#L39 [2020-11-30 01:13:00,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:00,678 INFO L82 PathProgramCache]: Analyzing trace with hash -1868999415, now seen corresponding path program 28 times [2020-11-30 01:13:00,678 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:00,678 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513410342] [2020-11-30 01:13:00,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:00,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:01,145 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:01,145 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513410342] [2020-11-30 01:13:01,145 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2100979023] [2020-11-30 01:13:01,145 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:01,183 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:13:01,183 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:01,184 INFO L263 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 30 conjunts are in the unsatisfiable core [2020-11-30 01:13:01,185 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:01,207 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:01,207 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:01,207 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 31 [2020-11-30 01:13:01,208 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923534570] [2020-11-30 01:13:01,208 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:01,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:01,208 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 56 times [2020-11-30 01:13:01,208 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:01,208 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231788143] [2020-11-30 01:13:01,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:01,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:01,210 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:01,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:01,211 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:01,211 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:01,214 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:01,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2020-11-30 01:13:01,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2020-11-30 01:13:01,215 INFO L87 Difference]: Start difference. First operand 64 states and 95 transitions. cyclomatic complexity: 34 Second operand 32 states. [2020-11-30 01:13:01,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:01,472 INFO L93 Difference]: Finished difference Result 533 states and 567 transitions. [2020-11-30 01:13:01,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2020-11-30 01:13:01,472 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 533 states and 567 transitions. [2020-11-30 01:13:01,474 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:01,477 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 533 states to 532 states and 566 transitions. [2020-11-30 01:13:01,477 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:01,477 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:01,477 INFO L73 IsDeterministic]: Start isDeterministic. Operand 532 states and 566 transitions. [2020-11-30 01:13:01,478 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:01,478 INFO L691 BuchiCegarLoop]: Abstraction has 532 states and 566 transitions. [2020-11-30 01:13:01,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 532 states and 566 transitions. [2020-11-30 01:13:01,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 532 to 65. [2020-11-30 01:13:01,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2020-11-30 01:13:01,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 97 transitions. [2020-11-30 01:13:01,482 INFO L714 BuchiCegarLoop]: Abstraction has 65 states and 97 transitions. [2020-11-30 01:13:01,482 INFO L594 BuchiCegarLoop]: Abstraction has 65 states and 97 transitions. [2020-11-30 01:13:01,482 INFO L427 BuchiCegarLoop]: ======== Iteration 58============ [2020-11-30 01:13:01,482 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 97 transitions. [2020-11-30 01:13:01,483 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:01,483 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:01,483 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:01,483 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [27, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:01,483 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:01,484 INFO L794 eck$LassoCheckResult]: Stem: 13553#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 13550#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 13551#L26 main_~i~0 := 0; 13552#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 13556#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 13557#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13561#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13614#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13613#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13612#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13611#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13610#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13609#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13608#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13607#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13606#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13605#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13604#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13603#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13602#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13601#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13600#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13599#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13598#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13597#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13596#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13595#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13594#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13593#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13592#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13591#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13590#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 13589#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 13558#L35-2 assume main_~j~0 >= 100; 13555#L39 [2020-11-30 01:13:01,484 INFO L796 eck$LassoCheckResult]: Loop: 13555#L39 assume true; 13555#L39 [2020-11-30 01:13:01,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:01,484 INFO L82 PathProgramCache]: Analyzing trace with hash -979383461, now seen corresponding path program 27 times [2020-11-30 01:13:01,485 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:01,485 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616444638] [2020-11-30 01:13:01,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:01,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:01,917 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:01,917 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616444638] [2020-11-30 01:13:01,917 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [356881365] [2020-11-30 01:13:01,917 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:01,979 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2020-11-30 01:13:01,979 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:01,980 INFO L263 TraceCheckSpWp]: Trace formula consists of 196 conjuncts, 29 conjunts are in the unsatisfiable core [2020-11-30 01:13:01,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:02,003 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:02,003 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:02,003 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 30 [2020-11-30 01:13:02,003 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142804785] [2020-11-30 01:13:02,004 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:02,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:02,004 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 57 times [2020-11-30 01:13:02,004 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:02,004 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919493636] [2020-11-30 01:13:02,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:02,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:02,006 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:02,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:02,007 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:02,008 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:02,024 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:02,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2020-11-30 01:13:02,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2020-11-30 01:13:02,025 INFO L87 Difference]: Start difference. First operand 65 states and 97 transitions. cyclomatic complexity: 35 Second operand 31 states. [2020-11-30 01:13:02,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:02,079 INFO L93 Difference]: Finished difference Result 67 states and 99 transitions. [2020-11-30 01:13:02,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2020-11-30 01:13:02,079 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 99 transitions. [2020-11-30 01:13:02,079 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:02,080 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 66 states and 98 transitions. [2020-11-30 01:13:02,080 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:02,080 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:02,080 INFO L73 IsDeterministic]: Start isDeterministic. Operand 66 states and 98 transitions. [2020-11-30 01:13:02,080 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:02,080 INFO L691 BuchiCegarLoop]: Abstraction has 66 states and 98 transitions. [2020-11-30 01:13:02,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states and 98 transitions. [2020-11-30 01:13:02,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2020-11-30 01:13:02,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2020-11-30 01:13:02,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 98 transitions. [2020-11-30 01:13:02,082 INFO L714 BuchiCegarLoop]: Abstraction has 66 states and 98 transitions. [2020-11-30 01:13:02,082 INFO L594 BuchiCegarLoop]: Abstraction has 66 states and 98 transitions. [2020-11-30 01:13:02,082 INFO L427 BuchiCegarLoop]: ======== Iteration 59============ [2020-11-30 01:13:02,082 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 98 transitions. [2020-11-30 01:13:02,083 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:02,083 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:02,083 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:02,083 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [29, 1, 1, 1, 1, 1] [2020-11-30 01:13:02,083 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:02,083 INFO L794 eck$LassoCheckResult]: Stem: 13818#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 13815#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 13816#L26 main_~i~0 := 0; 13817#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13824#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13825#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13879#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13877#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13875#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13873#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13871#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13869#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13867#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13865#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13863#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13861#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13859#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13857#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13855#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13853#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13851#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13849#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13847#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13845#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13843#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13841#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13839#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13837#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13835#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13833#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13831#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13829#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 13827#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 13819#L29-2 assume main_~i~0 >= 100; 13820#L39 [2020-11-30 01:13:02,083 INFO L796 eck$LassoCheckResult]: Loop: 13820#L39 assume true; 13820#L39 [2020-11-30 01:13:02,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:02,084 INFO L82 PathProgramCache]: Analyzing trace with hash -2104405324, now seen corresponding path program 29 times [2020-11-30 01:13:02,084 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:02,084 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277231799] [2020-11-30 01:13:02,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:02,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:02,780 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:02,780 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1277231799] [2020-11-30 01:13:02,780 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [384519489] [2020-11-30 01:13:02,780 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:02,857 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2020-11-30 01:13:02,857 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:02,858 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 31 conjunts are in the unsatisfiable core [2020-11-30 01:13:02,859 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:02,881 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:02,881 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:02,881 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 32 [2020-11-30 01:13:02,881 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965037310] [2020-11-30 01:13:02,882 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:02,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:02,882 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 58 times [2020-11-30 01:13:02,882 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:02,882 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033859192] [2020-11-30 01:13:02,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:02,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:02,884 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:02,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:02,885 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:02,885 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:02,902 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:02,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2020-11-30 01:13:02,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2020-11-30 01:13:02,903 INFO L87 Difference]: Start difference. First operand 66 states and 98 transitions. cyclomatic complexity: 35 Second operand 33 states. [2020-11-30 01:13:03,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:03,161 INFO L93 Difference]: Finished difference Result 566 states and 601 transitions. [2020-11-30 01:13:03,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2020-11-30 01:13:03,161 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 566 states and 601 transitions. [2020-11-30 01:13:03,163 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:03,165 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 566 states to 565 states and 600 transitions. [2020-11-30 01:13:03,165 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:03,166 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:03,166 INFO L73 IsDeterministic]: Start isDeterministic. Operand 565 states and 600 transitions. [2020-11-30 01:13:03,166 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:03,166 INFO L691 BuchiCegarLoop]: Abstraction has 565 states and 600 transitions. [2020-11-30 01:13:03,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 565 states and 600 transitions. [2020-11-30 01:13:03,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 565 to 67. [2020-11-30 01:13:03,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2020-11-30 01:13:03,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 100 transitions. [2020-11-30 01:13:03,171 INFO L714 BuchiCegarLoop]: Abstraction has 67 states and 100 transitions. [2020-11-30 01:13:03,171 INFO L594 BuchiCegarLoop]: Abstraction has 67 states and 100 transitions. [2020-11-30 01:13:03,171 INFO L427 BuchiCegarLoop]: ======== Iteration 60============ [2020-11-30 01:13:03,171 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 67 states and 100 transitions. [2020-11-30 01:13:03,172 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:03,172 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:03,172 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:03,172 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [28, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:03,172 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:03,173 INFO L794 eck$LassoCheckResult]: Stem: 14585#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 14582#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 14583#L26 main_~i~0 := 0; 14584#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 14588#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 14589#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14593#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14648#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14647#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14646#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14645#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14644#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14643#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14642#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14641#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14640#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14639#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14638#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14637#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14636#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14635#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14634#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14633#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14632#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14631#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14630#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14629#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14628#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14627#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14626#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14625#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14624#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14623#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 14622#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 14590#L35-2 assume main_~j~0 >= 100; 14587#L39 [2020-11-30 01:13:03,173 INFO L796 eck$LassoCheckResult]: Loop: 14587#L39 assume true; 14587#L39 [2020-11-30 01:13:03,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:03,173 INFO L82 PathProgramCache]: Analyzing trace with hash -296114508, now seen corresponding path program 28 times [2020-11-30 01:13:03,174 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:03,174 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070460163] [2020-11-30 01:13:03,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:03,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:03,659 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:03,659 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070460163] [2020-11-30 01:13:03,660 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2138633429] [2020-11-30 01:13:03,660 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:03,714 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:13:03,714 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:03,715 INFO L263 TraceCheckSpWp]: Trace formula consists of 202 conjuncts, 30 conjunts are in the unsatisfiable core [2020-11-30 01:13:03,716 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:03,731 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:03,732 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:03,732 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 31 [2020-11-30 01:13:03,732 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446277395] [2020-11-30 01:13:03,732 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:03,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:03,732 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 59 times [2020-11-30 01:13:03,732 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:03,733 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [399813485] [2020-11-30 01:13:03,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:03,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:03,734 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:03,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:03,735 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:03,735 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:03,737 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:03,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2020-11-30 01:13:03,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2020-11-30 01:13:03,738 INFO L87 Difference]: Start difference. First operand 67 states and 100 transitions. cyclomatic complexity: 36 Second operand 32 states. [2020-11-30 01:13:03,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:03,804 INFO L93 Difference]: Finished difference Result 69 states and 102 transitions. [2020-11-30 01:13:03,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2020-11-30 01:13:03,805 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 102 transitions. [2020-11-30 01:13:03,805 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:03,805 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 68 states and 101 transitions. [2020-11-30 01:13:03,805 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:03,805 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:03,805 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 101 transitions. [2020-11-30 01:13:03,806 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:03,806 INFO L691 BuchiCegarLoop]: Abstraction has 68 states and 101 transitions. [2020-11-30 01:13:03,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 101 transitions. [2020-11-30 01:13:03,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2020-11-30 01:13:03,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2020-11-30 01:13:03,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 101 transitions. [2020-11-30 01:13:03,807 INFO L714 BuchiCegarLoop]: Abstraction has 68 states and 101 transitions. [2020-11-30 01:13:03,807 INFO L594 BuchiCegarLoop]: Abstraction has 68 states and 101 transitions. [2020-11-30 01:13:03,807 INFO L427 BuchiCegarLoop]: ======== Iteration 61============ [2020-11-30 01:13:03,807 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 101 transitions. [2020-11-30 01:13:03,807 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:03,807 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:03,807 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:03,808 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [30, 1, 1, 1, 1, 1] [2020-11-30 01:13:03,808 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:03,808 INFO L794 eck$LassoCheckResult]: Stem: 14858#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 14855#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 14856#L26 main_~i~0 := 0; 14857#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14864#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14865#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14921#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14919#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14917#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14915#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14913#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14911#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14909#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14907#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14905#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14903#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14901#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14899#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14897#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14895#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14893#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14891#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14889#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14887#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14885#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14883#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14881#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14879#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14877#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14875#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14873#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14871#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14869#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 14867#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 14859#L29-2 assume main_~i~0 >= 100; 14860#L39 [2020-11-30 01:13:03,808 INFO L796 eck$LassoCheckResult]: Loop: 14860#L39 assume true; 14860#L39 [2020-11-30 01:13:03,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:03,808 INFO L82 PathProgramCache]: Analyzing trace with hash -812053911, now seen corresponding path program 30 times [2020-11-30 01:13:03,808 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:03,808 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134306706] [2020-11-30 01:13:03,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:03,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:04,488 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:04,488 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134306706] [2020-11-30 01:13:04,488 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [671745676] [2020-11-30 01:13:04,489 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:04,538 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 16 check-sat command(s) [2020-11-30 01:13:04,538 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:04,539 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 32 conjunts are in the unsatisfiable core [2020-11-30 01:13:04,540 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:04,555 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:04,555 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:04,555 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 33 [2020-11-30 01:13:04,555 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248951596] [2020-11-30 01:13:04,555 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:04,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:04,556 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 60 times [2020-11-30 01:13:04,556 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:04,556 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582942687] [2020-11-30 01:13:04,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:04,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:04,558 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:04,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:04,558 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:04,559 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:04,569 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:04,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2020-11-30 01:13:04,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2020-11-30 01:13:04,570 INFO L87 Difference]: Start difference. First operand 68 states and 101 transitions. cyclomatic complexity: 36 Second operand 34 states. [2020-11-30 01:13:04,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:04,796 INFO L93 Difference]: Finished difference Result 600 states and 636 transitions. [2020-11-30 01:13:04,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2020-11-30 01:13:04,797 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 600 states and 636 transitions. [2020-11-30 01:13:04,798 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:04,801 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 600 states to 599 states and 635 transitions. [2020-11-30 01:13:04,801 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:04,802 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:04,802 INFO L73 IsDeterministic]: Start isDeterministic. Operand 599 states and 635 transitions. [2020-11-30 01:13:04,802 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:04,802 INFO L691 BuchiCegarLoop]: Abstraction has 599 states and 635 transitions. [2020-11-30 01:13:04,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 599 states and 635 transitions. [2020-11-30 01:13:04,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 599 to 69. [2020-11-30 01:13:04,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2020-11-30 01:13:04,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 103 transitions. [2020-11-30 01:13:04,806 INFO L714 BuchiCegarLoop]: Abstraction has 69 states and 103 transitions. [2020-11-30 01:13:04,806 INFO L594 BuchiCegarLoop]: Abstraction has 69 states and 103 transitions. [2020-11-30 01:13:04,806 INFO L427 BuchiCegarLoop]: ======== Iteration 62============ [2020-11-30 01:13:04,806 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 103 transitions. [2020-11-30 01:13:04,806 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:04,806 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:04,806 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:04,807 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [29, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:04,807 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:04,807 INFO L794 eck$LassoCheckResult]: Stem: 15665#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 15662#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 15663#L26 main_~i~0 := 0; 15664#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 15668#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 15669#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15673#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15730#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15729#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15728#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15727#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15726#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15725#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15724#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15723#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15722#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15721#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15720#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15719#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15718#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15717#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15716#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15715#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15714#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15713#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15712#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15711#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15710#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15709#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15708#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15707#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15706#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15705#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15704#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 15703#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 15670#L35-2 assume main_~j~0 >= 100; 15667#L39 [2020-11-30 01:13:04,807 INFO L796 eck$LassoCheckResult]: Loop: 15667#L39 assume true; 15667#L39 [2020-11-30 01:13:04,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:04,807 INFO L82 PathProgramCache]: Analyzing trace with hash -589613445, now seen corresponding path program 29 times [2020-11-30 01:13:04,807 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:04,808 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605565061] [2020-11-30 01:13:04,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:04,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:05,480 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:05,480 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605565061] [2020-11-30 01:13:05,480 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [505299674] [2020-11-30 01:13:05,480 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:05,559 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2020-11-30 01:13:05,559 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:05,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 208 conjuncts, 31 conjunts are in the unsatisfiable core [2020-11-30 01:13:05,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:05,601 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:05,601 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:05,601 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 32 [2020-11-30 01:13:05,602 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1185603737] [2020-11-30 01:13:05,602 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:05,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:05,602 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 61 times [2020-11-30 01:13:05,602 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:05,603 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899688760] [2020-11-30 01:13:05,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:05,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:05,621 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:05,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:05,621 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:05,622 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:05,631 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:05,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2020-11-30 01:13:05,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2020-11-30 01:13:05,632 INFO L87 Difference]: Start difference. First operand 69 states and 103 transitions. cyclomatic complexity: 37 Second operand 33 states. [2020-11-30 01:13:05,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:05,699 INFO L93 Difference]: Finished difference Result 71 states and 105 transitions. [2020-11-30 01:13:05,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2020-11-30 01:13:05,700 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 105 transitions. [2020-11-30 01:13:05,700 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:05,701 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 70 states and 104 transitions. [2020-11-30 01:13:05,701 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:05,701 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:05,701 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 104 transitions. [2020-11-30 01:13:05,701 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:05,701 INFO L691 BuchiCegarLoop]: Abstraction has 70 states and 104 transitions. [2020-11-30 01:13:05,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 104 transitions. [2020-11-30 01:13:05,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2020-11-30 01:13:05,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2020-11-30 01:13:05,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 104 transitions. [2020-11-30 01:13:05,703 INFO L714 BuchiCegarLoop]: Abstraction has 70 states and 104 transitions. [2020-11-30 01:13:05,703 INFO L594 BuchiCegarLoop]: Abstraction has 70 states and 104 transitions. [2020-11-30 01:13:05,703 INFO L427 BuchiCegarLoop]: ======== Iteration 63============ [2020-11-30 01:13:05,703 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 104 transitions. [2020-11-30 01:13:05,703 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:05,704 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:05,704 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:05,704 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [31, 1, 1, 1, 1, 1] [2020-11-30 01:13:05,704 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:05,704 INFO L794 eck$LassoCheckResult]: Stem: 15946#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 15943#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 15944#L26 main_~i~0 := 0; 15945#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15952#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15953#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 16011#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 16009#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 16007#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 16005#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 16003#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 16001#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15999#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15995#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15993#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15991#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15989#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15987#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15985#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15983#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15981#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15979#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15977#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15975#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15973#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15971#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15969#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15967#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15965#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15963#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15961#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15959#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15957#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 15955#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 15947#L29-2 assume main_~i~0 >= 100; 15948#L39 [2020-11-30 01:13:05,705 INFO L796 eck$LassoCheckResult]: Loop: 15948#L39 assume true; 15948#L39 [2020-11-30 01:13:05,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:05,705 INFO L82 PathProgramCache]: Analyzing trace with hash 596134228, now seen corresponding path program 31 times [2020-11-30 01:13:05,705 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:05,705 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242133535] [2020-11-30 01:13:05,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:05,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:06,294 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:06,294 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [242133535] [2020-11-30 01:13:06,294 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [56528325] [2020-11-30 01:13:06,295 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:06,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:06,334 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 33 conjunts are in the unsatisfiable core [2020-11-30 01:13:06,335 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:06,358 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:06,359 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:06,359 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 34 [2020-11-30 01:13:06,359 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110174632] [2020-11-30 01:13:06,359 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:06,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:06,359 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 62 times [2020-11-30 01:13:06,360 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:06,360 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50119468] [2020-11-30 01:13:06,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:06,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:06,361 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:06,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:06,362 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:06,362 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:06,369 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:06,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2020-11-30 01:13:06,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2020-11-30 01:13:06,370 INFO L87 Difference]: Start difference. First operand 70 states and 104 transitions. cyclomatic complexity: 37 Second operand 35 states. [2020-11-30 01:13:06,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:06,685 INFO L93 Difference]: Finished difference Result 635 states and 672 transitions. [2020-11-30 01:13:06,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2020-11-30 01:13:06,686 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 635 states and 672 transitions. [2020-11-30 01:13:06,688 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:06,691 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 635 states to 634 states and 671 transitions. [2020-11-30 01:13:06,692 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:06,692 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:06,692 INFO L73 IsDeterministic]: Start isDeterministic. Operand 634 states and 671 transitions. [2020-11-30 01:13:06,692 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:06,692 INFO L691 BuchiCegarLoop]: Abstraction has 634 states and 671 transitions. [2020-11-30 01:13:06,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 634 states and 671 transitions. [2020-11-30 01:13:06,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 634 to 71. [2020-11-30 01:13:06,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2020-11-30 01:13:06,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 106 transitions. [2020-11-30 01:13:06,696 INFO L714 BuchiCegarLoop]: Abstraction has 71 states and 106 transitions. [2020-11-30 01:13:06,696 INFO L594 BuchiCegarLoop]: Abstraction has 71 states and 106 transitions. [2020-11-30 01:13:06,696 INFO L427 BuchiCegarLoop]: ======== Iteration 64============ [2020-11-30 01:13:06,696 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71 states and 106 transitions. [2020-11-30 01:13:06,697 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:06,697 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:06,697 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:06,698 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [30, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:06,698 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:06,698 INFO L794 eck$LassoCheckResult]: Stem: 16794#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 16791#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 16792#L26 main_~i~0 := 0; 16793#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 16797#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 16798#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16802#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16861#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16860#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16859#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16858#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16857#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16856#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16855#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16854#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16853#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16852#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16851#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16850#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16849#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16848#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16847#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16846#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16845#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16844#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16843#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16842#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16841#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16840#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16839#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16838#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16837#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16836#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16835#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16834#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 16833#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 16799#L35-2 assume main_~j~0 >= 100; 16796#L39 [2020-11-30 01:13:06,699 INFO L796 eck$LassoCheckResult]: Loop: 16796#L39 assume true; 16796#L39 [2020-11-30 01:13:06,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:06,700 INFO L82 PathProgramCache]: Analyzing trace with hash -1098145900, now seen corresponding path program 30 times [2020-11-30 01:13:06,700 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:06,700 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506644049] [2020-11-30 01:13:06,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:06,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:07,445 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:07,445 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506644049] [2020-11-30 01:13:07,445 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1183848660] [2020-11-30 01:13:07,445 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:07,517 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 16 check-sat command(s) [2020-11-30 01:13:07,518 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:07,519 INFO L263 TraceCheckSpWp]: Trace formula consists of 214 conjuncts, 32 conjunts are in the unsatisfiable core [2020-11-30 01:13:07,520 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:07,540 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:07,541 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:07,541 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 33 [2020-11-30 01:13:07,541 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [403757472] [2020-11-30 01:13:07,542 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:07,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:07,542 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 63 times [2020-11-30 01:13:07,542 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:07,542 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712196322] [2020-11-30 01:13:07,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:07,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:07,544 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:07,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:07,545 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:07,545 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:07,559 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:07,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2020-11-30 01:13:07,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2020-11-30 01:13:07,560 INFO L87 Difference]: Start difference. First operand 71 states and 106 transitions. cyclomatic complexity: 38 Second operand 34 states. [2020-11-30 01:13:07,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:07,649 INFO L93 Difference]: Finished difference Result 73 states and 108 transitions. [2020-11-30 01:13:07,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2020-11-30 01:13:07,650 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 108 transitions. [2020-11-30 01:13:07,651 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:07,651 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 72 states and 107 transitions. [2020-11-30 01:13:07,651 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:07,651 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:07,651 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72 states and 107 transitions. [2020-11-30 01:13:07,652 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:07,652 INFO L691 BuchiCegarLoop]: Abstraction has 72 states and 107 transitions. [2020-11-30 01:13:07,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states and 107 transitions. [2020-11-30 01:13:07,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2020-11-30 01:13:07,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2020-11-30 01:13:07,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 107 transitions. [2020-11-30 01:13:07,654 INFO L714 BuchiCegarLoop]: Abstraction has 72 states and 107 transitions. [2020-11-30 01:13:07,654 INFO L594 BuchiCegarLoop]: Abstraction has 72 states and 107 transitions. [2020-11-30 01:13:07,654 INFO L427 BuchiCegarLoop]: ======== Iteration 65============ [2020-11-30 01:13:07,654 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72 states and 107 transitions. [2020-11-30 01:13:07,654 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:07,654 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:07,654 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:07,655 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [32, 1, 1, 1, 1, 1] [2020-11-30 01:13:07,655 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:07,655 INFO L794 eck$LassoCheckResult]: Stem: 17083#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 17080#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 17081#L26 main_~i~0 := 0; 17082#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17089#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17090#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17150#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17148#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17146#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17144#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17142#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17140#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17138#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17136#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17134#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17132#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17130#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17128#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17126#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17124#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17122#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17120#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17118#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17116#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17114#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17112#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17110#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17108#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17106#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17104#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17102#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17100#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17098#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17096#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17094#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 17092#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 17084#L29-2 assume main_~i~0 >= 100; 17085#L39 [2020-11-30 01:13:07,655 INFO L796 eck$LassoCheckResult]: Loop: 17085#L39 assume true; 17085#L39 [2020-11-30 01:13:07,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:07,656 INFO L82 PathProgramCache]: Analyzing trace with hash 1300293577, now seen corresponding path program 32 times [2020-11-30 01:13:07,656 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:07,656 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324993649] [2020-11-30 01:13:07,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:07,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:08,294 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:08,294 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324993649] [2020-11-30 01:13:08,294 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1044694418] [2020-11-30 01:13:08,294 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:08,337 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:13:08,338 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:08,339 INFO L263 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 34 conjunts are in the unsatisfiable core [2020-11-30 01:13:08,339 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:08,356 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:08,356 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:08,357 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 35 [2020-11-30 01:13:08,357 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592961692] [2020-11-30 01:13:08,357 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:08,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:08,357 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 64 times [2020-11-30 01:13:08,358 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:08,358 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258161958] [2020-11-30 01:13:08,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:08,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:08,359 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:08,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:08,360 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:08,360 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:08,363 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:08,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2020-11-30 01:13:08,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2020-11-30 01:13:08,364 INFO L87 Difference]: Start difference. First operand 72 states and 107 transitions. cyclomatic complexity: 38 Second operand 36 states. [2020-11-30 01:13:08,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:08,612 INFO L93 Difference]: Finished difference Result 671 states and 709 transitions. [2020-11-30 01:13:08,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-11-30 01:13:08,612 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 671 states and 709 transitions. [2020-11-30 01:13:08,614 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:08,617 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 671 states to 670 states and 708 transitions. [2020-11-30 01:13:08,617 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:08,617 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:08,617 INFO L73 IsDeterministic]: Start isDeterministic. Operand 670 states and 708 transitions. [2020-11-30 01:13:08,618 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:08,618 INFO L691 BuchiCegarLoop]: Abstraction has 670 states and 708 transitions. [2020-11-30 01:13:08,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 670 states and 708 transitions. [2020-11-30 01:13:08,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 670 to 73. [2020-11-30 01:13:08,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2020-11-30 01:13:08,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 109 transitions. [2020-11-30 01:13:08,622 INFO L714 BuchiCegarLoop]: Abstraction has 73 states and 109 transitions. [2020-11-30 01:13:08,623 INFO L594 BuchiCegarLoop]: Abstraction has 73 states and 109 transitions. [2020-11-30 01:13:08,623 INFO L427 BuchiCegarLoop]: ======== Iteration 66============ [2020-11-30 01:13:08,623 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 109 transitions. [2020-11-30 01:13:08,623 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:08,623 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:08,623 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:08,624 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [31, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:08,624 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:08,624 INFO L794 eck$LassoCheckResult]: Stem: 17973#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 17970#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 17971#L26 main_~i~0 := 0; 17972#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 17976#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 17977#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 17981#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18042#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18041#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18040#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18039#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18038#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18037#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18036#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18035#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18034#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18033#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18032#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18031#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18030#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18029#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18028#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18027#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18026#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18025#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18024#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18023#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18022#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18021#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18020#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18019#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18018#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18017#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18016#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18015#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18014#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 18013#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 17978#L35-2 assume main_~j~0 >= 100; 17975#L39 [2020-11-30 01:13:08,624 INFO L796 eck$LassoCheckResult]: Loop: 17975#L39 assume true; 17975#L39 [2020-11-30 01:13:08,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:08,625 INFO L82 PathProgramCache]: Analyzing trace with hash 317217179, now seen corresponding path program 31 times [2020-11-30 01:13:08,625 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:08,625 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895158575] [2020-11-30 01:13:08,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:08,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:09,315 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:09,315 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895158575] [2020-11-30 01:13:09,315 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [981335372] [2020-11-30 01:13:09,315 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:09,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:09,390 INFO L263 TraceCheckSpWp]: Trace formula consists of 220 conjuncts, 33 conjunts are in the unsatisfiable core [2020-11-30 01:13:09,391 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:09,412 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:09,412 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:09,413 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 34 [2020-11-30 01:13:09,413 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1846163687] [2020-11-30 01:13:09,413 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:09,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:09,413 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 65 times [2020-11-30 01:13:09,414 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:09,414 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090629174] [2020-11-30 01:13:09,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:09,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:09,415 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:09,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:09,416 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:09,416 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:09,419 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:09,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2020-11-30 01:13:09,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2020-11-30 01:13:09,420 INFO L87 Difference]: Start difference. First operand 73 states and 109 transitions. cyclomatic complexity: 39 Second operand 35 states. [2020-11-30 01:13:09,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:09,497 INFO L93 Difference]: Finished difference Result 75 states and 111 transitions. [2020-11-30 01:13:09,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2020-11-30 01:13:09,498 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 111 transitions. [2020-11-30 01:13:09,498 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:09,499 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 74 states and 110 transitions. [2020-11-30 01:13:09,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:09,499 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:09,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 110 transitions. [2020-11-30 01:13:09,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:09,499 INFO L691 BuchiCegarLoop]: Abstraction has 74 states and 110 transitions. [2020-11-30 01:13:09,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 110 transitions. [2020-11-30 01:13:09,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2020-11-30 01:13:09,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2020-11-30 01:13:09,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 110 transitions. [2020-11-30 01:13:09,501 INFO L714 BuchiCegarLoop]: Abstraction has 74 states and 110 transitions. [2020-11-30 01:13:09,501 INFO L594 BuchiCegarLoop]: Abstraction has 74 states and 110 transitions. [2020-11-30 01:13:09,501 INFO L427 BuchiCegarLoop]: ======== Iteration 67============ [2020-11-30 01:13:09,501 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 110 transitions. [2020-11-30 01:13:09,501 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:09,502 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:09,502 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:09,502 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [33, 1, 1, 1, 1, 1] [2020-11-30 01:13:09,502 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:09,502 INFO L794 eck$LassoCheckResult]: Stem: 18270#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 18267#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 18268#L26 main_~i~0 := 0; 18269#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18276#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18277#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18339#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18337#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18335#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18333#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18331#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18329#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18327#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18325#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18323#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18321#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18319#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18317#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18315#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18313#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18311#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18309#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18307#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18305#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18303#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18301#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18299#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18297#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18295#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18293#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18291#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18289#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18287#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18285#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18283#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18281#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 18279#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 18271#L29-2 assume main_~i~0 >= 100; 18272#L39 [2020-11-30 01:13:09,502 INFO L796 eck$LassoCheckResult]: Loop: 18272#L39 assume true; 18272#L39 [2020-11-30 01:13:09,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:09,503 INFO L82 PathProgramCache]: Analyzing trace with hash 1654396916, now seen corresponding path program 33 times [2020-11-30 01:13:09,503 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:09,503 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400057329] [2020-11-30 01:13:09,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:09,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:10,128 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:10,128 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400057329] [2020-11-30 01:13:10,128 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [770634212] [2020-11-30 01:13:10,128 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:10,193 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2020-11-30 01:13:10,193 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:10,194 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 35 conjunts are in the unsatisfiable core [2020-11-30 01:13:10,195 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:10,228 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:10,228 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:10,228 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 36 [2020-11-30 01:13:10,229 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397479778] [2020-11-30 01:13:10,229 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:10,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:10,229 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 66 times [2020-11-30 01:13:10,230 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:10,230 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821366404] [2020-11-30 01:13:10,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:10,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:10,231 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:10,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:10,232 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:10,233 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:10,240 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:10,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2020-11-30 01:13:10,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2020-11-30 01:13:10,241 INFO L87 Difference]: Start difference. First operand 74 states and 110 transitions. cyclomatic complexity: 39 Second operand 37 states. [2020-11-30 01:13:10,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:10,523 INFO L93 Difference]: Finished difference Result 708 states and 747 transitions. [2020-11-30 01:13:10,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2020-11-30 01:13:10,524 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 708 states and 747 transitions. [2020-11-30 01:13:10,525 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:10,528 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 708 states to 707 states and 746 transitions. [2020-11-30 01:13:10,528 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:10,528 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:10,528 INFO L73 IsDeterministic]: Start isDeterministic. Operand 707 states and 746 transitions. [2020-11-30 01:13:10,529 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:10,530 INFO L691 BuchiCegarLoop]: Abstraction has 707 states and 746 transitions. [2020-11-30 01:13:10,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 707 states and 746 transitions. [2020-11-30 01:13:10,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 707 to 75. [2020-11-30 01:13:10,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2020-11-30 01:13:10,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 112 transitions. [2020-11-30 01:13:10,535 INFO L714 BuchiCegarLoop]: Abstraction has 75 states and 112 transitions. [2020-11-30 01:13:10,535 INFO L594 BuchiCegarLoop]: Abstraction has 75 states and 112 transitions. [2020-11-30 01:13:10,535 INFO L427 BuchiCegarLoop]: ======== Iteration 68============ [2020-11-30 01:13:10,535 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 112 transitions. [2020-11-30 01:13:10,535 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:10,535 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:10,536 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:10,536 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [32, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:10,536 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:10,536 INFO L794 eck$LassoCheckResult]: Stem: 19203#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 19200#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 19201#L26 main_~i~0 := 0; 19202#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 19206#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 19207#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19211#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19274#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19273#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19272#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19271#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19270#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19269#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19268#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19267#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19266#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19265#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19264#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19263#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19262#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19261#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19260#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19259#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19258#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19257#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19256#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19255#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19254#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19253#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19252#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19251#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19250#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19249#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19248#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19247#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19246#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19245#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 19244#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 19208#L35-2 assume main_~j~0 >= 100; 19205#L39 [2020-11-30 01:13:10,537 INFO L796 eck$LassoCheckResult]: Loop: 19205#L39 assume true; 19205#L39 [2020-11-30 01:13:10,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:10,537 INFO L82 PathProgramCache]: Analyzing trace with hash 1243799668, now seen corresponding path program 32 times [2020-11-30 01:13:10,537 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:10,537 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537697353] [2020-11-30 01:13:10,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:10,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:11,194 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:11,194 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1537697353] [2020-11-30 01:13:11,194 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1981890036] [2020-11-30 01:13:11,194 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:11,251 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:13:11,251 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:11,252 INFO L263 TraceCheckSpWp]: Trace formula consists of 226 conjuncts, 34 conjunts are in the unsatisfiable core [2020-11-30 01:13:11,253 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:11,273 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:11,274 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:11,274 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 35 [2020-11-30 01:13:11,274 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1455814381] [2020-11-30 01:13:11,275 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:11,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:11,275 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 67 times [2020-11-30 01:13:11,275 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:11,275 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704075221] [2020-11-30 01:13:11,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:11,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:11,277 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:11,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:11,278 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:11,278 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:11,285 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:11,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2020-11-30 01:13:11,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2020-11-30 01:13:11,286 INFO L87 Difference]: Start difference. First operand 75 states and 112 transitions. cyclomatic complexity: 40 Second operand 36 states. [2020-11-30 01:13:11,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:11,347 INFO L93 Difference]: Finished difference Result 77 states and 114 transitions. [2020-11-30 01:13:11,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-11-30 01:13:11,348 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 114 transitions. [2020-11-30 01:13:11,348 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:11,348 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 76 states and 113 transitions. [2020-11-30 01:13:11,349 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:11,349 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:11,349 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 113 transitions. [2020-11-30 01:13:11,349 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:11,349 INFO L691 BuchiCegarLoop]: Abstraction has 76 states and 113 transitions. [2020-11-30 01:13:11,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 113 transitions. [2020-11-30 01:13:11,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2020-11-30 01:13:11,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2020-11-30 01:13:11,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 113 transitions. [2020-11-30 01:13:11,351 INFO L714 BuchiCegarLoop]: Abstraction has 76 states and 113 transitions. [2020-11-30 01:13:11,351 INFO L594 BuchiCegarLoop]: Abstraction has 76 states and 113 transitions. [2020-11-30 01:13:11,351 INFO L427 BuchiCegarLoop]: ======== Iteration 69============ [2020-11-30 01:13:11,351 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 76 states and 113 transitions. [2020-11-30 01:13:11,351 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:11,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:11,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:11,352 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [34, 1, 1, 1, 1, 1] [2020-11-30 01:13:11,352 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:11,352 INFO L794 eck$LassoCheckResult]: Stem: 19508#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 19505#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 19506#L26 main_~i~0 := 0; 19507#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19514#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19515#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19577#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19575#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19573#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19571#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19569#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19567#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19565#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19563#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19561#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19559#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19557#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19555#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19553#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19551#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19549#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19547#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19545#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19543#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19541#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19539#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19537#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19535#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19533#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19531#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19529#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19527#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19525#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19523#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19521#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19519#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 19517#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 19509#L29-2 assume main_~i~0 >= 100; 19510#L39 [2020-11-30 01:13:11,352 INFO L796 eck$LassoCheckResult]: Loop: 19510#L39 assume true; 19510#L39 [2020-11-30 01:13:11,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:11,352 INFO L82 PathProgramCache]: Analyzing trace with hash -253301463, now seen corresponding path program 34 times [2020-11-30 01:13:11,353 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:11,353 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468115456] [2020-11-30 01:13:11,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:11,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:12,256 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:12,256 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468115456] [2020-11-30 01:13:12,256 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1187186731] [2020-11-30 01:13:12,256 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:12,316 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:13:12,316 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:12,317 INFO L263 TraceCheckSpWp]: Trace formula consists of 166 conjuncts, 36 conjunts are in the unsatisfiable core [2020-11-30 01:13:12,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:12,344 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:12,345 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:12,345 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 37 [2020-11-30 01:13:12,345 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187460734] [2020-11-30 01:13:12,345 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:12,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:12,345 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 68 times [2020-11-30 01:13:12,346 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:12,346 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255882681] [2020-11-30 01:13:12,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:12,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:12,348 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:12,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:12,349 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:12,349 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:12,357 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:12,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2020-11-30 01:13:12,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2020-11-30 01:13:12,358 INFO L87 Difference]: Start difference. First operand 76 states and 113 transitions. cyclomatic complexity: 40 Second operand 38 states. [2020-11-30 01:13:12,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:12,646 INFO L93 Difference]: Finished difference Result 746 states and 786 transitions. [2020-11-30 01:13:12,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2020-11-30 01:13:12,647 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 746 states and 786 transitions. [2020-11-30 01:13:12,649 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:12,652 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 746 states to 745 states and 785 transitions. [2020-11-30 01:13:12,652 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:12,653 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:12,653 INFO L73 IsDeterministic]: Start isDeterministic. Operand 745 states and 785 transitions. [2020-11-30 01:13:12,654 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:12,654 INFO L691 BuchiCegarLoop]: Abstraction has 745 states and 785 transitions. [2020-11-30 01:13:12,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 745 states and 785 transitions. [2020-11-30 01:13:12,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 745 to 77. [2020-11-30 01:13:12,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2020-11-30 01:13:12,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 115 transitions. [2020-11-30 01:13:12,659 INFO L714 BuchiCegarLoop]: Abstraction has 77 states and 115 transitions. [2020-11-30 01:13:12,660 INFO L594 BuchiCegarLoop]: Abstraction has 77 states and 115 transitions. [2020-11-30 01:13:12,660 INFO L427 BuchiCegarLoop]: ======== Iteration 70============ [2020-11-30 01:13:12,660 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 115 transitions. [2020-11-30 01:13:12,660 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:12,660 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:12,660 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:12,661 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [33, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:12,661 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:12,661 INFO L794 eck$LassoCheckResult]: Stem: 20485#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 20482#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 20483#L26 main_~i~0 := 0; 20484#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 20488#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 20489#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20493#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20558#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20557#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20556#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20555#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20554#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20553#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20552#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20551#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20550#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20549#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20548#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20547#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20546#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20545#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20544#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20543#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20542#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20541#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20540#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20539#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20538#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20537#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20536#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20535#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20534#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20533#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20532#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20531#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20530#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20529#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20528#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 20527#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 20490#L35-2 assume main_~j~0 >= 100; 20487#L39 [2020-11-30 01:13:12,662 INFO L796 eck$LassoCheckResult]: Loop: 20487#L39 assume true; 20487#L39 [2020-11-30 01:13:12,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:12,662 INFO L82 PathProgramCache]: Analyzing trace with hash -96914245, now seen corresponding path program 33 times [2020-11-30 01:13:12,662 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:12,663 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569459317] [2020-11-30 01:13:12,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:12,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:13,319 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:13,320 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1569459317] [2020-11-30 01:13:13,320 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [278315098] [2020-11-30 01:13:13,320 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:13,381 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2020-11-30 01:13:13,381 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:13,382 INFO L263 TraceCheckSpWp]: Trace formula consists of 232 conjuncts, 35 conjunts are in the unsatisfiable core [2020-11-30 01:13:13,383 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:13,414 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:13,414 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:13,414 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 36 [2020-11-30 01:13:13,415 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2122730623] [2020-11-30 01:13:13,415 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:13,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:13,415 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 69 times [2020-11-30 01:13:13,416 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:13,416 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447459236] [2020-11-30 01:13:13,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:13,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:13,417 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:13,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:13,418 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:13,418 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:13,427 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:13,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2020-11-30 01:13:13,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2020-11-30 01:13:13,428 INFO L87 Difference]: Start difference. First operand 77 states and 115 transitions. cyclomatic complexity: 41 Second operand 37 states. [2020-11-30 01:13:13,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:13,497 INFO L93 Difference]: Finished difference Result 79 states and 117 transitions. [2020-11-30 01:13:13,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2020-11-30 01:13:13,498 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79 states and 117 transitions. [2020-11-30 01:13:13,498 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:13,499 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79 states to 78 states and 116 transitions. [2020-11-30 01:13:13,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:13,499 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:13,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78 states and 116 transitions. [2020-11-30 01:13:13,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:13,499 INFO L691 BuchiCegarLoop]: Abstraction has 78 states and 116 transitions. [2020-11-30 01:13:13,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states and 116 transitions. [2020-11-30 01:13:13,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2020-11-30 01:13:13,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2020-11-30 01:13:13,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 116 transitions. [2020-11-30 01:13:13,501 INFO L714 BuchiCegarLoop]: Abstraction has 78 states and 116 transitions. [2020-11-30 01:13:13,501 INFO L594 BuchiCegarLoop]: Abstraction has 78 states and 116 transitions. [2020-11-30 01:13:13,501 INFO L427 BuchiCegarLoop]: ======== Iteration 71============ [2020-11-30 01:13:13,501 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 116 transitions. [2020-11-30 01:13:13,501 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:13,501 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:13,501 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:13,502 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [35, 1, 1, 1, 1, 1] [2020-11-30 01:13:13,502 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:13,502 INFO L794 eck$LassoCheckResult]: Stem: 20798#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 20795#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 20796#L26 main_~i~0 := 0; 20797#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20804#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20805#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20871#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20869#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20867#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20865#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20863#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20861#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20859#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20857#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20855#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20853#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20851#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20849#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20847#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20845#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20843#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20841#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20839#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20837#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20835#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20833#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20831#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20829#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20827#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20825#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20823#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20821#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20819#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20817#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20815#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20813#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20811#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20809#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 20807#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 20799#L29-2 assume main_~i~0 >= 100; 20800#L39 [2020-11-30 01:13:13,502 INFO L796 eck$LassoCheckResult]: Loop: 20800#L39 assume true; 20800#L39 [2020-11-30 01:13:13,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:13,502 INFO L82 PathProgramCache]: Analyzing trace with hash 737590932, now seen corresponding path program 35 times [2020-11-30 01:13:13,503 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:13,503 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946944168] [2020-11-30 01:13:13,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:13,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:14,235 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:14,235 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [946944168] [2020-11-30 01:13:14,235 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1784330341] [2020-11-30 01:13:14,235 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:14,280 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2020-11-30 01:13:14,280 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:14,281 INFO L263 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 37 conjunts are in the unsatisfiable core [2020-11-30 01:13:14,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:14,299 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:14,300 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:14,300 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 38 [2020-11-30 01:13:14,300 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763191427] [2020-11-30 01:13:14,300 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:14,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:14,301 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 70 times [2020-11-30 01:13:14,301 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:14,301 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993234679] [2020-11-30 01:13:14,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:14,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:14,302 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:14,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:14,303 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:14,304 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:14,312 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:14,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2020-11-30 01:13:14,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2020-11-30 01:13:14,313 INFO L87 Difference]: Start difference. First operand 78 states and 116 transitions. cyclomatic complexity: 41 Second operand 39 states. [2020-11-30 01:13:14,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:14,576 INFO L93 Difference]: Finished difference Result 785 states and 826 transitions. [2020-11-30 01:13:14,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2020-11-30 01:13:14,577 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 785 states and 826 transitions. [2020-11-30 01:13:14,578 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:14,581 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 785 states to 784 states and 825 transitions. [2020-11-30 01:13:14,582 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:14,582 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:14,582 INFO L73 IsDeterministic]: Start isDeterministic. Operand 784 states and 825 transitions. [2020-11-30 01:13:14,583 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:14,583 INFO L691 BuchiCegarLoop]: Abstraction has 784 states and 825 transitions. [2020-11-30 01:13:14,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 784 states and 825 transitions. [2020-11-30 01:13:14,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 784 to 79. [2020-11-30 01:13:14,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2020-11-30 01:13:14,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 118 transitions. [2020-11-30 01:13:14,588 INFO L714 BuchiCegarLoop]: Abstraction has 79 states and 118 transitions. [2020-11-30 01:13:14,588 INFO L594 BuchiCegarLoop]: Abstraction has 79 states and 118 transitions. [2020-11-30 01:13:14,588 INFO L427 BuchiCegarLoop]: ======== Iteration 72============ [2020-11-30 01:13:14,588 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 79 states and 118 transitions. [2020-11-30 01:13:14,588 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:14,588 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:14,588 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:14,589 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [34, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:14,589 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:14,589 INFO L794 eck$LassoCheckResult]: Stem: 21820#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 21817#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 21818#L26 main_~i~0 := 0; 21819#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 21823#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 21824#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21828#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21895#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21894#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21893#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21892#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21891#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21890#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21889#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21888#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21887#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21886#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21885#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21884#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21883#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21882#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21881#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21880#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21879#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21878#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21877#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21876#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21875#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21874#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21873#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21872#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21871#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21870#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21869#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21868#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21867#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21866#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21865#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21864#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 21863#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 21825#L35-2 assume main_~j~0 >= 100; 21822#L39 [2020-11-30 01:13:14,590 INFO L796 eck$LassoCheckResult]: Loop: 21822#L39 assume true; 21822#L39 [2020-11-30 01:13:14,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:14,590 INFO L82 PathProgramCache]: Analyzing trace with hash 1290627412, now seen corresponding path program 34 times [2020-11-30 01:13:14,590 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:14,590 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87100522] [2020-11-30 01:13:14,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:14,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:15,274 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:15,275 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87100522] [2020-11-30 01:13:15,275 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [391392111] [2020-11-30 01:13:15,275 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:15,328 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:13:15,328 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:15,329 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 36 conjunts are in the unsatisfiable core [2020-11-30 01:13:15,330 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:15,349 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:15,350 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:15,350 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 37 [2020-11-30 01:13:15,350 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721608930] [2020-11-30 01:13:15,350 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:15,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:15,351 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 71 times [2020-11-30 01:13:15,351 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:15,351 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447347696] [2020-11-30 01:13:15,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:15,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:15,353 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:15,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:15,353 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:15,354 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:15,356 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:15,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2020-11-30 01:13:15,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2020-11-30 01:13:15,357 INFO L87 Difference]: Start difference. First operand 79 states and 118 transitions. cyclomatic complexity: 42 Second operand 38 states. [2020-11-30 01:13:15,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:15,420 INFO L93 Difference]: Finished difference Result 81 states and 120 transitions. [2020-11-30 01:13:15,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2020-11-30 01:13:15,420 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 120 transitions. [2020-11-30 01:13:15,421 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:15,421 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 80 states and 119 transitions. [2020-11-30 01:13:15,421 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:15,421 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:15,421 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 119 transitions. [2020-11-30 01:13:15,421 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:15,421 INFO L691 BuchiCegarLoop]: Abstraction has 80 states and 119 transitions. [2020-11-30 01:13:15,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 119 transitions. [2020-11-30 01:13:15,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2020-11-30 01:13:15,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2020-11-30 01:13:15,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 119 transitions. [2020-11-30 01:13:15,423 INFO L714 BuchiCegarLoop]: Abstraction has 80 states and 119 transitions. [2020-11-30 01:13:15,423 INFO L594 BuchiCegarLoop]: Abstraction has 80 states and 119 transitions. [2020-11-30 01:13:15,423 INFO L427 BuchiCegarLoop]: ======== Iteration 73============ [2020-11-30 01:13:15,423 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 80 states and 119 transitions. [2020-11-30 01:13:15,423 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:15,423 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:15,423 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:15,423 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [36, 1, 1, 1, 1, 1] [2020-11-30 01:13:15,423 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:15,424 INFO L794 eck$LassoCheckResult]: Stem: 22141#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 22138#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 22139#L26 main_~i~0 := 0; 22140#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22147#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22148#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22216#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22214#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22212#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22210#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22208#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22206#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22204#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22202#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22200#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22198#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22196#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22194#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22192#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22190#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22188#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22186#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22184#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22182#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22180#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22178#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22176#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22174#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22172#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22170#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22168#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22166#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22164#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22162#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22160#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22158#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22156#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22154#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22152#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 22150#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 22142#L29-2 assume main_~i~0 >= 100; 22143#L39 [2020-11-30 01:13:15,424 INFO L796 eck$LassoCheckResult]: Loop: 22143#L39 assume true; 22143#L39 [2020-11-30 01:13:15,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:15,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1390484105, now seen corresponding path program 36 times [2020-11-30 01:13:15,424 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:15,424 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064025620] [2020-11-30 01:13:15,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:15,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:16,193 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:16,193 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064025620] [2020-11-30 01:13:16,194 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [895020060] [2020-11-30 01:13:16,194 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:16,255 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2020-11-30 01:13:16,255 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:16,256 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 38 conjunts are in the unsatisfiable core [2020-11-30 01:13:16,257 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:16,284 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:16,284 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:16,284 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 39 [2020-11-30 01:13:16,284 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667379652] [2020-11-30 01:13:16,285 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:16,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:16,285 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 72 times [2020-11-30 01:13:16,285 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:16,286 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076970600] [2020-11-30 01:13:16,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:16,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:16,287 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:16,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:16,288 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:16,288 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:16,300 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:16,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2020-11-30 01:13:16,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2020-11-30 01:13:16,301 INFO L87 Difference]: Start difference. First operand 80 states and 119 transitions. cyclomatic complexity: 42 Second operand 40 states. [2020-11-30 01:13:16,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:16,626 INFO L93 Difference]: Finished difference Result 825 states and 867 transitions. [2020-11-30 01:13:16,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2020-11-30 01:13:16,627 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 825 states and 867 transitions. [2020-11-30 01:13:16,629 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:16,632 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 825 states to 824 states and 866 transitions. [2020-11-30 01:13:16,632 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:16,632 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:16,632 INFO L73 IsDeterministic]: Start isDeterministic. Operand 824 states and 866 transitions. [2020-11-30 01:13:16,633 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:16,633 INFO L691 BuchiCegarLoop]: Abstraction has 824 states and 866 transitions. [2020-11-30 01:13:16,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 824 states and 866 transitions. [2020-11-30 01:13:16,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 824 to 81. [2020-11-30 01:13:16,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2020-11-30 01:13:16,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 121 transitions. [2020-11-30 01:13:16,637 INFO L714 BuchiCegarLoop]: Abstraction has 81 states and 121 transitions. [2020-11-30 01:13:16,637 INFO L594 BuchiCegarLoop]: Abstraction has 81 states and 121 transitions. [2020-11-30 01:13:16,638 INFO L427 BuchiCegarLoop]: ======== Iteration 74============ [2020-11-30 01:13:16,638 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 81 states and 121 transitions. [2020-11-30 01:13:16,638 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:16,638 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:16,638 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:16,639 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [35, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:16,639 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:16,639 INFO L794 eck$LassoCheckResult]: Stem: 23209#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 23206#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 23207#L26 main_~i~0 := 0; 23208#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 23212#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 23213#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23217#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23286#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23285#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23284#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23283#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23282#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23281#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23280#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23279#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23278#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23277#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23276#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23275#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23274#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23273#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23272#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23271#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23270#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23269#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23268#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23267#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23266#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23265#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23264#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23263#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23262#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23261#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23260#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23259#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23258#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23257#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23256#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23255#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23254#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 23253#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 23214#L35-2 assume main_~j~0 >= 100; 23211#L39 [2020-11-30 01:13:16,639 INFO L796 eck$LassoCheckResult]: Loop: 23211#L39 assume true; 23211#L39 [2020-11-30 01:13:16,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:16,640 INFO L82 PathProgramCache]: Analyzing trace with hash 1354745819, now seen corresponding path program 35 times [2020-11-30 01:13:16,640 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:16,640 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260594615] [2020-11-30 01:13:16,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:16,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:17,368 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:17,368 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260594615] [2020-11-30 01:13:17,368 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1396593396] [2020-11-30 01:13:17,368 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:17,431 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2020-11-30 01:13:17,431 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:17,432 INFO L263 TraceCheckSpWp]: Trace formula consists of 244 conjuncts, 37 conjunts are in the unsatisfiable core [2020-11-30 01:13:17,433 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:17,489 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:17,490 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:17,490 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 38 [2020-11-30 01:13:17,490 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1585949342] [2020-11-30 01:13:17,490 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:17,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:17,491 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 73 times [2020-11-30 01:13:17,491 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:17,491 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2143220853] [2020-11-30 01:13:17,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:17,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:17,493 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:17,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:17,494 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:17,494 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:17,503 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:17,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2020-11-30 01:13:17,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2020-11-30 01:13:17,504 INFO L87 Difference]: Start difference. First operand 81 states and 121 transitions. cyclomatic complexity: 43 Second operand 39 states. [2020-11-30 01:13:17,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:17,583 INFO L93 Difference]: Finished difference Result 83 states and 123 transitions. [2020-11-30 01:13:17,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2020-11-30 01:13:17,583 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 123 transitions. [2020-11-30 01:13:17,583 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:17,584 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 82 states and 122 transitions. [2020-11-30 01:13:17,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:17,584 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:17,584 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 122 transitions. [2020-11-30 01:13:17,584 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:17,584 INFO L691 BuchiCegarLoop]: Abstraction has 82 states and 122 transitions. [2020-11-30 01:13:17,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 122 transitions. [2020-11-30 01:13:17,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2020-11-30 01:13:17,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2020-11-30 01:13:17,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 122 transitions. [2020-11-30 01:13:17,586 INFO L714 BuchiCegarLoop]: Abstraction has 82 states and 122 transitions. [2020-11-30 01:13:17,586 INFO L594 BuchiCegarLoop]: Abstraction has 82 states and 122 transitions. [2020-11-30 01:13:17,586 INFO L427 BuchiCegarLoop]: ======== Iteration 75============ [2020-11-30 01:13:17,586 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 122 transitions. [2020-11-30 01:13:17,586 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:17,587 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:17,587 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:17,587 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [37, 1, 1, 1, 1, 1] [2020-11-30 01:13:17,587 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:17,587 INFO L794 eck$LassoCheckResult]: Stem: 23538#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 23535#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 23536#L26 main_~i~0 := 0; 23537#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23544#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23545#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23615#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23613#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23611#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23609#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23607#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23605#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23603#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23601#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23599#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23597#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23595#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23593#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23591#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23589#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23587#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23585#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23583#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23581#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23577#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23575#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23573#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23571#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23569#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23567#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23565#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23563#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23561#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23559#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23557#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23555#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23553#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23551#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23549#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 23547#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 23539#L29-2 assume main_~i~0 >= 100; 23540#L39 [2020-11-30 01:13:17,588 INFO L796 eck$LassoCheckResult]: Loop: 23540#L39 assume true; 23540#L39 [2020-11-30 01:13:17,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:17,588 INFO L82 PathProgramCache]: Analyzing trace with hash 155335988, now seen corresponding path program 37 times [2020-11-30 01:13:17,588 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:17,588 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187370283] [2020-11-30 01:13:17,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:17,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:18,612 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:18,612 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187370283] [2020-11-30 01:13:18,612 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1871733800] [2020-11-30 01:13:18,612 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:18,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:18,654 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 39 conjunts are in the unsatisfiable core [2020-11-30 01:13:18,655 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:18,676 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:18,676 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:18,676 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 40 [2020-11-30 01:13:18,677 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077299679] [2020-11-30 01:13:18,677 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:18,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:18,677 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 74 times [2020-11-30 01:13:18,677 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:18,678 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799571126] [2020-11-30 01:13:18,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:18,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:18,679 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:18,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:18,680 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:18,680 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:18,692 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:18,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2020-11-30 01:13:18,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2020-11-30 01:13:18,693 INFO L87 Difference]: Start difference. First operand 82 states and 122 transitions. cyclomatic complexity: 43 Second operand 41 states. [2020-11-30 01:13:18,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:18,983 INFO L93 Difference]: Finished difference Result 866 states and 909 transitions. [2020-11-30 01:13:18,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2020-11-30 01:13:18,983 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 866 states and 909 transitions. [2020-11-30 01:13:18,985 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:18,988 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 866 states to 865 states and 908 transitions. [2020-11-30 01:13:18,988 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:18,988 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:18,988 INFO L73 IsDeterministic]: Start isDeterministic. Operand 865 states and 908 transitions. [2020-11-30 01:13:18,989 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:18,989 INFO L691 BuchiCegarLoop]: Abstraction has 865 states and 908 transitions. [2020-11-30 01:13:18,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states and 908 transitions. [2020-11-30 01:13:18,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 83. [2020-11-30 01:13:18,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2020-11-30 01:13:18,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 124 transitions. [2020-11-30 01:13:18,992 INFO L714 BuchiCegarLoop]: Abstraction has 83 states and 124 transitions. [2020-11-30 01:13:18,993 INFO L594 BuchiCegarLoop]: Abstraction has 83 states and 124 transitions. [2020-11-30 01:13:18,993 INFO L427 BuchiCegarLoop]: ======== Iteration 76============ [2020-11-30 01:13:18,993 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 124 transitions. [2020-11-30 01:13:18,993 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:18,993 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:18,993 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:18,994 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [36, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:18,994 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:18,994 INFO L794 eck$LassoCheckResult]: Stem: 24653#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 24650#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 24651#L26 main_~i~0 := 0; 24652#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 24656#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 24657#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24661#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24732#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24731#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24730#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24729#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24728#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24727#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24726#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24725#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24724#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24723#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24722#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24721#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24720#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24719#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24718#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24717#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24716#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24715#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24714#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24713#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24712#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24711#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24710#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24709#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24708#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24707#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24706#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24705#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24704#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24703#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24702#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24701#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24700#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24699#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 24698#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 24658#L35-2 assume main_~j~0 >= 100; 24655#L39 [2020-11-30 01:13:18,994 INFO L796 eck$LassoCheckResult]: Loop: 24655#L39 assume true; 24655#L39 [2020-11-30 01:13:18,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:18,995 INFO L82 PathProgramCache]: Analyzing trace with hash -952550860, now seen corresponding path program 36 times [2020-11-30 01:13:18,995 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:18,995 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948823647] [2020-11-30 01:13:18,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:19,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:19,800 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:19,801 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948823647] [2020-11-30 01:13:19,801 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [267035311] [2020-11-30 01:13:19,801 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:19,871 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2020-11-30 01:13:19,871 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:19,872 INFO L263 TraceCheckSpWp]: Trace formula consists of 250 conjuncts, 38 conjunts are in the unsatisfiable core [2020-11-30 01:13:19,873 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:19,901 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:19,901 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:19,902 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 39 [2020-11-30 01:13:19,902 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [500115052] [2020-11-30 01:13:19,902 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:19,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:19,903 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 75 times [2020-11-30 01:13:19,903 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:19,903 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [364158246] [2020-11-30 01:13:19,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:19,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:19,904 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:19,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:19,905 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:19,906 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:19,928 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:19,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2020-11-30 01:13:19,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2020-11-30 01:13:19,929 INFO L87 Difference]: Start difference. First operand 83 states and 124 transitions. cyclomatic complexity: 44 Second operand 40 states. [2020-11-30 01:13:19,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:19,970 INFO L93 Difference]: Finished difference Result 85 states and 126 transitions. [2020-11-30 01:13:19,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2020-11-30 01:13:19,970 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 126 transitions. [2020-11-30 01:13:19,971 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:19,971 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 84 states and 125 transitions. [2020-11-30 01:13:19,971 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:19,971 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:19,972 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84 states and 125 transitions. [2020-11-30 01:13:19,972 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:19,972 INFO L691 BuchiCegarLoop]: Abstraction has 84 states and 125 transitions. [2020-11-30 01:13:19,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states and 125 transitions. [2020-11-30 01:13:19,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2020-11-30 01:13:19,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2020-11-30 01:13:19,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 125 transitions. [2020-11-30 01:13:19,973 INFO L714 BuchiCegarLoop]: Abstraction has 84 states and 125 transitions. [2020-11-30 01:13:19,973 INFO L594 BuchiCegarLoop]: Abstraction has 84 states and 125 transitions. [2020-11-30 01:13:19,974 INFO L427 BuchiCegarLoop]: ======== Iteration 77============ [2020-11-30 01:13:19,974 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84 states and 125 transitions. [2020-11-30 01:13:19,974 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:19,974 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:19,974 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:19,974 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [38, 1, 1, 1, 1, 1] [2020-11-30 01:13:19,974 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:19,975 INFO L794 eck$LassoCheckResult]: Stem: 24990#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 24987#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 24988#L26 main_~i~0 := 0; 24989#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 24996#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 24997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25069#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25067#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25065#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25063#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25061#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25059#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25057#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25055#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25053#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25051#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25049#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25047#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25045#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25043#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25041#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25039#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25037#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25035#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25033#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25031#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25029#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25027#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25025#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25023#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25021#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25019#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25017#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25015#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25013#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25011#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25009#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25007#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25005#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25003#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 25001#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 24999#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 24991#L29-2 assume main_~i~0 >= 100; 24992#L39 [2020-11-30 01:13:19,975 INFO L796 eck$LassoCheckResult]: Loop: 24992#L39 assume true; 24992#L39 [2020-11-30 01:13:19,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:19,975 INFO L82 PathProgramCache]: Analyzing trace with hash 520450025, now seen corresponding path program 38 times [2020-11-30 01:13:19,975 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:19,975 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416662242] [2020-11-30 01:13:19,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:19,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:20,915 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:20,915 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [416662242] [2020-11-30 01:13:20,915 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [751236612] [2020-11-30 01:13:20,916 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:20,963 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:13:20,963 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:20,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 40 conjunts are in the unsatisfiable core [2020-11-30 01:13:20,965 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:20,987 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:20,987 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:20,987 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 41 [2020-11-30 01:13:20,988 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [129941897] [2020-11-30 01:13:20,988 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:20,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:20,988 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 76 times [2020-11-30 01:13:20,989 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:20,989 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251861020] [2020-11-30 01:13:20,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:20,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:20,990 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:20,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:20,991 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:20,991 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:20,997 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:20,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2020-11-30 01:13:20,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2020-11-30 01:13:20,998 INFO L87 Difference]: Start difference. First operand 84 states and 125 transitions. cyclomatic complexity: 44 Second operand 42 states. [2020-11-30 01:13:21,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:21,284 INFO L93 Difference]: Finished difference Result 908 states and 952 transitions. [2020-11-30 01:13:21,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2020-11-30 01:13:21,284 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 908 states and 952 transitions. [2020-11-30 01:13:21,287 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:21,293 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 908 states to 907 states and 951 transitions. [2020-11-30 01:13:21,294 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:21,294 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:21,294 INFO L73 IsDeterministic]: Start isDeterministic. Operand 907 states and 951 transitions. [2020-11-30 01:13:21,295 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:21,295 INFO L691 BuchiCegarLoop]: Abstraction has 907 states and 951 transitions. [2020-11-30 01:13:21,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 907 states and 951 transitions. [2020-11-30 01:13:21,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 907 to 85. [2020-11-30 01:13:21,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2020-11-30 01:13:21,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 127 transitions. [2020-11-30 01:13:21,301 INFO L714 BuchiCegarLoop]: Abstraction has 85 states and 127 transitions. [2020-11-30 01:13:21,301 INFO L594 BuchiCegarLoop]: Abstraction has 85 states and 127 transitions. [2020-11-30 01:13:21,301 INFO L427 BuchiCegarLoop]: ======== Iteration 78============ [2020-11-30 01:13:21,301 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 85 states and 127 transitions. [2020-11-30 01:13:21,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:21,302 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:21,302 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:21,303 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [37, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:21,303 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:21,303 INFO L794 eck$LassoCheckResult]: Stem: 26153#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 26150#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 26151#L26 main_~i~0 := 0; 26152#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 26156#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 26157#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26161#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26234#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26233#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26232#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26231#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26230#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26229#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26228#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26227#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26226#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26225#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26224#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26223#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26222#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26221#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26220#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26219#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26218#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26217#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26216#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26215#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26214#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26213#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26212#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26211#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26210#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26209#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26208#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26207#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26206#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26205#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26204#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26203#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26202#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26201#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26200#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 26199#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 26158#L35-2 assume main_~j~0 >= 100; 26155#L39 [2020-11-30 01:13:21,303 INFO L796 eck$LassoCheckResult]: Loop: 26155#L39 assume true; 26155#L39 [2020-11-30 01:13:21,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:21,304 INFO L82 PathProgramCache]: Analyzing trace with hash 535696123, now seen corresponding path program 37 times [2020-11-30 01:13:21,304 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:21,304 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491838008] [2020-11-30 01:13:21,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:21,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:22,230 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:22,230 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491838008] [2020-11-30 01:13:22,230 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [249541245] [2020-11-30 01:13:22,231 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:22,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:22,285 INFO L263 TraceCheckSpWp]: Trace formula consists of 256 conjuncts, 39 conjunts are in the unsatisfiable core [2020-11-30 01:13:22,286 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:22,302 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:22,303 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:22,303 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 40 [2020-11-30 01:13:22,303 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761828674] [2020-11-30 01:13:22,303 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:22,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:22,304 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 77 times [2020-11-30 01:13:22,304 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:22,304 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167261695] [2020-11-30 01:13:22,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:22,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:22,306 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:22,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:22,306 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:22,307 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:22,317 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:22,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2020-11-30 01:13:22,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2020-11-30 01:13:22,319 INFO L87 Difference]: Start difference. First operand 85 states and 127 transitions. cyclomatic complexity: 45 Second operand 41 states. [2020-11-30 01:13:22,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:22,395 INFO L93 Difference]: Finished difference Result 87 states and 129 transitions. [2020-11-30 01:13:22,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2020-11-30 01:13:22,395 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 87 states and 129 transitions. [2020-11-30 01:13:22,395 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:22,396 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 87 states to 86 states and 128 transitions. [2020-11-30 01:13:22,396 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:22,396 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:22,396 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 128 transitions. [2020-11-30 01:13:22,396 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:22,396 INFO L691 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2020-11-30 01:13:22,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 128 transitions. [2020-11-30 01:13:22,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2020-11-30 01:13:22,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2020-11-30 01:13:22,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 128 transitions. [2020-11-30 01:13:22,397 INFO L714 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2020-11-30 01:13:22,397 INFO L594 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2020-11-30 01:13:22,397 INFO L427 BuchiCegarLoop]: ======== Iteration 79============ [2020-11-30 01:13:22,397 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 128 transitions. [2020-11-30 01:13:22,398 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:22,398 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:22,398 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:22,398 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [39, 1, 1, 1, 1, 1] [2020-11-30 01:13:22,398 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:22,398 INFO L794 eck$LassoCheckResult]: Stem: 26498#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 26495#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 26496#L26 main_~i~0 := 0; 26497#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26504#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26505#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26577#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26575#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26573#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26571#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26569#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26567#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26565#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26563#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26561#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26559#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26557#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26555#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26553#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26551#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26549#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26547#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26545#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26543#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26541#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26539#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26537#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26535#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26533#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26531#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26529#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26527#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26525#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26523#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26521#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26519#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26517#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26515#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26513#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26511#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26509#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 26507#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 26499#L29-2 assume main_~i~0 >= 100; 26500#L39 [2020-11-30 01:13:22,398 INFO L796 eck$LassoCheckResult]: Loop: 26500#L39 assume true; 26500#L39 [2020-11-30 01:13:22,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:22,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1045916716, now seen corresponding path program 39 times [2020-11-30 01:13:22,399 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:22,399 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126324666] [2020-11-30 01:13:22,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:22,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:23,444 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:23,445 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126324666] [2020-11-30 01:13:23,445 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1486219824] [2020-11-30 01:13:23,445 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:23,496 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2020-11-30 01:13:23,496 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:23,497 INFO L263 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 41 conjunts are in the unsatisfiable core [2020-11-30 01:13:23,498 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:23,519 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:23,519 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:23,519 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 42 [2020-11-30 01:13:23,520 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54565511] [2020-11-30 01:13:23,520 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:23,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:23,520 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 78 times [2020-11-30 01:13:23,520 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:23,521 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705071434] [2020-11-30 01:13:23,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:23,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:23,526 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:23,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:23,526 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:23,527 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:23,530 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:23,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2020-11-30 01:13:23,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2020-11-30 01:13:23,531 INFO L87 Difference]: Start difference. First operand 86 states and 128 transitions. cyclomatic complexity: 45 Second operand 43 states. [2020-11-30 01:13:23,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:23,994 INFO L93 Difference]: Finished difference Result 951 states and 996 transitions. [2020-11-30 01:13:23,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2020-11-30 01:13:23,994 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 951 states and 996 transitions. [2020-11-30 01:13:23,997 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:13:24,002 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 951 states to 950 states and 995 transitions. [2020-11-30 01:13:24,002 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:13:24,002 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:13:24,003 INFO L73 IsDeterministic]: Start isDeterministic. Operand 950 states and 995 transitions. [2020-11-30 01:13:24,003 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:24,003 INFO L691 BuchiCegarLoop]: Abstraction has 950 states and 995 transitions. [2020-11-30 01:13:24,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states and 995 transitions. [2020-11-30 01:13:24,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 87. [2020-11-30 01:13:24,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2020-11-30 01:13:24,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 130 transitions. [2020-11-30 01:13:24,008 INFO L714 BuchiCegarLoop]: Abstraction has 87 states and 130 transitions. [2020-11-30 01:13:24,008 INFO L594 BuchiCegarLoop]: Abstraction has 87 states and 130 transitions. [2020-11-30 01:13:24,008 INFO L427 BuchiCegarLoop]: ======== Iteration 80============ [2020-11-30 01:13:24,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 87 states and 130 transitions. [2020-11-30 01:13:24,009 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:24,009 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:13:24,009 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:13:24,011 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [38, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:13:24,011 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:13:24,014 INFO L794 eck$LassoCheckResult]: Stem: 27710#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 27707#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 27708#L26 main_~i~0 := 0; 27709#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 27713#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 27714#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27718#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27793#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27792#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27791#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27790#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27789#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27788#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27787#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27786#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27785#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27784#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27783#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27782#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27781#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27780#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27779#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27778#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27777#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27776#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27775#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27774#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27773#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27772#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27771#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27770#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27769#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27768#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27767#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27766#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27765#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27764#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27763#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27762#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27761#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27760#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27759#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27758#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 27757#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 27715#L35-2 assume main_~j~0 >= 100; 27712#L39 [2020-11-30 01:13:24,015 INFO L796 eck$LassoCheckResult]: Loop: 27712#L39 assume true; 27712#L39 [2020-11-30 01:13:24,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:24,015 INFO L82 PathProgramCache]: Analyzing trace with hash -573287660, now seen corresponding path program 38 times [2020-11-30 01:13:24,015 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:24,016 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478940121] [2020-11-30 01:13:24,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:24,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:13:24,845 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:24,845 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478940121] [2020-11-30 01:13:24,845 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019269538] [2020-11-30 01:13:24,845 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:13:24,903 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:13:24,903 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:13:24,904 INFO L263 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 40 conjunts are in the unsatisfiable core [2020-11-30 01:13:24,905 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:13:24,925 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:13:24,926 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:13:24,926 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 41 [2020-11-30 01:13:24,926 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669332517] [2020-11-30 01:13:24,926 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:13:24,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:13:24,926 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 79 times [2020-11-30 01:13:24,926 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:13:24,926 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300851476] [2020-11-30 01:13:24,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:13:24,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:24,927 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:24,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:13:24,928 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:13:24,929 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:13:24,934 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:13:24,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2020-11-30 01:13:24,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2020-11-30 01:13:24,935 INFO L87 Difference]: Start difference. First operand 87 states and 130 transitions. cyclomatic complexity: 46 Second operand 42 states. [2020-11-30 01:13:25,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:13:25,005 INFO L93 Difference]: Finished difference Result 89 states and 132 transitions. [2020-11-30 01:13:25,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2020-11-30 01:13:25,006 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 89 states and 132 transitions. [2020-11-30 01:13:25,006 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:13:25,007 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 89 states to 88 states and 131 transitions. [2020-11-30 01:13:25,007 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:13:25,007 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:13:25,007 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 131 transitions. [2020-11-30 01:13:25,007 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:13:25,007 INFO L691 BuchiCegarLoop]: Abstraction has 88 states and 131 transitions. WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [2020-11-30 01:17:46,189 INFO L796 eck$LassoCheckResult]: Loop: 158510#L39 assume true; 158510#L39 [2020-11-30 01:17:46,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:17:46,189 INFO L82 PathProgramCache]: Analyzing trace with hash -658616791, now seen corresponding path program 82 times [2020-11-30 01:17:46,189 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:17:46,189 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477312015] [2020-11-30 01:17:46,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:17:46,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:17:51,247 INFO L134 CoverageAnalysis]: Checked inductivity of 3403 backedges. 0 proven. 3403 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:17:51,247 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477312015] [2020-11-30 01:17:51,247 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [963135108] [2020-11-30 01:17:51,247 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 167 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 167 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:17:51,326 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:17:51,326 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:17:51,328 INFO L263 TraceCheckSpWp]: Trace formula consists of 358 conjuncts, 84 conjunts are in the unsatisfiable core [2020-11-30 01:17:51,329 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:17:51,363 INFO L134 CoverageAnalysis]: Checked inductivity of 3403 backedges. 0 proven. 3403 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:17:51,364 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:17:51,364 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [84, 84] total 85 [2020-11-30 01:17:51,364 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723672645] [2020-11-30 01:17:51,364 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:17:51,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:17:51,364 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 164 times [2020-11-30 01:17:51,365 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:17:51,365 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241201729] [2020-11-30 01:17:51,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:17:51,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:17:51,366 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:17:51,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:17:51,366 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:17:51,366 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:17:51,370 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:17:51,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2020-11-30 01:17:51,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2020-11-30 01:17:51,371 INFO L87 Difference]: Start difference. First operand 172 states and 257 transitions. cyclomatic complexity: 88 Second operand 86 states. [2020-11-30 01:17:52,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:17:52,879 INFO L93 Difference]: Finished difference Result 3746 states and 3834 transitions. [2020-11-30 01:17:52,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2020-11-30 01:17:52,881 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3746 states and 3834 transitions. [2020-11-30 01:17:52,890 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:17:52,896 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3746 states to 3745 states and 3833 transitions. [2020-11-30 01:17:52,896 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:17:52,896 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:17:52,896 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3745 states and 3833 transitions. [2020-11-30 01:17:52,897 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:17:52,898 INFO L691 BuchiCegarLoop]: Abstraction has 3745 states and 3833 transitions. [2020-11-30 01:17:52,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3745 states and 3833 transitions. [2020-11-30 01:17:52,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3745 to 173. [2020-11-30 01:17:52,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2020-11-30 01:17:52,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 259 transitions. [2020-11-30 01:17:52,906 INFO L714 BuchiCegarLoop]: Abstraction has 173 states and 259 transitions. [2020-11-30 01:17:52,906 INFO L594 BuchiCegarLoop]: Abstraction has 173 states and 259 transitions. [2020-11-30 01:17:52,906 INFO L427 BuchiCegarLoop]: ======== Iteration 166============ [2020-11-30 01:17:52,906 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 173 states and 259 transitions. [2020-11-30 01:17:52,907 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:17:52,907 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:17:52,907 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:17:52,907 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [81, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:17:52,907 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:17:52,907 INFO L794 eck$LassoCheckResult]: Stem: 162773#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 162770#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 162771#L26 main_~i~0 := 0; 162772#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 162776#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 162777#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162781#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162942#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162941#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162940#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162939#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162938#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162937#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162936#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162935#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162934#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162933#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162932#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162931#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162930#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162929#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162928#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162927#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162926#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162925#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162924#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162923#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162922#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162921#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162920#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162919#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162918#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162917#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162916#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162915#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162914#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162913#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162912#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162911#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162910#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162909#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162908#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162907#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162906#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162905#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162904#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162903#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162902#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162901#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162900#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162899#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162898#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162897#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162896#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162895#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162894#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162893#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162892#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162891#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162890#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162889#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162888#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162887#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162886#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162885#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162884#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162883#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162882#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162881#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162880#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162879#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162878#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162877#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162876#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162875#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162874#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162873#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162872#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162871#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162870#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162869#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162868#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162867#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162866#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162865#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162864#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 162863#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 162778#L35-2 assume main_~j~0 >= 100; 162775#L39 [2020-11-30 01:17:52,907 INFO L796 eck$LassoCheckResult]: Loop: 162775#L39 assume true; 162775#L39 [2020-11-30 01:17:52,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:17:52,908 INFO L82 PathProgramCache]: Analyzing trace with hash 469327803, now seen corresponding path program 81 times [2020-11-30 01:17:52,908 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:17:52,908 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909491961] [2020-11-30 01:17:52,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:17:52,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:17:58,170 INFO L134 CoverageAnalysis]: Checked inductivity of 3321 backedges. 0 proven. 3321 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:17:58,170 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1909491961] [2020-11-30 01:17:58,171 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [875915603] [2020-11-30 01:17:58,171 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 168 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 168 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:17:58,324 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 42 check-sat command(s) [2020-11-30 01:17:58,325 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:17:58,327 INFO L263 TraceCheckSpWp]: Trace formula consists of 520 conjuncts, 83 conjunts are in the unsatisfiable core [2020-11-30 01:17:58,328 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:17:58,366 INFO L134 CoverageAnalysis]: Checked inductivity of 3321 backedges. 0 proven. 3321 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:17:58,367 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:17:58,367 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [83, 83] total 84 [2020-11-30 01:17:58,367 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992392342] [2020-11-30 01:17:58,367 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:17:58,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:17:58,367 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 165 times [2020-11-30 01:17:58,367 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:17:58,368 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39054550] [2020-11-30 01:17:58,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:17:58,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:17:58,368 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:17:58,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:17:58,369 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:17:58,369 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:17:58,379 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:17:58,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2020-11-30 01:17:58,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3570, Invalid=3570, Unknown=0, NotChecked=0, Total=7140 [2020-11-30 01:17:58,380 INFO L87 Difference]: Start difference. First operand 173 states and 259 transitions. cyclomatic complexity: 89 Second operand 85 states. [2020-11-30 01:17:58,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:17:58,665 INFO L93 Difference]: Finished difference Result 175 states and 261 transitions. [2020-11-30 01:17:58,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2020-11-30 01:17:58,667 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 175 states and 261 transitions. [2020-11-30 01:17:58,667 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:17:58,668 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 175 states to 174 states and 260 transitions. [2020-11-30 01:17:58,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:17:58,668 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:17:58,668 INFO L73 IsDeterministic]: Start isDeterministic. Operand 174 states and 260 transitions. [2020-11-30 01:17:58,668 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:17:58,668 INFO L691 BuchiCegarLoop]: Abstraction has 174 states and 260 transitions. [2020-11-30 01:17:58,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states and 260 transitions. [2020-11-30 01:17:58,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2020-11-30 01:17:58,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2020-11-30 01:17:58,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 260 transitions. [2020-11-30 01:17:58,669 INFO L714 BuchiCegarLoop]: Abstraction has 174 states and 260 transitions. [2020-11-30 01:17:58,670 INFO L594 BuchiCegarLoop]: Abstraction has 174 states and 260 transitions. [2020-11-30 01:17:58,670 INFO L427 BuchiCegarLoop]: ======== Iteration 167============ [2020-11-30 01:17:58,670 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 174 states and 260 transitions. [2020-11-30 01:17:58,670 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:17:58,670 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:17:58,670 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:17:58,670 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [83, 1, 1, 1, 1, 1] [2020-11-30 01:17:58,670 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:17:58,671 INFO L794 eck$LassoCheckResult]: Stem: 163470#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 163467#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 163468#L26 main_~i~0 := 0; 163469#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163476#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163477#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163639#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163637#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163635#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163633#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163631#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163629#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163627#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163625#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163623#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163621#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163619#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163617#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163615#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163613#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163611#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163609#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163607#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163605#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163603#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163601#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163599#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163597#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163595#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163593#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163591#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163589#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163587#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163585#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163583#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163581#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163577#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163575#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163573#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163571#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163569#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163567#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163565#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163563#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163561#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163559#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163557#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163555#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163553#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163551#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163549#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163547#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163545#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163543#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163541#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163539#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163537#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163535#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163533#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163531#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163529#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163527#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163525#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163523#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163521#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163519#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163517#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163515#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163513#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163511#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163509#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163507#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163505#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163503#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163501#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163499#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163497#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163495#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163493#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163491#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163489#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163487#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163485#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163483#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163481#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 163479#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 163471#L29-2 assume main_~i~0 >= 100; 163472#L39 [2020-11-30 01:17:58,671 INFO L796 eck$LassoCheckResult]: Loop: 163472#L39 assume true; 163472#L39 [2020-11-30 01:17:58,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:17:58,671 INFO L82 PathProgramCache]: Analyzing trace with hash 1057717652, now seen corresponding path program 83 times [2020-11-30 01:17:58,671 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:17:58,671 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1334047745] [2020-11-30 01:17:58,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:17:58,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:04,090 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 0 proven. 3486 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:04,090 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1334047745] [2020-11-30 01:18:04,090 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [344891748] [2020-11-30 01:18:04,090 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 169 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 169 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:04,187 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 43 check-sat command(s) [2020-11-30 01:18:04,187 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:18:04,189 INFO L263 TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 85 conjunts are in the unsatisfiable core [2020-11-30 01:18:04,190 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:04,222 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 0 proven. 3486 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:04,222 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:04,222 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [85, 85] total 86 [2020-11-30 01:18:04,222 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1575836511] [2020-11-30 01:18:04,222 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:04,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:04,223 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 166 times [2020-11-30 01:18:04,223 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:04,223 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062261888] [2020-11-30 01:18:04,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:04,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:04,224 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:04,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:04,225 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:04,226 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:04,240 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:04,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2020-11-30 01:18:04,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3741, Invalid=3741, Unknown=0, NotChecked=0, Total=7482 [2020-11-30 01:18:04,241 INFO L87 Difference]: Start difference. First operand 174 states and 260 transitions. cyclomatic complexity: 89 Second operand 87 states. [2020-11-30 01:18:05,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:05,909 INFO L93 Difference]: Finished difference Result 3833 states and 3922 transitions. [2020-11-30 01:18:05,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2020-11-30 01:18:05,910 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3833 states and 3922 transitions. [2020-11-30 01:18:05,917 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:18:05,922 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3833 states to 3832 states and 3921 transitions. [2020-11-30 01:18:05,922 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:18:05,922 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:18:05,922 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3832 states and 3921 transitions. [2020-11-30 01:18:05,923 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:05,923 INFO L691 BuchiCegarLoop]: Abstraction has 3832 states and 3921 transitions. [2020-11-30 01:18:05,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3832 states and 3921 transitions. [2020-11-30 01:18:05,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3832 to 175. [2020-11-30 01:18:05,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2020-11-30 01:18:05,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 262 transitions. [2020-11-30 01:18:05,930 INFO L714 BuchiCegarLoop]: Abstraction has 175 states and 262 transitions. [2020-11-30 01:18:05,930 INFO L594 BuchiCegarLoop]: Abstraction has 175 states and 262 transitions. [2020-11-30 01:18:05,930 INFO L427 BuchiCegarLoop]: ======== Iteration 168============ [2020-11-30 01:18:05,931 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 175 states and 262 transitions. [2020-11-30 01:18:05,931 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:05,931 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:05,931 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:05,931 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [82, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:18:05,931 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:05,932 INFO L794 eck$LassoCheckResult]: Stem: 167828#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 167825#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 167826#L26 main_~i~0 := 0; 167827#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 167831#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 167832#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167836#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167999#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167998#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167997#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167996#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167995#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167994#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167993#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167992#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167991#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167990#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167989#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167988#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167987#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167986#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167985#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167984#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167983#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167982#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167981#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167980#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167979#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167978#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167977#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167976#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167975#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167974#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167973#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167972#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167971#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167970#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167969#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167968#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167967#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167966#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167965#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167964#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167963#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167962#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167961#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167960#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167959#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167958#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167957#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167956#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167955#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167954#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167953#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167952#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167951#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167950#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167949#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167948#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167947#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167946#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167945#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167944#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167943#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167942#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167941#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167940#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167939#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167938#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167937#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167936#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167935#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167934#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167933#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167932#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167931#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167930#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167929#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167928#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167927#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167926#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167925#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167924#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167923#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167922#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167921#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167920#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 167919#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 167833#L35-2 assume main_~j~0 >= 100; 167830#L39 [2020-11-30 01:18:05,932 INFO L796 eck$LassoCheckResult]: Loop: 167830#L39 assume true; 167830#L39 [2020-11-30 01:18:05,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:05,932 INFO L82 PathProgramCache]: Analyzing trace with hash 1664261716, now seen corresponding path program 82 times [2020-11-30 01:18:05,932 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:05,932 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293151006] [2020-11-30 01:18:05,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:05,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:11,259 INFO L134 CoverageAnalysis]: Checked inductivity of 3403 backedges. 0 proven. 3403 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:11,259 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293151006] [2020-11-30 01:18:11,260 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [235761846] [2020-11-30 01:18:11,260 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 170 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 170 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:11,371 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:18:11,371 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:18:11,373 INFO L263 TraceCheckSpWp]: Trace formula consists of 526 conjuncts, 84 conjunts are in the unsatisfiable core [2020-11-30 01:18:11,374 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:11,406 INFO L134 CoverageAnalysis]: Checked inductivity of 3403 backedges. 0 proven. 3403 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:11,406 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:11,406 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [84, 84] total 85 [2020-11-30 01:18:11,406 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451613722] [2020-11-30 01:18:11,406 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:11,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:11,407 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 167 times [2020-11-30 01:18:11,407 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:11,407 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888842380] [2020-11-30 01:18:11,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:11,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:11,408 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:11,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:11,408 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:11,408 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:11,412 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:11,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2020-11-30 01:18:11,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2020-11-30 01:18:11,414 INFO L87 Difference]: Start difference. First operand 175 states and 262 transitions. cyclomatic complexity: 90 Second operand 86 states. [2020-11-30 01:18:11,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:11,623 INFO L93 Difference]: Finished difference Result 177 states and 264 transitions. [2020-11-30 01:18:11,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2020-11-30 01:18:11,624 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 177 states and 264 transitions. [2020-11-30 01:18:11,624 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:11,625 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 177 states to 176 states and 263 transitions. [2020-11-30 01:18:11,625 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:18:11,625 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:18:11,625 INFO L73 IsDeterministic]: Start isDeterministic. Operand 176 states and 263 transitions. [2020-11-30 01:18:11,625 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:11,625 INFO L691 BuchiCegarLoop]: Abstraction has 176 states and 263 transitions. [2020-11-30 01:18:11,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states and 263 transitions. [2020-11-30 01:18:11,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2020-11-30 01:18:11,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2020-11-30 01:18:11,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 263 transitions. [2020-11-30 01:18:11,626 INFO L714 BuchiCegarLoop]: Abstraction has 176 states and 263 transitions. [2020-11-30 01:18:11,627 INFO L594 BuchiCegarLoop]: Abstraction has 176 states and 263 transitions. [2020-11-30 01:18:11,627 INFO L427 BuchiCegarLoop]: ======== Iteration 169============ [2020-11-30 01:18:11,627 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 176 states and 263 transitions. [2020-11-30 01:18:11,627 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:11,627 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:11,627 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:11,627 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [84, 1, 1, 1, 1, 1] [2020-11-30 01:18:11,628 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:11,628 INFO L794 eck$LassoCheckResult]: Stem: 168533#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 168530#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 168531#L26 main_~i~0 := 0; 168532#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168539#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168540#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168704#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168702#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168700#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168698#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168696#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168694#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168692#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168690#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168688#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168686#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168684#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168682#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168680#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168678#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168676#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168674#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168672#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168670#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168668#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168666#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168664#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168662#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168660#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168658#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168656#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168654#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168652#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168650#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168648#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168646#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168644#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168642#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168640#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168638#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168636#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168634#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168632#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168630#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168628#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168626#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168624#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168622#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168620#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168618#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168616#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168614#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168612#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168610#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168608#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168606#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168604#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168602#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168600#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168598#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168596#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168594#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168592#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168590#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168588#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168586#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168584#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168582#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168580#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168578#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168576#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168574#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168572#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168570#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168568#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168566#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168564#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168562#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168560#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168558#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168556#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168554#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168552#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168550#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168548#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168546#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168544#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 168542#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 168534#L29-2 assume main_~i~0 >= 100; 168535#L39 [2020-11-30 01:18:11,628 INFO L796 eck$LassoCheckResult]: Loop: 168535#L39 assume true; 168535#L39 [2020-11-30 01:18:11,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:11,628 INFO L82 PathProgramCache]: Analyzing trace with hash -1570489463, now seen corresponding path program 84 times [2020-11-30 01:18:11,628 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:11,628 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733610972] [2020-11-30 01:18:11,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:11,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:17,263 INFO L134 CoverageAnalysis]: Checked inductivity of 3570 backedges. 0 proven. 3570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:17,263 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [733610972] [2020-11-30 01:18:17,263 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1598102328] [2020-11-30 01:18:17,263 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 171 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 171 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:17,373 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2020-11-30 01:18:17,373 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:18:17,375 INFO L263 TraceCheckSpWp]: Trace formula consists of 366 conjuncts, 86 conjunts are in the unsatisfiable core [2020-11-30 01:18:17,376 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:17,412 INFO L134 CoverageAnalysis]: Checked inductivity of 3570 backedges. 0 proven. 3570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:17,412 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:17,412 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 86] total 87 [2020-11-30 01:18:17,412 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1687134394] [2020-11-30 01:18:17,412 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:17,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:17,413 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 168 times [2020-11-30 01:18:17,413 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:17,413 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105672242] [2020-11-30 01:18:17,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:17,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:17,414 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:17,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:17,415 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:17,415 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:17,420 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:17,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 88 interpolants. [2020-11-30 01:18:17,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3828, Invalid=3828, Unknown=0, NotChecked=0, Total=7656 [2020-11-30 01:18:17,421 INFO L87 Difference]: Start difference. First operand 176 states and 263 transitions. cyclomatic complexity: 90 Second operand 88 states. [2020-11-30 01:18:19,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:19,371 INFO L93 Difference]: Finished difference Result 3921 states and 4011 transitions. [2020-11-30 01:18:19,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 87 states. [2020-11-30 01:18:19,372 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3921 states and 4011 transitions. [2020-11-30 01:18:19,381 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:18:19,387 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3921 states to 3920 states and 4010 transitions. [2020-11-30 01:18:19,387 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:18:19,387 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:18:19,387 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3920 states and 4010 transitions. [2020-11-30 01:18:19,387 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:19,388 INFO L691 BuchiCegarLoop]: Abstraction has 3920 states and 4010 transitions. [2020-11-30 01:18:19,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3920 states and 4010 transitions. [2020-11-30 01:18:19,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3920 to 177. [2020-11-30 01:18:19,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2020-11-30 01:18:19,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 265 transitions. [2020-11-30 01:18:19,396 INFO L714 BuchiCegarLoop]: Abstraction has 177 states and 265 transitions. [2020-11-30 01:18:19,396 INFO L594 BuchiCegarLoop]: Abstraction has 177 states and 265 transitions. [2020-11-30 01:18:19,396 INFO L427 BuchiCegarLoop]: ======== Iteration 170============ [2020-11-30 01:18:19,396 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 265 transitions. [2020-11-30 01:18:19,397 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:19,397 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:19,397 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:19,397 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [83, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:18:19,397 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:19,397 INFO L794 eck$LassoCheckResult]: Stem: 172985#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 172982#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 172983#L26 main_~i~0 := 0; 172984#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 172988#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 172989#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 172993#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173158#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173157#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173156#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173155#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173154#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173153#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173152#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173151#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173150#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173149#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173148#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173147#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173146#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173145#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173144#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173143#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173142#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173141#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173140#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173139#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173138#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173137#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173136#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173135#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173134#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173133#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173132#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173131#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173130#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173129#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173128#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173127#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173126#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173125#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173124#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173123#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173122#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173121#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173120#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173119#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173118#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173117#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173116#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173115#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173114#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173113#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173112#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173111#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173110#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173109#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173108#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173107#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173106#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173105#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173104#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173103#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173102#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173101#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173100#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173099#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173098#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173097#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173096#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173095#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173094#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173093#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173092#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173091#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173090#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173089#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173088#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173087#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173086#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173085#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173084#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173083#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173082#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173081#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173080#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173079#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173078#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 173077#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 172990#L35-2 assume main_~j~0 >= 100; 172987#L39 [2020-11-30 01:18:19,397 INFO L796 eck$LassoCheckResult]: Loop: 172987#L39 assume true; 172987#L39 [2020-11-30 01:18:19,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:19,398 INFO L82 PathProgramCache]: Analyzing trace with hash 52507355, now seen corresponding path program 83 times [2020-11-30 01:18:19,398 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:19,398 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1109986601] [2020-11-30 01:18:19,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:19,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:24,780 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 0 proven. 3486 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:24,780 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1109986601] [2020-11-30 01:18:24,780 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [975090584] [2020-11-30 01:18:24,780 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 172 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 172 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:24,917 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 43 check-sat command(s) [2020-11-30 01:18:24,917 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:18:24,920 INFO L263 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 85 conjunts are in the unsatisfiable core [2020-11-30 01:18:24,921 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:24,959 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 0 proven. 3486 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:24,959 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:24,959 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [85, 85] total 86 [2020-11-30 01:18:24,959 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168787694] [2020-11-30 01:18:24,959 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:24,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:24,960 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 169 times [2020-11-30 01:18:24,960 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:24,960 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305730079] [2020-11-30 01:18:24,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:24,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:24,961 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:24,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:24,962 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:24,962 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:24,965 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:24,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2020-11-30 01:18:24,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3741, Invalid=3741, Unknown=0, NotChecked=0, Total=7482 [2020-11-30 01:18:24,966 INFO L87 Difference]: Start difference. First operand 177 states and 265 transitions. cyclomatic complexity: 91 Second operand 87 states. [2020-11-30 01:18:25,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:25,202 INFO L93 Difference]: Finished difference Result 179 states and 267 transitions. [2020-11-30 01:18:25,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2020-11-30 01:18:25,203 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 179 states and 267 transitions. [2020-11-30 01:18:25,204 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:25,204 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 179 states to 178 states and 266 transitions. [2020-11-30 01:18:25,204 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:18:25,204 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:18:25,204 INFO L73 IsDeterministic]: Start isDeterministic. Operand 178 states and 266 transitions. [2020-11-30 01:18:25,205 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:25,205 INFO L691 BuchiCegarLoop]: Abstraction has 178 states and 266 transitions. [2020-11-30 01:18:25,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states and 266 transitions. [2020-11-30 01:18:25,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2020-11-30 01:18:25,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2020-11-30 01:18:25,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 266 transitions. [2020-11-30 01:18:25,206 INFO L714 BuchiCegarLoop]: Abstraction has 178 states and 266 transitions. [2020-11-30 01:18:25,206 INFO L594 BuchiCegarLoop]: Abstraction has 178 states and 266 transitions. [2020-11-30 01:18:25,206 INFO L427 BuchiCegarLoop]: ======== Iteration 171============ [2020-11-30 01:18:25,206 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 178 states and 266 transitions. [2020-11-30 01:18:25,207 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:25,207 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:25,207 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:25,207 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [85, 1, 1, 1, 1, 1] [2020-11-30 01:18:25,207 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:25,207 INFO L794 eck$LassoCheckResult]: Stem: 173698#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 173695#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 173696#L26 main_~i~0 := 0; 173697#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173704#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173705#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173871#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173869#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173867#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173865#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173863#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173861#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173859#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173857#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173855#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173853#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173851#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173849#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173847#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173845#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173843#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173841#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173839#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173837#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173835#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173833#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173831#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173829#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173827#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173825#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173823#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173821#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173819#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173817#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173815#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173813#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173811#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173809#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173807#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173805#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173803#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173801#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173799#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173797#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173795#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173793#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173791#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173789#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173787#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173785#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173783#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173781#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173779#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173777#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173775#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173773#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173771#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173769#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173767#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173765#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173763#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173761#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173759#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173757#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173755#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173753#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173751#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173749#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173747#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173745#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173743#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173741#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173739#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173737#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173735#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173733#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173731#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173729#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173727#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173725#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173723#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173721#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173719#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173717#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173715#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173713#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173711#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173709#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 173707#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 173699#L29-2 assume main_~i~0 >= 100; 173700#L39 [2020-11-30 01:18:25,207 INFO L796 eck$LassoCheckResult]: Loop: 173700#L39 assume true; 173700#L39 [2020-11-30 01:18:25,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:25,208 INFO L82 PathProgramCache]: Analyzing trace with hash -1440531404, now seen corresponding path program 85 times [2020-11-30 01:18:25,208 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:25,208 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938752458] [2020-11-30 01:18:25,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:25,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:31,347 INFO L134 CoverageAnalysis]: Checked inductivity of 3655 backedges. 0 proven. 3655 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:31,348 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938752458] [2020-11-30 01:18:31,348 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [271910967] [2020-11-30 01:18:31,348 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 173 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 173 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:31,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:31,431 INFO L263 TraceCheckSpWp]: Trace formula consists of 370 conjuncts, 87 conjunts are in the unsatisfiable core [2020-11-30 01:18:31,432 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:31,467 INFO L134 CoverageAnalysis]: Checked inductivity of 3655 backedges. 0 proven. 3655 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:31,467 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:31,467 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [87, 87] total 88 [2020-11-30 01:18:31,468 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1124107908] [2020-11-30 01:18:31,468 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:31,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:31,468 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 170 times [2020-11-30 01:18:31,468 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:31,468 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981546412] [2020-11-30 01:18:31,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:31,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:31,470 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:31,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:31,470 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:31,471 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:31,475 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:31,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2020-11-30 01:18:31,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3916, Invalid=3916, Unknown=0, NotChecked=0, Total=7832 [2020-11-30 01:18:31,476 INFO L87 Difference]: Start difference. First operand 178 states and 266 transitions. cyclomatic complexity: 91 Second operand 89 states. [2020-11-30 01:18:33,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:33,425 INFO L93 Difference]: Finished difference Result 4010 states and 4101 transitions. [2020-11-30 01:18:33,427 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2020-11-30 01:18:33,427 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4010 states and 4101 transitions. [2020-11-30 01:18:33,437 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:18:33,442 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4010 states to 4009 states and 4100 transitions. [2020-11-30 01:18:33,442 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:18:33,445 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:18:33,445 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4009 states and 4100 transitions. [2020-11-30 01:18:33,447 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:33,447 INFO L691 BuchiCegarLoop]: Abstraction has 4009 states and 4100 transitions. [2020-11-30 01:18:33,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4009 states and 4100 transitions. [2020-11-30 01:18:33,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4009 to 179. [2020-11-30 01:18:33,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2020-11-30 01:18:33,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 268 transitions. [2020-11-30 01:18:33,457 INFO L714 BuchiCegarLoop]: Abstraction has 179 states and 268 transitions. [2020-11-30 01:18:33,457 INFO L594 BuchiCegarLoop]: Abstraction has 179 states and 268 transitions. [2020-11-30 01:18:33,457 INFO L427 BuchiCegarLoop]: ======== Iteration 172============ [2020-11-30 01:18:33,457 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 268 transitions. [2020-11-30 01:18:33,458 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:33,458 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:33,458 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:33,458 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [84, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:18:33,458 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:33,458 INFO L794 eck$LassoCheckResult]: Stem: 178245#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 178242#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 178243#L26 main_~i~0 := 0; 178244#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 178248#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 178249#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178253#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178420#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178419#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178418#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178417#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178416#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178415#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178414#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178413#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178412#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178411#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178410#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178409#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178408#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178407#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178406#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178405#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178404#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178403#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178402#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178401#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178400#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178399#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178398#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178397#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178396#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178395#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178394#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178393#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178392#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178391#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178390#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178389#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178388#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178387#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178386#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178385#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178384#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178383#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178382#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178381#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178380#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178379#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178378#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178377#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178376#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178375#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178374#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178373#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178372#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178371#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178370#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178369#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178368#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178367#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178366#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178365#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178364#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178363#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178362#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178361#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178360#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178359#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178358#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178357#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178356#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178355#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178354#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178353#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178352#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178351#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178350#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178349#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178348#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178347#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178346#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178345#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178344#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178343#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178342#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178341#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178340#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178339#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 178338#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 178250#L35-2 assume main_~j~0 >= 100; 178247#L39 [2020-11-30 01:18:33,458 INFO L796 eck$LassoCheckResult]: Loop: 178247#L39 assume true; 178247#L39 [2020-11-30 01:18:33,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:33,459 INFO L82 PathProgramCache]: Analyzing trace with hash 1627729716, now seen corresponding path program 84 times [2020-11-30 01:18:33,459 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:33,459 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916300320] [2020-11-30 01:18:33,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:33,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:39,330 INFO L134 CoverageAnalysis]: Checked inductivity of 3570 backedges. 0 proven. 3570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:39,330 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916300320] [2020-11-30 01:18:39,330 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [320033978] [2020-11-30 01:18:39,330 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 174 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 174 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:39,475 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2020-11-30 01:18:39,475 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:18:39,478 INFO L263 TraceCheckSpWp]: Trace formula consists of 538 conjuncts, 86 conjunts are in the unsatisfiable core [2020-11-30 01:18:39,479 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:39,517 INFO L134 CoverageAnalysis]: Checked inductivity of 3570 backedges. 0 proven. 3570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:39,517 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:39,517 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 86] total 87 [2020-11-30 01:18:39,517 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505473745] [2020-11-30 01:18:39,517 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:39,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:39,518 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 171 times [2020-11-30 01:18:39,518 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:39,518 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944034698] [2020-11-30 01:18:39,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:39,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:39,519 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:39,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:39,519 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:39,519 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:39,523 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:39,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 88 interpolants. [2020-11-30 01:18:39,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3828, Invalid=3828, Unknown=0, NotChecked=0, Total=7656 [2020-11-30 01:18:39,524 INFO L87 Difference]: Start difference. First operand 179 states and 268 transitions. cyclomatic complexity: 92 Second operand 88 states. [2020-11-30 01:18:39,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:39,822 INFO L93 Difference]: Finished difference Result 181 states and 270 transitions. [2020-11-30 01:18:39,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 87 states. [2020-11-30 01:18:39,823 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 181 states and 270 transitions. [2020-11-30 01:18:39,824 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:39,824 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 181 states to 180 states and 269 transitions. [2020-11-30 01:18:39,824 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:18:39,824 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:18:39,824 INFO L73 IsDeterministic]: Start isDeterministic. Operand 180 states and 269 transitions. [2020-11-30 01:18:39,825 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:39,825 INFO L691 BuchiCegarLoop]: Abstraction has 180 states and 269 transitions. [2020-11-30 01:18:39,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states and 269 transitions. [2020-11-30 01:18:39,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2020-11-30 01:18:39,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2020-11-30 01:18:39,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 269 transitions. [2020-11-30 01:18:39,826 INFO L714 BuchiCegarLoop]: Abstraction has 180 states and 269 transitions. [2020-11-30 01:18:39,826 INFO L594 BuchiCegarLoop]: Abstraction has 180 states and 269 transitions. [2020-11-30 01:18:39,826 INFO L427 BuchiCegarLoop]: ======== Iteration 173============ [2020-11-30 01:18:39,826 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 269 transitions. [2020-11-30 01:18:39,826 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:39,826 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:39,826 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:39,827 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [86, 1, 1, 1, 1, 1] [2020-11-30 01:18:39,827 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:39,827 INFO L794 eck$LassoCheckResult]: Stem: 178966#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 178963#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 178964#L26 main_~i~0 := 0; 178965#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178972#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178973#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179141#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179139#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179137#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179135#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179133#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179131#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179129#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179127#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179125#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179123#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179121#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179119#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179117#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179115#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179113#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179111#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179109#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179107#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179105#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179103#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179101#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179099#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179097#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179095#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179093#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179091#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179089#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179087#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179085#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179083#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179081#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179079#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179077#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179075#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179073#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179071#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179069#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179067#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179065#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179063#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179061#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179059#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179057#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179055#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179053#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179051#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179049#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179047#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179045#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179043#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179041#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179039#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179037#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179035#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179033#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179031#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179029#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179027#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179025#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179023#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179021#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179019#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179017#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179015#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179013#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179011#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179009#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179007#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179005#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179003#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 179001#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178999#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178995#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178993#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178991#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178989#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178987#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178985#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178983#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178981#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178979#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178977#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 178975#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 178967#L29-2 assume main_~i~0 >= 100; 178968#L39 [2020-11-30 01:18:39,827 INFO L796 eck$LassoCheckResult]: Loop: 178968#L39 assume true; 178968#L39 [2020-11-30 01:18:39,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:39,827 INFO L82 PathProgramCache]: Analyzing trace with hash -1706798871, now seen corresponding path program 86 times [2020-11-30 01:18:39,827 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:39,827 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297610188] [2020-11-30 01:18:39,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:39,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:45,724 INFO L134 CoverageAnalysis]: Checked inductivity of 3741 backedges. 0 proven. 3741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:45,725 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297610188] [2020-11-30 01:18:45,725 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1997894719] [2020-11-30 01:18:45,725 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 175 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 175 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:45,809 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:18:45,809 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:18:45,811 INFO L263 TraceCheckSpWp]: Trace formula consists of 374 conjuncts, 88 conjunts are in the unsatisfiable core [2020-11-30 01:18:45,812 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:45,849 INFO L134 CoverageAnalysis]: Checked inductivity of 3741 backedges. 0 proven. 3741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:45,850 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:45,850 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [88, 88] total 89 [2020-11-30 01:18:45,850 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953906756] [2020-11-30 01:18:45,850 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:45,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:45,850 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 172 times [2020-11-30 01:18:45,850 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:45,850 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074810770] [2020-11-30 01:18:45,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:45,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:45,852 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:45,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:45,852 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:45,852 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:45,856 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:45,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2020-11-30 01:18:45,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4005, Invalid=4005, Unknown=0, NotChecked=0, Total=8010 [2020-11-30 01:18:45,857 INFO L87 Difference]: Start difference. First operand 180 states and 269 transitions. cyclomatic complexity: 92 Second operand 90 states. [2020-11-30 01:18:47,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:47,487 INFO L93 Difference]: Finished difference Result 4100 states and 4192 transitions. [2020-11-30 01:18:47,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2020-11-30 01:18:47,488 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4100 states and 4192 transitions. [2020-11-30 01:18:47,497 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:18:47,503 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4100 states to 4099 states and 4191 transitions. [2020-11-30 01:18:47,503 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:18:47,503 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:18:47,503 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4099 states and 4191 transitions. [2020-11-30 01:18:47,504 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:47,504 INFO L691 BuchiCegarLoop]: Abstraction has 4099 states and 4191 transitions. [2020-11-30 01:18:47,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4099 states and 4191 transitions. [2020-11-30 01:18:47,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4099 to 181. [2020-11-30 01:18:47,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2020-11-30 01:18:47,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 271 transitions. [2020-11-30 01:18:47,511 INFO L714 BuchiCegarLoop]: Abstraction has 181 states and 271 transitions. [2020-11-30 01:18:47,512 INFO L594 BuchiCegarLoop]: Abstraction has 181 states and 271 transitions. [2020-11-30 01:18:47,512 INFO L427 BuchiCegarLoop]: ======== Iteration 174============ [2020-11-30 01:18:47,512 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 181 states and 271 transitions. [2020-11-30 01:18:47,512 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:47,513 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:47,513 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:47,513 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [85, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:18:47,513 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:47,514 INFO L794 eck$LassoCheckResult]: Stem: 183609#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 183606#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 183607#L26 main_~i~0 := 0; 183608#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 183612#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 183613#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183617#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183786#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183785#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183784#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183783#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183782#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183781#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183780#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183779#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183778#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183777#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183776#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183775#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183774#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183773#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183772#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183771#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183770#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183769#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183768#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183767#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183766#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183765#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183764#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183763#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183762#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183761#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183760#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183759#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183758#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183757#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183756#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183755#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183754#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183753#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183752#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183751#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183750#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183749#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183748#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183747#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183746#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183745#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183744#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183743#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183742#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183741#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183740#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183739#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183738#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183737#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183736#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183735#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183734#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183733#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183732#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183731#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183730#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183729#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183728#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183727#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183726#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183725#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183724#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183723#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183722#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183721#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183720#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183719#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183718#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183717#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183716#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183715#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183714#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183713#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183712#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183711#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183710#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183709#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183708#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183707#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183706#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183705#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183704#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 183703#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 183614#L35-2 assume main_~j~0 >= 100; 183611#L39 [2020-11-30 01:18:47,514 INFO L796 eck$LassoCheckResult]: Loop: 183611#L39 assume true; 183611#L39 [2020-11-30 01:18:47,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:47,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1079984645, now seen corresponding path program 85 times [2020-11-30 01:18:47,514 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:47,514 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486322883] [2020-11-30 01:18:47,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:47,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:53,454 INFO L134 CoverageAnalysis]: Checked inductivity of 3655 backedges. 0 proven. 3655 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:53,454 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1486322883] [2020-11-30 01:18:53,454 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1657056891] [2020-11-30 01:18:53,455 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 176 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 176 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:18:53,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:18:53,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 544 conjuncts, 87 conjunts are in the unsatisfiable core [2020-11-30 01:18:53,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:18:53,598 INFO L134 CoverageAnalysis]: Checked inductivity of 3655 backedges. 0 proven. 3655 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:18:53,598 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:18:53,598 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [87, 87] total 88 [2020-11-30 01:18:53,599 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607727384] [2020-11-30 01:18:53,599 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:18:53,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:53,599 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 173 times [2020-11-30 01:18:53,599 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:53,599 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341608254] [2020-11-30 01:18:53,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:53,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:53,600 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:53,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:18:53,600 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:18:53,601 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:18:53,605 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:18:53,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2020-11-30 01:18:53,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3916, Invalid=3916, Unknown=0, NotChecked=0, Total=7832 [2020-11-30 01:18:53,606 INFO L87 Difference]: Start difference. First operand 181 states and 271 transitions. cyclomatic complexity: 93 Second operand 89 states. [2020-11-30 01:18:53,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:18:53,876 INFO L93 Difference]: Finished difference Result 183 states and 273 transitions. [2020-11-30 01:18:53,877 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2020-11-30 01:18:53,878 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 183 states and 273 transitions. [2020-11-30 01:18:53,878 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:53,878 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 183 states to 182 states and 272 transitions. [2020-11-30 01:18:53,878 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:18:53,879 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:18:53,879 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 272 transitions. [2020-11-30 01:18:53,879 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:18:53,879 INFO L691 BuchiCegarLoop]: Abstraction has 182 states and 272 transitions. [2020-11-30 01:18:53,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 272 transitions. [2020-11-30 01:18:53,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2020-11-30 01:18:53,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2020-11-30 01:18:53,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 272 transitions. [2020-11-30 01:18:53,880 INFO L714 BuchiCegarLoop]: Abstraction has 182 states and 272 transitions. [2020-11-30 01:18:53,880 INFO L594 BuchiCegarLoop]: Abstraction has 182 states and 272 transitions. [2020-11-30 01:18:53,880 INFO L427 BuchiCegarLoop]: ======== Iteration 175============ [2020-11-30 01:18:53,880 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 182 states and 272 transitions. [2020-11-30 01:18:53,880 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:18:53,880 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:18:53,881 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:18:53,881 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [87, 1, 1, 1, 1, 1] [2020-11-30 01:18:53,881 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:18:53,881 INFO L794 eck$LassoCheckResult]: Stem: 184338#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 184335#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 184336#L26 main_~i~0 := 0; 184337#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184344#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184345#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184515#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184513#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184511#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184509#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184507#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184505#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184503#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184501#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184499#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184497#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184495#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184493#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184491#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184489#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184487#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184485#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184483#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184481#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184479#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184477#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184475#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184473#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184471#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184469#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184467#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184465#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184463#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184461#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184459#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184457#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184455#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184453#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184451#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184449#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184447#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184445#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184443#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184441#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184439#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184437#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184435#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184433#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184431#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184429#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184427#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184425#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184423#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184421#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184419#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184417#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184415#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184413#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184411#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184409#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184407#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184405#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184403#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184401#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184399#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184397#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184395#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184393#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184391#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184389#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184387#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184385#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184383#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184381#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184379#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184377#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184375#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184373#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184371#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184369#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184367#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184365#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184363#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184361#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184359#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184357#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184355#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184353#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184351#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184349#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 184347#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 184339#L29-2 assume main_~i~0 >= 100; 184340#L39 [2020-11-30 01:18:53,881 INFO L796 eck$LassoCheckResult]: Loop: 184340#L39 assume true; 184340#L39 [2020-11-30 01:18:53,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:18:53,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1371155756, now seen corresponding path program 87 times [2020-11-30 01:18:53,881 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:18:53,882 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764667418] [2020-11-30 01:18:53,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:18:53,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:00,186 INFO L134 CoverageAnalysis]: Checked inductivity of 3828 backedges. 0 proven. 3828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:00,186 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764667418] [2020-11-30 01:19:00,186 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1848176454] [2020-11-30 01:19:00,186 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 177 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 177 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:00,300 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 45 check-sat command(s) [2020-11-30 01:19:00,300 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:00,302 INFO L263 TraceCheckSpWp]: Trace formula consists of 378 conjuncts, 89 conjunts are in the unsatisfiable core [2020-11-30 01:19:00,303 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:00,342 INFO L134 CoverageAnalysis]: Checked inductivity of 3828 backedges. 0 proven. 3828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:00,342 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:00,342 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [89, 89] total 90 [2020-11-30 01:19:00,343 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395067519] [2020-11-30 01:19:00,343 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:00,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:00,343 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 174 times [2020-11-30 01:19:00,343 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:00,343 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486083249] [2020-11-30 01:19:00,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:00,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:00,344 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:00,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:00,344 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:00,345 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:00,349 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:00,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2020-11-30 01:19:00,350 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4095, Invalid=4095, Unknown=0, NotChecked=0, Total=8190 [2020-11-30 01:19:00,350 INFO L87 Difference]: Start difference. First operand 182 states and 272 transitions. cyclomatic complexity: 93 Second operand 91 states. [2020-11-30 01:19:02,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:02,120 INFO L93 Difference]: Finished difference Result 4191 states and 4284 transitions. [2020-11-30 01:19:02,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2020-11-30 01:19:02,122 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4191 states and 4284 transitions. [2020-11-30 01:19:02,132 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:19:02,137 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4191 states to 4190 states and 4283 transitions. [2020-11-30 01:19:02,138 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:19:02,138 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:19:02,138 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4190 states and 4283 transitions. [2020-11-30 01:19:02,138 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:02,138 INFO L691 BuchiCegarLoop]: Abstraction has 4190 states and 4283 transitions. [2020-11-30 01:19:02,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4190 states and 4283 transitions. [2020-11-30 01:19:02,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4190 to 183. [2020-11-30 01:19:02,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2020-11-30 01:19:02,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 274 transitions. [2020-11-30 01:19:02,146 INFO L714 BuchiCegarLoop]: Abstraction has 183 states and 274 transitions. [2020-11-30 01:19:02,147 INFO L594 BuchiCegarLoop]: Abstraction has 183 states and 274 transitions. [2020-11-30 01:19:02,147 INFO L427 BuchiCegarLoop]: ======== Iteration 176============ [2020-11-30 01:19:02,147 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 183 states and 274 transitions. [2020-11-30 01:19:02,147 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:02,147 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:02,147 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:02,147 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [86, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:19:02,148 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:02,148 INFO L794 eck$LassoCheckResult]: Stem: 189078#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 189075#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 189076#L26 main_~i~0 := 0; 189077#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 189081#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 189082#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189086#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189257#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189256#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189255#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189254#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189253#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189252#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189251#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189250#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189249#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189248#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189247#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189246#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189245#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189244#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189243#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189242#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189241#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189240#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189239#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189238#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189237#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189236#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189235#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189234#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189233#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189232#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189231#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189230#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189229#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189228#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189227#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189226#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189225#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189224#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189223#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189222#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189221#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189220#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189219#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189218#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189217#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189216#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189215#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189214#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189213#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189212#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189211#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189210#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189209#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189208#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189207#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189206#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189205#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189204#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189203#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189202#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189201#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189200#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189199#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189198#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189197#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189196#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189195#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189194#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189193#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189192#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189191#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189190#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189189#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189188#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189187#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189186#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189185#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189184#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189183#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189182#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189181#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189180#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189179#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189178#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189177#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189176#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189175#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189174#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 189173#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 189083#L35-2 assume main_~j~0 >= 100; 189080#L39 [2020-11-30 01:19:02,148 INFO L796 eck$LassoCheckResult]: Loop: 189080#L39 assume true; 189080#L39 [2020-11-30 01:19:02,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:02,148 INFO L82 PathProgramCache]: Analyzing trace with hash 880216084, now seen corresponding path program 86 times [2020-11-30 01:19:02,148 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:02,148 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459832613] [2020-11-30 01:19:02,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:02,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:07,774 INFO L134 CoverageAnalysis]: Checked inductivity of 3741 backedges. 0 proven. 3741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:07,774 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459832613] [2020-11-30 01:19:07,774 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1404887080] [2020-11-30 01:19:07,774 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 178 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 178 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:07,878 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:19:07,878 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:07,881 INFO L263 TraceCheckSpWp]: Trace formula consists of 550 conjuncts, 88 conjunts are in the unsatisfiable core [2020-11-30 01:19:07,882 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:07,921 INFO L134 CoverageAnalysis]: Checked inductivity of 3741 backedges. 0 proven. 3741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:07,922 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:07,922 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [88, 88] total 89 [2020-11-30 01:19:07,922 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761917945] [2020-11-30 01:19:07,922 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:07,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:07,922 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 175 times [2020-11-30 01:19:07,923 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:07,923 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647529125] [2020-11-30 01:19:07,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:07,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:07,924 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:07,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:07,924 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:07,925 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:07,929 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:07,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2020-11-30 01:19:07,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4005, Invalid=4005, Unknown=0, NotChecked=0, Total=8010 [2020-11-30 01:19:07,930 INFO L87 Difference]: Start difference. First operand 183 states and 274 transitions. cyclomatic complexity: 94 Second operand 90 states. [2020-11-30 01:19:08,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:08,126 INFO L93 Difference]: Finished difference Result 185 states and 276 transitions. [2020-11-30 01:19:08,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2020-11-30 01:19:08,127 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 185 states and 276 transitions. [2020-11-30 01:19:08,127 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:08,128 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 185 states to 184 states and 275 transitions. [2020-11-30 01:19:08,128 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:19:08,128 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:19:08,128 INFO L73 IsDeterministic]: Start isDeterministic. Operand 184 states and 275 transitions. [2020-11-30 01:19:08,128 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:08,128 INFO L691 BuchiCegarLoop]: Abstraction has 184 states and 275 transitions. [2020-11-30 01:19:08,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states and 275 transitions. [2020-11-30 01:19:08,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2020-11-30 01:19:08,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2020-11-30 01:19:08,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 275 transitions. [2020-11-30 01:19:08,130 INFO L714 BuchiCegarLoop]: Abstraction has 184 states and 275 transitions. [2020-11-30 01:19:08,130 INFO L594 BuchiCegarLoop]: Abstraction has 184 states and 275 transitions. [2020-11-30 01:19:08,130 INFO L427 BuchiCegarLoop]: ======== Iteration 177============ [2020-11-30 01:19:08,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 184 states and 275 transitions. [2020-11-30 01:19:08,130 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:08,130 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:08,130 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:08,131 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [88, 1, 1, 1, 1, 1] [2020-11-30 01:19:08,131 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:08,131 INFO L794 eck$LassoCheckResult]: Stem: 189815#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 189812#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 189813#L26 main_~i~0 := 0; 189814#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189821#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189822#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189994#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189992#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189990#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189988#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189986#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189984#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189982#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189980#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189978#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189976#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189974#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189972#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189970#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189968#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189966#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189964#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189962#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189960#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189958#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189956#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189954#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189952#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189950#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189948#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189946#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189944#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189942#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189940#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189938#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189936#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189934#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189932#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189930#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189928#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189926#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189924#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189922#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189920#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189918#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189916#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189914#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189912#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189910#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189908#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189906#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189904#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189902#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189900#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189898#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189896#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189894#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189892#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189890#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189888#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189886#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189884#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189882#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189880#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189878#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189876#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189874#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189872#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189870#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189868#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189866#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189864#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189862#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189860#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189858#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189856#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189854#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189852#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189850#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189848#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189846#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189844#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189842#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189840#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189838#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189836#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189834#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189832#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189830#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189828#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189826#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 189824#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 189816#L29-2 assume main_~i~0 >= 100; 189817#L39 [2020-11-30 01:19:08,131 INFO L796 eck$LassoCheckResult]: Loop: 189817#L39 assume true; 189817#L39 [2020-11-30 01:19:08,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:08,131 INFO L82 PathProgramCache]: Analyzing trace with hash 443846217, now seen corresponding path program 88 times [2020-11-30 01:19:08,131 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:08,131 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608162215] [2020-11-30 01:19:08,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:08,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:14,706 INFO L134 CoverageAnalysis]: Checked inductivity of 3916 backedges. 0 proven. 3916 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:14,706 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608162215] [2020-11-30 01:19:14,706 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [84606417] [2020-11-30 01:19:14,706 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 179 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 179 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:14,785 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:19:14,786 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:14,788 INFO L263 TraceCheckSpWp]: Trace formula consists of 382 conjuncts, 90 conjunts are in the unsatisfiable core [2020-11-30 01:19:14,789 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:14,829 INFO L134 CoverageAnalysis]: Checked inductivity of 3916 backedges. 0 proven. 3916 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:14,829 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:14,829 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [90, 90] total 91 [2020-11-30 01:19:14,829 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2066688023] [2020-11-30 01:19:14,829 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:14,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:14,830 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 176 times [2020-11-30 01:19:14,830 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:14,830 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301450180] [2020-11-30 01:19:14,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:14,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:14,831 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:14,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:14,832 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:14,832 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:14,836 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:14,837 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2020-11-30 01:19:14,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2020-11-30 01:19:14,837 INFO L87 Difference]: Start difference. First operand 184 states and 275 transitions. cyclomatic complexity: 94 Second operand 92 states. [2020-11-30 01:19:16,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:16,959 INFO L93 Difference]: Finished difference Result 4283 states and 4377 transitions. [2020-11-30 01:19:16,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2020-11-30 01:19:16,960 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4283 states and 4377 transitions. [2020-11-30 01:19:16,971 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:19:16,977 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4283 states to 4282 states and 4376 transitions. [2020-11-30 01:19:16,977 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:19:16,977 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:19:16,977 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4282 states and 4376 transitions. [2020-11-30 01:19:16,979 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:16,979 INFO L691 BuchiCegarLoop]: Abstraction has 4282 states and 4376 transitions. [2020-11-30 01:19:16,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4282 states and 4376 transitions. [2020-11-30 01:19:16,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4282 to 185. [2020-11-30 01:19:16,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2020-11-30 01:19:16,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 277 transitions. [2020-11-30 01:19:16,988 INFO L714 BuchiCegarLoop]: Abstraction has 185 states and 277 transitions. [2020-11-30 01:19:16,988 INFO L594 BuchiCegarLoop]: Abstraction has 185 states and 277 transitions. [2020-11-30 01:19:16,988 INFO L427 BuchiCegarLoop]: ======== Iteration 178============ [2020-11-30 01:19:16,988 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 185 states and 277 transitions. [2020-11-30 01:19:16,989 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:16,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:16,989 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:16,989 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [87, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:19:16,989 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:16,989 INFO L794 eck$LassoCheckResult]: Stem: 194653#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 194650#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 194651#L26 main_~i~0 := 0; 194652#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 194656#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 194657#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194661#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194834#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194833#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194832#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194831#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194830#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194829#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194828#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194827#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194826#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194825#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194824#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194823#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194822#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194821#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194820#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194819#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194818#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194817#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194816#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194815#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194814#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194813#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194812#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194811#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194810#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194809#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194808#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194807#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194806#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194805#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194804#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194803#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194802#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194801#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194800#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194799#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194798#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194797#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194796#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194795#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194794#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194793#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194792#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194791#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194790#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194789#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194788#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194787#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194786#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194785#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194784#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194783#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194782#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194781#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194780#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194779#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194778#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194777#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194776#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194775#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194774#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194773#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194772#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194771#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194770#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194769#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194768#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194767#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194766#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194765#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194764#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194763#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194762#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194761#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194760#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194759#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194758#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194757#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194756#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194755#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194754#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194753#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194752#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194751#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194750#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 194749#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 194658#L35-2 assume main_~j~0 >= 100; 194655#L39 [2020-11-30 01:19:16,990 INFO L796 eck$LassoCheckResult]: Loop: 194655#L39 assume true; 194655#L39 [2020-11-30 01:19:16,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:16,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1516896539, now seen corresponding path program 87 times [2020-11-30 01:19:16,990 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:16,990 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914221168] [2020-11-30 01:19:16,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:17,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:23,571 INFO L134 CoverageAnalysis]: Checked inductivity of 3828 backedges. 0 proven. 3828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:23,572 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914221168] [2020-11-30 01:19:23,572 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1962144450] [2020-11-30 01:19:23,572 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 180 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 180 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:23,716 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 45 check-sat command(s) [2020-11-30 01:19:23,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:23,719 INFO L263 TraceCheckSpWp]: Trace formula consists of 556 conjuncts, 89 conjunts are in the unsatisfiable core [2020-11-30 01:19:23,720 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:23,762 INFO L134 CoverageAnalysis]: Checked inductivity of 3828 backedges. 0 proven. 3828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:23,762 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:23,763 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [89, 89] total 90 [2020-11-30 01:19:23,763 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084415738] [2020-11-30 01:19:23,763 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:23,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:23,763 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 177 times [2020-11-30 01:19:23,763 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:23,763 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147593596] [2020-11-30 01:19:23,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:23,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:23,764 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:23,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:23,764 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:23,765 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:23,769 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:23,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2020-11-30 01:19:23,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4095, Invalid=4095, Unknown=0, NotChecked=0, Total=8190 [2020-11-30 01:19:23,770 INFO L87 Difference]: Start difference. First operand 185 states and 277 transitions. cyclomatic complexity: 95 Second operand 91 states. [2020-11-30 01:19:24,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:24,099 INFO L93 Difference]: Finished difference Result 187 states and 279 transitions. [2020-11-30 01:19:24,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2020-11-30 01:19:24,100 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 187 states and 279 transitions. [2020-11-30 01:19:24,101 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:24,101 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 187 states to 186 states and 278 transitions. [2020-11-30 01:19:24,101 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:19:24,101 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:19:24,101 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 278 transitions. [2020-11-30 01:19:24,102 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:24,102 INFO L691 BuchiCegarLoop]: Abstraction has 186 states and 278 transitions. [2020-11-30 01:19:24,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 278 transitions. [2020-11-30 01:19:24,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2020-11-30 01:19:24,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2020-11-30 01:19:24,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 278 transitions. [2020-11-30 01:19:24,103 INFO L714 BuchiCegarLoop]: Abstraction has 186 states and 278 transitions. [2020-11-30 01:19:24,103 INFO L594 BuchiCegarLoop]: Abstraction has 186 states and 278 transitions. [2020-11-30 01:19:24,103 INFO L427 BuchiCegarLoop]: ======== Iteration 179============ [2020-11-30 01:19:24,103 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 278 transitions. [2020-11-30 01:19:24,103 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:24,104 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:24,104 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:24,104 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [89, 1, 1, 1, 1, 1] [2020-11-30 01:19:24,104 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:24,104 INFO L794 eck$LassoCheckResult]: Stem: 195398#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 195395#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 195396#L26 main_~i~0 := 0; 195397#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195404#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195405#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195577#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195575#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195573#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195571#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195569#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195567#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195565#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195563#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195561#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195559#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195557#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195555#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195553#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195551#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195549#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195547#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195545#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195543#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195541#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195539#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195537#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195535#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195533#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195531#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195529#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195527#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195525#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195523#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195521#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195519#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195517#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195515#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195513#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195511#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195509#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195507#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195505#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195503#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195501#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195499#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195497#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195495#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195493#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195491#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195489#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195487#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195485#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195483#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195481#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195479#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195477#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195475#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195473#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195471#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195469#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195467#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195465#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195463#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195461#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195459#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195457#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195455#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195453#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195451#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195449#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195447#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195445#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195443#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195441#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195439#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195437#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195435#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195433#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195431#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195429#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195427#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195425#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195423#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195421#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195419#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195417#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195415#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195413#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195411#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195409#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 195407#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 195399#L29-2 assume main_~i~0 >= 100; 195400#L39 [2020-11-30 01:19:24,104 INFO L796 eck$LassoCheckResult]: Loop: 195400#L39 assume true; 195400#L39 [2020-11-30 01:19:24,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:24,104 INFO L82 PathProgramCache]: Analyzing trace with hash 874332532, now seen corresponding path program 89 times [2020-11-30 01:19:24,104 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:24,105 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047900284] [2020-11-30 01:19:24,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:24,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:30,848 INFO L134 CoverageAnalysis]: Checked inductivity of 4005 backedges. 0 proven. 4005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:30,848 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047900284] [2020-11-30 01:19:30,848 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1528560482] [2020-11-30 01:19:30,848 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 181 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 181 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:30,948 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 46 check-sat command(s) [2020-11-30 01:19:30,948 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:30,950 INFO L263 TraceCheckSpWp]: Trace formula consists of 386 conjuncts, 91 conjunts are in the unsatisfiable core [2020-11-30 01:19:30,951 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:30,985 INFO L134 CoverageAnalysis]: Checked inductivity of 4005 backedges. 0 proven. 4005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:30,985 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:30,985 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [91, 91] total 92 [2020-11-30 01:19:30,985 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1383681343] [2020-11-30 01:19:30,986 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:30,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:30,986 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 178 times [2020-11-30 01:19:30,986 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:30,986 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015066473] [2020-11-30 01:19:30,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:30,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:30,987 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:30,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:30,987 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:30,987 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:30,991 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:30,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2020-11-30 01:19:30,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4278, Invalid=4278, Unknown=0, NotChecked=0, Total=8556 [2020-11-30 01:19:30,992 INFO L87 Difference]: Start difference. First operand 186 states and 278 transitions. cyclomatic complexity: 95 Second operand 93 states. [2020-11-30 01:19:33,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:33,358 INFO L93 Difference]: Finished difference Result 4376 states and 4471 transitions. [2020-11-30 01:19:33,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2020-11-30 01:19:33,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4376 states and 4471 transitions. [2020-11-30 01:19:33,370 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:19:33,375 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4376 states to 4375 states and 4470 transitions. [2020-11-30 01:19:33,375 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:19:33,375 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:19:33,375 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4375 states and 4470 transitions. [2020-11-30 01:19:33,376 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:33,376 INFO L691 BuchiCegarLoop]: Abstraction has 4375 states and 4470 transitions. [2020-11-30 01:19:33,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4375 states and 4470 transitions. [2020-11-30 01:19:33,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4375 to 187. [2020-11-30 01:19:33,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2020-11-30 01:19:33,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 280 transitions. [2020-11-30 01:19:33,385 INFO L714 BuchiCegarLoop]: Abstraction has 187 states and 280 transitions. [2020-11-30 01:19:33,385 INFO L594 BuchiCegarLoop]: Abstraction has 187 states and 280 transitions. [2020-11-30 01:19:33,385 INFO L427 BuchiCegarLoop]: ======== Iteration 180============ [2020-11-30 01:19:33,385 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 187 states and 280 transitions. [2020-11-30 01:19:33,386 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:33,386 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:33,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:33,386 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [88, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:19:33,386 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:33,386 INFO L794 eck$LassoCheckResult]: Stem: 200335#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 200332#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 200333#L26 main_~i~0 := 0; 200334#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 200338#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 200339#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200343#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200518#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200517#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200516#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200515#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200514#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200513#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200512#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200511#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200510#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200509#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200508#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200507#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200506#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200505#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200504#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200503#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200502#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200501#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200500#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200499#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200498#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200497#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200496#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200495#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200494#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200493#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200492#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200491#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200490#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200489#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200488#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200487#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200486#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200485#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200484#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200483#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200482#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200481#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200480#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200479#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200478#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200477#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200476#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200475#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200474#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200473#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200472#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200471#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200470#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200469#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200468#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200467#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200466#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200465#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200464#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200463#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200462#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200461#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200460#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200459#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200458#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200457#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200456#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200455#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200454#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200453#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200452#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200451#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200450#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200449#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200448#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200447#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200446#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200445#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200444#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200443#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200442#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200441#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200440#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200439#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200438#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200437#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200436#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200435#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200434#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200433#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 200432#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 200340#L35-2 assume main_~j~0 >= 100; 200337#L39 [2020-11-30 01:19:33,386 INFO L796 eck$LassoCheckResult]: Loop: 200337#L39 assume true; 200337#L39 [2020-11-30 01:19:33,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:33,387 INFO L82 PathProgramCache]: Analyzing trace with hash -220845836, now seen corresponding path program 88 times [2020-11-30 01:19:33,387 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:33,387 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787950348] [2020-11-30 01:19:33,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:33,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:39,641 INFO L134 CoverageAnalysis]: Checked inductivity of 3916 backedges. 0 proven. 3916 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:39,641 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787950348] [2020-11-30 01:19:39,641 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1313767178] [2020-11-30 01:19:39,641 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 182 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 182 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:39,746 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:19:39,747 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:39,749 INFO L263 TraceCheckSpWp]: Trace formula consists of 562 conjuncts, 90 conjunts are in the unsatisfiable core [2020-11-30 01:19:39,750 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:39,784 INFO L134 CoverageAnalysis]: Checked inductivity of 3916 backedges. 0 proven. 3916 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:39,784 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:39,784 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [90, 90] total 91 [2020-11-30 01:19:39,785 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2080954497] [2020-11-30 01:19:39,785 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:39,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:39,785 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 179 times [2020-11-30 01:19:39,785 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:39,785 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394166507] [2020-11-30 01:19:39,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:39,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:39,786 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:39,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:39,786 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:39,787 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:39,790 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:39,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2020-11-30 01:19:39,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2020-11-30 01:19:39,791 INFO L87 Difference]: Start difference. First operand 187 states and 280 transitions. cyclomatic complexity: 96 Second operand 92 states. [2020-11-30 01:19:40,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:40,002 INFO L93 Difference]: Finished difference Result 189 states and 282 transitions. [2020-11-30 01:19:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2020-11-30 01:19:40,004 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 189 states and 282 transitions. [2020-11-30 01:19:40,004 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:40,004 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 189 states to 188 states and 281 transitions. [2020-11-30 01:19:40,005 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:19:40,005 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:19:40,005 INFO L73 IsDeterministic]: Start isDeterministic. Operand 188 states and 281 transitions. [2020-11-30 01:19:40,005 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:40,005 INFO L691 BuchiCegarLoop]: Abstraction has 188 states and 281 transitions. [2020-11-30 01:19:40,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states and 281 transitions. [2020-11-30 01:19:40,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 188. [2020-11-30 01:19:40,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2020-11-30 01:19:40,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 281 transitions. [2020-11-30 01:19:40,006 INFO L714 BuchiCegarLoop]: Abstraction has 188 states and 281 transitions. [2020-11-30 01:19:40,006 INFO L594 BuchiCegarLoop]: Abstraction has 188 states and 281 transitions. [2020-11-30 01:19:40,006 INFO L427 BuchiCegarLoop]: ======== Iteration 181============ [2020-11-30 01:19:40,006 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 188 states and 281 transitions. [2020-11-30 01:19:40,007 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:40,007 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:40,007 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:40,007 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [90, 1, 1, 1, 1, 1] [2020-11-30 01:19:40,007 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:40,007 INFO L794 eck$LassoCheckResult]: Stem: 201088#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 201085#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 201086#L26 main_~i~0 := 0; 201087#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201094#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201095#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201271#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201269#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201267#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201265#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201263#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201261#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201259#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201257#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201255#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201253#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201251#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201249#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201247#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201245#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201243#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201241#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201239#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201237#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201235#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201233#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201231#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201229#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201227#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201225#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201223#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201221#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201219#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201217#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201215#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201213#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201211#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201209#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201207#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201205#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201203#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201201#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201199#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201197#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201195#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201193#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201191#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201189#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201187#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201185#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201183#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201181#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201179#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201177#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201175#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201173#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201171#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201169#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201167#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201165#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201163#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201161#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201159#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201157#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201155#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201153#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201151#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201149#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201147#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201145#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201143#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201141#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201139#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201137#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201135#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201133#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201131#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201129#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201127#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201125#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201123#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201121#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201119#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201117#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201115#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201113#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201111#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201109#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201107#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201105#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201103#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201101#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201099#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 201097#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 201089#L29-2 assume main_~i~0 >= 100; 201090#L39 [2020-11-30 01:19:40,007 INFO L796 eck$LassoCheckResult]: Loop: 201090#L39 assume true; 201090#L39 [2020-11-30 01:19:40,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:40,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1334506409, now seen corresponding path program 90 times [2020-11-30 01:19:40,008 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:40,008 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204109215] [2020-11-30 01:19:40,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:40,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:46,447 INFO L134 CoverageAnalysis]: Checked inductivity of 4095 backedges. 0 proven. 4095 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:46,447 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204109215] [2020-11-30 01:19:46,447 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1548141104] [2020-11-30 01:19:46,447 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 183 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 183 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:46,548 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 46 check-sat command(s) [2020-11-30 01:19:46,548 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:46,550 INFO L263 TraceCheckSpWp]: Trace formula consists of 390 conjuncts, 92 conjunts are in the unsatisfiable core [2020-11-30 01:19:46,551 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:46,584 INFO L134 CoverageAnalysis]: Checked inductivity of 4095 backedges. 0 proven. 4095 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:46,584 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:46,584 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [92, 92] total 93 [2020-11-30 01:19:46,584 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1470992222] [2020-11-30 01:19:46,584 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:46,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:46,585 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 180 times [2020-11-30 01:19:46,585 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:46,585 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404764737] [2020-11-30 01:19:46,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:46,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:46,586 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:46,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:46,586 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:46,586 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:46,590 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:46,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 94 interpolants. [2020-11-30 01:19:46,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4371, Invalid=4371, Unknown=0, NotChecked=0, Total=8742 [2020-11-30 01:19:46,591 INFO L87 Difference]: Start difference. First operand 188 states and 281 transitions. cyclomatic complexity: 96 Second operand 94 states. [2020-11-30 01:19:48,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:48,706 INFO L93 Difference]: Finished difference Result 4470 states and 4566 transitions. [2020-11-30 01:19:48,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2020-11-30 01:19:48,708 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4470 states and 4566 transitions. [2020-11-30 01:19:48,717 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:19:48,723 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4470 states to 4469 states and 4565 transitions. [2020-11-30 01:19:48,723 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:19:48,723 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:19:48,723 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4469 states and 4565 transitions. [2020-11-30 01:19:48,724 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:48,724 INFO L691 BuchiCegarLoop]: Abstraction has 4469 states and 4565 transitions. [2020-11-30 01:19:48,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4469 states and 4565 transitions. [2020-11-30 01:19:48,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4469 to 189. [2020-11-30 01:19:48,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2020-11-30 01:19:48,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 283 transitions. [2020-11-30 01:19:48,732 INFO L714 BuchiCegarLoop]: Abstraction has 189 states and 283 transitions. [2020-11-30 01:19:48,732 INFO L594 BuchiCegarLoop]: Abstraction has 189 states and 283 transitions. [2020-11-30 01:19:48,732 INFO L427 BuchiCegarLoop]: ======== Iteration 182============ [2020-11-30 01:19:48,732 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 189 states and 283 transitions. [2020-11-30 01:19:48,732 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:48,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:48,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:48,733 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [89, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:19:48,733 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:48,733 INFO L794 eck$LassoCheckResult]: Stem: 206125#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 206122#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 206123#L26 main_~i~0 := 0; 206124#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 206128#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 206129#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206133#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206310#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206309#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206308#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206307#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206306#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206305#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206304#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206303#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206302#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206301#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206300#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206299#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206298#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206297#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206296#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206295#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206294#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206293#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206292#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206291#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206290#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206289#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206288#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206287#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206286#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206285#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206284#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206283#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206282#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206281#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206280#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206279#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206278#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206277#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206276#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206275#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206274#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206273#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206272#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206271#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206270#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206269#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206268#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206267#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206266#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206265#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206264#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206263#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206262#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206261#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206260#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206259#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206258#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206257#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206256#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206255#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206254#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206253#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206252#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206251#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206250#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206249#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206248#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206247#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206246#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206245#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206244#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206243#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206242#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206241#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206240#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206239#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206238#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206237#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206236#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206235#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206234#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206233#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206232#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206231#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206230#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206229#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206228#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206227#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206226#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206225#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206224#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 206223#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 206130#L35-2 assume main_~j~0 >= 100; 206127#L39 [2020-11-30 01:19:48,733 INFO L796 eck$LassoCheckResult]: Loop: 206127#L39 assume true; 206127#L39 [2020-11-30 01:19:48,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:48,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1743715387, now seen corresponding path program 89 times [2020-11-30 01:19:48,734 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:48,734 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835794400] [2020-11-30 01:19:48,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:48,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:19:54,950 INFO L134 CoverageAnalysis]: Checked inductivity of 4005 backedges. 0 proven. 4005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:54,950 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1835794400] [2020-11-30 01:19:54,951 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [192128844] [2020-11-30 01:19:54,951 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 184 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 184 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:19:55,097 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 46 check-sat command(s) [2020-11-30 01:19:55,097 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:19:55,100 INFO L263 TraceCheckSpWp]: Trace formula consists of 568 conjuncts, 91 conjunts are in the unsatisfiable core [2020-11-30 01:19:55,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:19:55,134 INFO L134 CoverageAnalysis]: Checked inductivity of 4005 backedges. 0 proven. 4005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:19:55,134 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:19:55,135 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [91, 91] total 92 [2020-11-30 01:19:55,135 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364964539] [2020-11-30 01:19:55,135 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:19:55,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:55,135 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 181 times [2020-11-30 01:19:55,135 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:55,135 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849269637] [2020-11-30 01:19:55,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:55,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:55,136 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:55,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:19:55,136 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:19:55,136 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:19:55,140 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:19:55,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2020-11-30 01:19:55,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4278, Invalid=4278, Unknown=0, NotChecked=0, Total=8556 [2020-11-30 01:19:55,141 INFO L87 Difference]: Start difference. First operand 189 states and 283 transitions. cyclomatic complexity: 97 Second operand 93 states. [2020-11-30 01:19:55,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:19:55,398 INFO L93 Difference]: Finished difference Result 191 states and 285 transitions. [2020-11-30 01:19:55,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2020-11-30 01:19:55,400 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 191 states and 285 transitions. [2020-11-30 01:19:55,400 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:55,401 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 191 states to 190 states and 284 transitions. [2020-11-30 01:19:55,401 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:19:55,401 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:19:55,401 INFO L73 IsDeterministic]: Start isDeterministic. Operand 190 states and 284 transitions. [2020-11-30 01:19:55,401 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:19:55,401 INFO L691 BuchiCegarLoop]: Abstraction has 190 states and 284 transitions. [2020-11-30 01:19:55,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states and 284 transitions. [2020-11-30 01:19:55,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 190. [2020-11-30 01:19:55,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2020-11-30 01:19:55,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 284 transitions. [2020-11-30 01:19:55,402 INFO L714 BuchiCegarLoop]: Abstraction has 190 states and 284 transitions. [2020-11-30 01:19:55,402 INFO L594 BuchiCegarLoop]: Abstraction has 190 states and 284 transitions. [2020-11-30 01:19:55,403 INFO L427 BuchiCegarLoop]: ======== Iteration 183============ [2020-11-30 01:19:55,403 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 190 states and 284 transitions. [2020-11-30 01:19:55,403 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:19:55,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:19:55,403 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:19:55,403 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [91, 1, 1, 1, 1, 1] [2020-11-30 01:19:55,403 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:19:55,404 INFO L794 eck$LassoCheckResult]: Stem: 206886#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 206883#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 206884#L26 main_~i~0 := 0; 206885#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206892#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206893#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207071#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207069#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207067#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207065#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207063#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207061#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207059#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207057#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207055#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207053#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207051#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207049#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207047#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207045#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207043#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207041#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207039#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207037#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207035#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207033#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207031#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207029#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207027#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207025#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207023#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207021#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207019#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207017#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207015#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207013#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207011#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207009#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207007#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207005#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207003#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 207001#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206999#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206995#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206993#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206991#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206989#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206987#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206985#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206983#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206981#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206979#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206977#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206975#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206973#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206971#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206969#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206967#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206965#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206963#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206961#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206959#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206957#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206955#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206953#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206951#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206949#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206947#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206945#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206943#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206941#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206939#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206937#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206935#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206933#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206931#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206929#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206927#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206925#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206923#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206921#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206919#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206917#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206915#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206913#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206911#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206909#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206907#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206905#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206903#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206901#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206899#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206897#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 206895#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 206887#L29-2 assume main_~i~0 >= 100; 206888#L39 [2020-11-30 01:19:55,404 INFO L796 eck$LassoCheckResult]: Loop: 206888#L39 assume true; 206888#L39 [2020-11-30 01:19:55,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:19:55,404 INFO L82 PathProgramCache]: Analyzing trace with hash -1579972588, now seen corresponding path program 91 times [2020-11-30 01:19:55,404 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:19:55,404 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700724026] [2020-11-30 01:19:55,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:19:55,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:02,273 INFO L134 CoverageAnalysis]: Checked inductivity of 4186 backedges. 0 proven. 4186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:02,274 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700724026] [2020-11-30 01:20:02,274 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1635608897] [2020-11-30 01:20:02,274 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 185 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 185 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:20:02,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:02,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 394 conjuncts, 93 conjunts are in the unsatisfiable core [2020-11-30 01:20:02,350 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:20:02,384 INFO L134 CoverageAnalysis]: Checked inductivity of 4186 backedges. 0 proven. 4186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:02,384 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:20:02,384 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [93, 93] total 94 [2020-11-30 01:20:02,385 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934034651] [2020-11-30 01:20:02,385 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:20:02,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:02,385 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 182 times [2020-11-30 01:20:02,385 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:02,385 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1636340158] [2020-11-30 01:20:02,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:02,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:02,386 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:02,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:02,386 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:02,386 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:20:02,390 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:20:02,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2020-11-30 01:20:02,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4465, Invalid=4465, Unknown=0, NotChecked=0, Total=8930 [2020-11-30 01:20:02,391 INFO L87 Difference]: Start difference. First operand 190 states and 284 transitions. cyclomatic complexity: 97 Second operand 95 states. [2020-11-30 01:20:04,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:20:04,200 INFO L93 Difference]: Finished difference Result 4565 states and 4662 transitions. [2020-11-30 01:20:04,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2020-11-30 01:20:04,202 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4565 states and 4662 transitions. [2020-11-30 01:20:04,210 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:20:04,216 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4565 states to 4564 states and 4661 transitions. [2020-11-30 01:20:04,216 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:20:04,216 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:20:04,216 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4564 states and 4661 transitions. [2020-11-30 01:20:04,217 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:20:04,217 INFO L691 BuchiCegarLoop]: Abstraction has 4564 states and 4661 transitions. [2020-11-30 01:20:04,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4564 states and 4661 transitions. [2020-11-30 01:20:04,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4564 to 191. [2020-11-30 01:20:04,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2020-11-30 01:20:04,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 286 transitions. [2020-11-30 01:20:04,226 INFO L714 BuchiCegarLoop]: Abstraction has 191 states and 286 transitions. [2020-11-30 01:20:04,226 INFO L594 BuchiCegarLoop]: Abstraction has 191 states and 286 transitions. [2020-11-30 01:20:04,226 INFO L427 BuchiCegarLoop]: ======== Iteration 184============ [2020-11-30 01:20:04,226 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states and 286 transitions. [2020-11-30 01:20:04,226 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:04,226 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:20:04,226 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:20:04,227 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [90, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:20:04,227 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:20:04,227 INFO L794 eck$LassoCheckResult]: Stem: 212024#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 212021#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 212022#L26 main_~i~0 := 0; 212023#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 212027#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 212028#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212032#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212211#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212210#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212209#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212208#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212207#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212206#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212205#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212204#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212203#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212202#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212201#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212200#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212199#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212198#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212197#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212196#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212195#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212194#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212193#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212192#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212191#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212190#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212189#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212188#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212187#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212186#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212185#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212184#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212183#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212182#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212181#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212180#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212179#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212178#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212177#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212176#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212175#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212174#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212173#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212172#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212171#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212170#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212169#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212168#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212167#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212166#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212165#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212164#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212163#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212162#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212161#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212160#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212159#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212158#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212157#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212156#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212155#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212154#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212153#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212152#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212151#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212150#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212149#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212148#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212147#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212146#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212145#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212144#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212143#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212142#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212141#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212140#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212139#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212138#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212137#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212136#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212135#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212134#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212133#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212132#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212131#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212130#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212129#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212128#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212127#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212126#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212125#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212124#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 212123#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 212029#L35-2 assume main_~j~0 >= 100; 212026#L39 [2020-11-30 01:20:04,227 INFO L796 eck$LassoCheckResult]: Loop: 212026#L39 assume true; 212026#L39 [2020-11-30 01:20:04,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:04,227 INFO L82 PathProgramCache]: Analyzing trace with hash -1779396140, now seen corresponding path program 90 times [2020-11-30 01:20:04,227 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:04,227 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755146731] [2020-11-30 01:20:04,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:04,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:10,380 INFO L134 CoverageAnalysis]: Checked inductivity of 4095 backedges. 0 proven. 4095 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:10,380 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755146731] [2020-11-30 01:20:10,380 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [241142714] [2020-11-30 01:20:10,380 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 186 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 186 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:20:10,523 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 46 check-sat command(s) [2020-11-30 01:20:10,523 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:20:10,526 INFO L263 TraceCheckSpWp]: Trace formula consists of 574 conjuncts, 92 conjunts are in the unsatisfiable core [2020-11-30 01:20:10,527 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:20:10,561 INFO L134 CoverageAnalysis]: Checked inductivity of 4095 backedges. 0 proven. 4095 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:10,561 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:20:10,562 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [92, 92] total 93 [2020-11-30 01:20:10,562 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188421560] [2020-11-30 01:20:10,562 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:20:10,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:10,562 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 183 times [2020-11-30 01:20:10,562 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:10,562 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978988398] [2020-11-30 01:20:10,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:10,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:10,563 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:10,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:10,564 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:10,564 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:20:10,591 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:20:10,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 94 interpolants. [2020-11-30 01:20:10,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4371, Invalid=4371, Unknown=0, NotChecked=0, Total=8742 [2020-11-30 01:20:10,592 INFO L87 Difference]: Start difference. First operand 191 states and 286 transitions. cyclomatic complexity: 98 Second operand 94 states. [2020-11-30 01:20:10,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:20:10,891 INFO L93 Difference]: Finished difference Result 193 states and 288 transitions. [2020-11-30 01:20:10,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2020-11-30 01:20:10,893 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 288 transitions. [2020-11-30 01:20:10,893 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:10,893 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 192 states and 287 transitions. [2020-11-30 01:20:10,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:20:10,894 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:20:10,894 INFO L73 IsDeterministic]: Start isDeterministic. Operand 192 states and 287 transitions. [2020-11-30 01:20:10,894 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:20:10,894 INFO L691 BuchiCegarLoop]: Abstraction has 192 states and 287 transitions. [2020-11-30 01:20:10,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states and 287 transitions. [2020-11-30 01:20:10,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 192. [2020-11-30 01:20:10,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2020-11-30 01:20:10,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 287 transitions. [2020-11-30 01:20:10,895 INFO L714 BuchiCegarLoop]: Abstraction has 192 states and 287 transitions. [2020-11-30 01:20:10,895 INFO L594 BuchiCegarLoop]: Abstraction has 192 states and 287 transitions. [2020-11-30 01:20:10,895 INFO L427 BuchiCegarLoop]: ======== Iteration 185============ [2020-11-30 01:20:10,895 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 192 states and 287 transitions. [2020-11-30 01:20:10,895 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:10,895 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:20:10,896 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:20:10,896 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [92, 1, 1, 1, 1, 1] [2020-11-30 01:20:10,896 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:20:10,896 INFO L794 eck$LassoCheckResult]: Stem: 212793#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 212790#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 212791#L26 main_~i~0 := 0; 212792#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212799#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212800#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212980#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212978#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212976#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212974#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212972#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212970#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212968#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212966#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212964#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212962#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212960#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212958#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212956#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212954#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212952#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212950#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212948#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212946#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212944#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212942#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212940#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212938#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212936#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212934#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212932#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212930#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212928#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212926#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212924#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212922#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212920#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212918#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212916#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212914#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212912#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212910#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212908#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212906#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212904#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212902#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212900#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212898#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212896#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212894#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212892#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212890#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212888#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212886#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212884#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212882#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212880#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212878#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212876#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212874#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212872#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212870#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212868#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212866#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212864#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212862#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212860#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212858#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212856#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212854#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212852#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212850#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212848#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212846#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212844#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212842#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212840#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212838#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212836#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212834#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212832#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212830#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212828#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212826#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212824#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212822#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212820#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212818#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212816#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212814#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212812#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212810#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212808#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212806#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212804#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 212802#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 212794#L29-2 assume main_~i~0 >= 100; 212795#L39 [2020-11-30 01:20:10,896 INFO L796 eck$LassoCheckResult]: Loop: 212795#L39 assume true; 212795#L39 [2020-11-30 01:20:10,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:10,896 INFO L82 PathProgramCache]: Analyzing trace with hash -1734508279, now seen corresponding path program 92 times [2020-11-30 01:20:10,896 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:10,896 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709555926] [2020-11-30 01:20:10,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:10,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:17,388 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:17,388 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709555926] [2020-11-30 01:20:17,388 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [291818579] [2020-11-30 01:20:17,389 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 187 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 187 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:20:17,464 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:20:17,464 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:20:17,466 INFO L263 TraceCheckSpWp]: Trace formula consists of 398 conjuncts, 94 conjunts are in the unsatisfiable core [2020-11-30 01:20:17,467 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:20:17,502 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:17,502 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:20:17,502 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [94, 94] total 95 [2020-11-30 01:20:17,502 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [261675118] [2020-11-30 01:20:17,503 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:20:17,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:17,503 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 184 times [2020-11-30 01:20:17,503 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:17,503 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771022555] [2020-11-30 01:20:17,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:17,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:17,504 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:17,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:17,504 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:17,504 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:20:17,509 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:20:17,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2020-11-30 01:20:17,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2020-11-30 01:20:17,510 INFO L87 Difference]: Start difference. First operand 192 states and 287 transitions. cyclomatic complexity: 98 Second operand 96 states. [2020-11-30 01:20:19,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:20:19,555 INFO L93 Difference]: Finished difference Result 4661 states and 4759 transitions. [2020-11-30 01:20:19,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 95 states. [2020-11-30 01:20:19,556 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4661 states and 4759 transitions. [2020-11-30 01:20:19,565 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:20:19,569 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4661 states to 4660 states and 4758 transitions. [2020-11-30 01:20:19,570 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:20:19,570 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:20:19,570 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4660 states and 4758 transitions. [2020-11-30 01:20:19,571 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:20:19,571 INFO L691 BuchiCegarLoop]: Abstraction has 4660 states and 4758 transitions. [2020-11-30 01:20:19,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4660 states and 4758 transitions. [2020-11-30 01:20:19,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4660 to 193. [2020-11-30 01:20:19,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2020-11-30 01:20:19,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 289 transitions. [2020-11-30 01:20:19,578 INFO L714 BuchiCegarLoop]: Abstraction has 193 states and 289 transitions. [2020-11-30 01:20:19,578 INFO L594 BuchiCegarLoop]: Abstraction has 193 states and 289 transitions. [2020-11-30 01:20:19,578 INFO L427 BuchiCegarLoop]: ======== Iteration 186============ [2020-11-30 01:20:19,578 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 193 states and 289 transitions. [2020-11-30 01:20:19,578 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:19,578 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:20:19,578 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:20:19,578 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [91, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:20:19,578 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:20:19,579 INFO L794 eck$LassoCheckResult]: Stem: 218033#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 218030#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 218031#L26 main_~i~0 := 0; 218032#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 218036#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 218037#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218041#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218222#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218221#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218220#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218219#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218218#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218217#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218216#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218215#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218214#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218213#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218212#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218211#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218210#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218209#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218208#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218207#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218206#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218205#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218204#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218203#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218202#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218201#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218200#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218199#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218198#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218197#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218196#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218195#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218194#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218193#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218192#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218191#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218190#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218189#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218188#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218187#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218186#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218185#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218184#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218183#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218182#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218181#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218180#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218179#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218178#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218177#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218176#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218175#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218174#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218173#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218172#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218171#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218170#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218169#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218168#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218167#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218166#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218165#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218164#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218163#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218162#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218161#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218160#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218159#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218158#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218157#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218156#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218155#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218154#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218153#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218152#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218151#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218150#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218149#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218148#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218147#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218146#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218145#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218144#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218143#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218142#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218141#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218140#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218139#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218138#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218137#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218136#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218135#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218134#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 218133#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 218038#L35-2 assume main_~j~0 >= 100; 218035#L39 [2020-11-30 01:20:19,579 INFO L796 eck$LassoCheckResult]: Loop: 218035#L39 assume true; 218035#L39 [2020-11-30 01:20:19,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:19,579 INFO L82 PathProgramCache]: Analyzing trace with hash 673296219, now seen corresponding path program 91 times [2020-11-30 01:20:19,579 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:19,579 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1234470307] [2020-11-30 01:20:19,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:19,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:25,578 INFO L134 CoverageAnalysis]: Checked inductivity of 4186 backedges. 0 proven. 4186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:25,578 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1234470307] [2020-11-30 01:20:25,578 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1737321865] [2020-11-30 01:20:25,578 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 188 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 188 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:20:25,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:25,707 INFO L263 TraceCheckSpWp]: Trace formula consists of 580 conjuncts, 93 conjunts are in the unsatisfiable core [2020-11-30 01:20:25,708 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:20:25,745 INFO L134 CoverageAnalysis]: Checked inductivity of 4186 backedges. 0 proven. 4186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:25,745 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:20:25,745 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [93, 93] total 94 [2020-11-30 01:20:25,745 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743295089] [2020-11-30 01:20:25,745 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:20:25,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:25,746 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 185 times [2020-11-30 01:20:25,746 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:25,746 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522022454] [2020-11-30 01:20:25,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:25,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:25,747 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:25,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:25,747 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:25,747 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:20:25,751 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:20:25,752 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2020-11-30 01:20:25,752 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4465, Invalid=4465, Unknown=0, NotChecked=0, Total=8930 [2020-11-30 01:20:25,752 INFO L87 Difference]: Start difference. First operand 193 states and 289 transitions. cyclomatic complexity: 99 Second operand 95 states. [2020-11-30 01:20:26,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:20:26,016 INFO L93 Difference]: Finished difference Result 195 states and 291 transitions. [2020-11-30 01:20:26,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2020-11-30 01:20:26,017 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 291 transitions. [2020-11-30 01:20:26,017 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:26,018 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 194 states and 290 transitions. [2020-11-30 01:20:26,018 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:20:26,018 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:20:26,018 INFO L73 IsDeterministic]: Start isDeterministic. Operand 194 states and 290 transitions. [2020-11-30 01:20:26,018 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:20:26,018 INFO L691 BuchiCegarLoop]: Abstraction has 194 states and 290 transitions. [2020-11-30 01:20:26,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states and 290 transitions. [2020-11-30 01:20:26,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 194. [2020-11-30 01:20:26,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2020-11-30 01:20:26,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 290 transitions. [2020-11-30 01:20:26,019 INFO L714 BuchiCegarLoop]: Abstraction has 194 states and 290 transitions. [2020-11-30 01:20:26,019 INFO L594 BuchiCegarLoop]: Abstraction has 194 states and 290 transitions. [2020-11-30 01:20:26,019 INFO L427 BuchiCegarLoop]: ======== Iteration 187============ [2020-11-30 01:20:26,019 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 194 states and 290 transitions. [2020-11-30 01:20:26,020 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:26,020 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:20:26,020 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:20:26,020 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [93, 1, 1, 1, 1, 1] [2020-11-30 01:20:26,020 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:20:26,020 INFO L794 eck$LassoCheckResult]: Stem: 218810#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 218807#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 218808#L26 main_~i~0 := 0; 218809#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218816#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218817#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218999#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218995#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218993#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218991#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218989#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218987#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218985#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218983#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218981#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218979#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218977#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218975#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218973#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218971#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218969#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218967#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218965#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218963#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218961#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218959#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218957#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218955#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218953#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218951#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218949#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218947#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218945#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218943#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218941#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218939#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218937#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218935#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218933#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218931#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218929#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218927#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218925#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218923#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218921#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218919#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218917#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218915#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218913#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218911#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218909#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218907#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218905#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218903#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218901#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218899#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218897#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218895#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218893#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218891#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218889#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218887#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218885#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218883#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218881#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218879#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218877#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218875#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218873#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218871#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218869#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218867#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218865#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218863#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218861#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218859#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218857#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218855#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218853#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218851#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218849#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218847#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218845#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218843#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218841#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218839#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218837#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218835#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218833#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218831#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218829#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218827#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218825#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218823#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218821#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 218819#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 218811#L29-2 assume main_~i~0 >= 100; 218812#L39 [2020-11-30 01:20:26,020 INFO L796 eck$LassoCheckResult]: Loop: 218812#L39 assume true; 218812#L39 [2020-11-30 01:20:26,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:26,021 INFO L82 PathProgramCache]: Analyzing trace with hash 2064819892, now seen corresponding path program 93 times [2020-11-30 01:20:26,021 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:26,021 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217908696] [2020-11-30 01:20:26,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:26,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:32,737 INFO L134 CoverageAnalysis]: Checked inductivity of 4371 backedges. 0 proven. 4371 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:32,737 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217908696] [2020-11-30 01:20:32,737 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [86569248] [2020-11-30 01:20:32,737 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 189 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 189 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:20:32,845 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 48 check-sat command(s) [2020-11-30 01:20:32,845 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:20:32,848 INFO L263 TraceCheckSpWp]: Trace formula consists of 402 conjuncts, 95 conjunts are in the unsatisfiable core [2020-11-30 01:20:32,848 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:20:32,886 INFO L134 CoverageAnalysis]: Checked inductivity of 4371 backedges. 0 proven. 4371 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:32,886 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:20:32,887 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [95, 95] total 96 [2020-11-30 01:20:32,887 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834077047] [2020-11-30 01:20:32,887 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:20:32,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:32,887 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 186 times [2020-11-30 01:20:32,887 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:32,887 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749640586] [2020-11-30 01:20:32,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:32,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:32,888 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:32,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:32,888 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:32,889 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:20:32,901 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:20:32,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2020-11-30 01:20:32,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2020-11-30 01:20:32,902 INFO L87 Difference]: Start difference. First operand 194 states and 290 transitions. cyclomatic complexity: 99 Second operand 97 states. [2020-11-30 01:20:35,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:20:35,452 INFO L93 Difference]: Finished difference Result 4758 states and 4857 transitions. [2020-11-30 01:20:35,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2020-11-30 01:20:35,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4758 states and 4857 transitions. [2020-11-30 01:20:35,484 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:20:35,490 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4758 states to 4757 states and 4856 transitions. [2020-11-30 01:20:35,490 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:20:35,490 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:20:35,490 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4757 states and 4856 transitions. [2020-11-30 01:20:35,491 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:20:35,491 INFO L691 BuchiCegarLoop]: Abstraction has 4757 states and 4856 transitions. [2020-11-30 01:20:35,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4757 states and 4856 transitions. [2020-11-30 01:20:35,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4757 to 195. [2020-11-30 01:20:35,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2020-11-30 01:20:35,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 292 transitions. [2020-11-30 01:20:35,500 INFO L714 BuchiCegarLoop]: Abstraction has 195 states and 292 transitions. [2020-11-30 01:20:35,500 INFO L594 BuchiCegarLoop]: Abstraction has 195 states and 292 transitions. [2020-11-30 01:20:35,500 INFO L427 BuchiCegarLoop]: ======== Iteration 188============ [2020-11-30 01:20:35,500 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 292 transitions. [2020-11-30 01:20:35,501 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:35,501 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:20:35,501 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:20:35,501 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [92, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:20:35,501 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:20:35,501 INFO L794 eck$LassoCheckResult]: Stem: 224153#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 224150#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 224151#L26 main_~i~0 := 0; 224152#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 224156#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 224157#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224161#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224344#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224343#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224342#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224341#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224340#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224339#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224338#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224337#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224336#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224335#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224334#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224333#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224332#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224331#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224330#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224329#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224328#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224327#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224326#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224325#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224324#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224323#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224322#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224321#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224320#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224319#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224318#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224317#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224316#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224315#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224314#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224313#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224312#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224311#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224310#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224309#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224308#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224307#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224306#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224305#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224304#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224303#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224302#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224301#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224300#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224299#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224298#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224297#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224296#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224295#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224294#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224293#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224292#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224291#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224290#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224289#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224288#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224287#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224286#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224285#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224284#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224283#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224282#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224281#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224280#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224279#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224278#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224277#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224276#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224275#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224274#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224273#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224272#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224271#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224270#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224269#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224268#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224267#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224266#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224265#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224264#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224263#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224262#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224261#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224260#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224259#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224258#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224257#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224256#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224255#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 224254#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 224158#L35-2 assume main_~j~0 >= 100; 224155#L39 [2020-11-30 01:20:35,501 INFO L796 eck$LassoCheckResult]: Loop: 224155#L39 assume true; 224155#L39 [2020-11-30 01:20:35,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:35,502 INFO L82 PathProgramCache]: Analyzing trace with hash -602651980, now seen corresponding path program 92 times [2020-11-30 01:20:35,502 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:35,502 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323735376] [2020-11-30 01:20:35,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:35,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:42,270 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:42,270 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323735376] [2020-11-30 01:20:42,270 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1952388091] [2020-11-30 01:20:42,271 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 190 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 190 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:20:42,377 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:20:42,377 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:20:42,380 INFO L263 TraceCheckSpWp]: Trace formula consists of 586 conjuncts, 94 conjunts are in the unsatisfiable core [2020-11-30 01:20:42,381 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:20:42,415 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:42,415 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:20:42,415 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [94, 94] total 95 [2020-11-30 01:20:42,415 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316957265] [2020-11-30 01:20:42,415 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:20:42,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:42,416 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 187 times [2020-11-30 01:20:42,416 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:42,416 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927025974] [2020-11-30 01:20:42,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:42,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:42,416 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:42,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:42,417 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:42,417 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:20:42,444 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:20:42,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2020-11-30 01:20:42,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2020-11-30 01:20:42,445 INFO L87 Difference]: Start difference. First operand 195 states and 292 transitions. cyclomatic complexity: 100 Second operand 96 states. [2020-11-30 01:20:42,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:20:42,662 INFO L93 Difference]: Finished difference Result 197 states and 294 transitions. [2020-11-30 01:20:42,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 95 states. [2020-11-30 01:20:42,663 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 197 states and 294 transitions. [2020-11-30 01:20:42,664 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:42,664 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 197 states to 196 states and 293 transitions. [2020-11-30 01:20:42,664 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:20:42,664 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:20:42,664 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 293 transitions. [2020-11-30 01:20:42,665 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:20:42,665 INFO L691 BuchiCegarLoop]: Abstraction has 196 states and 293 transitions. [2020-11-30 01:20:42,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 293 transitions. [2020-11-30 01:20:42,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2020-11-30 01:20:42,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2020-11-30 01:20:42,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 293 transitions. [2020-11-30 01:20:42,666 INFO L714 BuchiCegarLoop]: Abstraction has 196 states and 293 transitions. [2020-11-30 01:20:42,666 INFO L594 BuchiCegarLoop]: Abstraction has 196 states and 293 transitions. [2020-11-30 01:20:42,666 INFO L427 BuchiCegarLoop]: ======== Iteration 189============ [2020-11-30 01:20:42,666 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 293 transitions. [2020-11-30 01:20:42,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:42,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:20:42,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:20:42,667 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [94, 1, 1, 1, 1, 1] [2020-11-30 01:20:42,667 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:20:42,667 INFO L794 eck$LassoCheckResult]: Stem: 224938#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 224935#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 224936#L26 main_~i~0 := 0; 224937#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224944#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224945#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225129#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225127#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225125#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225123#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225121#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225119#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225117#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225115#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225113#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225111#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225109#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225107#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225105#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225103#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225101#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225099#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225097#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225095#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225093#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225091#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225089#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225087#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225085#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225083#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225081#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225079#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225077#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225075#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225073#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225071#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225069#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225067#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225065#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225063#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225061#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225059#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225057#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225055#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225053#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225051#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225049#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225047#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225045#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225043#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225041#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225039#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225037#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225035#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225033#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225031#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225029#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225027#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225025#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225023#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225021#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225019#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225017#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225015#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225013#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225011#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225009#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225007#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225005#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225003#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 225001#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224999#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224995#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224993#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224991#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224989#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224987#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224985#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224983#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224981#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224979#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224977#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224975#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224973#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224971#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224969#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224967#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224965#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224963#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224961#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224959#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224957#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224955#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224953#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224951#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224949#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 224947#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 224939#L29-2 assume main_~i~0 >= 100; 224940#L39 [2020-11-30 01:20:42,667 INFO L796 eck$LassoCheckResult]: Loop: 224940#L39 assume true; 224940#L39 [2020-11-30 01:20:42,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:42,667 INFO L82 PathProgramCache]: Analyzing trace with hash -415091095, now seen corresponding path program 94 times [2020-11-30 01:20:42,667 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:42,667 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660514973] [2020-11-30 01:20:42,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:42,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:20:50,033 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:50,033 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660514973] [2020-11-30 01:20:50,033 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [37391856] [2020-11-30 01:20:50,033 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 191 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 191 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:20:50,140 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:20:50,141 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:20:50,143 INFO L263 TraceCheckSpWp]: Trace formula consists of 406 conjuncts, 96 conjunts are in the unsatisfiable core [2020-11-30 01:20:50,145 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:20:50,194 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:20:50,194 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:20:50,194 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96] total 97 [2020-11-30 01:20:50,194 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734832778] [2020-11-30 01:20:50,195 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:20:50,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:50,195 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 188 times [2020-11-30 01:20:50,195 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:50,195 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580031867] [2020-11-30 01:20:50,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:50,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:50,196 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:50,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:20:50,196 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:20:50,196 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:20:50,200 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:20:50,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2020-11-30 01:20:50,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2020-11-30 01:20:50,201 INFO L87 Difference]: Start difference. First operand 196 states and 293 transitions. cyclomatic complexity: 100 Second operand 98 states. [2020-11-30 01:20:52,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:20:52,654 INFO L93 Difference]: Finished difference Result 4856 states and 4956 transitions. [2020-11-30 01:20:52,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 97 states. [2020-11-30 01:20:52,656 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4856 states and 4956 transitions. [2020-11-30 01:20:52,667 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:20:52,673 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4856 states to 4855 states and 4955 transitions. [2020-11-30 01:20:52,673 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:20:52,673 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:20:52,673 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4855 states and 4955 transitions. [2020-11-30 01:20:52,674 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:20:52,674 INFO L691 BuchiCegarLoop]: Abstraction has 4855 states and 4955 transitions. [2020-11-30 01:20:52,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4855 states and 4955 transitions. [2020-11-30 01:20:52,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4855 to 197. [2020-11-30 01:20:52,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2020-11-30 01:20:52,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 295 transitions. [2020-11-30 01:20:52,683 INFO L714 BuchiCegarLoop]: Abstraction has 197 states and 295 transitions. [2020-11-30 01:20:52,683 INFO L594 BuchiCegarLoop]: Abstraction has 197 states and 295 transitions. [2020-11-30 01:20:52,683 INFO L427 BuchiCegarLoop]: ======== Iteration 190============ [2020-11-30 01:20:52,683 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 197 states and 295 transitions. [2020-11-30 01:20:52,684 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:20:52,684 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:20:52,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:20:52,684 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [93, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:20:52,684 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:20:52,684 INFO L794 eck$LassoCheckResult]: Stem: 230385#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 230382#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 230383#L26 main_~i~0 := 0; 230384#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 230388#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 230389#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230393#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230578#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230577#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230576#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230575#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230574#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230573#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230572#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230571#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230570#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230569#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230568#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230567#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230566#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230565#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230564#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230563#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230562#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230561#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230560#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230559#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230558#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230557#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230556#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230555#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230554#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230553#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230552#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230551#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230550#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230549#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230548#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230547#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230546#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230545#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230544#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230543#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230542#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230541#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230540#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230539#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230538#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230537#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230536#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230535#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230534#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230533#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230532#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230531#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230530#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230529#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230528#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230527#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230526#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230525#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230524#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230523#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230522#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230521#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230520#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230519#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230518#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230517#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230516#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230515#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230514#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230513#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230512#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230511#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230510#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230509#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230508#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230507#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230506#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230505#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230504#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230503#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230502#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230501#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230500#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230499#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230498#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230497#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230496#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230495#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230494#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230493#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230492#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230491#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230490#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230489#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230488#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 230487#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 230390#L35-2 assume main_~j~0 >= 100; 230387#L39 [2020-11-30 01:20:52,685 INFO L796 eck$LassoCheckResult]: Loop: 230387#L39 assume true; 230387#L39 [2020-11-30 01:20:52,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:20:52,685 INFO L82 PathProgramCache]: Analyzing trace with hash -1502340485, now seen corresponding path program 93 times [2020-11-30 01:20:52,685 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:20:52,685 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [739691122] [2020-11-30 01:20:52,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:20:52,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:00,388 INFO L134 CoverageAnalysis]: Checked inductivity of 4371 backedges. 0 proven. 4371 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:00,389 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [739691122] [2020-11-30 01:21:00,389 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1744867614] [2020-11-30 01:21:00,389 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 192 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 192 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:21:00,542 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 48 check-sat command(s) [2020-11-30 01:21:00,542 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:21:00,545 INFO L263 TraceCheckSpWp]: Trace formula consists of 592 conjuncts, 95 conjunts are in the unsatisfiable core [2020-11-30 01:21:00,546 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:21:00,583 INFO L134 CoverageAnalysis]: Checked inductivity of 4371 backedges. 0 proven. 4371 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:00,584 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:21:00,584 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [95, 95] total 96 [2020-11-30 01:21:00,584 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409704488] [2020-11-30 01:21:00,584 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:21:00,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:00,584 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 189 times [2020-11-30 01:21:00,584 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:00,584 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474573260] [2020-11-30 01:21:00,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:00,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:00,585 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:00,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:00,586 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:00,586 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:21:00,596 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:21:00,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2020-11-30 01:21:00,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2020-11-30 01:21:00,597 INFO L87 Difference]: Start difference. First operand 197 states and 295 transitions. cyclomatic complexity: 101 Second operand 97 states. [2020-11-30 01:21:00,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:21:00,834 INFO L93 Difference]: Finished difference Result 199 states and 297 transitions. [2020-11-30 01:21:00,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2020-11-30 01:21:00,835 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 199 states and 297 transitions. [2020-11-30 01:21:00,836 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:00,836 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 199 states to 198 states and 296 transitions. [2020-11-30 01:21:00,836 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:21:00,836 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:21:00,836 INFO L73 IsDeterministic]: Start isDeterministic. Operand 198 states and 296 transitions. [2020-11-30 01:21:00,837 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:21:00,837 INFO L691 BuchiCegarLoop]: Abstraction has 198 states and 296 transitions. [2020-11-30 01:21:00,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states and 296 transitions. [2020-11-30 01:21:00,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 198. [2020-11-30 01:21:00,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2020-11-30 01:21:00,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 296 transitions. [2020-11-30 01:21:00,838 INFO L714 BuchiCegarLoop]: Abstraction has 198 states and 296 transitions. [2020-11-30 01:21:00,838 INFO L594 BuchiCegarLoop]: Abstraction has 198 states and 296 transitions. [2020-11-30 01:21:00,838 INFO L427 BuchiCegarLoop]: ======== Iteration 191============ [2020-11-30 01:21:00,838 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 198 states and 296 transitions. [2020-11-30 01:21:00,838 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:00,838 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:21:00,839 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:21:00,839 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [95, 1, 1, 1, 1, 1] [2020-11-30 01:21:00,839 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:21:00,839 INFO L794 eck$LassoCheckResult]: Stem: 231178#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 231175#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 231176#L26 main_~i~0 := 0; 231177#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231184#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231185#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231371#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231369#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231367#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231365#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231363#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231361#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231359#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231357#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231355#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231353#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231351#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231349#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231347#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231345#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231343#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231341#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231339#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231337#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231335#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231333#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231331#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231329#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231327#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231325#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231323#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231321#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231319#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231317#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231315#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231313#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231311#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231309#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231307#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231305#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231303#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231301#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231299#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231297#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231295#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231293#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231291#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231289#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231287#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231285#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231283#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231281#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231279#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231277#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231275#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231273#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231271#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231269#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231267#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231265#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231263#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231261#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231259#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231257#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231255#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231253#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231251#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231249#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231247#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231245#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231243#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231241#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231239#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231237#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231235#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231233#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231231#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231229#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231227#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231225#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231223#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231221#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231219#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231217#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231215#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231213#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231211#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231209#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231207#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231205#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231203#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231201#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231199#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231197#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231195#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231193#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231191#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231189#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 231187#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 231179#L29-2 assume main_~i~0 >= 100; 231180#L39 [2020-11-30 01:21:00,839 INFO L796 eck$LassoCheckResult]: Loop: 231180#L39 assume true; 231180#L39 [2020-11-30 01:21:00,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:00,839 INFO L82 PathProgramCache]: Analyzing trace with hash 17079636, now seen corresponding path program 95 times [2020-11-30 01:21:00,839 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:00,839 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1586940812] [2020-11-30 01:21:00,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:00,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:08,949 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 0 proven. 4560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:08,949 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1586940812] [2020-11-30 01:21:08,950 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [767677537] [2020-11-30 01:21:08,950 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 193 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 193 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:21:09,057 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 49 check-sat command(s) [2020-11-30 01:21:09,057 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:21:09,060 INFO L263 TraceCheckSpWp]: Trace formula consists of 410 conjuncts, 97 conjunts are in the unsatisfiable core [2020-11-30 01:21:09,061 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:21:09,100 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 0 proven. 4560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:09,100 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:21:09,100 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [97, 97] total 98 [2020-11-30 01:21:09,100 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376049633] [2020-11-30 01:21:09,101 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:21:09,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:09,101 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 190 times [2020-11-30 01:21:09,101 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:09,101 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1887993658] [2020-11-30 01:21:09,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:09,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:09,103 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:09,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:09,103 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:09,104 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:21:09,125 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:21:09,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2020-11-30 01:21:09,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4851, Invalid=4851, Unknown=0, NotChecked=0, Total=9702 [2020-11-30 01:21:09,127 INFO L87 Difference]: Start difference. First operand 198 states and 296 transitions. cyclomatic complexity: 101 Second operand 99 states. [2020-11-30 01:21:11,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:21:11,625 INFO L93 Difference]: Finished difference Result 4955 states and 5056 transitions. [2020-11-30 01:21:11,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2020-11-30 01:21:11,627 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4955 states and 5056 transitions. [2020-11-30 01:21:11,639 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:21:11,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4955 states to 4954 states and 5055 transitions. [2020-11-30 01:21:11,676 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:21:11,676 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:21:11,676 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4954 states and 5055 transitions. [2020-11-30 01:21:11,677 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:21:11,677 INFO L691 BuchiCegarLoop]: Abstraction has 4954 states and 5055 transitions. [2020-11-30 01:21:11,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4954 states and 5055 transitions. [2020-11-30 01:21:11,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4954 to 199. [2020-11-30 01:21:11,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2020-11-30 01:21:11,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 298 transitions. [2020-11-30 01:21:11,687 INFO L714 BuchiCegarLoop]: Abstraction has 199 states and 298 transitions. [2020-11-30 01:21:11,687 INFO L594 BuchiCegarLoop]: Abstraction has 199 states and 298 transitions. [2020-11-30 01:21:11,687 INFO L427 BuchiCegarLoop]: ======== Iteration 192============ [2020-11-30 01:21:11,687 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 199 states and 298 transitions. [2020-11-30 01:21:11,688 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:11,688 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:21:11,688 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:21:11,688 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [94, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:21:11,688 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:21:11,689 INFO L794 eck$LassoCheckResult]: Stem: 236730#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 236727#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 236728#L26 main_~i~0 := 0; 236729#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 236733#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 236734#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236738#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236925#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236924#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236923#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236922#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236921#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236920#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236919#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236918#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236917#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236916#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236915#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236914#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236913#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236912#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236911#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236910#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236909#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236908#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236907#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236906#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236905#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236904#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236903#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236902#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236901#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236900#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236899#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236898#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236897#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236896#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236895#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236894#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236893#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236892#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236891#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236890#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236889#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236888#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236887#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236886#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236885#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236884#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236883#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236882#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236881#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236880#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236879#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236878#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236877#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236876#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236875#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236874#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236873#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236872#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236871#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236870#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236869#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236868#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236867#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236866#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236865#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236864#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236863#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236862#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236861#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236860#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236859#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236858#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236857#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236856#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236855#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236854#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236853#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236852#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236851#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236850#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236849#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236848#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236847#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236846#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236845#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236844#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236843#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236842#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236841#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236840#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236839#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236838#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236837#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236836#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236835#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236834#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 236833#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 236735#L35-2 assume main_~j~0 >= 100; 236732#L39 [2020-11-30 01:21:11,689 INFO L796 eck$LassoCheckResult]: Loop: 236732#L39 assume true; 236732#L39 [2020-11-30 01:21:11,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:11,690 INFO L82 PathProgramCache]: Analyzing trace with hash 672086932, now seen corresponding path program 94 times [2020-11-30 01:21:11,690 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:11,690 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929843772] [2020-11-30 01:21:11,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:11,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:19,474 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:19,474 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929843772] [2020-11-30 01:21:19,474 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1628619653] [2020-11-30 01:21:19,475 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 194 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 194 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:21:19,586 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-11-30 01:21:19,586 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:21:19,589 INFO L263 TraceCheckSpWp]: Trace formula consists of 598 conjuncts, 96 conjunts are in the unsatisfiable core [2020-11-30 01:21:19,590 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:21:19,629 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:19,629 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:21:19,630 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96] total 97 [2020-11-30 01:21:19,630 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178463312] [2020-11-30 01:21:19,630 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:21:19,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:19,630 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 191 times [2020-11-30 01:21:19,631 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:19,631 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007935050] [2020-11-30 01:21:19,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:19,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:19,632 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:19,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:19,632 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:19,632 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:21:19,639 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:21:19,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2020-11-30 01:21:19,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2020-11-30 01:21:19,640 INFO L87 Difference]: Start difference. First operand 199 states and 298 transitions. cyclomatic complexity: 102 Second operand 98 states. [2020-11-30 01:21:19,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:21:19,975 INFO L93 Difference]: Finished difference Result 201 states and 300 transitions. [2020-11-30 01:21:19,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 97 states. [2020-11-30 01:21:19,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 201 states and 300 transitions. [2020-11-30 01:21:19,977 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:19,977 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 201 states to 200 states and 299 transitions. [2020-11-30 01:21:19,977 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:21:19,977 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:21:19,977 INFO L73 IsDeterministic]: Start isDeterministic. Operand 200 states and 299 transitions. [2020-11-30 01:21:19,978 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:21:19,978 INFO L691 BuchiCegarLoop]: Abstraction has 200 states and 299 transitions. [2020-11-30 01:21:19,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states and 299 transitions. [2020-11-30 01:21:19,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 200. [2020-11-30 01:21:19,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2020-11-30 01:21:19,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 299 transitions. [2020-11-30 01:21:19,979 INFO L714 BuchiCegarLoop]: Abstraction has 200 states and 299 transitions. [2020-11-30 01:21:19,979 INFO L594 BuchiCegarLoop]: Abstraction has 200 states and 299 transitions. [2020-11-30 01:21:19,980 INFO L427 BuchiCegarLoop]: ======== Iteration 193============ [2020-11-30 01:21:19,980 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 200 states and 299 transitions. [2020-11-30 01:21:19,980 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:19,980 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:21:19,980 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:21:19,980 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [96, 1, 1, 1, 1, 1] [2020-11-30 01:21:19,980 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:21:19,980 INFO L794 eck$LassoCheckResult]: Stem: 237531#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 237528#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 237529#L26 main_~i~0 := 0; 237530#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237537#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237538#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237726#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237724#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237722#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237720#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237718#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237716#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237714#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237712#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237710#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237708#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237706#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237704#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237702#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237700#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237698#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237696#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237694#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237692#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237690#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237688#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237686#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237684#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237682#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237680#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237678#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237676#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237674#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237672#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237670#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237668#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237666#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237664#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237662#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237660#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237658#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237656#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237654#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237652#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237650#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237648#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237646#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237644#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237642#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237640#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237638#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237636#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237634#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237632#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237630#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237628#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237626#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237624#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237622#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237620#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237618#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237616#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237614#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237612#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237610#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237608#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237606#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237604#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237602#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237600#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237598#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237596#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237594#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237592#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237590#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237588#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237586#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237584#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237582#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237580#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237578#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237576#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237574#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237572#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237570#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237568#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237566#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237564#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237562#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237560#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237558#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237556#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237554#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237552#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237550#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237548#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237546#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237544#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237542#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 237540#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 237532#L29-2 assume main_~i~0 >= 100; 237533#L39 [2020-11-30 01:21:19,981 INFO L796 eck$LassoCheckResult]: Loop: 237533#L39 assume true; 237533#L39 [2020-11-30 01:21:19,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:19,981 INFO L82 PathProgramCache]: Analyzing trace with hash 529470409, now seen corresponding path program 96 times [2020-11-30 01:21:19,981 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:19,981 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014476790] [2020-11-30 01:21:19,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:20,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:28,380 INFO L134 CoverageAnalysis]: Checked inductivity of 4656 backedges. 0 proven. 4656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:28,380 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014476790] [2020-11-30 01:21:28,381 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1383325496] [2020-11-30 01:21:28,381 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 195 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 195 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:21:28,495 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2020-11-30 01:21:28,495 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:21:28,498 INFO L263 TraceCheckSpWp]: Trace formula consists of 414 conjuncts, 98 conjunts are in the unsatisfiable core [2020-11-30 01:21:28,499 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:21:28,539 INFO L134 CoverageAnalysis]: Checked inductivity of 4656 backedges. 0 proven. 4656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:28,540 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:21:28,540 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [98, 98] total 99 [2020-11-30 01:21:28,540 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1303261383] [2020-11-30 01:21:28,540 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:21:28,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:28,540 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 192 times [2020-11-30 01:21:28,541 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:28,541 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251721643] [2020-11-30 01:21:28,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:28,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:28,541 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:28,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:28,542 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:28,542 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:21:28,547 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:21:28,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2020-11-30 01:21:28,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4950, Invalid=4950, Unknown=0, NotChecked=0, Total=9900 [2020-11-30 01:21:28,548 INFO L87 Difference]: Start difference. First operand 200 states and 299 transitions. cyclomatic complexity: 102 Second operand 100 states. [2020-11-30 01:21:31,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:21:31,710 INFO L93 Difference]: Finished difference Result 5055 states and 5157 transitions. [2020-11-30 01:21:31,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2020-11-30 01:21:31,712 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5055 states and 5157 transitions. [2020-11-30 01:21:31,723 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:21:31,730 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5055 states to 5054 states and 5156 transitions. [2020-11-30 01:21:31,730 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:21:31,730 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:21:31,730 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5054 states and 5156 transitions. [2020-11-30 01:21:31,731 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:21:31,731 INFO L691 BuchiCegarLoop]: Abstraction has 5054 states and 5156 transitions. [2020-11-30 01:21:31,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5054 states and 5156 transitions. [2020-11-30 01:21:31,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5054 to 201. [2020-11-30 01:21:31,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2020-11-30 01:21:31,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 301 transitions. [2020-11-30 01:21:31,742 INFO L714 BuchiCegarLoop]: Abstraction has 201 states and 301 transitions. [2020-11-30 01:21:31,742 INFO L594 BuchiCegarLoop]: Abstraction has 201 states and 301 transitions. [2020-11-30 01:21:31,742 INFO L427 BuchiCegarLoop]: ======== Iteration 194============ [2020-11-30 01:21:31,742 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 201 states and 301 transitions. [2020-11-30 01:21:31,742 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:31,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:21:31,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:21:31,743 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [95, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:21:31,743 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:21:31,743 INFO L794 eck$LassoCheckResult]: Stem: 243189#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 243186#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 243187#L26 main_~i~0 := 0; 243188#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 243192#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 243193#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243197#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243386#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243385#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243384#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243383#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243382#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243381#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243380#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243379#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243378#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243377#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243376#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243375#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243374#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243373#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243372#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243371#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243370#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243369#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243368#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243367#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243366#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243365#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243364#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243363#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243362#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243361#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243360#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243359#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243358#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243357#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243356#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243355#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243354#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243353#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243352#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243351#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243350#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243349#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243348#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243347#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243346#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243345#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243344#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243343#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243342#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243341#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243340#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243339#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243338#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243337#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243336#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243335#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243334#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243333#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243332#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243331#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243330#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243329#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243328#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243327#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243326#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243325#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243324#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243323#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243322#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243321#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243320#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243319#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243318#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243317#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243316#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243315#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243314#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243313#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243312#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243311#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243310#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243309#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243308#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243307#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243306#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243305#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243304#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243303#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243302#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243301#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243300#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243299#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243298#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243297#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243296#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243295#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243294#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 243293#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 243194#L35-2 assume main_~j~0 >= 100; 243191#L39 [2020-11-30 01:21:31,743 INFO L796 eck$LassoCheckResult]: Loop: 243191#L39 assume true; 243191#L39 [2020-11-30 01:21:31,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:31,744 INFO L82 PathProgramCache]: Analyzing trace with hash -640139877, now seen corresponding path program 95 times [2020-11-30 01:21:31,744 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:31,744 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527895697] [2020-11-30 01:21:31,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:31,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:39,372 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 0 proven. 4560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:39,372 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527895697] [2020-11-30 01:21:39,372 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2082488043] [2020-11-30 01:21:39,373 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 196 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 196 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:21:39,510 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 49 check-sat command(s) [2020-11-30 01:21:39,510 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:21:39,514 INFO L263 TraceCheckSpWp]: Trace formula consists of 604 conjuncts, 97 conjunts are in the unsatisfiable core [2020-11-30 01:21:39,515 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:21:39,551 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 0 proven. 4560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:39,551 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:21:39,551 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [97, 97] total 98 [2020-11-30 01:21:39,551 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346855803] [2020-11-30 01:21:39,551 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:21:39,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:39,552 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 193 times [2020-11-30 01:21:39,552 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:39,552 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1688535643] [2020-11-30 01:21:39,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:39,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:39,553 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:39,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:39,553 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:39,553 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:21:39,557 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:21:39,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2020-11-30 01:21:39,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4851, Invalid=4851, Unknown=0, NotChecked=0, Total=9702 [2020-11-30 01:21:39,558 INFO L87 Difference]: Start difference. First operand 201 states and 301 transitions. cyclomatic complexity: 103 Second operand 99 states. [2020-11-30 01:21:39,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:21:39,804 INFO L93 Difference]: Finished difference Result 203 states and 303 transitions. [2020-11-30 01:21:39,806 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2020-11-30 01:21:39,806 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 203 states and 303 transitions. [2020-11-30 01:21:39,807 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:39,807 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 203 states to 202 states and 302 transitions. [2020-11-30 01:21:39,807 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:21:39,807 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:21:39,807 INFO L73 IsDeterministic]: Start isDeterministic. Operand 202 states and 302 transitions. [2020-11-30 01:21:39,807 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:21:39,807 INFO L691 BuchiCegarLoop]: Abstraction has 202 states and 302 transitions. [2020-11-30 01:21:39,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states and 302 transitions. [2020-11-30 01:21:39,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2020-11-30 01:21:39,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2020-11-30 01:21:39,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 302 transitions. [2020-11-30 01:21:39,809 INFO L714 BuchiCegarLoop]: Abstraction has 202 states and 302 transitions. [2020-11-30 01:21:39,809 INFO L594 BuchiCegarLoop]: Abstraction has 202 states and 302 transitions. [2020-11-30 01:21:39,809 INFO L427 BuchiCegarLoop]: ======== Iteration 195============ [2020-11-30 01:21:39,809 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 202 states and 302 transitions. [2020-11-30 01:21:39,809 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:39,809 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:21:39,809 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:21:39,810 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [97, 1, 1, 1, 1, 1] [2020-11-30 01:21:39,810 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:21:39,810 INFO L794 eck$LassoCheckResult]: Stem: 243998#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 243995#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 243996#L26 main_~i~0 := 0; 243997#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244004#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244005#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244195#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244193#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244191#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244189#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244187#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244185#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244183#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244181#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244179#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244177#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244175#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244173#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244171#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244169#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244167#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244165#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244163#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244161#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244159#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244157#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244155#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244153#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244151#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244149#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244147#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244145#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244143#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244141#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244139#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244137#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244135#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244133#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244131#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244129#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244127#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244125#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244123#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244121#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244119#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244117#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244115#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244113#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244111#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244109#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244107#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244105#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244103#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244101#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244099#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244097#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244095#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244093#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244091#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244089#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244087#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244085#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244083#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244081#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244079#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244077#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244075#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244073#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244071#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244069#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244067#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244065#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244063#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244061#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244059#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244057#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244055#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244053#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244051#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244049#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244047#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244045#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244043#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244041#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244039#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244037#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244035#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244033#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244031#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244029#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244027#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244025#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244023#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244021#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244019#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244017#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244015#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244013#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244011#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244009#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 244007#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 243999#L29-2 assume main_~i~0 >= 100; 244000#L39 [2020-11-30 01:21:39,810 INFO L796 eck$LassoCheckResult]: Loop: 244000#L39 assume true; 244000#L39 [2020-11-30 01:21:39,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:39,810 INFO L82 PathProgramCache]: Analyzing trace with hash -766284812, now seen corresponding path program 97 times [2020-11-30 01:21:39,810 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:39,810 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1127947199] [2020-11-30 01:21:39,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:39,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:47,942 INFO L134 CoverageAnalysis]: Checked inductivity of 4753 backedges. 0 proven. 4753 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:47,942 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1127947199] [2020-11-30 01:21:47,942 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [461881112] [2020-11-30 01:21:47,942 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 197 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 197 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:21:48,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:48,023 INFO L263 TraceCheckSpWp]: Trace formula consists of 418 conjuncts, 99 conjunts are in the unsatisfiable core [2020-11-30 01:21:48,024 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:21:48,086 INFO L134 CoverageAnalysis]: Checked inductivity of 4753 backedges. 0 proven. 4753 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:48,086 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:21:48,086 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [99, 99] total 100 [2020-11-30 01:21:48,086 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539354546] [2020-11-30 01:21:48,086 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:21:48,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:48,087 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 194 times [2020-11-30 01:21:48,087 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:48,087 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453540135] [2020-11-30 01:21:48,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:48,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:48,088 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:48,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:48,088 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:48,088 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:21:48,092 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:21:48,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2020-11-30 01:21:48,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5050, Invalid=5050, Unknown=0, NotChecked=0, Total=10100 [2020-11-30 01:21:48,093 INFO L87 Difference]: Start difference. First operand 202 states and 302 transitions. cyclomatic complexity: 103 Second operand 101 states. [2020-11-30 01:21:50,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:21:50,641 INFO L93 Difference]: Finished difference Result 5156 states and 5259 transitions. [2020-11-30 01:21:50,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2020-11-30 01:21:50,643 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5156 states and 5259 transitions. [2020-11-30 01:21:50,655 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:21:50,662 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5156 states to 5155 states and 5258 transitions. [2020-11-30 01:21:50,662 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:21:50,662 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:21:50,662 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5155 states and 5258 transitions. [2020-11-30 01:21:50,663 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:21:50,663 INFO L691 BuchiCegarLoop]: Abstraction has 5155 states and 5258 transitions. [2020-11-30 01:21:50,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5155 states and 5258 transitions. [2020-11-30 01:21:50,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5155 to 203. [2020-11-30 01:21:50,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2020-11-30 01:21:50,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 304 transitions. [2020-11-30 01:21:50,673 INFO L714 BuchiCegarLoop]: Abstraction has 203 states and 304 transitions. [2020-11-30 01:21:50,673 INFO L594 BuchiCegarLoop]: Abstraction has 203 states and 304 transitions. [2020-11-30 01:21:50,673 INFO L427 BuchiCegarLoop]: ======== Iteration 196============ [2020-11-30 01:21:50,673 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 203 states and 304 transitions. [2020-11-30 01:21:50,674 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:50,674 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:21:50,674 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:21:50,674 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [96, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:21:50,674 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:21:50,674 INFO L794 eck$LassoCheckResult]: Stem: 249763#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 249760#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 249761#L26 main_~i~0 := 0; 249762#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 249766#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 249767#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249771#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249962#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249961#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249960#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249959#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249958#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249957#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249956#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249955#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249954#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249953#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249952#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249951#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249950#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249949#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249948#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249947#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249946#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249945#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249944#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249943#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249942#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249941#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249940#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249939#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249938#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249937#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249936#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249935#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249934#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249933#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249932#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249931#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249930#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249929#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249928#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249927#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249926#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249925#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249924#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249923#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249922#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249921#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249920#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249919#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249918#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249917#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249916#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249915#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249914#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249913#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249912#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249911#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249910#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249909#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249908#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249907#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249906#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249905#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249904#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249903#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249902#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249901#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249900#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249899#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249898#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249897#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249896#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249895#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249894#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249893#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249892#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249891#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249890#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249889#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249888#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249887#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249886#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249885#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249884#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249883#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249882#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249881#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249880#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249879#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249878#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249877#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249876#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249875#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249874#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249873#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249872#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249871#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249870#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249869#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 249868#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 249768#L35-2 assume main_~j~0 >= 100; 249765#L39 [2020-11-30 01:21:50,674 INFO L796 eck$LassoCheckResult]: Loop: 249765#L39 assume true; 249765#L39 [2020-11-30 01:21:50,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:50,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1630502004, now seen corresponding path program 96 times [2020-11-30 01:21:50,675 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:50,675 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381386713] [2020-11-30 01:21:50,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:50,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:21:58,919 INFO L134 CoverageAnalysis]: Checked inductivity of 4656 backedges. 0 proven. 4656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:58,919 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1381386713] [2020-11-30 01:21:58,919 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [245577439] [2020-11-30 01:21:58,919 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 198 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 198 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:21:59,071 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2020-11-30 01:21:59,072 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:21:59,075 INFO L263 TraceCheckSpWp]: Trace formula consists of 610 conjuncts, 98 conjunts are in the unsatisfiable core [2020-11-30 01:21:59,076 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:21:59,118 INFO L134 CoverageAnalysis]: Checked inductivity of 4656 backedges. 0 proven. 4656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:21:59,118 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:21:59,118 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [98, 98] total 99 [2020-11-30 01:21:59,119 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574273521] [2020-11-30 01:21:59,119 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:21:59,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:59,119 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 195 times [2020-11-30 01:21:59,119 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:59,119 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479394305] [2020-11-30 01:21:59,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:59,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:59,120 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:59,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:21:59,120 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:21:59,120 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:21:59,129 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:21:59,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2020-11-30 01:21:59,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=4950, Invalid=4950, Unknown=0, NotChecked=0, Total=9900 [2020-11-30 01:21:59,130 INFO L87 Difference]: Start difference. First operand 203 states and 304 transitions. cyclomatic complexity: 104 Second operand 100 states. [2020-11-30 01:21:59,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:21:59,477 INFO L93 Difference]: Finished difference Result 205 states and 306 transitions. [2020-11-30 01:21:59,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2020-11-30 01:21:59,478 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 205 states and 306 transitions. [2020-11-30 01:21:59,479 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:59,479 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 205 states to 204 states and 305 transitions. [2020-11-30 01:21:59,479 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:21:59,480 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:21:59,480 INFO L73 IsDeterministic]: Start isDeterministic. Operand 204 states and 305 transitions. [2020-11-30 01:21:59,480 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:21:59,480 INFO L691 BuchiCegarLoop]: Abstraction has 204 states and 305 transitions. [2020-11-30 01:21:59,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states and 305 transitions. [2020-11-30 01:21:59,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 204. [2020-11-30 01:21:59,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2020-11-30 01:21:59,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 305 transitions. [2020-11-30 01:21:59,481 INFO L714 BuchiCegarLoop]: Abstraction has 204 states and 305 transitions. [2020-11-30 01:21:59,481 INFO L594 BuchiCegarLoop]: Abstraction has 204 states and 305 transitions. [2020-11-30 01:21:59,481 INFO L427 BuchiCegarLoop]: ======== Iteration 197============ [2020-11-30 01:21:59,481 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 204 states and 305 transitions. [2020-11-30 01:21:59,482 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:21:59,482 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:21:59,482 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:21:59,482 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [98, 1, 1, 1, 1, 1] [2020-11-30 01:21:59,482 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:21:59,482 INFO L794 eck$LassoCheckResult]: Stem: 250580#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 250577#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 250578#L26 main_~i~0 := 0; 250579#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250586#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250587#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250779#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250777#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250775#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250773#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250771#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250769#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250767#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250765#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250763#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250761#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250759#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250757#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250755#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250753#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250751#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250749#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250747#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250745#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250743#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250741#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250739#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250737#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250735#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250733#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250731#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250729#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250727#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250725#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250723#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250721#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250719#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250717#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250715#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250713#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250711#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250709#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250707#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250705#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250703#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250701#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250699#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250697#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250695#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250693#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250691#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250689#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250687#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250685#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250683#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250681#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250679#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250677#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250675#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250673#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250671#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250669#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250667#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250665#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250663#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250661#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250659#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250657#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250655#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250653#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250651#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250649#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250647#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250645#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250643#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250641#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250639#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250637#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250635#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250633#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250631#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250629#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250627#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250625#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250623#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250621#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250619#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250617#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250615#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250613#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250611#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250609#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250607#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250605#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250603#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250601#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250599#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250597#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250595#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250593#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250591#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 250589#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 250581#L29-2 assume main_~i~0 >= 100; 250582#L39 [2020-11-30 01:21:59,483 INFO L796 eck$LassoCheckResult]: Loop: 250582#L39 assume true; 250582#L39 [2020-11-30 01:21:59,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:21:59,483 INFO L82 PathProgramCache]: Analyzing trace with hash 2014976297, now seen corresponding path program 98 times [2020-11-30 01:21:59,483 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:21:59,483 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177585069] [2020-11-30 01:21:59,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:21:59,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:22:07,693 INFO L134 CoverageAnalysis]: Checked inductivity of 4851 backedges. 0 proven. 4851 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:07,694 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177585069] [2020-11-30 01:22:07,694 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [983781425] [2020-11-30 01:22:07,694 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 199 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 199 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:22:07,772 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:22:07,773 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:22:07,775 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 100 conjunts are in the unsatisfiable core [2020-11-30 01:22:07,776 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:22:07,813 INFO L134 CoverageAnalysis]: Checked inductivity of 4851 backedges. 0 proven. 4851 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:07,813 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:22:07,813 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [100, 100] total 101 [2020-11-30 01:22:07,813 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144296659] [2020-11-30 01:22:07,813 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:22:07,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:07,813 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 196 times [2020-11-30 01:22:07,814 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:07,814 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684204774] [2020-11-30 01:22:07,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:07,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:07,814 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:07,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:07,815 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:07,815 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:22:07,819 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:22:07,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 102 interpolants. [2020-11-30 01:22:07,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2020-11-30 01:22:07,821 INFO L87 Difference]: Start difference. First operand 204 states and 305 transitions. cyclomatic complexity: 104 Second operand 102 states. [2020-11-30 01:22:10,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:22:10,986 INFO L93 Difference]: Finished difference Result 5258 states and 5362 transitions. [2020-11-30 01:22:10,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2020-11-30 01:22:10,988 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5258 states and 5362 transitions. [2020-11-30 01:22:10,999 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:22:11,005 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5258 states to 5257 states and 5361 transitions. [2020-11-30 01:22:11,005 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:22:11,005 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:22:11,005 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5257 states and 5361 transitions. [2020-11-30 01:22:11,006 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:22:11,006 INFO L691 BuchiCegarLoop]: Abstraction has 5257 states and 5361 transitions. [2020-11-30 01:22:11,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5257 states and 5361 transitions. [2020-11-30 01:22:11,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5257 to 205. [2020-11-30 01:22:11,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2020-11-30 01:22:11,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 307 transitions. [2020-11-30 01:22:11,017 INFO L714 BuchiCegarLoop]: Abstraction has 205 states and 307 transitions. [2020-11-30 01:22:11,017 INFO L594 BuchiCegarLoop]: Abstraction has 205 states and 307 transitions. [2020-11-30 01:22:11,017 INFO L427 BuchiCegarLoop]: ======== Iteration 198============ [2020-11-30 01:22:11,017 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 205 states and 307 transitions. [2020-11-30 01:22:11,017 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:22:11,017 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:22:11,017 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:22:11,018 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [97, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:22:11,018 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:22:11,018 INFO L794 eck$LassoCheckResult]: Stem: 256453#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 256450#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 256451#L26 main_~i~0 := 0; 256452#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 256456#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 256457#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256461#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256654#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256653#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256652#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256651#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256650#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256649#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256648#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256647#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256646#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256645#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256644#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256643#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256642#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256641#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256640#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256639#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256638#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256637#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256636#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256635#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256634#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256633#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256632#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256631#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256630#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256629#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256628#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256627#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256626#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256625#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256624#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256623#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256622#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256621#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256620#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256619#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256618#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256617#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256616#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256615#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256614#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256613#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256612#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256611#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256610#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256609#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256608#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256607#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256606#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256605#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256604#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256603#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256602#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256601#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256600#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256599#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256598#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256597#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256596#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256595#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256594#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256593#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256592#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256591#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256590#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256589#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256588#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256587#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256586#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256585#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256584#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256583#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256582#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256581#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256580#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256579#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256578#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256577#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256576#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256575#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256574#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256573#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256572#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256571#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256570#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256569#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256568#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256567#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256566#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256565#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256564#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256563#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256562#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256561#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256560#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 256559#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 256458#L35-2 assume main_~j~0 >= 100; 256455#L39 [2020-11-30 01:22:11,018 INFO L796 eck$LassoCheckResult]: Loop: 256455#L39 assume true; 256455#L39 [2020-11-30 01:22:11,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:11,018 INFO L82 PathProgramCache]: Analyzing trace with hash -994043717, now seen corresponding path program 97 times [2020-11-30 01:22:11,018 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:11,018 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793794984] [2020-11-30 01:22:11,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:11,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:22:19,433 INFO L134 CoverageAnalysis]: Checked inductivity of 4753 backedges. 0 proven. 4753 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:19,433 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [793794984] [2020-11-30 01:22:19,433 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [885352876] [2020-11-30 01:22:19,433 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 200 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 200 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:22:19,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:22:19,549 INFO L263 TraceCheckSpWp]: Trace formula consists of 616 conjuncts, 99 conjunts are in the unsatisfiable core [2020-11-30 01:22:19,550 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:22:19,587 INFO L134 CoverageAnalysis]: Checked inductivity of 4753 backedges. 0 proven. 4753 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:19,587 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:22:19,587 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [99, 99] total 100 [2020-11-30 01:22:19,588 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141639830] [2020-11-30 01:22:19,588 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:22:19,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:19,588 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 197 times [2020-11-30 01:22:19,588 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:19,588 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087993447] [2020-11-30 01:22:19,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:19,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:19,589 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:19,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:19,589 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:19,589 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:22:19,594 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:22:19,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2020-11-30 01:22:19,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5050, Invalid=5050, Unknown=0, NotChecked=0, Total=10100 [2020-11-30 01:22:19,595 INFO L87 Difference]: Start difference. First operand 205 states and 307 transitions. cyclomatic complexity: 105 Second operand 101 states. [2020-11-30 01:22:19,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:22:19,952 INFO L93 Difference]: Finished difference Result 207 states and 309 transitions. [2020-11-30 01:22:19,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2020-11-30 01:22:19,953 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 207 states and 309 transitions. [2020-11-30 01:22:19,954 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:22:19,954 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 207 states to 206 states and 308 transitions. [2020-11-30 01:22:19,954 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:22:19,954 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:22:19,955 INFO L73 IsDeterministic]: Start isDeterministic. Operand 206 states and 308 transitions. [2020-11-30 01:22:19,955 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:22:19,955 INFO L691 BuchiCegarLoop]: Abstraction has 206 states and 308 transitions. [2020-11-30 01:22:19,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states and 308 transitions. [2020-11-30 01:22:19,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206. [2020-11-30 01:22:19,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2020-11-30 01:22:19,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 308 transitions. [2020-11-30 01:22:19,957 INFO L714 BuchiCegarLoop]: Abstraction has 206 states and 308 transitions. [2020-11-30 01:22:19,957 INFO L594 BuchiCegarLoop]: Abstraction has 206 states and 308 transitions. [2020-11-30 01:22:19,957 INFO L427 BuchiCegarLoop]: ======== Iteration 199============ [2020-11-30 01:22:19,957 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 206 states and 308 transitions. [2020-11-30 01:22:19,958 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:22:19,958 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:22:19,958 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:22:19,959 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [99, 1, 1, 1, 1, 1] [2020-11-30 01:22:19,959 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:22:19,959 INFO L794 eck$LassoCheckResult]: Stem: 257278#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 257275#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 257276#L26 main_~i~0 := 0; 257277#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257284#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257285#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257479#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257477#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257475#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257473#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257471#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257469#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257467#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257465#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257463#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257461#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257459#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257457#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257455#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257453#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257451#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257449#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257447#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257445#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257443#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257441#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257439#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257437#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257435#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257433#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257431#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257429#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257427#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257425#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257423#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257421#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257419#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257417#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257415#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257413#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257411#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257409#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257407#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257405#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257403#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257401#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257399#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257397#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257395#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257393#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257391#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257389#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257387#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257385#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257383#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257381#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257379#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257377#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257375#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257373#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257371#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257369#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257367#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257365#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257363#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257361#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257359#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257357#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257355#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257353#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257351#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257349#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257347#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257345#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257343#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257341#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257339#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257337#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257335#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257333#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257331#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257329#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257327#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257325#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257323#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257321#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257319#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257317#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257315#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257313#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257311#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257309#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257307#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257305#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257303#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257301#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257299#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257297#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257295#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257293#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257291#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257289#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 257287#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 257279#L29-2 assume main_~i~0 >= 100; 257280#L39 [2020-11-30 01:22:19,959 INFO L796 eck$LassoCheckResult]: Loop: 257280#L39 assume true; 257280#L39 [2020-11-30 01:22:19,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:19,959 INFO L82 PathProgramCache]: Analyzing trace with hash -1960242540, now seen corresponding path program 99 times [2020-11-30 01:22:19,959 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:19,960 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356073572] [2020-11-30 01:22:19,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:19,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:22:28,601 INFO L134 CoverageAnalysis]: Checked inductivity of 4950 backedges. 0 proven. 4950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:28,601 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356073572] [2020-11-30 01:22:28,601 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1331854470] [2020-11-30 01:22:28,601 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 201 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 201 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:22:28,716 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 51 check-sat command(s) [2020-11-30 01:22:28,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:22:28,718 INFO L263 TraceCheckSpWp]: Trace formula consists of 426 conjuncts, 101 conjunts are in the unsatisfiable core [2020-11-30 01:22:28,719 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:22:28,759 INFO L134 CoverageAnalysis]: Checked inductivity of 4950 backedges. 0 proven. 4950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:28,759 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:22:28,760 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [101, 101] total 102 [2020-11-30 01:22:28,760 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780216099] [2020-11-30 01:22:28,760 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:22:28,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:28,760 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 198 times [2020-11-30 01:22:28,760 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:28,760 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1199547223] [2020-11-30 01:22:28,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:28,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:28,761 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:28,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:28,761 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:28,762 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:22:28,766 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:22:28,766 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2020-11-30 01:22:28,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2020-11-30 01:22:28,767 INFO L87 Difference]: Start difference. First operand 206 states and 308 transitions. cyclomatic complexity: 105 Second operand 103 states. [2020-11-30 01:22:31,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:22:31,299 INFO L93 Difference]: Finished difference Result 5360 states and 5465 transitions. [2020-11-30 01:22:31,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2020-11-30 01:22:31,301 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5360 states and 5465 transitions. [2020-11-30 01:22:31,314 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2020-11-30 01:22:31,321 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5360 states to 5359 states and 5464 transitions. [2020-11-30 01:22:31,321 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2020-11-30 01:22:31,321 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2020-11-30 01:22:31,321 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5359 states and 5464 transitions. [2020-11-30 01:22:31,321 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:22:31,321 INFO L691 BuchiCegarLoop]: Abstraction has 5359 states and 5464 transitions. [2020-11-30 01:22:31,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5359 states and 5464 transitions. [2020-11-30 01:22:31,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5359 to 207. [2020-11-30 01:22:31,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2020-11-30 01:22:31,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 310 transitions. [2020-11-30 01:22:31,332 INFO L714 BuchiCegarLoop]: Abstraction has 207 states and 310 transitions. [2020-11-30 01:22:31,332 INFO L594 BuchiCegarLoop]: Abstraction has 207 states and 310 transitions. [2020-11-30 01:22:31,332 INFO L427 BuchiCegarLoop]: ======== Iteration 200============ [2020-11-30 01:22:31,332 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 207 states and 310 transitions. [2020-11-30 01:22:31,333 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:22:31,333 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:22:31,333 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:22:31,333 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [98, 1, 1, 1, 1, 1, 1, 1] [2020-11-30 01:22:31,333 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:22:31,333 INFO L794 eck$LassoCheckResult]: Stem: 263259#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 263256#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 263257#L26 main_~i~0 := 0; 263258#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 263262#L29-2 assume !(main_~i~0 >= 100);main_~j~0 := 0; 263263#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263267#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263462#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263461#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263460#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263459#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263458#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263457#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263456#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263455#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263454#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263453#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263452#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263451#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263450#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263449#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263448#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263447#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263446#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263445#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263444#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263443#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263442#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263441#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263440#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263439#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263438#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263437#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263436#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263435#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263434#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263433#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263432#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263431#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263430#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263429#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263428#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263427#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263426#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263425#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263424#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263423#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263422#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263421#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263420#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263419#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263418#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263417#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263416#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263415#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263414#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263413#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263412#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263411#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263410#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263409#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263408#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263407#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263406#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263405#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263404#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263403#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263402#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263401#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263400#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263399#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263398#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263397#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263396#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263395#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263394#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263393#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263392#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263391#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263390#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263389#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263388#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263387#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263386#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263385#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263384#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263383#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263382#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263381#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263380#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263379#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263378#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263377#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263376#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263375#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263374#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263373#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263372#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263371#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263370#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263369#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263368#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263367#L35-1 assume !!(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5;main_#t~post6 := main_~i~0;main_~i~0 := 1 + main_#t~post6;havoc main_#t~post6;main_#t~post7 := main_~j~0;main_~j~0 := 1 + main_#t~post7;havoc main_#t~post7; 263366#L35-1 assume !(0 != main_#t~nondet5 && main_~i~0 < 1000000);havoc main_#t~nondet5; 263264#L35-2 assume main_~j~0 >= 100; 263261#L39 [2020-11-30 01:22:31,333 INFO L796 eck$LassoCheckResult]: Loop: 263261#L39 assume true; 263261#L39 [2020-11-30 01:22:31,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:31,334 INFO L82 PathProgramCache]: Analyzing trace with hash -750582444, now seen corresponding path program 98 times [2020-11-30 01:22:31,334 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:31,334 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203723257] [2020-11-30 01:22:31,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:31,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-11-30 01:22:40,294 INFO L134 CoverageAnalysis]: Checked inductivity of 4851 backedges. 0 proven. 4851 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:40,294 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203723257] [2020-11-30 01:22:40,294 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1174745830] [2020-11-30 01:22:40,294 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/z3 Starting monitored process 202 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 202 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-11-30 01:22:40,412 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-11-30 01:22:40,413 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2020-11-30 01:22:40,415 INFO L263 TraceCheckSpWp]: Trace formula consists of 622 conjuncts, 100 conjunts are in the unsatisfiable core [2020-11-30 01:22:40,416 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2020-11-30 01:22:40,456 INFO L134 CoverageAnalysis]: Checked inductivity of 4851 backedges. 0 proven. 4851 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-11-30 01:22:40,456 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-11-30 01:22:40,456 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [100, 100] total 101 [2020-11-30 01:22:40,456 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693713756] [2020-11-30 01:22:40,457 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-11-30 01:22:40,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:40,457 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 199 times [2020-11-30 01:22:40,457 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:40,457 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976372025] [2020-11-30 01:22:40,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:40,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:40,458 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:40,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:40,458 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:40,458 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:22:40,462 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-11-30 01:22:40,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 102 interpolants. [2020-11-30 01:22:40,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2020-11-30 01:22:40,464 INFO L87 Difference]: Start difference. First operand 207 states and 310 transitions. cyclomatic complexity: 106 Second operand 102 states. [2020-11-30 01:22:40,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-11-30 01:22:40,869 INFO L93 Difference]: Finished difference Result 209 states and 312 transitions. [2020-11-30 01:22:40,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2020-11-30 01:22:40,871 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 209 states and 312 transitions. [2020-11-30 01:22:40,871 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:22:40,872 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 209 states to 208 states and 311 transitions. [2020-11-30 01:22:40,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2020-11-30 01:22:40,872 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2020-11-30 01:22:40,872 INFO L73 IsDeterministic]: Start isDeterministic. Operand 208 states and 311 transitions. [2020-11-30 01:22:40,872 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2020-11-30 01:22:40,872 INFO L691 BuchiCegarLoop]: Abstraction has 208 states and 311 transitions. [2020-11-30 01:22:40,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states and 311 transitions. [2020-11-30 01:22:40,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2020-11-30 01:22:40,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2020-11-30 01:22:40,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 311 transitions. [2020-11-30 01:22:40,874 INFO L714 BuchiCegarLoop]: Abstraction has 208 states and 311 transitions. [2020-11-30 01:22:40,874 INFO L594 BuchiCegarLoop]: Abstraction has 208 states and 311 transitions. [2020-11-30 01:22:40,874 INFO L427 BuchiCegarLoop]: ======== Iteration 201============ [2020-11-30 01:22:40,874 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 208 states and 311 transitions. [2020-11-30 01:22:40,874 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2020-11-30 01:22:40,874 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-11-30 01:22:40,874 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-11-30 01:22:40,875 INFO L852 BuchiCegarLoop]: Counterexample stem histogram [100, 1, 1, 1, 1, 1] [2020-11-30 01:22:40,875 INFO L853 BuchiCegarLoop]: Counterexample loop histogram [1] [2020-11-30 01:22:40,875 INFO L794 eck$LassoCheckResult]: Stem: 264092#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(9); 264089#L-1 havoc main_#res;havoc main_#t~post4, main_#t~nondet3, main_#t~post6, main_#t~post7, main_#t~nondet5, main_~i~0, main_~j~0;havoc main_~i~0;havoc main_~j~0; 264090#L26 main_~i~0 := 0; 264091#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264098#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264099#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264295#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264293#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264291#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264289#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264287#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264285#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264283#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264281#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264279#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264277#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264275#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264273#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264271#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264269#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264267#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264265#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264263#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264261#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264259#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264257#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264255#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264253#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264251#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264249#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264247#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264245#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264243#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264241#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264239#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264237#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264235#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264233#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264231#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264229#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264227#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264225#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264223#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264221#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264219#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264217#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264215#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264213#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264211#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264209#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264207#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264205#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264203#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264201#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264199#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264197#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264195#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264193#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264191#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264189#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264187#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264185#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264183#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264181#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264179#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264177#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264175#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264173#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264171#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264169#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264167#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264165#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264163#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264161#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264159#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264157#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264155#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264153#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264151#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264149#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264147#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264145#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264143#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264141#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264139#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264137#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264135#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264133#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264131#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264129#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264127#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264125#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264123#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264121#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264119#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264117#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264115#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264113#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264111#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264109#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264107#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264105#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264103#L29-1 assume !!(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3;main_#t~post4 := main_~i~0;main_~i~0 := 1 + main_#t~post4;havoc main_#t~post4; 264101#L29-1 assume !(0 != main_#t~nondet3 && main_~i~0 < 1000000);havoc main_#t~nondet3; 264093#L29-2 assume main_~i~0 >= 100; 264094#L39 [2020-11-30 01:22:40,875 INFO L796 eck$LassoCheckResult]: Loop: 264094#L39 assume true; 264094#L39 [2020-11-30 01:22:40,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:40,876 INFO L82 PathProgramCache]: Analyzing trace with hash -637974903, now seen corresponding path program 100 times [2020-11-30 01:22:40,876 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:40,876 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911040333] [2020-11-30 01:22:40,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:40,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:40,909 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:40,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:41,004 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:41,035 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:22:41,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:41,035 INFO L82 PathProgramCache]: Analyzing trace with hash 91, now seen corresponding path program 200 times [2020-11-30 01:22:41,035 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:41,035 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535545998] [2020-11-30 01:22:41,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:41,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:41,040 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:41,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:41,041 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:41,041 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:22:41,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-11-30 01:22:41,042 INFO L82 PathProgramCache]: Analyzing trace with hash 1697614547, now seen corresponding path program 1 times [2020-11-30 01:22:41,042 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-11-30 01:22:41,042 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998225162] [2020-11-30 01:22:41,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-11-30 01:22:41,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:41,100 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:41,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-11-30 01:22:41,137 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-11-30 01:22:41,151 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-11-30 01:22:51,451 WARN L193 SmtUtils]: Spent 10.27 s on a formula simplification. DAG size of input: 756 DAG size of output: 646 [2020-11-30 01:22:51,800 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 30.11 01:22:51 BoogieIcfgContainer [2020-11-30 01:22:51,800 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2020-11-30 01:22:51,801 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2020-11-30 01:22:51,801 INFO L271 PluginConnector]: Initializing Witness Printer... [2020-11-30 01:22:51,801 INFO L275 PluginConnector]: Witness Printer initialized [2020-11-30 01:22:51,802 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.11 01:12:34" (3/4) ... [2020-11-30 01:22:51,805 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2020-11-30 01:22:51,892 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0d43bafb-8cab-4748-bdf0-065b28069b2a/bin/uautomizer/witness.graphml [2020-11-30 01:22:51,892 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2020-11-30 01:22:51,893 INFO L168 Benchmark]: Toolchain (without parser) took 617692.72 ms. Allocated memory was 88.1 MB in the beginning and 696.3 MB in the end (delta: 608.2 MB). Free memory was 56.3 MB in the beginning and 445.2 MB in the end (delta: -389.0 MB). Peak memory consumption was 218.9 MB. Max. memory is 16.1 GB. [2020-11-30 01:22:51,893 INFO L168 Benchmark]: CDTParser took 0.97 ms. Allocated memory is still 88.1 MB. Free memory was 45.7 MB in the beginning and 45.6 MB in the end (delta: 63.1 kB). There was no memory consumed. Max. memory is 16.1 GB. [2020-11-30 01:22:51,894 INFO L168 Benchmark]: CACSL2BoogieTranslator took 246.87 ms. Allocated memory is still 88.1 MB. Free memory was 56.1 MB in the beginning and 65.2 MB in the end (delta: -9.1 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2020-11-30 01:22:51,894 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.65 ms. Allocated memory is still 88.1 MB. Free memory was 65.2 MB in the beginning and 63.8 MB in the end (delta: 1.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2020-11-30 01:22:51,895 INFO L168 Benchmark]: Boogie Preprocessor took 43.16 ms. Allocated memory is still 88.1 MB. Free memory was 63.8 MB in the beginning and 62.7 MB in the end (delta: 1.1 MB). There was no memory consumed. Max. memory is 16.1 GB. [2020-11-30 01:22:51,895 INFO L168 Benchmark]: RCFGBuilder took 460.95 ms. Allocated memory is still 88.1 MB. Free memory was 62.7 MB in the beginning and 51.6 MB in the end (delta: 11.1 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2020-11-30 01:22:51,895 INFO L168 Benchmark]: BuchiAutomizer took 616802.84 ms. Allocated memory was 88.1 MB in the beginning and 696.3 MB in the end (delta: 608.2 MB). Free memory was 51.2 MB in the beginning and 450.5 MB in the end (delta: -399.3 MB). Peak memory consumption was 511.3 MB. Max. memory is 16.1 GB. [2020-11-30 01:22:51,896 INFO L168 Benchmark]: Witness Printer took 91.18 ms. Allocated memory is still 696.3 MB. Free memory was 450.5 MB in the beginning and 445.2 MB in the end (delta: 5.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2020-11-30 01:22:51,898 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.97 ms. Allocated memory is still 88.1 MB. Free memory was 45.7 MB in the beginning and 45.6 MB in the end (delta: 63.1 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 246.87 ms. Allocated memory is still 88.1 MB. Free memory was 56.1 MB in the beginning and 65.2 MB in the end (delta: -9.1 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 41.65 ms. Allocated memory is still 88.1 MB. Free memory was 65.2 MB in the beginning and 63.8 MB in the end (delta: 1.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 43.16 ms. Allocated memory is still 88.1 MB. Free memory was 63.8 MB in the beginning and 62.7 MB in the end (delta: 1.1 MB). There was no memory consumed. Max. memory is 16.1 GB. * RCFGBuilder took 460.95 ms. Allocated memory is still 88.1 MB. Free memory was 62.7 MB in the beginning and 51.6 MB in the end (delta: 11.1 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 616802.84 ms. Allocated memory was 88.1 MB in the beginning and 696.3 MB in the end (delta: 608.2 MB). Free memory was 51.2 MB in the beginning and 450.5 MB in the end (delta: -399.3 MB). Peak memory consumption was 511.3 MB. Max. memory is 16.1 GB. * Witness Printer took 91.18 ms. Allocated memory is still 696.3 MB. Free memory was 450.5 MB in the beginning and 445.2 MB in the end (delta: 5.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 200 terminating modules (199 trivial, 1 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -2 * i + 1999999 and consists of 4 locations. 199 modules have a trivial ranking function, the largest among these consists of 103 locations. The remainder module has 208 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 616.7s and 201 iterations. TraceHistogramMax:100. Analysis of lassos took 517.3s. Construction of modules took 38.4s. Büchi inclusion checks took 58.4s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 200. Automata minimization 0.7s AutomataMinimizationTime, 200 MinimizatonAttempts, 177054 StatesRemovedByMinimization, 101 NontrivialMinimizations. Non-live state removal took 1.0s Buchi closure took 0.0s. Biggest automaton had 208 states and ocurred in iteration 200. Nontrivial modules had stage [1, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 1602 SDtfs, 22891 SDslu, 23945 SDs, 0 SdLazy, 37776 SolverSat, 11436 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 38.4s Time LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc0 concLT0 SILN199 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital14 mio100 ax100 hnf100 lsp71 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq160 hnf93 smp100 dnf100 smp100 tf113 neg100 sie111 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: sat Degree: 0 Time: 121ms VariablesStem: 0 VariablesLoop: 2 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 0 MotzkinApplications: 2 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 1 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 24]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=19080} State at position 1 is {NULL=0, NULL=0, NULL=19082, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTUnaryExpression@5e6d5f84=0, NULL=19080, i=100, org.eclipse.cdt.internal.core.dom.parser.c.CASTUnaryExpression@33985f9a=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTUnaryExpression@2ae92ac5=0, j=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@507f4b12=0, NULL=19081, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@65e8f020=0, NULL=0, NULL=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 24]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L25] int i, j; [L27] i = 0 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L32] STUCK: goto STUCK; End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...