./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/token_ring.01.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4e77c044 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/token_ring.01.cil-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6325feb12f40756470caf3b12878fd0ec9ad6f61 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-4e77c04 [2021-10-13 01:12:35,106 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-13 01:12:35,108 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-13 01:12:35,148 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-13 01:12:35,149 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-13 01:12:35,151 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-13 01:12:35,153 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-13 01:12:35,156 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-13 01:12:35,159 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-13 01:12:35,160 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-13 01:12:35,162 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-13 01:12:35,163 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-13 01:12:35,164 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-13 01:12:35,166 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-13 01:12:35,168 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-13 01:12:35,170 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-13 01:12:35,172 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-13 01:12:35,173 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-13 01:12:35,177 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-13 01:12:35,180 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-13 01:12:35,182 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-13 01:12:35,185 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-13 01:12:35,187 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-13 01:12:35,188 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-13 01:12:35,193 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-13 01:12:35,193 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-13 01:12:35,194 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-13 01:12:35,195 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-13 01:12:35,196 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-13 01:12:35,198 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-13 01:12:35,198 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-13 01:12:35,200 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-13 01:12:35,201 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-13 01:12:35,202 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-13 01:12:35,204 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-13 01:12:35,205 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-13 01:12:35,206 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-13 01:12:35,207 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-13 01:12:35,207 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-13 01:12:35,209 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-13 01:12:35,210 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-13 01:12:35,211 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-10-13 01:12:35,244 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-13 01:12:35,245 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-13 01:12:35,245 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-13 01:12:35,246 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-13 01:12:35,247 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-13 01:12:35,248 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-13 01:12:35,248 INFO L138 SettingsManager]: * Use SBE=true [2021-10-13 01:12:35,249 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-13 01:12:35,249 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-13 01:12:35,249 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-13 01:12:35,250 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-13 01:12:35,250 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-13 01:12:35,251 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-13 01:12:35,255 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-13 01:12:35,255 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-13 01:12:35,256 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-13 01:12:35,256 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-13 01:12:35,257 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-13 01:12:35,257 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-13 01:12:35,257 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-13 01:12:35,258 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-13 01:12:35,258 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-13 01:12:35,259 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-13 01:12:35,259 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-13 01:12:35,260 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-13 01:12:35,260 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-13 01:12:35,260 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-13 01:12:35,261 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-13 01:12:35,261 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-13 01:12:35,261 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-13 01:12:35,261 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-13 01:12:35,262 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-13 01:12:35,263 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-13 01:12:35,263 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6325feb12f40756470caf3b12878fd0ec9ad6f61 [2021-10-13 01:12:35,564 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-13 01:12:35,596 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-13 01:12:35,599 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-13 01:12:35,600 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-13 01:12:35,602 INFO L275 PluginConnector]: CDTParser initialized [2021-10-13 01:12:35,603 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/../../sv-benchmarks/c/systemc/token_ring.01.cil-1.c [2021-10-13 01:12:35,702 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/data/f5bcc9ca3/a8a2aab73e24416da661c50857b80235/FLAG843a79dbd [2021-10-13 01:12:36,263 INFO L306 CDTParser]: Found 1 translation units. [2021-10-13 01:12:36,264 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/sv-benchmarks/c/systemc/token_ring.01.cil-1.c [2021-10-13 01:12:36,275 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/data/f5bcc9ca3/a8a2aab73e24416da661c50857b80235/FLAG843a79dbd [2021-10-13 01:12:36,621 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/data/f5bcc9ca3/a8a2aab73e24416da661c50857b80235 [2021-10-13 01:12:36,624 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-13 01:12:36,626 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-13 01:12:36,628 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-13 01:12:36,628 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-13 01:12:36,632 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-13 01:12:36,633 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 01:12:36" (1/1) ... [2021-10-13 01:12:36,635 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@418d2e59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:36, skipping insertion in model container [2021-10-13 01:12:36,635 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 01:12:36" (1/1) ... [2021-10-13 01:12:36,644 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-13 01:12:36,684 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-13 01:12:36,944 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/sv-benchmarks/c/systemc/token_ring.01.cil-1.c[366,379] [2021-10-13 01:12:37,000 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 01:12:37,016 INFO L203 MainTranslator]: Completed pre-run [2021-10-13 01:12:37,041 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/sv-benchmarks/c/systemc/token_ring.01.cil-1.c[366,379] [2021-10-13 01:12:37,107 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 01:12:37,138 INFO L208 MainTranslator]: Completed translation [2021-10-13 01:12:37,139 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37 WrapperNode [2021-10-13 01:12:37,140 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-13 01:12:37,143 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-13 01:12:37,143 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-13 01:12:37,143 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-13 01:12:37,152 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,180 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,240 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-13 01:12:37,241 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-13 01:12:37,241 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-13 01:12:37,241 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-13 01:12:37,257 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,257 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,273 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,273 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,291 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,318 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,320 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,324 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-13 01:12:37,325 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-13 01:12:37,325 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-13 01:12:37,326 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-13 01:12:37,334 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (1/1) ... [2021-10-13 01:12:37,343 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-13 01:12:37,357 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:12:37,385 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-13 01:12:37,404 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-13 01:12:37,446 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-13 01:12:37,446 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-13 01:12:37,446 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-13 01:12:37,447 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-13 01:12:38,131 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-13 01:12:38,131 INFO L299 CfgBuilder]: Removed 80 assume(true) statements. [2021-10-13 01:12:38,134 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 01:12:38 BoogieIcfgContainer [2021-10-13 01:12:38,134 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-13 01:12:38,135 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-13 01:12:38,136 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-13 01:12:38,140 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-13 01:12:38,141 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-13 01:12:38,141 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.10 01:12:36" (1/3) ... [2021-10-13 01:12:38,148 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@66b62505 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.10 01:12:38, skipping insertion in model container [2021-10-13 01:12:38,148 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-13 01:12:38,148 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:12:37" (2/3) ... [2021-10-13 01:12:38,149 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@66b62505 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.10 01:12:38, skipping insertion in model container [2021-10-13 01:12:38,149 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-13 01:12:38,149 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 01:12:38" (3/3) ... [2021-10-13 01:12:38,151 INFO L389 chiAutomizerObserver]: Analyzing ICFG token_ring.01.cil-1.c [2021-10-13 01:12:38,214 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-13 01:12:38,215 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-13 01:12:38,215 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-13 01:12:38,215 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-13 01:12:38,215 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-13 01:12:38,216 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-13 01:12:38,216 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-13 01:12:38,216 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-13 01:12:38,241 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 140 states, 139 states have (on average 1.5683453237410072) internal successors, (218), 139 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:38,293 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 109 [2021-10-13 01:12:38,294 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:38,294 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:38,303 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:38,304 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:38,304 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-13 01:12:38,305 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 140 states, 139 states have (on average 1.5683453237410072) internal successors, (218), 139 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:38,318 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 109 [2021-10-13 01:12:38,318 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:38,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:38,322 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:38,322 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:38,329 INFO L791 eck$LassoCheckResult]: Stem: 126#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 37#L-1true havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 50#L383true havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 43#L155true assume !(1 == ~m_i~0);~m_st~0 := 2; 41#L162-1true assume 1 == ~t1_i~0;~t1_st~0 := 0; 121#L167-1true assume !(0 == ~M_E~0); 28#L251-1true assume !(0 == ~T1_E~0); 65#L256-1true assume !(0 == ~E_M~0); 79#L261-1true assume !(0 == ~E_1~0); 29#L266-1true havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 26#L116true assume !(1 == ~m_pc~0); 120#L116-2true is_master_triggered_~__retres1~0 := 0; 129#L127true is_master_triggered_#res := is_master_triggered_~__retres1~0; 56#L128true activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 46#L311true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 103#L311-2true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 108#L135true assume 1 == ~t1_pc~0; 15#L136true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 92#L146true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 123#L147true activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 142#L319true assume !(0 != activate_threads_~tmp___0~0); 16#L319-2true assume !(1 == ~M_E~0); 133#L279-1true assume !(1 == ~T1_E~0); 44#L284-1true assume !(1 == ~E_M~0); 5#L289-1true assume 1 == ~E_1~0;~E_1~0 := 2; 42#L420-1true [2021-10-13 01:12:38,331 INFO L793 eck$LassoCheckResult]: Loop: 42#L420-1true assume !false; 30#L421true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 12#L226true assume !true; 27#L241true start_simulation_~kernel_st~0 := 2; 59#L155-1true start_simulation_~kernel_st~0 := 3; 51#L251-2true assume 0 == ~M_E~0;~M_E~0 := 1; 122#L251-4true assume 0 == ~T1_E~0;~T1_E~0 := 1; 98#L256-3true assume 0 == ~E_M~0;~E_M~0 := 1; 104#L261-3true assume !(0 == ~E_1~0); 34#L266-3true havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 18#L116-9true assume 1 == ~m_pc~0; 6#L117-3true assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 137#L127-3true is_master_triggered_#res := is_master_triggered_~__retres1~0; 52#L128-3true activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 101#L311-9true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 134#L311-11true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 45#L135-9true assume 1 == ~t1_pc~0; 17#L136-3true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 78#L146-3true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 87#L147-3true activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 81#L319-9true assume !(0 != activate_threads_~tmp___0~0); 38#L319-11true assume 1 == ~M_E~0;~M_E~0 := 2; 57#L279-3true assume 1 == ~T1_E~0;~T1_E~0 := 2; 86#L284-3true assume 1 == ~E_M~0;~E_M~0 := 2; 118#L289-3true assume 1 == ~E_1~0;~E_1~0 := 2; 33#L294-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 97#L180-1true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 138#L192-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 105#L193-1true start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 61#L439true assume !(0 == start_simulation_~tmp~3); 39#L439-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 10#L180-2true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 99#L192-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 47#L193-2true stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 14#L394true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 8#L401true stop_simulation_#res := stop_simulation_~__retres2~0; 91#L402true start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 77#L452true assume !(0 != start_simulation_~tmp___0~1); 42#L420-1true [2021-10-13 01:12:38,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:38,337 INFO L82 PathProgramCache]: Analyzing trace with hash 22332154, now seen corresponding path program 1 times [2021-10-13 01:12:38,346 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:38,347 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121602180] [2021-10-13 01:12:38,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:38,348 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:38,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:38,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:38,553 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:38,554 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121602180] [2021-10-13 01:12:38,554 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2121602180] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:38,555 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:38,555 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:12:38,557 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563912843] [2021-10-13 01:12:38,563 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-13 01:12:38,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:38,564 INFO L82 PathProgramCache]: Analyzing trace with hash -2064875915, now seen corresponding path program 1 times [2021-10-13 01:12:38,565 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:38,565 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [717240197] [2021-10-13 01:12:38,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:38,566 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:38,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:38,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:38,608 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:38,608 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [717240197] [2021-10-13 01:12:38,609 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [717240197] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:38,609 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:38,609 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-13 01:12:38,609 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210085249] [2021-10-13 01:12:38,611 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:38,612 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:38,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:12:38,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:12:38,661 INFO L87 Difference]: Start difference. First operand has 140 states, 139 states have (on average 1.5683453237410072) internal successors, (218), 139 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:38,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:38,725 INFO L93 Difference]: Finished difference Result 140 states and 208 transitions. [2021-10-13 01:12:38,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:12:38,729 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 140 states and 208 transitions. [2021-10-13 01:12:38,736 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 108 [2021-10-13 01:12:38,750 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 140 states to 135 states and 203 transitions. [2021-10-13 01:12:38,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 135 [2021-10-13 01:12:38,752 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 135 [2021-10-13 01:12:38,752 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 203 transitions. [2021-10-13 01:12:38,754 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:38,754 INFO L681 BuchiCegarLoop]: Abstraction has 135 states and 203 transitions. [2021-10-13 01:12:38,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 203 transitions. [2021-10-13 01:12:38,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2021-10-13 01:12:38,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 135 states have (on average 1.5037037037037038) internal successors, (203), 134 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:38,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 203 transitions. [2021-10-13 01:12:38,793 INFO L704 BuchiCegarLoop]: Abstraction has 135 states and 203 transitions. [2021-10-13 01:12:38,794 INFO L587 BuchiCegarLoop]: Abstraction has 135 states and 203 transitions. [2021-10-13 01:12:38,794 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-13 01:12:38,794 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 135 states and 203 transitions. [2021-10-13 01:12:38,797 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 108 [2021-10-13 01:12:38,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:38,798 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:38,800 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:38,800 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:38,801 INFO L791 eck$LassoCheckResult]: Stem: 422#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 354#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 355#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 362#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 360#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 361#L167-1 assume !(0 == ~M_E~0); 340#L251-1 assume !(0 == ~T1_E~0); 341#L256-1 assume !(0 == ~E_M~0); 388#L261-1 assume !(0 == ~E_1~0); 342#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 337#L116 assume !(1 == ~m_pc~0); 299#L116-2 is_master_triggered_~__retres1~0 := 0; 298#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 379#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 365#L311 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 366#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 414#L135 assume 1 == ~t1_pc~0; 316#L136 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 317#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 405#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 420#L319 assume !(0 != activate_threads_~tmp___0~0); 319#L319-2 assume !(1 == ~M_E~0); 320#L279-1 assume !(1 == ~T1_E~0); 363#L284-1 assume !(1 == ~E_M~0); 292#L289-1 assume 1 == ~E_1~0;~E_1~0 := 2; 293#L420-1 [2021-10-13 01:12:38,801 INFO L793 eck$LassoCheckResult]: Loop: 293#L420-1 assume !false; 343#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 310#L226 assume !false; 311#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 289#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 290#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 384#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 385#L207 assume !(0 != eval_~tmp~0); 338#L241 start_simulation_~kernel_st~0 := 2; 339#L155-1 start_simulation_~kernel_st~0 := 3; 371#L251-2 assume 0 == ~M_E~0;~M_E~0 := 1; 372#L251-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 411#L256-3 assume 0 == ~E_M~0;~E_M~0 := 1; 412#L261-3 assume !(0 == ~E_1~0); 353#L266-3 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 324#L116-9 assume 1 == ~m_pc~0; 294#L117-3 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 295#L127-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 373#L128-3 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 374#L311-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 413#L311-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 364#L135-9 assume 1 == ~t1_pc~0; 321#L136-3 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 322#L146-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 397#L147-3 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 398#L319-9 assume !(0 != activate_threads_~tmp___0~0); 356#L319-11 assume 1 == ~M_E~0;~M_E~0 := 2; 357#L279-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 380#L284-3 assume 1 == ~E_M~0;~E_M~0 := 2; 400#L289-3 assume 1 == ~E_1~0;~E_1~0 := 2; 350#L294-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 351#L180-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 410#L192-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 415#L193-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 382#L439 assume !(0 == start_simulation_~tmp~3); 334#L439-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 305#L180-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 306#L192-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 367#L193-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 315#L394 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 300#L401 stop_simulation_#res := stop_simulation_~__retres2~0; 301#L402 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 396#L452 assume !(0 != start_simulation_~tmp___0~1); 293#L420-1 [2021-10-13 01:12:38,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:38,802 INFO L82 PathProgramCache]: Analyzing trace with hash -196522564, now seen corresponding path program 1 times [2021-10-13 01:12:38,803 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:38,803 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659307720] [2021-10-13 01:12:38,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:38,804 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:38,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:38,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:38,940 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:38,941 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659307720] [2021-10-13 01:12:38,941 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1659307720] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:38,942 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:38,942 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 01:12:38,943 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [622976959] [2021-10-13 01:12:38,944 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-13 01:12:38,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:38,949 INFO L82 PathProgramCache]: Analyzing trace with hash 1294122548, now seen corresponding path program 1 times [2021-10-13 01:12:38,949 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:38,950 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664567646] [2021-10-13 01:12:38,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:38,951 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:38,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:39,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:39,067 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:39,068 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664567646] [2021-10-13 01:12:39,068 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664567646] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:39,068 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:39,068 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 01:12:39,069 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [669968753] [2021-10-13 01:12:39,069 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:39,070 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:39,071 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 01:12:39,071 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:12:39,071 INFO L87 Difference]: Start difference. First operand 135 states and 203 transitions. cyclomatic complexity: 69 Second operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:39,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:39,323 INFO L93 Difference]: Finished difference Result 340 states and 504 transitions. [2021-10-13 01:12:39,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 01:12:39,324 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 340 states and 504 transitions. [2021-10-13 01:12:39,338 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 288 [2021-10-13 01:12:39,347 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 340 states to 340 states and 504 transitions. [2021-10-13 01:12:39,347 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 340 [2021-10-13 01:12:39,349 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 340 [2021-10-13 01:12:39,350 INFO L73 IsDeterministic]: Start isDeterministic. Operand 340 states and 504 transitions. [2021-10-13 01:12:39,359 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:39,360 INFO L681 BuchiCegarLoop]: Abstraction has 340 states and 504 transitions. [2021-10-13 01:12:39,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states and 504 transitions. [2021-10-13 01:12:39,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 150. [2021-10-13 01:12:39,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 150 states have (on average 1.4533333333333334) internal successors, (218), 149 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:39,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 218 transitions. [2021-10-13 01:12:39,391 INFO L704 BuchiCegarLoop]: Abstraction has 150 states and 218 transitions. [2021-10-13 01:12:39,391 INFO L587 BuchiCegarLoop]: Abstraction has 150 states and 218 transitions. [2021-10-13 01:12:39,391 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-13 01:12:39,391 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 150 states and 218 transitions. [2021-10-13 01:12:39,394 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 120 [2021-10-13 01:12:39,395 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:39,395 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:39,406 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:39,406 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:39,407 INFO L791 eck$LassoCheckResult]: Stem: 921#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 844#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 845#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 853#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 850#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 851#L167-1 assume !(0 == ~M_E~0); 830#L251-1 assume !(0 == ~T1_E~0); 831#L256-1 assume !(0 == ~E_M~0); 880#L261-1 assume !(0 == ~E_1~0); 832#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 829#L116 assume !(1 == ~m_pc~0); 789#L116-2 is_master_triggered_~__retres1~0 := 0; 917#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 927#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 855#L311 assume !(0 != activate_threads_~tmp~1); 856#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 909#L135 assume 1 == ~t1_pc~0; 806#L136 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 807#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 900#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 918#L319 assume !(0 != activate_threads_~tmp___0~0); 809#L319-2 assume !(1 == ~M_E~0); 810#L279-1 assume !(1 == ~T1_E~0); 854#L284-1 assume !(1 == ~E_M~0); 782#L289-1 assume 1 == ~E_1~0;~E_1~0 := 2; 783#L420-1 [2021-10-13 01:12:39,407 INFO L793 eck$LassoCheckResult]: Loop: 783#L420-1 assume !false; 833#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 800#L226 assume !false; 801#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 779#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 780#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 873#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 874#L207 assume !(0 != eval_~tmp~0); 827#L241 start_simulation_~kernel_st~0 := 2; 828#L155-1 start_simulation_~kernel_st~0 := 3; 861#L251-2 assume 0 == ~M_E~0;~M_E~0 := 1; 862#L251-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 905#L256-3 assume 0 == ~E_M~0;~E_M~0 := 1; 906#L261-3 assume !(0 == ~E_1~0); 843#L266-3 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 814#L116-9 assume 1 == ~m_pc~0; 784#L117-3 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 785#L127-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 863#L128-3 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 864#L311-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 908#L311-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 852#L135-9 assume 1 == ~t1_pc~0; 811#L136-3 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 812#L146-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 890#L147-3 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 891#L319-9 assume !(0 != activate_threads_~tmp___0~0); 846#L319-11 assume 1 == ~M_E~0;~M_E~0 := 2; 847#L279-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 869#L284-3 assume 1 == ~E_M~0;~E_M~0 := 2; 894#L289-3 assume 1 == ~E_1~0;~E_1~0 := 2; 840#L294-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 841#L180-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 904#L192-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 910#L193-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 875#L439 assume !(0 == start_simulation_~tmp~3); 824#L439-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 795#L180-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 796#L192-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 857#L193-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 805#L394 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 790#L401 stop_simulation_#res := stop_simulation_~__retres2~0; 791#L402 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 889#L452 assume !(0 != start_simulation_~tmp___0~1); 783#L420-1 [2021-10-13 01:12:39,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:39,408 INFO L82 PathProgramCache]: Analyzing trace with hash 504542014, now seen corresponding path program 1 times [2021-10-13 01:12:39,408 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:39,409 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140055136] [2021-10-13 01:12:39,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:39,409 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:39,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:39,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:39,519 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:39,519 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140055136] [2021-10-13 01:12:39,519 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [140055136] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:39,520 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:39,520 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:12:39,520 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324312278] [2021-10-13 01:12:39,521 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-13 01:12:39,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:39,525 INFO L82 PathProgramCache]: Analyzing trace with hash 1294122548, now seen corresponding path program 2 times [2021-10-13 01:12:39,526 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:39,526 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824320964] [2021-10-13 01:12:39,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:39,527 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:39,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:39,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:39,632 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:39,633 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1824320964] [2021-10-13 01:12:39,634 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1824320964] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:39,634 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:39,634 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 01:12:39,635 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953592579] [2021-10-13 01:12:39,636 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:39,636 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:39,638 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:12:39,638 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:12:39,638 INFO L87 Difference]: Start difference. First operand 150 states and 218 transitions. cyclomatic complexity: 69 Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:39,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:39,767 INFO L93 Difference]: Finished difference Result 335 states and 469 transitions. [2021-10-13 01:12:39,767 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 01:12:39,768 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 335 states and 469 transitions. [2021-10-13 01:12:39,773 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 290 [2021-10-13 01:12:39,777 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 335 states to 335 states and 469 transitions. [2021-10-13 01:12:39,777 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 335 [2021-10-13 01:12:39,778 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 335 [2021-10-13 01:12:39,778 INFO L73 IsDeterministic]: Start isDeterministic. Operand 335 states and 469 transitions. [2021-10-13 01:12:39,779 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:39,779 INFO L681 BuchiCegarLoop]: Abstraction has 335 states and 469 transitions. [2021-10-13 01:12:39,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states and 469 transitions. [2021-10-13 01:12:39,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 313. [2021-10-13 01:12:39,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 313 states, 313 states have (on average 1.4185303514376997) internal successors, (444), 312 states have internal predecessors, (444), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:39,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 313 states to 313 states and 444 transitions. [2021-10-13 01:12:39,797 INFO L704 BuchiCegarLoop]: Abstraction has 313 states and 444 transitions. [2021-10-13 01:12:39,797 INFO L587 BuchiCegarLoop]: Abstraction has 313 states and 444 transitions. [2021-10-13 01:12:39,797 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-13 01:12:39,797 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 313 states and 444 transitions. [2021-10-13 01:12:39,800 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 283 [2021-10-13 01:12:39,800 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:39,801 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:39,802 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:39,802 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:39,802 INFO L791 eck$LassoCheckResult]: Stem: 1426#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 1338#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 1339#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 1350#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 1346#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1347#L167-1 assume !(0 == ~M_E~0); 1323#L251-1 assume !(0 == ~T1_E~0); 1324#L256-1 assume !(0 == ~E_M~0); 1379#L261-1 assume !(0 == ~E_1~0); 1325#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1320#L116 assume !(1 == ~m_pc~0); 1321#L116-2 is_master_triggered_~__retres1~0 := 0; 1421#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1368#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1352#L311 assume !(0 != activate_threads_~tmp~1); 1353#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1412#L135 assume !(1 == ~t1_pc~0); 1336#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 1337#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1401#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1422#L319 assume !(0 != activate_threads_~tmp___0~0); 1300#L319-2 assume !(1 == ~M_E~0); 1301#L279-1 assume !(1 == ~T1_E~0); 1351#L284-1 assume !(1 == ~E_M~0); 1279#L289-1 assume 1 == ~E_1~0;~E_1~0 := 2; 1280#L420-1 [2021-10-13 01:12:39,803 INFO L793 eck$LassoCheckResult]: Loop: 1280#L420-1 assume !false; 1558#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 1384#L226 assume !false; 1555#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1554#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1526#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1370#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 1371#L207 assume !(0 != eval_~tmp~0); 1318#L241 start_simulation_~kernel_st~0 := 2; 1319#L155-1 start_simulation_~kernel_st~0 := 3; 1358#L251-2 assume 0 == ~M_E~0;~M_E~0 := 1; 1359#L251-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 1406#L256-3 assume 0 == ~E_M~0;~E_M~0 := 1; 1407#L261-3 assume !(0 == ~E_1~0); 1335#L266-3 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1305#L116-9 assume !(1 == ~m_pc~0); 1306#L116-11 is_master_triggered_~__retres1~0 := 0; 1393#L127-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1360#L128-3 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1361#L311-9 assume !(0 != activate_threads_~tmp~1); 1409#L311-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1348#L135-9 assume !(1 == ~t1_pc~0); 1349#L135-11 is_transmit1_triggered_~__retres1~1 := 0; 1543#L146-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1541#L147-3 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1539#L319-9 assume !(0 != activate_threads_~tmp___0~0); 1524#L319-11 assume 1 == ~M_E~0;~M_E~0 := 2; 1525#L279-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1536#L284-3 assume 1 == ~E_M~0;~E_M~0 := 2; 1534#L289-3 assume 1 == ~E_1~0;~E_1~0 := 2; 1533#L294-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1532#L180-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1530#L192-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1529#L193-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 1527#L439 assume !(0 == start_simulation_~tmp~3); 1528#L439-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1571#L180-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1569#L192-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1568#L193-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 1567#L394 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1565#L401 stop_simulation_#res := stop_simulation_~__retres2~0; 1563#L402 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 1561#L452 assume !(0 != start_simulation_~tmp___0~1); 1280#L420-1 [2021-10-13 01:12:39,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:39,803 INFO L82 PathProgramCache]: Analyzing trace with hash -1690777217, now seen corresponding path program 1 times [2021-10-13 01:12:39,803 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:39,804 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796822661] [2021-10-13 01:12:39,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:39,804 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:39,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:39,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:39,850 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:39,850 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796822661] [2021-10-13 01:12:39,851 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [796822661] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:39,851 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:39,851 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-13 01:12:39,851 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175589519] [2021-10-13 01:12:39,852 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-13 01:12:39,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:39,853 INFO L82 PathProgramCache]: Analyzing trace with hash 738283376, now seen corresponding path program 1 times [2021-10-13 01:12:39,853 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:39,853 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866219824] [2021-10-13 01:12:39,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:39,854 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:39,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:39,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:39,939 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:39,940 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [866219824] [2021-10-13 01:12:39,941 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [866219824] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:39,941 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:39,942 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 01:12:39,943 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [327597431] [2021-10-13 01:12:39,944 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:39,946 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:39,947 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:12:39,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:12:39,948 INFO L87 Difference]: Start difference. First operand 313 states and 444 transitions. cyclomatic complexity: 133 Second operand has 4 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:40,104 INFO L93 Difference]: Finished difference Result 631 states and 868 transitions. [2021-10-13 01:12:40,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 01:12:40,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 631 states and 868 transitions. [2021-10-13 01:12:40,112 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 553 [2021-10-13 01:12:40,120 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 631 states to 631 states and 868 transitions. [2021-10-13 01:12:40,120 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 631 [2021-10-13 01:12:40,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 631 [2021-10-13 01:12:40,121 INFO L73 IsDeterministic]: Start isDeterministic. Operand 631 states and 868 transitions. [2021-10-13 01:12:40,123 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:40,123 INFO L681 BuchiCegarLoop]: Abstraction has 631 states and 868 transitions. [2021-10-13 01:12:40,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 631 states and 868 transitions. [2021-10-13 01:12:40,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 631 to 612. [2021-10-13 01:12:40,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 612 states, 612 states have (on average 1.3774509803921569) internal successors, (843), 611 states have internal predecessors, (843), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 612 states to 612 states and 843 transitions. [2021-10-13 01:12:40,143 INFO L704 BuchiCegarLoop]: Abstraction has 612 states and 843 transitions. [2021-10-13 01:12:40,143 INFO L587 BuchiCegarLoop]: Abstraction has 612 states and 843 transitions. [2021-10-13 01:12:40,144 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-13 01:12:40,144 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 612 states and 843 transitions. [2021-10-13 01:12:40,149 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 549 [2021-10-13 01:12:40,149 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:40,150 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:40,151 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,151 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,151 INFO L791 eck$LassoCheckResult]: Stem: 2388#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 2291#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 2292#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2303#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 2299#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2300#L167-1 assume !(0 == ~M_E~0); 2276#L251-1 assume !(0 == ~T1_E~0); 2277#L256-1 assume 0 == ~E_M~0;~E_M~0 := 1; 2332#L261-1 assume 0 == ~E_1~0;~E_1~0 := 1; 2346#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2655#L116 assume !(1 == ~m_pc~0); 2653#L116-2 is_master_triggered_~__retres1~0 := 0; 2651#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2649#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2648#L311 assume !(0 != activate_threads_~tmp~1); 2645#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2643#L135 assume !(1 == ~t1_pc~0); 2640#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 2638#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2636#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2395#L319 assume !(0 != activate_threads_~tmp___0~0); 2254#L319-2 assume !(1 == ~M_E~0); 2255#L279-1 assume !(1 == ~T1_E~0); 2629#L284-1 assume !(1 == ~E_M~0); 2622#L289-1 assume 1 == ~E_1~0;~E_1~0 := 2; 2618#L420-1 [2021-10-13 01:12:40,152 INFO L793 eck$LassoCheckResult]: Loop: 2618#L420-1 assume !false; 2616#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 2586#L226 assume !false; 2610#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2607#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2603#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2602#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 2601#L207 assume !(0 != eval_~tmp~0); 2271#L241 start_simulation_~kernel_st~0 := 2; 2272#L155-1 start_simulation_~kernel_st~0 := 3; 2311#L251-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2312#L251-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 2364#L256-3 assume 0 == ~E_M~0;~E_M~0 := 1; 2365#L261-3 assume 0 == ~E_1~0;~E_1~0 := 1; 2370#L266-3 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2258#L116-9 assume !(1 == ~m_pc~0); 2259#L116-11 is_master_triggered_~__retres1~0 := 0; 2843#L127-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2839#L128-3 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2366#L311-9 assume !(0 != activate_threads_~tmp~1); 2367#L311-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2837#L135-9 assume !(1 == ~t1_pc~0); 2836#L135-11 is_transmit1_triggered_~__retres1~1 := 0; 2344#L146-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2345#L147-3 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2835#L319-9 assume !(0 != activate_threads_~tmp___0~0); 2834#L319-11 assume 1 == ~M_E~0;~M_E~0 := 2; 2833#L279-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2832#L284-3 assume 1 == ~E_M~0;~E_M~0 := 2; 2831#L289-3 assume 1 == ~E_1~0;~E_1~0 := 2; 2284#L294-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2285#L180-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2361#L192-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2371#L193-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 2372#L439 assume !(0 == start_simulation_~tmp~3); 2644#L439-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2642#L180-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2639#L192-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2637#L193-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 2635#L394 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2631#L401 stop_simulation_#res := stop_simulation_~__retres2~0; 2624#L402 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 2621#L452 assume !(0 != start_simulation_~tmp___0~1); 2618#L420-1 [2021-10-13 01:12:40,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,153 INFO L82 PathProgramCache]: Analyzing trace with hash 1891715391, now seen corresponding path program 1 times [2021-10-13 01:12:40,153 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,153 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803428485] [2021-10-13 01:12:40,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,154 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:40,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:40,235 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:40,235 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803428485] [2021-10-13 01:12:40,235 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1803428485] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:40,235 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:40,236 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-13 01:12:40,236 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [453906672] [2021-10-13 01:12:40,236 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-13 01:12:40,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,237 INFO L82 PathProgramCache]: Analyzing trace with hash 715651122, now seen corresponding path program 1 times [2021-10-13 01:12:40,237 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,237 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316423549] [2021-10-13 01:12:40,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,238 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:40,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:40,335 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:40,335 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316423549] [2021-10-13 01:12:40,335 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [316423549] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:40,336 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:40,336 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 01:12:40,336 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027452133] [2021-10-13 01:12:40,337 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:40,337 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:40,337 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:12:40,338 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:12:40,338 INFO L87 Difference]: Start difference. First operand 612 states and 843 transitions. cyclomatic complexity: 235 Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 2 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:40,367 INFO L93 Difference]: Finished difference Result 571 states and 764 transitions. [2021-10-13 01:12:40,367 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:12:40,367 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 571 states and 764 transitions. [2021-10-13 01:12:40,374 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 525 [2021-10-13 01:12:40,380 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 571 states to 571 states and 764 transitions. [2021-10-13 01:12:40,381 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 571 [2021-10-13 01:12:40,382 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 571 [2021-10-13 01:12:40,382 INFO L73 IsDeterministic]: Start isDeterministic. Operand 571 states and 764 transitions. [2021-10-13 01:12:40,383 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:40,383 INFO L681 BuchiCegarLoop]: Abstraction has 571 states and 764 transitions. [2021-10-13 01:12:40,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 571 states and 764 transitions. [2021-10-13 01:12:40,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 571 to 361. [2021-10-13 01:12:40,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 361 states have (on average 1.3268698060941828) internal successors, (479), 360 states have internal predecessors, (479), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 479 transitions. [2021-10-13 01:12:40,395 INFO L704 BuchiCegarLoop]: Abstraction has 361 states and 479 transitions. [2021-10-13 01:12:40,395 INFO L587 BuchiCegarLoop]: Abstraction has 361 states and 479 transitions. [2021-10-13 01:12:40,395 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-13 01:12:40,396 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 361 states and 479 transitions. [2021-10-13 01:12:40,399 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 315 [2021-10-13 01:12:40,399 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:40,399 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:40,400 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,400 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,401 INFO L791 eck$LassoCheckResult]: Stem: 3590#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 3483#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 3484#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 3494#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 3490#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 3491#L167-1 assume !(0 == ~M_E~0); 3468#L251-1 assume !(0 == ~T1_E~0); 3469#L256-1 assume !(0 == ~E_M~0); 3528#L261-1 assume 0 == ~E_1~0;~E_1~0 := 1; 3470#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3471#L116 assume !(1 == ~m_pc~0); 3583#L116-2 is_master_triggered_~__retres1~0 := 0; 3584#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3514#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3515#L311 assume !(0 != activate_threads_~tmp~1); 3567#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3568#L135 assume !(1 == ~t1_pc~0); 3654#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 3557#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3558#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3600#L319 assume !(0 != activate_threads_~tmp___0~0); 3601#L319-2 assume !(1 == ~M_E~0); 3653#L279-1 assume !(1 == ~T1_E~0); 3495#L284-1 assume !(1 == ~E_M~0); 3496#L289-1 assume 1 == ~E_1~0;~E_1~0 := 2; 3428#L420-1 [2021-10-13 01:12:40,401 INFO L793 eck$LassoCheckResult]: Loop: 3428#L420-1 assume !false; 3649#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 3537#L226 assume !false; 3646#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3643#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3640#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3639#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 3638#L207 assume !(0 != eval_~tmp~0); 3463#L241 start_simulation_~kernel_st~0 := 2; 3464#L155-1 start_simulation_~kernel_st~0 := 3; 3504#L251-2 assume 0 == ~M_E~0;~M_E~0 := 1; 3505#L251-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 3564#L256-3 assume !(0 == ~E_M~0); 3565#L261-3 assume !(0 == ~E_1~0); 3569#L266-3 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3761#L116-9 assume !(1 == ~m_pc~0); 3760#L116-11 is_master_triggered_~__retres1~0 := 0; 3759#L127-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3758#L128-3 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3757#L311-9 assume !(0 != activate_threads_~tmp~1); 3756#L311-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3492#L135-9 assume !(1 == ~t1_pc~0); 3493#L135-11 is_transmit1_triggered_~__retres1~1 := 0; 3764#L146-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3763#L147-3 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3762#L319-9 assume !(0 != activate_threads_~tmp___0~0); 3485#L319-11 assume 1 == ~M_E~0;~M_E~0 := 2; 3486#L279-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 3513#L284-3 assume !(1 == ~E_M~0); 3549#L289-3 assume !(1 == ~E_1~0); 3474#L294-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3475#L180-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3561#L192-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3571#L193-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 3519#L439 assume !(0 == start_simulation_~tmp~3); 3520#L439-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3768#L180-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3766#L192-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3765#L193-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 3445#L394 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3431#L401 stop_simulation_#res := stop_simulation_~__retres2~0; 3432#L402 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 3552#L452 assume !(0 != start_simulation_~tmp___0~1); 3428#L420-1 [2021-10-13 01:12:40,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,402 INFO L82 PathProgramCache]: Analyzing trace with hash -102429315, now seen corresponding path program 1 times [2021-10-13 01:12:40,402 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,403 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557236011] [2021-10-13 01:12:40,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,403 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:40,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:40,435 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:40,436 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557236011] [2021-10-13 01:12:40,436 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [557236011] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:40,436 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:40,437 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:12:40,437 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201460261] [2021-10-13 01:12:40,437 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-13 01:12:40,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,438 INFO L82 PathProgramCache]: Analyzing trace with hash -851097678, now seen corresponding path program 1 times [2021-10-13 01:12:40,438 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,439 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107578665] [2021-10-13 01:12:40,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,439 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:40,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:40,483 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:40,484 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107578665] [2021-10-13 01:12:40,484 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [107578665] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:40,484 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:40,484 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 01:12:40,485 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1964940383] [2021-10-13 01:12:40,485 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:40,485 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:40,486 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:12:40,486 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:12:40,487 INFO L87 Difference]: Start difference. First operand 361 states and 479 transitions. cyclomatic complexity: 120 Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:40,551 INFO L93 Difference]: Finished difference Result 450 states and 599 transitions. [2021-10-13 01:12:40,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 01:12:40,552 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 450 states and 599 transitions. [2021-10-13 01:12:40,558 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 409 [2021-10-13 01:12:40,563 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 450 states to 450 states and 599 transitions. [2021-10-13 01:12:40,563 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 450 [2021-10-13 01:12:40,564 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 450 [2021-10-13 01:12:40,564 INFO L73 IsDeterministic]: Start isDeterministic. Operand 450 states and 599 transitions. [2021-10-13 01:12:40,565 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:40,566 INFO L681 BuchiCegarLoop]: Abstraction has 450 states and 599 transitions. [2021-10-13 01:12:40,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states and 599 transitions. [2021-10-13 01:12:40,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 295. [2021-10-13 01:12:40,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 295 states, 295 states have (on average 1.3186440677966103) internal successors, (389), 294 states have internal predecessors, (389), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 389 transitions. [2021-10-13 01:12:40,576 INFO L704 BuchiCegarLoop]: Abstraction has 295 states and 389 transitions. [2021-10-13 01:12:40,576 INFO L587 BuchiCegarLoop]: Abstraction has 295 states and 389 transitions. [2021-10-13 01:12:40,576 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-13 01:12:40,577 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 295 states and 389 transitions. [2021-10-13 01:12:40,579 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 265 [2021-10-13 01:12:40,579 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:40,580 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:40,580 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,581 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,581 INFO L791 eck$LassoCheckResult]: Stem: 4395#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 4305#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 4306#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 4316#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 4312#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 4313#L167-1 assume !(0 == ~M_E~0); 4291#L251-1 assume !(0 == ~T1_E~0); 4292#L256-1 assume !(0 == ~E_M~0); 4346#L261-1 assume !(0 == ~E_1~0); 4293#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4288#L116 assume !(1 == ~m_pc~0); 4289#L116-2 is_master_triggered_~__retres1~0 := 0; 4391#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4333#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4318#L311 assume !(0 != activate_threads_~tmp~1); 4319#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4381#L135 assume !(1 == ~t1_pc~0); 4303#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 4304#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4369#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4392#L319 assume !(0 != activate_threads_~tmp___0~0); 4270#L319-2 assume !(1 == ~M_E~0); 4271#L279-1 assume !(1 == ~T1_E~0); 4317#L284-1 assume !(1 == ~E_M~0); 4250#L289-1 assume !(1 == ~E_1~0); 4251#L420-1 [2021-10-13 01:12:40,581 INFO L793 eck$LassoCheckResult]: Loop: 4251#L420-1 assume !false; 4427#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 4425#L226 assume !false; 4424#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4423#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4421#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4420#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 4418#L207 assume !(0 != eval_~tmp~0); 4419#L241 start_simulation_~kernel_st~0 := 2; 4479#L155-1 start_simulation_~kernel_st~0 := 3; 4478#L251-2 assume 0 == ~M_E~0;~M_E~0 := 1; 4477#L251-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 4476#L256-3 assume !(0 == ~E_M~0); 4475#L261-3 assume !(0 == ~E_1~0); 4474#L266-3 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4473#L116-9 assume !(1 == ~m_pc~0); 4472#L116-11 is_master_triggered_~__retres1~0 := 0; 4471#L127-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4470#L128-3 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4469#L311-9 assume !(0 != activate_threads_~tmp~1); 4468#L311-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4466#L135-9 assume !(1 == ~t1_pc~0); 4464#L135-11 is_transmit1_triggered_~__retres1~1 := 0; 4462#L146-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4460#L147-3 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4458#L319-9 assume !(0 != activate_threads_~tmp___0~0); 4456#L319-11 assume 1 == ~M_E~0;~M_E~0 := 2; 4454#L279-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 4452#L284-3 assume !(1 == ~E_M~0); 4450#L289-3 assume !(1 == ~E_1~0); 4448#L294-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4446#L180-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4443#L192-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4441#L193-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 4438#L439 assume !(0 == start_simulation_~tmp~3); 4436#L439-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4435#L180-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4433#L192-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4432#L193-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 4431#L394 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4430#L401 stop_simulation_#res := stop_simulation_~__retres2~0; 4429#L402 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 4428#L452 assume !(0 != start_simulation_~tmp___0~1); 4251#L420-1 [2021-10-13 01:12:40,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,582 INFO L82 PathProgramCache]: Analyzing trace with hash -1690777215, now seen corresponding path program 1 times [2021-10-13 01:12:40,582 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,583 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176894114] [2021-10-13 01:12:40,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,583 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,596 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:40,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,635 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:40,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,636 INFO L82 PathProgramCache]: Analyzing trace with hash -851097678, now seen corresponding path program 2 times [2021-10-13 01:12:40,637 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,637 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030609701] [2021-10-13 01:12:40,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,637 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:40,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:40,680 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:40,680 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030609701] [2021-10-13 01:12:40,681 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030609701] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:40,681 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:40,681 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 01:12:40,682 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962686979] [2021-10-13 01:12:40,682 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:40,682 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:40,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 01:12:40,683 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:12:40,683 INFO L87 Difference]: Start difference. First operand 295 states and 389 transitions. cyclomatic complexity: 96 Second operand has 5 states, 5 states have (on average 8.6) internal successors, (43), 5 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:40,779 INFO L93 Difference]: Finished difference Result 499 states and 648 transitions. [2021-10-13 01:12:40,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-13 01:12:40,780 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 499 states and 648 transitions. [2021-10-13 01:12:40,786 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 464 [2021-10-13 01:12:40,791 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 499 states to 499 states and 648 transitions. [2021-10-13 01:12:40,792 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 499 [2021-10-13 01:12:40,793 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 499 [2021-10-13 01:12:40,793 INFO L73 IsDeterministic]: Start isDeterministic. Operand 499 states and 648 transitions. [2021-10-13 01:12:40,794 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:40,794 INFO L681 BuchiCegarLoop]: Abstraction has 499 states and 648 transitions. [2021-10-13 01:12:40,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states and 648 transitions. [2021-10-13 01:12:40,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 304. [2021-10-13 01:12:40,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 304 states, 304 states have (on average 1.3092105263157894) internal successors, (398), 303 states have internal predecessors, (398), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 398 transitions. [2021-10-13 01:12:40,805 INFO L704 BuchiCegarLoop]: Abstraction has 304 states and 398 transitions. [2021-10-13 01:12:40,805 INFO L587 BuchiCegarLoop]: Abstraction has 304 states and 398 transitions. [2021-10-13 01:12:40,806 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-13 01:12:40,806 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 304 states and 398 transitions. [2021-10-13 01:12:40,808 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 274 [2021-10-13 01:12:40,809 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:40,809 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:40,810 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,810 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,810 INFO L791 eck$LassoCheckResult]: Stem: 5206#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 5115#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 5116#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5124#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 5122#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 5123#L167-1 assume !(0 == ~M_E~0); 5100#L251-1 assume !(0 == ~T1_E~0); 5101#L256-1 assume !(0 == ~E_M~0); 5154#L261-1 assume !(0 == ~E_1~0); 5102#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5096#L116 assume !(1 == ~m_pc~0); 5097#L116-2 is_master_triggered_~__retres1~0 := 0; 5202#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5142#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5128#L311 assume !(0 != activate_threads_~tmp~1); 5129#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5192#L135 assume !(1 == ~t1_pc~0); 5113#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 5114#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5180#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5203#L319 assume !(0 != activate_threads_~tmp___0~0); 5079#L319-2 assume !(1 == ~M_E~0); 5080#L279-1 assume !(1 == ~T1_E~0); 5125#L284-1 assume !(1 == ~E_M~0); 5060#L289-1 assume !(1 == ~E_1~0); 5061#L420-1 [2021-10-13 01:12:40,811 INFO L793 eck$LassoCheckResult]: Loop: 5061#L420-1 assume !false; 5103#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 5074#L226 assume !false; 5075#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5057#L180 assume !(0 == ~m_st~0); 5059#L184 assume !(0 == ~t1_st~0);exists_runnable_thread_~__retres1~2 := 0; 5170#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5263#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 5262#L207 assume !(0 != eval_~tmp~0); 5098#L241 start_simulation_~kernel_st~0 := 2; 5099#L155-1 start_simulation_~kernel_st~0 := 3; 5134#L251-2 assume 0 == ~M_E~0;~M_E~0 := 1; 5135#L251-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 5187#L256-3 assume !(0 == ~E_M~0); 5188#L261-3 assume !(0 == ~E_1~0); 5112#L266-3 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5083#L116-9 assume !(1 == ~m_pc~0); 5084#L116-11 is_master_triggered_~__retres1~0 := 0; 5321#L127-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5136#L128-3 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5137#L311-9 assume !(0 != activate_threads_~tmp~1); 5190#L311-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5126#L135-9 assume !(1 == ~t1_pc~0); 5127#L135-11 is_transmit1_triggered_~__retres1~1 := 0; 5166#L146-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5167#L147-3 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5168#L319-9 assume !(0 != activate_threads_~tmp___0~0); 5169#L319-11 assume 1 == ~M_E~0;~M_E~0 := 2; 5343#L279-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 5342#L284-3 assume !(1 == ~E_M~0); 5341#L289-3 assume !(1 == ~E_1~0); 5340#L294-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5339#L180-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5337#L192-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5193#L193-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 5147#L439 assume !(0 == start_simulation_~tmp~3); 5148#L439-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5069#L180-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5070#L192-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5130#L193-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 5078#L394 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5064#L401 stop_simulation_#res := stop_simulation_~__retres2~0; 5065#L402 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 5165#L452 assume !(0 != start_simulation_~tmp___0~1); 5061#L420-1 [2021-10-13 01:12:40,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,812 INFO L82 PathProgramCache]: Analyzing trace with hash -1690777215, now seen corresponding path program 2 times [2021-10-13 01:12:40,812 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,812 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572335482] [2021-10-13 01:12:40,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,813 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,840 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:40,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,857 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:40,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,858 INFO L82 PathProgramCache]: Analyzing trace with hash 1751856021, now seen corresponding path program 1 times [2021-10-13 01:12:40,859 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,859 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963749580] [2021-10-13 01:12:40,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,859 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:40,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:40,888 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:40,888 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963749580] [2021-10-13 01:12:40,888 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1963749580] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:40,889 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:40,889 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:12:40,889 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357981388] [2021-10-13 01:12:40,890 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-13 01:12:40,890 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:40,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:12:40,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:12:40,891 INFO L87 Difference]: Start difference. First operand 304 states and 398 transitions. cyclomatic complexity: 96 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:40,916 INFO L93 Difference]: Finished difference Result 340 states and 434 transitions. [2021-10-13 01:12:40,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:12:40,917 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 340 states and 434 transitions. [2021-10-13 01:12:40,921 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 300 [2021-10-13 01:12:40,925 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 340 states to 340 states and 434 transitions. [2021-10-13 01:12:40,925 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 340 [2021-10-13 01:12:40,926 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 340 [2021-10-13 01:12:40,926 INFO L73 IsDeterministic]: Start isDeterministic. Operand 340 states and 434 transitions. [2021-10-13 01:12:40,927 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:40,927 INFO L681 BuchiCegarLoop]: Abstraction has 340 states and 434 transitions. [2021-10-13 01:12:40,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states and 434 transitions. [2021-10-13 01:12:40,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 340. [2021-10-13 01:12:40,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 340 states, 340 states have (on average 1.276470588235294) internal successors, (434), 339 states have internal predecessors, (434), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:40,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 434 transitions. [2021-10-13 01:12:40,938 INFO L704 BuchiCegarLoop]: Abstraction has 340 states and 434 transitions. [2021-10-13 01:12:40,938 INFO L587 BuchiCegarLoop]: Abstraction has 340 states and 434 transitions. [2021-10-13 01:12:40,938 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-13 01:12:40,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 340 states and 434 transitions. [2021-10-13 01:12:40,941 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 300 [2021-10-13 01:12:40,941 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:40,942 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:40,942 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,942 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:40,943 INFO L791 eck$LassoCheckResult]: Stem: 5854#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 5762#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 5763#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5773#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 5769#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 5770#L167-1 assume !(0 == ~M_E~0); 5749#L251-1 assume !(0 == ~T1_E~0); 5750#L256-1 assume !(0 == ~E_M~0); 5800#L261-1 assume !(0 == ~E_1~0); 5751#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5744#L116 assume !(1 == ~m_pc~0); 5745#L116-2 is_master_triggered_~__retres1~0 := 0; 5849#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5789#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5775#L311 assume !(0 != activate_threads_~tmp~1); 5776#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5838#L135 assume !(1 == ~t1_pc~0); 5760#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 5761#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5826#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5850#L319 assume !(0 != activate_threads_~tmp___0~0); 5727#L319-2 assume !(1 == ~M_E~0); 5728#L279-1 assume !(1 == ~T1_E~0); 5774#L284-1 assume !(1 == ~E_M~0); 5709#L289-1 assume !(1 == ~E_1~0); 5710#L420-1 assume !false; 5768#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 6030#L226 [2021-10-13 01:12:40,943 INFO L793 eck$LassoCheckResult]: Loop: 6030#L226 assume !false; 6029#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6028#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5834#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5794#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 5795#L207 assume 0 != eval_~tmp~0; 5806#L207-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 5858#L215 assume !(0 != eval_~tmp_ndt_1~0); 5859#L212 assume !(0 == ~t1_st~0); 6030#L226 [2021-10-13 01:12:40,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,944 INFO L82 PathProgramCache]: Analyzing trace with hash -1339261757, now seen corresponding path program 1 times [2021-10-13 01:12:40,944 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,944 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201770302] [2021-10-13 01:12:40,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,945 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,955 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:40,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,971 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:40,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,973 INFO L82 PathProgramCache]: Analyzing trace with hash -1331441589, now seen corresponding path program 1 times [2021-10-13 01:12:40,973 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,973 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608464256] [2021-10-13 01:12:40,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,974 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,978 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:40,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:40,983 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:40,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:40,984 INFO L82 PathProgramCache]: Analyzing trace with hash 610962889, now seen corresponding path program 1 times [2021-10-13 01:12:40,984 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:40,985 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844454269] [2021-10-13 01:12:40,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:40,985 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:40,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:41,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:41,033 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:41,035 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844454269] [2021-10-13 01:12:41,036 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1844454269] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:41,036 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:41,036 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-13 01:12:41,037 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249979703] [2021-10-13 01:12:41,138 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:41,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:12:41,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:12:41,140 INFO L87 Difference]: Start difference. First operand 340 states and 434 transitions. cyclomatic complexity: 97 Second operand has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:41,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:41,211 INFO L93 Difference]: Finished difference Result 553 states and 690 transitions. [2021-10-13 01:12:41,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:12:41,212 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 553 states and 690 transitions. [2021-10-13 01:12:41,218 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 443 [2021-10-13 01:12:41,224 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 553 states to 553 states and 690 transitions. [2021-10-13 01:12:41,224 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 553 [2021-10-13 01:12:41,225 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 553 [2021-10-13 01:12:41,225 INFO L73 IsDeterministic]: Start isDeterministic. Operand 553 states and 690 transitions. [2021-10-13 01:12:41,226 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:41,227 INFO L681 BuchiCegarLoop]: Abstraction has 553 states and 690 transitions. [2021-10-13 01:12:41,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states and 690 transitions. [2021-10-13 01:12:41,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 512. [2021-10-13 01:12:41,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 512 states, 512 states have (on average 1.2578125) internal successors, (644), 511 states have internal predecessors, (644), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:41,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 512 states to 512 states and 644 transitions. [2021-10-13 01:12:41,242 INFO L704 BuchiCegarLoop]: Abstraction has 512 states and 644 transitions. [2021-10-13 01:12:41,242 INFO L587 BuchiCegarLoop]: Abstraction has 512 states and 644 transitions. [2021-10-13 01:12:41,242 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-13 01:12:41,242 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 512 states and 644 transitions. [2021-10-13 01:12:41,247 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 427 [2021-10-13 01:12:41,247 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:41,247 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:41,248 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:41,248 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:41,248 INFO L791 eck$LassoCheckResult]: Stem: 6753#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 6664#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 6665#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 6676#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 6671#L162-1 assume !(1 == ~t1_i~0);~t1_st~0 := 2; 6672#L167-1 assume !(0 == ~M_E~0); 6650#L251-1 assume !(0 == ~T1_E~0); 6651#L256-1 assume !(0 == ~E_M~0); 6705#L261-1 assume !(0 == ~E_1~0); 7002#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 6647#L116 assume !(1 == ~m_pc~0); 6648#L116-2 is_master_triggered_~__retres1~0 := 0; 6757#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 6694#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 6695#L311 assume !(0 != activate_threads_~tmp~1); 6973#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 6972#L135 assume !(1 == ~t1_pc~0); 6971#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 6970#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 6969#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 6968#L319 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 6628#L319-2 assume !(1 == ~M_E~0); 6629#L279-1 assume !(1 == ~T1_E~0); 6677#L284-1 assume !(1 == ~E_M~0); 6610#L289-1 assume !(1 == ~E_1~0); 6611#L420-1 assume !false; 6963#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 6960#L226 [2021-10-13 01:12:41,249 INFO L793 eck$LassoCheckResult]: Loop: 6960#L226 assume !false; 6957#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6953#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 6951#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6948#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 6944#L207 assume 0 != eval_~tmp~0; 6941#L207-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 6936#L215 assume !(0 != eval_~tmp_ndt_1~0); 6937#L212 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 6955#L229 assume !(0 != eval_~tmp_ndt_2~0); 6960#L226 [2021-10-13 01:12:41,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:41,249 INFO L82 PathProgramCache]: Analyzing trace with hash -624740157, now seen corresponding path program 1 times [2021-10-13 01:12:41,250 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:41,250 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772692089] [2021-10-13 01:12:41,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:41,250 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:41,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:12:41,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:12:41,273 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:12:41,273 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772692089] [2021-10-13 01:12:41,273 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772692089] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:12:41,274 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:12:41,274 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:12:41,274 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1977335522] [2021-10-13 01:12:41,274 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-13 01:12:41,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:41,275 INFO L82 PathProgramCache]: Analyzing trace with hash 1674981463, now seen corresponding path program 1 times [2021-10-13 01:12:41,275 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:41,276 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375213135] [2021-10-13 01:12:41,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:41,276 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:41,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,280 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:41,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,285 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:41,377 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:12:41,377 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:12:41,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:12:41,378 INFO L87 Difference]: Start difference. First operand 512 states and 644 transitions. cyclomatic complexity: 136 Second operand has 3 states, 3 states have (on average 9.0) internal successors, (27), 3 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:41,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:12:41,388 INFO L93 Difference]: Finished difference Result 394 states and 497 transitions. [2021-10-13 01:12:41,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:12:41,388 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 394 states and 497 transitions. [2021-10-13 01:12:41,393 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 354 [2021-10-13 01:12:41,397 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 394 states to 394 states and 497 transitions. [2021-10-13 01:12:41,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 394 [2021-10-13 01:12:41,398 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 394 [2021-10-13 01:12:41,398 INFO L73 IsDeterministic]: Start isDeterministic. Operand 394 states and 497 transitions. [2021-10-13 01:12:41,399 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-13 01:12:41,399 INFO L681 BuchiCegarLoop]: Abstraction has 394 states and 497 transitions. [2021-10-13 01:12:41,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states and 497 transitions. [2021-10-13 01:12:41,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394. [2021-10-13 01:12:41,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 394 states have (on average 1.2614213197969544) internal successors, (497), 393 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:12:41,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 497 transitions. [2021-10-13 01:12:41,411 INFO L704 BuchiCegarLoop]: Abstraction has 394 states and 497 transitions. [2021-10-13 01:12:41,411 INFO L587 BuchiCegarLoop]: Abstraction has 394 states and 497 transitions. [2021-10-13 01:12:41,411 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-10-13 01:12:41,411 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 394 states and 497 transitions. [2021-10-13 01:12:41,414 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 354 [2021-10-13 01:12:41,415 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-13 01:12:41,415 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-13 01:12:41,416 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:41,416 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:12:41,416 INFO L791 eck$LassoCheckResult]: Stem: 7674#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 7575#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 7576#L383 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 7586#L155 assume 1 == ~m_i~0;~m_st~0 := 0; 7582#L162-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 7583#L167-1 assume !(0 == ~M_E~0); 7561#L251-1 assume !(0 == ~T1_E~0); 7562#L256-1 assume !(0 == ~E_M~0); 7615#L261-1 assume !(0 == ~E_1~0); 7563#L266-1 havoc activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 7558#L116 assume !(1 == ~m_pc~0); 7559#L116-2 is_master_triggered_~__retres1~0 := 0; 7667#L127 is_master_triggered_#res := is_master_triggered_~__retres1~0; 7605#L128 activate_threads_#t~ret11 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 7588#L311 assume !(0 != activate_threads_~tmp~1); 7589#L311-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 7654#L135 assume !(1 == ~t1_pc~0); 7573#L135-2 is_transmit1_triggered_~__retres1~1 := 0; 7574#L146 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 7645#L147 activate_threads_#t~ret12 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 7669#L319 assume !(0 != activate_threads_~tmp___0~0); 7540#L319-2 assume !(1 == ~M_E~0); 7541#L279-1 assume !(1 == ~T1_E~0); 7587#L284-1 assume !(1 == ~E_M~0); 7522#L289-1 assume !(1 == ~E_1~0); 7523#L420-1 assume !false; 7734#L421 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_~tmp_ndt_1~0, eval_#t~nondet10, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 7731#L226 [2021-10-13 01:12:41,416 INFO L793 eck$LassoCheckResult]: Loop: 7731#L226 assume !false; 7727#L203 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 7721#L180 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 7719#L192 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 7717#L193 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret8;havoc eval_#t~ret8; 7716#L207 assume 0 != eval_~tmp~0; 7714#L207-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 7712#L215 assume !(0 != eval_~tmp_ndt_1~0); 7713#L212 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 7735#L229 assume !(0 != eval_~tmp_ndt_2~0); 7731#L226 [2021-10-13 01:12:41,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:41,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1339261757, now seen corresponding path program 2 times [2021-10-13 01:12:41,418 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:41,418 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744227278] [2021-10-13 01:12:41,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:41,418 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:41,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,427 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:41,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,442 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:41,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:41,443 INFO L82 PathProgramCache]: Analyzing trace with hash 1674981463, now seen corresponding path program 2 times [2021-10-13 01:12:41,444 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:41,444 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011203417] [2021-10-13 01:12:41,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:41,444 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:41,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,448 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:41,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,454 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:41,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:12:41,455 INFO L82 PathProgramCache]: Analyzing trace with hash 1759978137, now seen corresponding path program 1 times [2021-10-13 01:12:41,455 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:12:41,455 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963786296] [2021-10-13 01:12:41,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:12:41,456 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:12:41,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,465 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:12:41,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:12:41,481 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:12:42,599 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 13.10 01:12:42 BoogieIcfgContainer [2021-10-13 01:12:42,599 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-10-13 01:12:42,599 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-13 01:12:42,599 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-13 01:12:42,600 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-13 01:12:42,600 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 01:12:38" (3/4) ... [2021-10-13 01:12:42,603 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-10-13 01:12:42,663 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/witness.graphml [2021-10-13 01:12:42,668 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-13 01:12:42,672 INFO L168 Benchmark]: Toolchain (without parser) took 6045.57 ms. Allocated memory was 107.0 MB in the beginning and 138.4 MB in the end (delta: 31.5 MB). Free memory was 68.1 MB in the beginning and 100.0 MB in the end (delta: -31.9 MB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-13 01:12:42,673 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 107.0 MB. Free memory is still 84.4 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-13 01:12:42,673 INFO L168 Benchmark]: CACSL2BoogieTranslator took 513.23 ms. Allocated memory is still 107.0 MB. Free memory was 67.9 MB in the beginning and 80.4 MB in the end (delta: -12.5 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-13 01:12:42,674 INFO L168 Benchmark]: Boogie Procedure Inliner took 97.56 ms. Allocated memory is still 107.0 MB. Free memory was 80.4 MB in the beginning and 77.9 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-13 01:12:42,675 INFO L168 Benchmark]: Boogie Preprocessor took 83.40 ms. Allocated memory is still 107.0 MB. Free memory was 77.9 MB in the beginning and 75.8 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-13 01:12:42,675 INFO L168 Benchmark]: RCFGBuilder took 809.16 ms. Allocated memory is still 107.0 MB. Free memory was 75.8 MB in the beginning and 57.8 MB in the end (delta: 17.9 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. [2021-10-13 01:12:42,676 INFO L168 Benchmark]: BuchiAutomizer took 4463.45 ms. Allocated memory was 107.0 MB in the beginning and 138.4 MB in the end (delta: 31.5 MB). Free memory was 57.4 MB in the beginning and 103.1 MB in the end (delta: -45.7 MB). Peak memory consumption was 54.1 MB. Max. memory is 16.1 GB. [2021-10-13 01:12:42,676 INFO L168 Benchmark]: Witness Printer took 71.27 ms. Allocated memory is still 138.4 MB. Free memory was 103.1 MB in the beginning and 100.0 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-13 01:12:42,679 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 107.0 MB. Free memory is still 84.4 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 513.23 ms. Allocated memory is still 107.0 MB. Free memory was 67.9 MB in the beginning and 80.4 MB in the end (delta: -12.5 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 97.56 ms. Allocated memory is still 107.0 MB. Free memory was 80.4 MB in the beginning and 77.9 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 83.40 ms. Allocated memory is still 107.0 MB. Free memory was 77.9 MB in the beginning and 75.8 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 809.16 ms. Allocated memory is still 107.0 MB. Free memory was 75.8 MB in the beginning and 57.8 MB in the end (delta: 17.9 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 4463.45 ms. Allocated memory was 107.0 MB in the beginning and 138.4 MB in the end (delta: 31.5 MB). Free memory was 57.4 MB in the beginning and 103.1 MB in the end (delta: -45.7 MB). Peak memory consumption was 54.1 MB. Max. memory is 16.1 GB. * Witness Printer took 71.27 ms. Allocated memory is still 138.4 MB. Free memory was 103.1 MB in the beginning and 100.0 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 394 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.3s and 11 iterations. TraceHistogramMax:1. Analysis of lassos took 2.8s. Construction of modules took 0.4s. Büchi inclusion checks took 0.5s. Highest rank in rank-based complementation 0. Minimization of det autom 10. Minimization of nondet autom 0. Automata minimization 161.3ms AutomataMinimizationTime, 10 MinimizatonAttempts, 832 StatesRemovedByMinimization, 7 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had 612 states and ocurred in iteration 4. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 2110 SDtfs, 2623 SDslu, 2145 SDs, 0 SdLazy, 329 SolverSat, 102 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 439.5ms Time LassoAnalysisResults: nont1 unkn0 SFLI2 SFLT0 conc1 concLT0 SILN1 SILU0 SILI6 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 202]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=2631} State at position 1 is {org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@2096278f=0, NULL=2633, NULL=0, \result=0, token=0, __retres1=0, NULL=2631, tmp=1, \result=0, kernel_st=1, __retres1=0, tmp___0=0, t1_pc=0, __retres1=1, T1_E=2, NULL=2634, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@782481d9=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@46eb7161=0, \result=0, E_1=2, NULL=0, tmp_ndt_1=0, NULL=0, NULL=0, M_E=2, tmp_ndt_2=0, tmp=0, NULL=2632, m_i=1, t1_st=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@252a482b=0, local=0, m_st=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@627b320d=0, E_M=2, NULL=0, tmp___0=0, tmp=0, __retres1=0, t1_i=1, m_pc=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7e3efc1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@b75ec65=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 202]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L16] int m_pc = 0; [L17] int t1_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int m_i ; [L21] int t1_i ; [L22] int M_E = 2; [L23] int T1_E = 2; [L24] int E_M = 2; [L25] int E_1 = 2; [L29] int token ; [L31] int local ; [L465] int __retres1 ; [L380] m_i = 1 [L381] t1_i = 1 [L406] int kernel_st ; [L407] int tmp ; [L408] int tmp___0 ; [L412] kernel_st = 0 [L162] COND TRUE m_i == 1 [L163] m_st = 0 [L167] COND TRUE t1_i == 1 [L168] t1_st = 0 [L251] COND FALSE !(M_E == 0) [L256] COND FALSE !(T1_E == 0) [L261] COND FALSE !(E_M == 0) [L266] COND FALSE !(E_1 == 0) [L304] int tmp ; [L305] int tmp___0 ; [L113] int __retres1 ; [L116] COND FALSE !(m_pc == 1) [L126] __retres1 = 0 [L128] return (__retres1); [L309] tmp = is_master_triggered() [L311] COND FALSE !(\read(tmp)) [L132] int __retres1 ; [L135] COND FALSE !(t1_pc == 1) [L145] __retres1 = 0 [L147] return (__retres1); [L317] tmp___0 = is_transmit1_triggered() [L319] COND FALSE !(\read(tmp___0)) [L279] COND FALSE !(M_E == 1) [L284] COND FALSE !(T1_E == 1) [L289] COND FALSE !(E_M == 1) [L294] COND FALSE !(E_1 == 1) [L420] COND TRUE 1 [L423] kernel_st = 1 [L198] int tmp ; Loop: [L202] COND TRUE 1 [L177] int __retres1 ; [L180] COND TRUE m_st == 0 [L181] __retres1 = 1 [L193] return (__retres1); [L205] tmp = exists_runnable_thread() [L207] COND TRUE \read(tmp) [L212] COND TRUE m_st == 0 [L213] int tmp_ndt_1; [L214] tmp_ndt_1 = __VERIFIER_nondet_int() [L215] COND FALSE !(\read(tmp_ndt_1)) [L226] COND TRUE t1_st == 0 [L227] int tmp_ndt_2; [L228] tmp_ndt_2 = __VERIFIER_nondet_int() [L229] COND FALSE !(\read(tmp_ndt_2)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-10-13 01:12:42,734 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e494328-2af7-488b-bc3d-3e8ed3368ad4/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...