./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e77c044 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 6beb928703bf47e67f9a30b8f1684b9e5bc8e87a ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-4e77c04 [2021-10-13 00:35:17,896 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-13 00:35:17,900 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-13 00:35:17,970 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-13 00:35:17,971 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-13 00:35:17,973 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-13 00:35:17,975 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-13 00:35:17,978 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-13 00:35:17,981 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-13 00:35:17,982 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-13 00:35:17,984 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-13 00:35:17,986 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-13 00:35:17,987 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-13 00:35:17,988 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-13 00:35:17,991 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-13 00:35:17,993 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-13 00:35:17,994 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-13 00:35:17,996 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-13 00:35:18,000 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-13 00:35:18,003 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-13 00:35:18,006 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-13 00:35:18,008 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-13 00:35:18,010 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-13 00:35:18,011 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-13 00:35:18,017 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-13 00:35:18,018 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-13 00:35:18,018 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-13 00:35:18,020 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-13 00:35:18,021 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-13 00:35:18,023 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-13 00:35:18,023 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-13 00:35:18,025 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-13 00:35:18,026 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-13 00:35:18,028 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-13 00:35:18,029 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-13 00:35:18,030 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-13 00:35:18,031 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-13 00:35:18,031 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-13 00:35:18,031 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-13 00:35:18,033 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-13 00:35:18,034 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-13 00:35:18,035 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-10-13 00:35:18,071 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-13 00:35:18,071 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-13 00:35:18,072 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-13 00:35:18,073 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-13 00:35:18,082 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-13 00:35:18,083 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-13 00:35:18,083 INFO L138 SettingsManager]: * Use SBE=true [2021-10-13 00:35:18,083 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-13 00:35:18,084 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-13 00:35:18,084 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-13 00:35:18,085 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-13 00:35:18,086 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-13 00:35:18,086 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-13 00:35:18,087 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-13 00:35:18,087 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-13 00:35:18,087 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-13 00:35:18,088 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-13 00:35:18,088 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-13 00:35:18,088 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-13 00:35:18,089 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 00:35:18,089 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-13 00:35:18,089 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-13 00:35:18,090 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-13 00:35:18,090 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-13 00:35:18,090 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-13 00:35:18,091 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-13 00:35:18,091 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-13 00:35:18,091 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6beb928703bf47e67f9a30b8f1684b9e5bc8e87a [2021-10-13 00:35:18,395 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-13 00:35:18,425 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-13 00:35:18,428 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-13 00:35:18,430 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-13 00:35:18,432 INFO L275 PluginConnector]: CDTParser initialized [2021-10-13 00:35:18,433 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-10-13 00:35:18,506 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/data/dd7b160e4/c1dd54c1340747d7a81d075a19a6ba5d/FLAG75e953399 [2021-10-13 00:35:19,511 INFO L306 CDTParser]: Found 1 translation units. [2021-10-13 00:35:19,512 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-10-13 00:35:19,559 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/data/dd7b160e4/c1dd54c1340747d7a81d075a19a6ba5d/FLAG75e953399 [2021-10-13 00:35:19,947 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/data/dd7b160e4/c1dd54c1340747d7a81d075a19a6ba5d [2021-10-13 00:35:19,950 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-13 00:35:19,952 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-13 00:35:19,954 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-13 00:35:19,955 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-13 00:35:19,959 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-13 00:35:19,960 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 12:35:19" (1/1) ... [2021-10-13 00:35:19,962 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2d808d93 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:19, skipping insertion in model container [2021-10-13 00:35:19,962 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 12:35:19" (1/1) ... [2021-10-13 00:35:19,971 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-13 00:35:20,086 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-13 00:35:20,958 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-10-13 00:35:21,814 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 00:35:21,843 INFO L203 MainTranslator]: Completed pre-run [2021-10-13 00:35:21,996 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-10-13 00:35:22,258 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 00:35:22,427 INFO L208 MainTranslator]: Completed translation [2021-10-13 00:35:22,428 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22 WrapperNode [2021-10-13 00:35:22,429 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-13 00:35:22,430 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-13 00:35:22,431 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-13 00:35:22,431 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-13 00:35:22,442 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:22,554 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:23,558 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-13 00:35:23,559 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-13 00:35:23,559 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-13 00:35:23,560 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-13 00:35:23,570 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:23,570 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:23,735 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:23,736 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:24,489 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:24,673 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:24,726 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:25,020 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-13 00:35:25,025 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-13 00:35:25,026 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-13 00:35:25,026 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-13 00:35:25,042 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (1/1) ... [2021-10-13 00:35:25,053 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 00:35:25,068 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:35:25,100 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-13 00:35:25,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-13 00:35:25,253 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2021-10-13 00:35:25,254 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2021-10-13 00:35:25,254 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2021-10-13 00:35:25,254 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-10-13 00:35:25,254 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-10-13 00:35:25,254 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-10-13 00:35:25,255 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-10-13 00:35:25,255 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-13 00:35:25,255 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-10-13 00:35:25,255 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-10-13 00:35:25,255 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-10-13 00:35:25,255 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-13 00:35:25,256 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2021-10-13 00:35:25,256 INFO L130 BoogieDeclarations]: Found specification of procedure strncpy [2021-10-13 00:35:25,256 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-13 00:35:25,256 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-13 00:36:01,261 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-13 00:36:01,262 INFO L299 CfgBuilder]: Removed 3249 assume(true) statements. [2021-10-13 00:36:01,276 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:36:01 BoogieIcfgContainer [2021-10-13 00:36:01,276 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-13 00:36:01,281 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-13 00:36:01,281 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-13 00:36:01,289 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-13 00:36:01,290 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 12:35:19" (1/3) ... [2021-10-13 00:36:01,291 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3054aa24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 12:36:01, skipping insertion in model container [2021-10-13 00:36:01,291 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:35:22" (2/3) ... [2021-10-13 00:36:01,292 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3054aa24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 12:36:01, skipping insertion in model container [2021-10-13 00:36:01,292 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:36:01" (3/3) ... [2021-10-13 00:36:01,294 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-10-13 00:36:01,300 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-13 00:36:01,301 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 8 error locations. [2021-10-13 00:36:01,407 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-13 00:36:01,419 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-13 00:36:01,420 INFO L340 AbstractCegarLoop]: Starting to check reachability of 8 error locations. [2021-10-13 00:36:01,540 INFO L276 IsEmpty]: Start isEmpty. Operand has 4749 states, 4740 states have (on average 1.5126582278481013) internal successors, (7170), 4748 states have internal predecessors, (7170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:36:01,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-13 00:36:01,594 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:36:01,595 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:36:01,597 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-13 00:36:01,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:36:01,604 INFO L82 PathProgramCache]: Analyzing trace with hash -2037521194, now seen corresponding path program 1 times [2021-10-13 00:36:01,615 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:36:01,615 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023613647] [2021-10-13 00:36:01,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:36:01,617 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:36:02,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:36:02,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:36:02,452 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:36:02,455 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2023613647] [2021-10-13 00:36:02,456 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2023613647] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:36:02,457 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:36:02,457 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:36:02,461 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391675823] [2021-10-13 00:36:02,467 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:36:02,467 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:36:02,490 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:36:02,492 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:36:02,510 INFO L87 Difference]: Start difference. First operand has 4749 states, 4740 states have (on average 1.5126582278481013) internal successors, (7170), 4748 states have internal predecessors, (7170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:36:03,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:36:03,045 INFO L93 Difference]: Finished difference Result 10237 states and 15425 transitions. [2021-10-13 00:36:03,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:36:03,048 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-13 00:36:03,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:36:03,120 INFO L225 Difference]: With dead ends: 10237 [2021-10-13 00:36:03,120 INFO L226 Difference]: Without dead ends: 5450 [2021-10-13 00:36:03,146 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:36:03,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5450 states. [2021-10-13 00:36:03,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5450 to 5428. [2021-10-13 00:36:03,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5428 states, 5420 states have (on average 1.5) internal successors, (8130), 5427 states have internal predecessors, (8130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:36:03,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5428 states to 5428 states and 8130 transitions. [2021-10-13 00:36:03,505 INFO L78 Accepts]: Start accepts. Automaton has 5428 states and 8130 transitions. Word has length 33 [2021-10-13 00:36:03,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:36:03,506 INFO L470 AbstractCegarLoop]: Abstraction has 5428 states and 8130 transitions. [2021-10-13 00:36:03,506 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:36:03,507 INFO L276 IsEmpty]: Start isEmpty. Operand 5428 states and 8130 transitions. [2021-10-13 00:36:03,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-13 00:36:03,514 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:36:03,514 INFO L512 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:36:03,515 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-13 00:36:03,515 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-13 00:36:03,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:36:03,520 INFO L82 PathProgramCache]: Analyzing trace with hash -532029243, now seen corresponding path program 1 times [2021-10-13 00:36:03,520 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:36:03,520 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284383383] [2021-10-13 00:36:03,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:36:03,521 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:36:03,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:36:04,174 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 00:36:04,175 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:36:04,175 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284383383] [2021-10-13 00:36:04,176 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1284383383] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:36:04,176 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:36:04,176 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-13 00:36:04,176 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082949905] [2021-10-13 00:36:04,179 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:36:04,180 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:36:04,181 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:36:04,181 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:36:04,181 INFO L87 Difference]: Start difference. First operand 5428 states and 8130 transitions. Second operand has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:36:52,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:36:52,315 INFO L93 Difference]: Finished difference Result 12237 states and 18209 transitions. [2021-10-13 00:36:52,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 00:36:52,316 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-13 00:36:52,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:36:52,369 INFO L225 Difference]: With dead ends: 12237 [2021-10-13 00:36:52,370 INFO L226 Difference]: Without dead ends: 6827 [2021-10-13 00:36:52,380 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 31.2ms TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:36:52,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6827 states. [2021-10-13 00:36:52,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6827 to 5432. [2021-10-13 00:36:52,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5432 states, 5424 states have (on average 1.4998156342182891) internal successors, (8135), 5431 states have internal predecessors, (8135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:36:52,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5432 states to 5432 states and 8135 transitions. [2021-10-13 00:36:52,595 INFO L78 Accepts]: Start accepts. Automaton has 5432 states and 8135 transitions. Word has length 62 [2021-10-13 00:36:52,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:36:52,596 INFO L470 AbstractCegarLoop]: Abstraction has 5432 states and 8135 transitions. [2021-10-13 00:36:52,596 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:36:52,596 INFO L276 IsEmpty]: Start isEmpty. Operand 5432 states and 8135 transitions. [2021-10-13 00:36:52,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-10-13 00:36:52,609 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:36:52,610 INFO L512 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:36:52,610 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-13 00:36:52,611 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-13 00:36:52,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:36:52,625 INFO L82 PathProgramCache]: Analyzing trace with hash 1136380178, now seen corresponding path program 1 times [2021-10-13 00:36:52,626 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:36:52,627 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488440248] [2021-10-13 00:36:52,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:36:52,628 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:36:52,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:36:53,122 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 00:36:53,122 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:36:53,123 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488440248] [2021-10-13 00:36:53,123 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [488440248] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:36:53,123 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:36:53,124 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:36:53,124 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [943408398] [2021-10-13 00:36:53,125 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:36:53,125 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:36:53,126 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:36:53,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:36:53,127 INFO L87 Difference]: Start difference. First operand 5432 states and 8135 transitions. Second operand has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:38:20,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:38:20,857 INFO L93 Difference]: Finished difference Result 18664 states and 27771 transitions. [2021-10-13 00:38:20,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-10-13 00:38:20,857 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 63 [2021-10-13 00:38:20,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:38:20,957 INFO L225 Difference]: With dead ends: 18664 [2021-10-13 00:38:20,957 INFO L226 Difference]: Without dead ends: 13250 [2021-10-13 00:38:20,970 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 72.1ms TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2021-10-13 00:38:20,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13250 states. [2021-10-13 00:38:21,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13250 to 5433. [2021-10-13 00:38:21,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5433 states, 5425 states have (on average 1.4997235023041475) internal successors, (8136), 5432 states have internal predecessors, (8136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:38:21,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5433 states to 5433 states and 8136 transitions. [2021-10-13 00:38:21,270 INFO L78 Accepts]: Start accepts. Automaton has 5433 states and 8136 transitions. Word has length 63 [2021-10-13 00:38:21,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:38:21,271 INFO L470 AbstractCegarLoop]: Abstraction has 5433 states and 8136 transitions. [2021-10-13 00:38:21,272 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:38:21,272 INFO L276 IsEmpty]: Start isEmpty. Operand 5433 states and 8136 transitions. [2021-10-13 00:38:21,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-10-13 00:38:21,278 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:38:21,278 INFO L512 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:38:21,278 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-13 00:38:21,279 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-13 00:38:21,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:38:21,280 INFO L82 PathProgramCache]: Analyzing trace with hash -714352571, now seen corresponding path program 1 times [2021-10-13 00:38:21,280 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:38:21,280 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679476757] [2021-10-13 00:38:21,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:38:21,281 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:38:21,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:38:21,647 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 00:38:21,647 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:38:21,648 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [679476757] [2021-10-13 00:38:21,648 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [679476757] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:38:21,648 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:38:21,648 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:38:21,649 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293174358] [2021-10-13 00:38:21,649 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:38:21,650 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:38:21,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:38:21,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:38:21,651 INFO L87 Difference]: Start difference. First operand 5433 states and 8136 transitions. Second operand has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:39:12,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:39:12,950 INFO L93 Difference]: Finished difference Result 13394 states and 19848 transitions. [2021-10-13 00:39:12,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:39:12,951 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 63 [2021-10-13 00:39:12,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:39:12,979 INFO L225 Difference]: With dead ends: 13394 [2021-10-13 00:39:12,979 INFO L226 Difference]: Without dead ends: 7979 [2021-10-13 00:39:12,990 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 105.2ms TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2021-10-13 00:39:13,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7979 states. [2021-10-13 00:39:13,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7979 to 5437. [2021-10-13 00:39:13,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5437 states, 5429 states have (on average 1.4995395100386812) internal successors, (8141), 5436 states have internal predecessors, (8141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:39:13,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5437 states to 5437 states and 8141 transitions. [2021-10-13 00:39:13,187 INFO L78 Accepts]: Start accepts. Automaton has 5437 states and 8141 transitions. Word has length 63 [2021-10-13 00:39:13,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:39:13,188 INFO L470 AbstractCegarLoop]: Abstraction has 5437 states and 8141 transitions. [2021-10-13 00:39:13,188 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:39:13,190 INFO L276 IsEmpty]: Start isEmpty. Operand 5437 states and 8141 transitions. [2021-10-13 00:39:13,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-13 00:39:13,196 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:39:13,197 INFO L512 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:39:13,197 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-13 00:39:13,197 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-13 00:39:13,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:39:13,198 INFO L82 PathProgramCache]: Analyzing trace with hash -1635166794, now seen corresponding path program 1 times [2021-10-13 00:39:13,198 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:39:13,199 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665247532] [2021-10-13 00:39:13,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:39:13,199 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:39:13,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:39:13,469 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 00:39:13,469 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:39:13,469 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [665247532] [2021-10-13 00:39:13,470 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [665247532] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:39:13,470 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:39:13,470 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:39:13,471 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100704677] [2021-10-13 00:39:13,472 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:39:13,473 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:39:13,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:39:13,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:39:13,474 INFO L87 Difference]: Start difference. First operand 5437 states and 8141 transitions. Second operand has 3 states, 3 states have (on average 21.0) internal successors, (63), 3 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:39:13,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:39:13,711 INFO L93 Difference]: Finished difference Result 10596 states and 15909 transitions. [2021-10-13 00:39:13,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:39:13,712 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.0) internal successors, (63), 3 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-13 00:39:13,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:39:13,759 INFO L225 Difference]: With dead ends: 10596 [2021-10-13 00:39:13,759 INFO L226 Difference]: Without dead ends: 10584 [2021-10-13 00:39:13,764 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:39:13,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10584 states. [2021-10-13 00:39:14,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10584 to 5425. [2021-10-13 00:39:14,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5425 states, 5423 states have (on average 1.4989858012170385) internal successors, (8129), 5424 states have internal predecessors, (8129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:39:14,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5425 states to 5425 states and 8129 transitions. [2021-10-13 00:39:14,078 INFO L78 Accepts]: Start accepts. Automaton has 5425 states and 8129 transitions. Word has length 64 [2021-10-13 00:39:14,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:39:14,079 INFO L470 AbstractCegarLoop]: Abstraction has 5425 states and 8129 transitions. [2021-10-13 00:39:14,079 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.0) internal successors, (63), 3 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:39:14,079 INFO L276 IsEmpty]: Start isEmpty. Operand 5425 states and 8129 transitions. [2021-10-13 00:39:14,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-13 00:39:14,084 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:39:14,084 INFO L512 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:39:14,085 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-13 00:39:14,085 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-13 00:39:14,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:39:14,086 INFO L82 PathProgramCache]: Analyzing trace with hash -220675694, now seen corresponding path program 1 times [2021-10-13 00:39:14,086 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:39:14,086 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630861749] [2021-10-13 00:39:14,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:39:14,087 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:39:14,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:39:14,510 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 00:39:14,510 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:39:14,510 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630861749] [2021-10-13 00:39:14,511 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [630861749] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:39:14,511 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:39:14,511 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 00:39:14,511 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29930105] [2021-10-13 00:39:14,512 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 00:39:14,512 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:39:14,512 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 00:39:14,513 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2021-10-13 00:39:14,513 INFO L87 Difference]: Start difference. First operand 5425 states and 8129 transitions. Second operand has 7 states, 7 states have (on average 9.0) internal successors, (63), 7 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:40:43,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:40:43,266 INFO L93 Difference]: Finished difference Result 20486 states and 30373 transitions. [2021-10-13 00:40:43,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-13 00:40:43,267 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.0) internal successors, (63), 7 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-13 00:40:43,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:40:43,317 INFO L225 Difference]: With dead ends: 20486 [2021-10-13 00:40:43,317 INFO L226 Difference]: Without dead ends: 15079 [2021-10-13 00:40:43,330 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 147.9ms TimeCoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2021-10-13 00:40:43,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15079 states. [2021-10-13 00:40:43,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15079 to 5429. [2021-10-13 00:40:43,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5429 states, 5427 states have (on average 1.4989865487377925) internal successors, (8135), 5428 states have internal predecessors, (8135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:40:43,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5429 states to 5429 states and 8135 transitions. [2021-10-13 00:40:43,653 INFO L78 Accepts]: Start accepts. Automaton has 5429 states and 8135 transitions. Word has length 64 [2021-10-13 00:40:43,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:40:43,655 INFO L470 AbstractCegarLoop]: Abstraction has 5429 states and 8135 transitions. [2021-10-13 00:40:43,655 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.0) internal successors, (63), 7 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:40:43,655 INFO L276 IsEmpty]: Start isEmpty. Operand 5429 states and 8135 transitions. [2021-10-13 00:40:43,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-13 00:40:43,661 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:40:43,661 INFO L512 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:40:43,661 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-13 00:40:43,663 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-13 00:40:43,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:40:43,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1678022903, now seen corresponding path program 1 times [2021-10-13 00:40:43,664 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:40:43,668 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62867726] [2021-10-13 00:40:43,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:40:43,669 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:40:44,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:40:44,157 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 00:40:44,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:40:45,113 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 00:40:45,113 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-10-13 00:40:45,114 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,116 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:40:45,119 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-13 00:40:45,128 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-13 00:40:45,553 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 12:40:45 BoogieIcfgContainer [2021-10-13 00:40:45,554 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-13 00:40:45,555 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-13 00:40:45,555 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-13 00:40:45,555 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-13 00:40:45,556 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:36:01" (3/4) ... [2021-10-13 00:40:45,558 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-13 00:40:45,878 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/witness.graphml [2021-10-13 00:40:45,878 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-13 00:40:45,880 INFO L168 Benchmark]: Toolchain (without parser) took 325926.36 ms. Allocated memory was 121.6 MB in the beginning and 1.5 GB in the end (delta: 1.3 GB). Free memory was 84.4 MB in the beginning and 650.7 MB in the end (delta: -566.3 MB). Peak memory consumption was 778.5 MB. Max. memory is 16.1 GB. [2021-10-13 00:40:45,880 INFO L168 Benchmark]: CDTParser took 0.33 ms. Allocated memory is still 121.6 MB. Free memory is still 76.1 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-13 00:40:45,881 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2475.01 ms. Allocated memory was 121.6 MB in the beginning and 161.5 MB in the end (delta: 39.8 MB). Free memory was 84.1 MB in the beginning and 112.5 MB in the end (delta: -28.4 MB). Peak memory consumption was 72.2 MB. Max. memory is 16.1 GB. [2021-10-13 00:40:45,882 INFO L168 Benchmark]: Boogie Procedure Inliner took 1128.05 ms. Allocated memory was 161.5 MB in the beginning and 272.6 MB in the end (delta: 111.1 MB). Free memory was 112.5 MB in the beginning and 158.7 MB in the end (delta: -46.2 MB). Peak memory consumption was 116.2 MB. Max. memory is 16.1 GB. [2021-10-13 00:40:45,882 INFO L168 Benchmark]: Boogie Preprocessor took 1464.69 ms. Allocated memory was 272.6 MB in the beginning and 549.5 MB in the end (delta: 276.8 MB). Free memory was 158.7 MB in the beginning and 376.8 MB in the end (delta: -218.1 MB). Peak memory consumption was 102.8 MB. Max. memory is 16.1 GB. [2021-10-13 00:40:45,883 INFO L168 Benchmark]: RCFGBuilder took 36250.92 ms. Allocated memory was 549.5 MB in the beginning and 1.1 GB in the end (delta: 549.5 MB). Free memory was 376.8 MB in the beginning and 615.0 MB in the end (delta: -238.3 MB). Peak memory consumption was 724.3 MB. Max. memory is 16.1 GB. [2021-10-13 00:40:45,883 INFO L168 Benchmark]: TraceAbstraction took 284272.59 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 369.1 MB). Free memory was 615.0 MB in the beginning and 738.7 MB in the end (delta: -123.7 MB). Peak memory consumption was 244.3 MB. Max. memory is 16.1 GB. [2021-10-13 00:40:45,884 INFO L168 Benchmark]: Witness Printer took 323.38 ms. Allocated memory is still 1.5 GB. Free memory was 738.7 MB in the beginning and 650.7 MB in the end (delta: 88.1 MB). Peak memory consumption was 88.1 MB. Max. memory is 16.1 GB. [2021-10-13 00:40:45,886 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33 ms. Allocated memory is still 121.6 MB. Free memory is still 76.1 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 2475.01 ms. Allocated memory was 121.6 MB in the beginning and 161.5 MB in the end (delta: 39.8 MB). Free memory was 84.1 MB in the beginning and 112.5 MB in the end (delta: -28.4 MB). Peak memory consumption was 72.2 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 1128.05 ms. Allocated memory was 161.5 MB in the beginning and 272.6 MB in the end (delta: 111.1 MB). Free memory was 112.5 MB in the beginning and 158.7 MB in the end (delta: -46.2 MB). Peak memory consumption was 116.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 1464.69 ms. Allocated memory was 272.6 MB in the beginning and 549.5 MB in the end (delta: 276.8 MB). Free memory was 158.7 MB in the beginning and 376.8 MB in the end (delta: -218.1 MB). Peak memory consumption was 102.8 MB. Max. memory is 16.1 GB. * RCFGBuilder took 36250.92 ms. Allocated memory was 549.5 MB in the beginning and 1.1 GB in the end (delta: 549.5 MB). Free memory was 376.8 MB in the beginning and 615.0 MB in the end (delta: -238.3 MB). Peak memory consumption was 724.3 MB. Max. memory is 16.1 GB. * TraceAbstraction took 284272.59 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 369.1 MB). Free memory was 615.0 MB in the beginning and 738.7 MB in the end (delta: -123.7 MB). Peak memory consumption was 244.3 MB. Max. memory is 16.1 GB. * Witness Printer took 323.38 ms. Allocated memory is still 1.5 GB. Free memory was 738.7 MB in the beginning and 650.7 MB in the end (delta: 88.1 MB). Peak memory consumption was 88.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 3957]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L3980] struct v4l2_subdev *si4713_subdev_tuner_ops_group1 ; [L3981] int ldv_irq_1_3 = 0; [L3982] void *ldv_irq_data_1_1 ; [L3983] int ldv_irq_1_0 = 0; [L3984] void *ldv_irq_data_1_0 ; [L3985] int ldv_state_variable_0 ; [L3986] struct v4l2_frequency *si4713_subdev_tuner_ops_group0 ; [L3987] struct v4l2_control *si4713_subdev_core_ops_group2 ; [L3988] int ldv_state_variable_2 ; [L3989] void *ldv_irq_data_1_3 ; [L3990] void *ldv_irq_data_1_2 ; [L3991] int ldv_irq_1_2 = 0; [L3992] int LDV_IN_INTERRUPT = 1; [L3993] int ldv_irq_1_1 = 0; [L3994] int ldv_irq_line_1_3 ; [L3995] struct v4l2_subdev *si4713_subdev_core_ops_group1 ; [L3996] struct v4l2_ext_controls *si4713_subdev_core_ops_group0 ; [L3997] int ldv_state_variable_3 ; [L3998] int ldv_irq_line_1_0 ; [L3999] int ref_cnt ; [L4000] struct v4l2_modulator *si4713_subdev_tuner_ops_group2 ; [L4001] int ldv_irq_line_1_1 ; [L4002] struct i2c_client *si4713_i2c_driver_group0 ; [L4003] int ldv_state_variable_1 ; [L4004] int ldv_irq_line_1_2 ; [L4005] int ldv_state_variable_4 ; [L4144] static int debug ; [L4145] static char const *si4713_supply_names[2U] = { "vio", "vdd"}; [L4146-L4156] static long limiter_times[40U] = { 2000L, 250L, 1000L, 500L, 510L, 1000L, 255L, 2000L, 170L, 3000L, 127L, 4020L, 102L, 5010L, 85L, 6020L, 73L, 7010L, 64L, 7990L, 57L, 8970L, 51L, 10030L, 25L, 20470L, 17L, 30110L, 13L, 39380L, 10L, 51190L, 8L, 63690L, 7L, 73140L, 6L, 85330L, 5L, 102390L}; [L4157-L4160] static unsigned long acomp_rtimes[10U] = { 0UL, 100000UL, 1UL, 200000UL, 2UL, 350000UL, 3UL, 525000UL, 4UL, 1000000UL}; [L4161-L4162] static unsigned long preemphasis_values[6U] = { 2UL, 0UL, 1UL, 1UL, 0UL, 2UL}; [L5779-L5781] static struct v4l2_subdev_core_ops const si4713_subdev_core_ops = {0, 0, 0, 0, 0, 0, 0, & si4713_queryctrl, & si4713_g_ctrl, & si4713_s_ctrl, & si4713_g_ext_ctrls, & si4713_s_ext_ctrls, 0, 0, 0, & si4713_ioctl, 0, 0, 0, 0, 0, 0}; [L5949-L5951] static struct v4l2_subdev_tuner_ops const si4713_subdev_tuner_ops = {0, 0, & si4713_s_frequency, & si4713_g_frequency, 0, 0, & si4713_g_modulator, & si4713_s_modulator, 0, 0}; [L5952-L5953] static struct v4l2_subdev_ops const si4713_subdev_ops = {& si4713_subdev_core_ops, & si4713_subdev_tuner_ops, 0, 0, 0, 0, 0, 0}; [L6083] static struct i2c_device_id const si4713_id[2U] = { {{'s', 'i', '4', '7', '1', '3', '\000'}, 0UL}}; [L6084] struct i2c_device_id const __mod_i2c_device_table ; [L6085-L6089] static struct i2c_driver si4713_i2c_driver = {0U, 0, 0, & si4713_probe, & si4713_remove, 0, 0, 0, 0, 0, {"si4713", 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, (struct i2c_device_id const *)(& si4713_id), 0, 0, {0, 0}}; [L6105] int ldv_retval_0 ; [L6106] int ldv_retval_1 ; VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6271] unsigned int ldvarg1 ; [L6272] unsigned int tmp ; [L6273] void *ldvarg0 ; [L6274] void *tmp___0 ; [L6275] struct v4l2_queryctrl *ldvarg2 ; [L6276] void *tmp___1 ; [L6277] struct i2c_device_id *ldvarg3 ; [L6278] void *tmp___2 ; [L6279] int tmp___3 ; [L6280] int tmp___4 ; [L6281] int tmp___5 ; [L6282] int tmp___6 ; [L6283] int tmp___7 ; [L6285] tmp = __VERIFIER_nondet_uint() [L6286] ldvarg1 = tmp [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6287] tmp___0 = ldv_zalloc(1UL) [L6288] ldvarg0 = tmp___0 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6289] tmp___1 = ldv_zalloc(68UL) [L6290] ldvarg2 = (struct v4l2_queryctrl *)tmp___1 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6291] tmp___2 = ldv_zalloc(32UL) [L6292] ldvarg3 = (struct i2c_device_id *)tmp___2 VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6294] ldv_state_variable_4 = 0 [L6295] ldv_state_variable_1 = 1 [L6296] ref_cnt = 0 [L6297] ldv_state_variable_0 = 1 [L6298] ldv_state_variable_3 = 0 [L6299] ldv_state_variable_2 = 0 VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: [L6356] case 1: [L6362] case 2: VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6363] COND TRUE ldv_state_variable_0 != 0 [L6364] tmp___5 = __VERIFIER_nondet_int() [L6366] case 0: [L6374] case 1: VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6375] COND TRUE ldv_state_variable_0 == 1 [L6092] int tmp ; [L4108] int tmp ; [L6677] return __VERIFIER_nondet_int(); [L4110] tmp = i2c_register_driver(& __this_module, driver) [L4111] return (tmp); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6094] tmp = i2c_add_driver(& si4713_i2c_driver) [L6095] return (tmp); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6376] ldv_retval_0 = si4713_module_init() [L6377] COND TRUE ldv_retval_0 == 0 [L6378] ldv_state_variable_0 = 3 [L6379] ldv_state_variable_2 = 1 [L6111] void *tmp ; [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6113] tmp = ldv_zalloc(1168UL) [L6114] si4713_i2c_driver_group0 = (struct i2c_client *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6381] ldv_state_variable_3 = 1 [L6256] void *tmp ; [L6257] void *tmp___0 ; [L6258] void *tmp___1 ; [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6260] tmp = ldv_zalloc(44UL) [L6261] si4713_subdev_tuner_ops_group0 = (struct v4l2_frequency *)tmp [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6262] tmp___0 = ldv_zalloc(1736UL) [L6263] si4713_subdev_tuner_ops_group1 = (struct v4l2_subdev *)tmp___0 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6264] tmp___1 = ldv_zalloc(68UL) [L6265] si4713_subdev_tuner_ops_group2 = (struct v4l2_modulator *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6383] ldv_state_variable_4 = 1 [L6120] void *tmp ; [L6121] void *tmp___0 ; [L6122] void *tmp___1 ; [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6124] tmp = ldv_zalloc(32UL) [L6125] si4713_subdev_core_ops_group0 = (struct v4l2_ext_controls *)tmp [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6126] tmp___0 = ldv_zalloc(1736UL) [L6127] si4713_subdev_core_ops_group1 = (struct v4l2_subdev *)tmp___0 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6128] tmp___1 = ldv_zalloc(8UL) [L6129] si4713_subdev_core_ops_group2 = (struct v4l2_control *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6387] COND FALSE !(ldv_retval_0 != 0) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6304] COND TRUE ldv_state_variable_4 != 0 [L6305] tmp___4 = __VERIFIER_nondet_int() [L6307] case 0: [L6314] case 1: [L6321] case 2: [L6328] case 3: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6329] COND TRUE ldv_state_variable_4 == 1 [L5502] struct si4713_device *sdev ; [L5503] struct v4l2_subdev const *__mptr ; [L5504] int i ; [L5505] int err ; [L5507] __mptr = (struct v4l2_subdev const *)sd [L5508] sdev = (struct si4713_device *)__mptr [L5509] EXPR ctrls->ctrl_class VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5509] COND FALSE !(ctrls->ctrl_class != 10158080U) [L5513] i = 0 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5536] EXPR ctrls->count VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5536] COND TRUE (__u32 )i < ctrls->count [L5516] EXPR ctrls->controls [L5516] (ctrls->controls + (unsigned long )i)->id [L5517] case 10160389U: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5518] case 10160390U: [L5519] ctrls->controls [L4924] struct v4l2_queryctrl vqc ; [L4925] int len ; [L4926] s32 rval ; [L4927] char ps_name[97U] ; [L4928] unsigned long tmp ; [L4929] size_t tmp___0 ; [L4930] char radio_text[385U] ; [L4931] unsigned long tmp___1 ; [L4932] size_t tmp___2 ; [L4934] rval = 0 [L4935] EXPR control->id [L4935] vqc.id = control->id [L5588] int rval ; [L5590] rval = 0 [L5591] qc->id [L5592] case 9963785U: [L5595] case 10160386U: [L5598] case 10160387U: [L5601] case 10160385U: [L5604] case 10160389U: [L6730] return __VERIFIER_nondet_int(); [L5605] rval = v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) [L5657] return (rval); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L4936] rval = si4713_queryctrl(& sdev->sd, & vqc) [L4937] COND FALSE !(rval < 0) [L4941] control->id [L4942] case 10160389U: [L4943] EXPR control->size [L4943] len = (int )(control->size - 1U) [L4944] COND FALSE !(len > 96) [L4949] control->ldv_23757.string [L6524] unsigned long tmp ; [L6599] COND FALSE !(n >= 0L) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L3957] reach_error() VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 4749 locations, 8 error locations. Started 1 CEGAR loops. OverallTime: 283719.8ms, OverallIterations: 7, TraceHistogramMax: 2, EmptinessCheckTime: 124.8ms, AutomataDifference: 277168.1ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 90.9ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 68190 SDtfs, 33970 SDslu, 141869 SDs, 0 SdLazy, 26990 SolverSat, 747 SolverUnsat, 21 SolverUnknown, 0 SolverNotchecked, 251824.9ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 54 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 367.2ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=5437occurred in iteration=4, InterpolantAutomatonStates: 45, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 1687.2ms AutomataMinimizationTime, 6 MinimizatonAttempts, 26585 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 138.6ms SsaConstructionTime, 1486.9ms SatisfiabilityAnalysisTime, 1605.8ms InterpolantComputationTime, 415 NumberOfCodeBlocks, 415 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 343 ConstructedInterpolants, 0 QuantifiedInterpolants, 533 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 10/10 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-13 00:40:46,125 WARN L435 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process [2021-10-13 00:40:46,156 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c164f37a-458d-4c22-885c-1a2e2c072edb/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 137 Received shutdown request...