./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e77c044 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc86cc3add356b600fcf92e092d72b9013e4f56a ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-4e77c04 [2021-10-12 23:59:34,627 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-12 23:59:34,629 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-12 23:59:34,665 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-12 23:59:34,667 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-12 23:59:34,668 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-12 23:59:34,670 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-12 23:59:34,672 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-12 23:59:34,674 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-12 23:59:34,675 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-12 23:59:34,676 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-12 23:59:34,677 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-12 23:59:34,678 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-12 23:59:34,688 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-12 23:59:34,691 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-12 23:59:34,696 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-12 23:59:34,698 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-12 23:59:34,699 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-12 23:59:34,702 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-12 23:59:34,704 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-12 23:59:34,706 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-12 23:59:34,710 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-12 23:59:34,712 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-12 23:59:34,714 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-12 23:59:34,718 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-12 23:59:34,720 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-12 23:59:34,721 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-12 23:59:34,723 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-12 23:59:34,723 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-12 23:59:34,725 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-12 23:59:34,726 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-12 23:59:34,727 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-12 23:59:34,729 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-12 23:59:34,730 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-12 23:59:34,732 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-12 23:59:34,732 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-12 23:59:34,733 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-12 23:59:34,733 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-12 23:59:34,734 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-12 23:59:34,735 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-12 23:59:34,736 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-12 23:59:34,736 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-12 23:59:34,789 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-12 23:59:34,790 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-12 23:59:34,790 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-12 23:59:34,791 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-12 23:59:34,798 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-12 23:59:34,799 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-12 23:59:34,799 INFO L138 SettingsManager]: * Use SBE=true [2021-10-12 23:59:34,800 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-12 23:59:34,800 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-12 23:59:34,800 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-12 23:59:34,801 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-12 23:59:34,802 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-12 23:59:34,802 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-12 23:59:34,803 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-12 23:59:34,803 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-12 23:59:34,803 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-12 23:59:34,803 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-12 23:59:34,803 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-12 23:59:34,804 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-12 23:59:34,804 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-12 23:59:34,804 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-12 23:59:34,804 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-12 23:59:34,804 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-12 23:59:34,805 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-12 23:59:34,805 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-12 23:59:34,805 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-12 23:59:34,805 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-12 23:59:34,806 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-12 23:59:34,806 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-12 23:59:34,807 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-12 23:59:34,808 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc86cc3add356b600fcf92e092d72b9013e4f56a [2021-10-12 23:59:35,081 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-12 23:59:35,122 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-12 23:59:35,125 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-12 23:59:35,127 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-12 23:59:35,128 INFO L275 PluginConnector]: CDTParser initialized [2021-10-12 23:59:35,129 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-12 23:59:35,210 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/data/1d51e6eb7/bd7a96ee645d400897b5c98beaaaa219/FLAG50e2bda9d [2021-10-12 23:59:35,746 INFO L306 CDTParser]: Found 1 translation units. [2021-10-12 23:59:35,752 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-12 23:59:35,763 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/data/1d51e6eb7/bd7a96ee645d400897b5c98beaaaa219/FLAG50e2bda9d [2021-10-12 23:59:36,054 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/data/1d51e6eb7/bd7a96ee645d400897b5c98beaaaa219 [2021-10-12 23:59:36,058 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-12 23:59:36,062 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-12 23:59:36,066 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-12 23:59:36,066 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-12 23:59:36,070 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-12 23:59:36,070 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,073 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@51929acb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36, skipping insertion in model container [2021-10-12 23:59:36,074 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,082 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-12 23:59:36,120 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-12 23:59:36,375 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2021-10-12 23:59:36,379 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-12 23:59:36,391 INFO L203 MainTranslator]: Completed pre-run [2021-10-12 23:59:36,488 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2021-10-12 23:59:36,489 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-12 23:59:36,530 INFO L208 MainTranslator]: Completed translation [2021-10-12 23:59:36,530 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36 WrapperNode [2021-10-12 23:59:36,530 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-12 23:59:36,532 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-12 23:59:36,532 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-12 23:59:36,532 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-12 23:59:36,539 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,554 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,614 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-12 23:59:36,615 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-12 23:59:36,616 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-12 23:59:36,616 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-12 23:59:36,625 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,625 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,635 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,635 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,655 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,671 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,676 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,683 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-12 23:59:36,684 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-12 23:59:36,685 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-12 23:59:36,685 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-12 23:59:36,687 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (1/1) ... [2021-10-12 23:59:36,699 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-12 23:59:36,737 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-12 23:59:36,769 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-12 23:59:36,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-12 23:59:36,817 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-12 23:59:36,817 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-12 23:59:36,820 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-12 23:59:36,821 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-12 23:59:37,840 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-12 23:59:37,840 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-12 23:59:37,843 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 11:59:37 BoogieIcfgContainer [2021-10-12 23:59:37,843 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-12 23:59:37,845 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-12 23:59:37,845 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-12 23:59:37,853 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-12 23:59:37,853 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.10 11:59:36" (1/3) ... [2021-10-12 23:59:37,854 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14d7dbb2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.10 11:59:37, skipping insertion in model container [2021-10-12 23:59:37,859 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 11:59:36" (2/3) ... [2021-10-12 23:59:37,860 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14d7dbb2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.10 11:59:37, skipping insertion in model container [2021-10-12 23:59:37,860 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 11:59:37" (3/3) ... [2021-10-12 23:59:37,862 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-12 23:59:37,868 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-12 23:59:37,870 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-12 23:59:37,952 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-12 23:59:37,961 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-12 23:59:37,961 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-12 23:59:38,002 INFO L276 IsEmpty]: Start isEmpty. Operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-12 23:59:38,017 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:38,018 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:38,019 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:38,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:38,029 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-12 23:59:38,044 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:38,045 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159544389] [2021-10-12 23:59:38,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:38,046 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:38,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:38,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:38,295 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:38,296 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159544389] [2021-10-12 23:59:38,296 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159544389] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:38,297 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:38,297 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-12 23:59:38,299 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [798989890] [2021-10-12 23:59:38,303 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-12 23:59:38,304 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:38,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-12 23:59:38,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-12 23:59:38,320 INFO L87 Difference]: Start difference. First operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:38,366 INFO L93 Difference]: Finished difference Result 568 states and 888 transitions. [2021-10-12 23:59:38,366 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-12 23:59:38,367 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-12 23:59:38,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:38,381 INFO L225 Difference]: With dead ends: 568 [2021-10-12 23:59:38,381 INFO L226 Difference]: Without dead ends: 290 [2021-10-12 23:59:38,385 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-12 23:59:38,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-10-12 23:59:38,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-10-12 23:59:38,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5880149812734083) internal successors, (424), 289 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 424 transitions. [2021-10-12 23:59:38,463 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 424 transitions. Word has length 33 [2021-10-12 23:59:38,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:38,464 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 424 transitions. [2021-10-12 23:59:38,464 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,465 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 424 transitions. [2021-10-12 23:59:38,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-12 23:59:38,466 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:38,467 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:38,467 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-12 23:59:38,468 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:38,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:38,469 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-12 23:59:38,469 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:38,469 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708349031] [2021-10-12 23:59:38,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:38,470 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:38,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:38,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:38,555 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:38,556 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708349031] [2021-10-12 23:59:38,556 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708349031] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:38,556 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:38,556 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:38,557 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490620870] [2021-10-12 23:59:38,558 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-12 23:59:38,558 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:38,559 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-12 23:59:38,560 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-12 23:59:38,560 INFO L87 Difference]: Start difference. First operand 290 states and 424 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:38,640 INFO L93 Difference]: Finished difference Result 566 states and 822 transitions. [2021-10-12 23:59:38,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-12 23:59:38,641 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-12 23:59:38,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:38,644 INFO L225 Difference]: With dead ends: 566 [2021-10-12 23:59:38,644 INFO L226 Difference]: Without dead ends: 290 [2021-10-12 23:59:38,646 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 12.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:38,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-10-12 23:59:38,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-10-12 23:59:38,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5430711610486891) internal successors, (412), 289 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 412 transitions. [2021-10-12 23:59:38,660 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 412 transitions. Word has length 33 [2021-10-12 23:59:38,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:38,660 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 412 transitions. [2021-10-12 23:59:38,660 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,661 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 412 transitions. [2021-10-12 23:59:38,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-12 23:59:38,662 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:38,663 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:38,663 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-12 23:59:38,663 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:38,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:38,664 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-12 23:59:38,664 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:38,664 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [462861051] [2021-10-12 23:59:38,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:38,665 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:38,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:38,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:38,848 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:38,848 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [462861051] [2021-10-12 23:59:38,849 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [462861051] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:38,849 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:38,849 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:38,849 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109548761] [2021-10-12 23:59:38,850 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:38,850 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:38,851 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:38,851 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:38,851 INFO L87 Difference]: Start difference. First operand 290 states and 412 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:38,898 INFO L93 Difference]: Finished difference Result 596 states and 856 transitions. [2021-10-12 23:59:38,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:38,899 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-12 23:59:38,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:38,902 INFO L225 Difference]: With dead ends: 596 [2021-10-12 23:59:38,902 INFO L226 Difference]: Without dead ends: 323 [2021-10-12 23:59:38,904 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:38,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2021-10-12 23:59:38,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 266. [2021-10-12 23:59:38,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 266 states, 247 states have (on average 1.5222672064777327) internal successors, (376), 265 states have internal predecessors, (376), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 376 transitions. [2021-10-12 23:59:38,917 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 376 transitions. Word has length 44 [2021-10-12 23:59:38,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:38,917 INFO L470 AbstractCegarLoop]: Abstraction has 266 states and 376 transitions. [2021-10-12 23:59:38,918 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:38,918 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 376 transitions. [2021-10-12 23:59:38,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-12 23:59:38,920 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:38,920 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:38,920 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-12 23:59:38,921 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:38,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:38,921 INFO L82 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-10-12 23:59:38,921 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:38,922 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566472968] [2021-10-12 23:59:38,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:38,922 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:38,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:39,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:39,061 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:39,061 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566472968] [2021-10-12 23:59:39,061 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1566472968] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:39,062 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:39,062 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:39,063 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673286531] [2021-10-12 23:59:39,064 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:39,064 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:39,065 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:39,065 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:39,066 INFO L87 Difference]: Start difference. First operand 266 states and 376 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:39,113 INFO L93 Difference]: Finished difference Result 741 states and 1059 transitions. [2021-10-12 23:59:39,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:39,113 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-12 23:59:39,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:39,118 INFO L225 Difference]: With dead ends: 741 [2021-10-12 23:59:39,118 INFO L226 Difference]: Without dead ends: 492 [2021-10-12 23:59:39,119 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:39,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2021-10-12 23:59:39,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 299. [2021-10-12 23:59:39,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 299 states, 280 states have (on average 1.5142857142857142) internal successors, (424), 298 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 424 transitions. [2021-10-12 23:59:39,156 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 424 transitions. Word has length 53 [2021-10-12 23:59:39,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:39,158 INFO L470 AbstractCegarLoop]: Abstraction has 299 states and 424 transitions. [2021-10-12 23:59:39,158 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,159 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 424 transitions. [2021-10-12 23:59:39,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-12 23:59:39,167 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:39,167 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:39,167 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-12 23:59:39,168 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:39,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:39,169 INFO L82 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-10-12 23:59:39,169 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:39,170 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521028524] [2021-10-12 23:59:39,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:39,171 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:39,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:39,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:39,298 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:39,298 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521028524] [2021-10-12 23:59:39,298 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521028524] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:39,299 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:39,299 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:39,299 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959730993] [2021-10-12 23:59:39,300 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:39,300 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:39,301 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:39,301 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:39,301 INFO L87 Difference]: Start difference. First operand 299 states and 424 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:39,349 INFO L93 Difference]: Finished difference Result 819 states and 1172 transitions. [2021-10-12 23:59:39,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:39,350 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-12 23:59:39,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:39,354 INFO L225 Difference]: With dead ends: 819 [2021-10-12 23:59:39,354 INFO L226 Difference]: Without dead ends: 537 [2021-10-12 23:59:39,355 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:39,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-12 23:59:39,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 320. [2021-10-12 23:59:39,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 301 states have (on average 1.5083056478405317) internal successors, (454), 319 states have internal predecessors, (454), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 454 transitions. [2021-10-12 23:59:39,377 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 454 transitions. Word has length 54 [2021-10-12 23:59:39,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:39,377 INFO L470 AbstractCegarLoop]: Abstraction has 320 states and 454 transitions. [2021-10-12 23:59:39,378 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,378 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 454 transitions. [2021-10-12 23:59:39,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-12 23:59:39,379 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:39,379 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:39,379 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-12 23:59:39,380 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:39,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:39,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-10-12 23:59:39,381 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:39,381 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842158941] [2021-10-12 23:59:39,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:39,382 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:39,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:39,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:39,459 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:39,459 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842158941] [2021-10-12 23:59:39,459 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [842158941] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:39,460 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:39,460 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:39,460 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870693494] [2021-10-12 23:59:39,461 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-12 23:59:39,461 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:39,461 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-12 23:59:39,462 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:39,462 INFO L87 Difference]: Start difference. First operand 320 states and 454 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:39,671 INFO L93 Difference]: Finished difference Result 1000 states and 1433 transitions. [2021-10-12 23:59:39,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-12 23:59:39,672 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-12 23:59:39,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:39,680 INFO L225 Difference]: With dead ends: 1000 [2021-10-12 23:59:39,681 INFO L226 Difference]: Without dead ends: 697 [2021-10-12 23:59:39,689 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 24.0ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-12 23:59:39,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-10-12 23:59:39,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-10-12 23:59:39,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.481203007518797) internal successors, (591), 417 states have internal predecessors, (591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 591 transitions. [2021-10-12 23:59:39,712 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 591 transitions. Word has length 54 [2021-10-12 23:59:39,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:39,712 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 591 transitions. [2021-10-12 23:59:39,713 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:39,713 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 591 transitions. [2021-10-12 23:59:39,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-12 23:59:39,714 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:39,714 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:39,714 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-12 23:59:39,715 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:39,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:39,715 INFO L82 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-10-12 23:59:39,716 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:39,720 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403506927] [2021-10-12 23:59:39,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:39,721 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:39,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:39,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:39,840 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:39,840 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [403506927] [2021-10-12 23:59:39,841 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [403506927] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:39,841 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:39,841 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:39,841 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [574549749] [2021-10-12 23:59:39,842 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-12 23:59:39,842 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:39,843 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-12 23:59:39,843 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:39,843 INFO L87 Difference]: Start difference. First operand 418 states and 591 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:40,044 INFO L93 Difference]: Finished difference Result 1000 states and 1425 transitions. [2021-10-12 23:59:40,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-12 23:59:40,045 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-12 23:59:40,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:40,049 INFO L225 Difference]: With dead ends: 1000 [2021-10-12 23:59:40,050 INFO L226 Difference]: Without dead ends: 697 [2021-10-12 23:59:40,051 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 33.4ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-12 23:59:40,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-10-12 23:59:40,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-10-12 23:59:40,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.4711779448621554) internal successors, (587), 417 states have internal predecessors, (587), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 587 transitions. [2021-10-12 23:59:40,074 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 587 transitions. Word has length 55 [2021-10-12 23:59:40,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:40,075 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 587 transitions. [2021-10-12 23:59:40,075 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,075 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 587 transitions. [2021-10-12 23:59:40,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-10-12 23:59:40,076 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:40,077 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:40,077 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-12 23:59:40,077 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:40,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:40,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-10-12 23:59:40,078 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:40,078 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246417443] [2021-10-12 23:59:40,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:40,079 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:40,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:40,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:40,201 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:40,201 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246417443] [2021-10-12 23:59:40,202 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1246417443] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:40,202 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:40,202 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:40,202 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889667884] [2021-10-12 23:59:40,203 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:40,203 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:40,203 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:40,204 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,204 INFO L87 Difference]: Start difference. First operand 418 states and 587 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:40,242 INFO L93 Difference]: Finished difference Result 840 states and 1196 transitions. [2021-10-12 23:59:40,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:40,242 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-10-12 23:59:40,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:40,247 INFO L225 Difference]: With dead ends: 840 [2021-10-12 23:59:40,247 INFO L226 Difference]: Without dead ends: 537 [2021-10-12 23:59:40,248 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-12 23:59:40,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 413. [2021-10-12 23:59:40,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 395 states have (on average 1.4658227848101266) internal successors, (579), 412 states have internal predecessors, (579), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 579 transitions. [2021-10-12 23:59:40,285 INFO L78 Accepts]: Start accepts. Automaton has 413 states and 579 transitions. Word has length 56 [2021-10-12 23:59:40,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:40,286 INFO L470 AbstractCegarLoop]: Abstraction has 413 states and 579 transitions. [2021-10-12 23:59:40,287 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,287 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 579 transitions. [2021-10-12 23:59:40,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-10-12 23:59:40,288 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:40,289 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:40,289 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-12 23:59:40,290 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:40,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:40,290 INFO L82 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-10-12 23:59:40,290 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:40,291 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005945625] [2021-10-12 23:59:40,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:40,291 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:40,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:40,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:40,424 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:40,424 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005945625] [2021-10-12 23:59:40,424 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1005945625] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:40,424 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:40,425 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:40,425 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [556831736] [2021-10-12 23:59:40,425 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:40,426 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:40,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:40,431 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,432 INFO L87 Difference]: Start difference. First operand 413 states and 579 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:40,508 INFO L93 Difference]: Finished difference Result 839 states and 1195 transitions. [2021-10-12 23:59:40,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:40,510 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-10-12 23:59:40,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:40,515 INFO L225 Difference]: With dead ends: 839 [2021-10-12 23:59:40,515 INFO L226 Difference]: Without dead ends: 541 [2021-10-12 23:59:40,516 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.4ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2021-10-12 23:59:40,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 393. [2021-10-12 23:59:40,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 379 states have (on average 1.4432717678100264) internal successors, (547), 392 states have internal predecessors, (547), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 547 transitions. [2021-10-12 23:59:40,541 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 547 transitions. Word has length 60 [2021-10-12 23:59:40,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:40,541 INFO L470 AbstractCegarLoop]: Abstraction has 393 states and 547 transitions. [2021-10-12 23:59:40,542 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,542 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 547 transitions. [2021-10-12 23:59:40,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-12 23:59:40,543 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:40,543 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:40,543 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-12 23:59:40,544 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:40,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:40,545 INFO L82 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-10-12 23:59:40,545 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:40,546 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [124855797] [2021-10-12 23:59:40,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:40,547 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:40,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:40,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:40,630 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:40,630 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [124855797] [2021-10-12 23:59:40,631 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [124855797] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:40,631 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:40,631 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:40,631 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794579261] [2021-10-12 23:59:40,632 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:40,632 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:40,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:40,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,633 INFO L87 Difference]: Start difference. First operand 393 states and 547 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:40,687 INFO L93 Difference]: Finished difference Result 807 states and 1139 transitions. [2021-10-12 23:59:40,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:40,687 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-12 23:59:40,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:40,691 INFO L225 Difference]: With dead ends: 807 [2021-10-12 23:59:40,691 INFO L226 Difference]: Without dead ends: 529 [2021-10-12 23:59:40,693 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2021-10-12 23:59:40,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 381. [2021-10-12 23:59:40,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 369 states have (on average 1.4336043360433603) internal successors, (529), 380 states have internal predecessors, (529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 529 transitions. [2021-10-12 23:59:40,714 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 529 transitions. Word has length 64 [2021-10-12 23:59:40,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:40,715 INFO L470 AbstractCegarLoop]: Abstraction has 381 states and 529 transitions. [2021-10-12 23:59:40,715 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,715 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 529 transitions. [2021-10-12 23:59:40,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-10-12 23:59:40,716 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:40,716 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:40,717 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-12 23:59:40,717 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:40,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:40,718 INFO L82 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-10-12 23:59:40,718 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:40,720 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725459525] [2021-10-12 23:59:40,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:40,721 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:40,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:40,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:40,819 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:40,820 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725459525] [2021-10-12 23:59:40,820 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1725459525] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:40,820 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:40,820 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:40,820 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [727816078] [2021-10-12 23:59:40,821 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:40,821 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:40,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:40,823 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,823 INFO L87 Difference]: Start difference. First operand 381 states and 529 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:40,901 INFO L93 Difference]: Finished difference Result 803 states and 1131 transitions. [2021-10-12 23:59:40,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:40,902 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-10-12 23:59:40,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:40,905 INFO L225 Difference]: With dead ends: 803 [2021-10-12 23:59:40,906 INFO L226 Difference]: Without dead ends: 537 [2021-10-12 23:59:40,907 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:40,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-12 23:59:40,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 361. [2021-10-12 23:59:40,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 353 states have (on average 1.4079320113314449) internal successors, (497), 360 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 497 transitions. [2021-10-12 23:59:40,929 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 497 transitions. Word has length 65 [2021-10-12 23:59:40,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:40,929 INFO L470 AbstractCegarLoop]: Abstraction has 361 states and 497 transitions. [2021-10-12 23:59:40,929 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:40,929 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 497 transitions. [2021-10-12 23:59:40,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-10-12 23:59:40,936 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:40,936 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:40,936 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-12 23:59:40,937 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:40,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:40,937 INFO L82 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-10-12 23:59:40,937 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:40,938 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762639560] [2021-10-12 23:59:40,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:40,938 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:41,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:41,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:41,138 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:41,138 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762639560] [2021-10-12 23:59:41,138 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1762639560] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:41,138 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:41,139 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-12 23:59:41,139 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360707068] [2021-10-12 23:59:41,139 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-12 23:59:41,139 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:41,140 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-12 23:59:41,140 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-12 23:59:41,140 INFO L87 Difference]: Start difference. First operand 361 states and 497 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:41,334 INFO L93 Difference]: Finished difference Result 1087 states and 1510 transitions. [2021-10-12 23:59:41,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-12 23:59:41,335 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-10-12 23:59:41,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:41,339 INFO L225 Difference]: With dead ends: 1087 [2021-10-12 23:59:41,340 INFO L226 Difference]: Without dead ends: 841 [2021-10-12 23:59:41,344 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 65.7ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-12 23:59:41,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 841 states. [2021-10-12 23:59:41,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 841 to 411. [2021-10-12 23:59:41,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 411 states, 403 states have (on average 1.401985111662531) internal successors, (565), 410 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 411 states and 565 transitions. [2021-10-12 23:59:41,382 INFO L78 Accepts]: Start accepts. Automaton has 411 states and 565 transitions. Word has length 70 [2021-10-12 23:59:41,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:41,383 INFO L470 AbstractCegarLoop]: Abstraction has 411 states and 565 transitions. [2021-10-12 23:59:41,383 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,383 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 565 transitions. [2021-10-12 23:59:41,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-12 23:59:41,384 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:41,384 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:41,384 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-12 23:59:41,385 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:41,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:41,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-10-12 23:59:41,385 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:41,386 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1856968998] [2021-10-12 23:59:41,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:41,386 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:41,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:41,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:41,452 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:41,452 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1856968998] [2021-10-12 23:59:41,453 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1856968998] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:41,453 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:41,453 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:41,453 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286601719] [2021-10-12 23:59:41,454 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:41,454 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:41,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:41,455 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:41,455 INFO L87 Difference]: Start difference. First operand 411 states and 565 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:41,525 INFO L93 Difference]: Finished difference Result 839 states and 1168 transitions. [2021-10-12 23:59:41,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:41,526 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-12 23:59:41,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:41,530 INFO L225 Difference]: With dead ends: 839 [2021-10-12 23:59:41,530 INFO L226 Difference]: Without dead ends: 576 [2021-10-12 23:59:41,531 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:41,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 576 states. [2021-10-12 23:59:41,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 576 to 395. [2021-10-12 23:59:41,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 389 states have (on average 1.3856041131105399) internal successors, (539), 394 states have internal predecessors, (539), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 539 transitions. [2021-10-12 23:59:41,562 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 539 transitions. Word has length 71 [2021-10-12 23:59:41,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:41,562 INFO L470 AbstractCegarLoop]: Abstraction has 395 states and 539 transitions. [2021-10-12 23:59:41,563 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,563 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 539 transitions. [2021-10-12 23:59:41,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-12 23:59:41,564 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:41,564 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:41,564 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-12 23:59:41,564 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:41,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:41,565 INFO L82 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-10-12 23:59:41,565 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:41,565 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [755719970] [2021-10-12 23:59:41,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:41,566 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:41,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:41,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:41,659 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:41,659 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [755719970] [2021-10-12 23:59:41,659 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [755719970] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:41,659 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:41,659 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:41,659 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1414139947] [2021-10-12 23:59:41,660 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:41,660 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:41,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:41,661 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:41,661 INFO L87 Difference]: Start difference. First operand 395 states and 539 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:41,723 INFO L93 Difference]: Finished difference Result 708 states and 982 transitions. [2021-10-12 23:59:41,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:41,724 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-12 23:59:41,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:41,727 INFO L225 Difference]: With dead ends: 708 [2021-10-12 23:59:41,727 INFO L226 Difference]: Without dead ends: 474 [2021-10-12 23:59:41,728 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:41,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2021-10-12 23:59:41,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 391. [2021-10-12 23:59:41,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.378238341968912) internal successors, (532), 390 states have internal predecessors, (532), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 532 transitions. [2021-10-12 23:59:41,767 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 532 transitions. Word has length 71 [2021-10-12 23:59:41,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:41,768 INFO L470 AbstractCegarLoop]: Abstraction has 391 states and 532 transitions. [2021-10-12 23:59:41,768 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:41,768 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 532 transitions. [2021-10-12 23:59:41,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-12 23:59:41,769 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:41,769 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:41,770 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-12 23:59:41,770 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:41,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:41,770 INFO L82 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-10-12 23:59:41,771 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:41,771 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816769191] [2021-10-12 23:59:41,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:41,771 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:41,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:41,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:41,887 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:41,888 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816769191] [2021-10-12 23:59:41,888 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [816769191] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:41,888 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:41,888 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-12 23:59:41,888 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781208358] [2021-10-12 23:59:41,889 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-12 23:59:41,889 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:41,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-12 23:59:41,890 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-12 23:59:41,890 INFO L87 Difference]: Start difference. First operand 391 states and 532 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:42,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:42,251 INFO L93 Difference]: Finished difference Result 1349 states and 1849 transitions. [2021-10-12 23:59:42,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-12 23:59:42,251 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-12 23:59:42,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:42,258 INFO L225 Difference]: With dead ends: 1349 [2021-10-12 23:59:42,258 INFO L226 Difference]: Without dead ends: 1101 [2021-10-12 23:59:42,261 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 80.8ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-12 23:59:42,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2021-10-12 23:59:42,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 419. [2021-10-12 23:59:42,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 414 states have (on average 1.3623188405797102) internal successors, (564), 418 states have internal predecessors, (564), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:42,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 564 transitions. [2021-10-12 23:59:42,330 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 564 transitions. Word has length 74 [2021-10-12 23:59:42,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:42,330 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 564 transitions. [2021-10-12 23:59:42,331 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:42,331 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 564 transitions. [2021-10-12 23:59:42,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-12 23:59:42,332 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:42,332 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:42,332 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-12 23:59:42,332 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:42,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:42,335 INFO L82 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-10-12 23:59:42,335 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:42,337 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140126526] [2021-10-12 23:59:42,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:42,337 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:42,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:42,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:42,406 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:42,406 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140126526] [2021-10-12 23:59:42,408 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [140126526] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:42,408 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:42,409 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:42,409 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024925759] [2021-10-12 23:59:42,409 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-12 23:59:42,409 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:42,410 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-12 23:59:42,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-12 23:59:42,410 INFO L87 Difference]: Start difference. First operand 419 states and 564 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:42,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:42,569 INFO L93 Difference]: Finished difference Result 1079 states and 1463 transitions. [2021-10-12 23:59:42,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-12 23:59:42,569 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-12 23:59:42,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:42,574 INFO L225 Difference]: With dead ends: 1079 [2021-10-12 23:59:42,574 INFO L226 Difference]: Without dead ends: 825 [2021-10-12 23:59:42,577 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 8.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:42,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 825 states. [2021-10-12 23:59:42,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 825 to 632. [2021-10-12 23:59:42,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 632 states, 627 states have (on average 1.342902711323764) internal successors, (842), 631 states have internal predecessors, (842), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:42,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 632 states to 632 states and 842 transitions. [2021-10-12 23:59:42,649 INFO L78 Accepts]: Start accepts. Automaton has 632 states and 842 transitions. Word has length 74 [2021-10-12 23:59:42,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:42,649 INFO L470 AbstractCegarLoop]: Abstraction has 632 states and 842 transitions. [2021-10-12 23:59:42,649 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:42,650 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 842 transitions. [2021-10-12 23:59:42,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-12 23:59:42,651 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:42,651 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:42,651 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-12 23:59:42,652 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:42,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:42,652 INFO L82 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-10-12 23:59:42,652 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:42,652 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [954296570] [2021-10-12 23:59:42,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:42,653 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:42,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:42,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:42,802 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:42,802 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [954296570] [2021-10-12 23:59:42,802 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [954296570] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:42,802 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:42,802 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-12 23:59:42,803 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012902145] [2021-10-12 23:59:42,803 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-12 23:59:42,803 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:42,804 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-12 23:59:42,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-12 23:59:42,805 INFO L87 Difference]: Start difference. First operand 632 states and 842 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:43,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:43,167 INFO L93 Difference]: Finished difference Result 1899 states and 2590 transitions. [2021-10-12 23:59:43,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-12 23:59:43,168 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-12 23:59:43,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:43,177 INFO L225 Difference]: With dead ends: 1899 [2021-10-12 23:59:43,177 INFO L226 Difference]: Without dead ends: 1534 [2021-10-12 23:59:43,179 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 58.0ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-12 23:59:43,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2021-10-12 23:59:43,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 620. [2021-10-12 23:59:43,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 620 states, 615 states have (on average 1.3463414634146342) internal successors, (828), 619 states have internal predecessors, (828), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:43,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 620 states to 620 states and 828 transitions. [2021-10-12 23:59:43,258 INFO L78 Accepts]: Start accepts. Automaton has 620 states and 828 transitions. Word has length 75 [2021-10-12 23:59:43,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:43,258 INFO L470 AbstractCegarLoop]: Abstraction has 620 states and 828 transitions. [2021-10-12 23:59:43,259 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:43,259 INFO L276 IsEmpty]: Start isEmpty. Operand 620 states and 828 transitions. [2021-10-12 23:59:43,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-12 23:59:43,260 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:43,260 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:43,261 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-12 23:59:43,261 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:43,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:43,261 INFO L82 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-10-12 23:59:43,262 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:43,262 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [613254723] [2021-10-12 23:59:43,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:43,262 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:43,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:43,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:43,371 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:43,371 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [613254723] [2021-10-12 23:59:43,371 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [613254723] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:43,371 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:43,372 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-12 23:59:43,372 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73860271] [2021-10-12 23:59:43,372 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-12 23:59:43,372 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:43,373 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-12 23:59:43,373 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-12 23:59:43,373 INFO L87 Difference]: Start difference. First operand 620 states and 828 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:43,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:43,570 INFO L93 Difference]: Finished difference Result 971 states and 1314 transitions. [2021-10-12 23:59:43,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-12 23:59:43,571 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-12 23:59:43,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:43,577 INFO L225 Difference]: With dead ends: 971 [2021-10-12 23:59:43,577 INFO L226 Difference]: Without dead ends: 969 [2021-10-12 23:59:43,578 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 41.8ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-12 23:59:43,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states. [2021-10-12 23:59:43,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 622. [2021-10-12 23:59:43,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 622 states, 617 states have (on average 1.3452188006482981) internal successors, (830), 621 states have internal predecessors, (830), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:43,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 830 transitions. [2021-10-12 23:59:43,643 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 830 transitions. Word has length 75 [2021-10-12 23:59:43,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:43,643 INFO L470 AbstractCegarLoop]: Abstraction has 622 states and 830 transitions. [2021-10-12 23:59:43,643 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:43,644 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 830 transitions. [2021-10-12 23:59:43,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-12 23:59:43,645 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:43,645 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:43,645 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-12 23:59:43,646 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:43,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:43,646 INFO L82 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-10-12 23:59:43,646 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:43,647 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673729208] [2021-10-12 23:59:43,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:43,647 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:43,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:43,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:43,712 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:43,712 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673729208] [2021-10-12 23:59:43,712 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1673729208] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:43,712 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:43,713 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-12 23:59:43,713 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077255250] [2021-10-12 23:59:43,713 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-12 23:59:43,713 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:43,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-12 23:59:43,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-12 23:59:43,714 INFO L87 Difference]: Start difference. First operand 622 states and 830 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:43,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:43,934 INFO L93 Difference]: Finished difference Result 1465 states and 2028 transitions. [2021-10-12 23:59:43,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-12 23:59:43,934 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-12 23:59:43,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:43,941 INFO L225 Difference]: With dead ends: 1465 [2021-10-12 23:59:43,941 INFO L226 Difference]: Without dead ends: 1098 [2021-10-12 23:59:43,942 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 33.7ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-12 23:59:43,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1098 states. [2021-10-12 23:59:44,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1098 to 628. [2021-10-12 23:59:44,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 628 states, 623 states have (on average 1.3418940609951846) internal successors, (836), 627 states have internal predecessors, (836), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:44,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 628 states to 628 states and 836 transitions. [2021-10-12 23:59:44,011 INFO L78 Accepts]: Start accepts. Automaton has 628 states and 836 transitions. Word has length 76 [2021-10-12 23:59:44,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:44,011 INFO L470 AbstractCegarLoop]: Abstraction has 628 states and 836 transitions. [2021-10-12 23:59:44,011 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:44,011 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 836 transitions. [2021-10-12 23:59:44,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-12 23:59:44,013 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:44,013 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:44,013 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-12 23:59:44,013 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:44,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:44,014 INFO L82 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-10-12 23:59:44,014 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:44,014 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950001668] [2021-10-12 23:59:44,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:44,015 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:44,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:44,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:44,065 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:44,065 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950001668] [2021-10-12 23:59:44,066 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1950001668] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:44,066 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:44,066 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:44,066 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189943908] [2021-10-12 23:59:44,067 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-12 23:59:44,067 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:44,067 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-12 23:59:44,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-12 23:59:44,068 INFO L87 Difference]: Start difference. First operand 628 states and 836 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:44,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:44,260 INFO L93 Difference]: Finished difference Result 1463 states and 1952 transitions. [2021-10-12 23:59:44,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-12 23:59:44,261 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-12 23:59:44,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:44,267 INFO L225 Difference]: With dead ends: 1463 [2021-10-12 23:59:44,267 INFO L226 Difference]: Without dead ends: 1072 [2021-10-12 23:59:44,268 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 8.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:44,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states. [2021-10-12 23:59:44,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 818. [2021-10-12 23:59:44,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 818 states, 813 states have (on average 1.3333333333333333) internal successors, (1084), 817 states have internal predecessors, (1084), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:44,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 818 states to 818 states and 1084 transitions. [2021-10-12 23:59:44,351 INFO L78 Accepts]: Start accepts. Automaton has 818 states and 1084 transitions. Word has length 76 [2021-10-12 23:59:44,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:44,351 INFO L470 AbstractCegarLoop]: Abstraction has 818 states and 1084 transitions. [2021-10-12 23:59:44,352 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:44,352 INFO L276 IsEmpty]: Start isEmpty. Operand 818 states and 1084 transitions. [2021-10-12 23:59:44,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-12 23:59:44,353 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:44,353 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:44,354 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-12 23:59:44,354 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:44,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:44,354 INFO L82 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-10-12 23:59:44,355 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:44,355 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095394457] [2021-10-12 23:59:44,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:44,355 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:44,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:44,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:44,449 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:44,449 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095394457] [2021-10-12 23:59:44,449 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095394457] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:44,450 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:44,450 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-12 23:59:44,450 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1498678127] [2021-10-12 23:59:44,450 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-12 23:59:44,451 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:44,451 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-12 23:59:44,451 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-12 23:59:44,452 INFO L87 Difference]: Start difference. First operand 818 states and 1084 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:45,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:45,010 INFO L93 Difference]: Finished difference Result 3144 states and 4188 transitions. [2021-10-12 23:59:45,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-12 23:59:45,010 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-12 23:59:45,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:45,025 INFO L225 Difference]: With dead ends: 3144 [2021-10-12 23:59:45,025 INFO L226 Difference]: Without dead ends: 2626 [2021-10-12 23:59:45,027 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 84.2ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-12 23:59:45,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2626 states. [2021-10-12 23:59:45,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2626 to 872. [2021-10-12 23:59:45,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 872 states, 867 states have (on average 1.328719723183391) internal successors, (1152), 871 states have internal predecessors, (1152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:45,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 872 states to 872 states and 1152 transitions. [2021-10-12 23:59:45,138 INFO L78 Accepts]: Start accepts. Automaton has 872 states and 1152 transitions. Word has length 76 [2021-10-12 23:59:45,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:45,138 INFO L470 AbstractCegarLoop]: Abstraction has 872 states and 1152 transitions. [2021-10-12 23:59:45,139 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:45,139 INFO L276 IsEmpty]: Start isEmpty. Operand 872 states and 1152 transitions. [2021-10-12 23:59:45,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-12 23:59:45,140 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:45,141 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:45,141 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-12 23:59:45,141 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:45,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:45,142 INFO L82 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-10-12 23:59:45,142 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:45,142 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190333658] [2021-10-12 23:59:45,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:45,142 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:45,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:45,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:45,221 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:45,221 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [190333658] [2021-10-12 23:59:45,221 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [190333658] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:45,221 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:45,221 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:45,222 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805874587] [2021-10-12 23:59:45,222 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-12 23:59:45,222 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:45,223 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-12 23:59:45,223 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-12 23:59:45,223 INFO L87 Difference]: Start difference. First operand 872 states and 1152 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:45,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:45,465 INFO L93 Difference]: Finished difference Result 2255 states and 2985 transitions. [2021-10-12 23:59:45,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-12 23:59:45,466 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-12 23:59:45,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:45,475 INFO L225 Difference]: With dead ends: 2255 [2021-10-12 23:59:45,476 INFO L226 Difference]: Without dead ends: 1684 [2021-10-12 23:59:45,478 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 8.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:45,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1684 states. [2021-10-12 23:59:45,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1684 to 1213. [2021-10-12 23:59:45,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1213 states, 1208 states have (on average 1.3162251655629138) internal successors, (1590), 1212 states have internal predecessors, (1590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:45,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1213 states to 1213 states and 1590 transitions. [2021-10-12 23:59:45,624 INFO L78 Accepts]: Start accepts. Automaton has 1213 states and 1590 transitions. Word has length 77 [2021-10-12 23:59:45,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:45,625 INFO L470 AbstractCegarLoop]: Abstraction has 1213 states and 1590 transitions. [2021-10-12 23:59:45,625 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:45,625 INFO L276 IsEmpty]: Start isEmpty. Operand 1213 states and 1590 transitions. [2021-10-12 23:59:45,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-12 23:59:45,627 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:45,627 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:45,627 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-12 23:59:45,627 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:45,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:45,628 INFO L82 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-10-12 23:59:45,628 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:45,628 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028613598] [2021-10-12 23:59:45,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:45,629 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:45,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:45,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:45,669 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:45,669 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028613598] [2021-10-12 23:59:45,669 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1028613598] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:45,669 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:45,669 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:45,671 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [141244144] [2021-10-12 23:59:45,671 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:45,671 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:45,673 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:45,673 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:45,673 INFO L87 Difference]: Start difference. First operand 1213 states and 1590 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:45,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:45,950 INFO L93 Difference]: Finished difference Result 2967 states and 3887 transitions. [2021-10-12 23:59:45,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:45,951 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-12 23:59:45,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:45,961 INFO L225 Difference]: With dead ends: 2967 [2021-10-12 23:59:45,962 INFO L226 Difference]: Without dead ends: 2012 [2021-10-12 23:59:45,964 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:45,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2012 states. [2021-10-12 23:59:46,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2012 to 1215. [2021-10-12 23:59:46,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1215 states, 1210 states have (on average 1.315702479338843) internal successors, (1592), 1214 states have internal predecessors, (1592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:46,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1215 states to 1215 states and 1592 transitions. [2021-10-12 23:59:46,127 INFO L78 Accepts]: Start accepts. Automaton has 1215 states and 1592 transitions. Word has length 78 [2021-10-12 23:59:46,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:46,127 INFO L470 AbstractCegarLoop]: Abstraction has 1215 states and 1592 transitions. [2021-10-12 23:59:46,127 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:46,128 INFO L276 IsEmpty]: Start isEmpty. Operand 1215 states and 1592 transitions. [2021-10-12 23:59:46,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-12 23:59:46,129 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:46,129 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:46,130 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-12 23:59:46,130 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:46,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:46,131 INFO L82 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-10-12 23:59:46,131 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:46,131 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151535227] [2021-10-12 23:59:46,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:46,131 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:46,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:46,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:46,193 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:46,193 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151535227] [2021-10-12 23:59:46,193 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1151535227] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:46,194 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:46,194 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:46,194 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780481542] [2021-10-12 23:59:46,194 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-12 23:59:46,195 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:46,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-12 23:59:46,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-12 23:59:46,196 INFO L87 Difference]: Start difference. First operand 1215 states and 1592 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:46,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:46,404 INFO L93 Difference]: Finished difference Result 2519 states and 3295 transitions. [2021-10-12 23:59:46,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-12 23:59:46,404 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-12 23:59:46,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:46,412 INFO L225 Difference]: With dead ends: 2519 [2021-10-12 23:59:46,412 INFO L226 Difference]: Without dead ends: 1376 [2021-10-12 23:59:46,414 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 16.0ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:46,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2021-10-12 23:59:46,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1020. [2021-10-12 23:59:46,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 1015 states have (on average 1.3083743842364532) internal successors, (1328), 1019 states have internal predecessors, (1328), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:46,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1328 transitions. [2021-10-12 23:59:46,583 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1328 transitions. Word has length 79 [2021-10-12 23:59:46,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:46,583 INFO L470 AbstractCegarLoop]: Abstraction has 1020 states and 1328 transitions. [2021-10-12 23:59:46,584 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:46,584 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1328 transitions. [2021-10-12 23:59:46,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-12 23:59:46,585 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:46,585 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:46,586 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-12 23:59:46,586 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:46,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:46,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-10-12 23:59:46,587 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:46,587 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008960445] [2021-10-12 23:59:46,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:46,587 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:46,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:46,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:46,635 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:46,635 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008960445] [2021-10-12 23:59:46,635 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008960445] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:46,635 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:46,636 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-12 23:59:46,636 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762163997] [2021-10-12 23:59:46,636 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-12 23:59:46,636 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:46,637 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-12 23:59:46,637 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:46,637 INFO L87 Difference]: Start difference. First operand 1020 states and 1328 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:46,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:46,912 INFO L93 Difference]: Finished difference Result 2414 states and 3160 transitions. [2021-10-12 23:59:46,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-12 23:59:46,913 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-12 23:59:46,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:46,922 INFO L225 Difference]: With dead ends: 2414 [2021-10-12 23:59:46,922 INFO L226 Difference]: Without dead ends: 1537 [2021-10-12 23:59:46,924 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-12 23:59:46,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1537 states. [2021-10-12 23:59:47,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1537 to 1026. [2021-10-12 23:59:47,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1026 states, 1021 states have (on average 1.306562193927522) internal successors, (1334), 1025 states have internal predecessors, (1334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:47,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1026 states to 1026 states and 1334 transitions. [2021-10-12 23:59:47,090 INFO L78 Accepts]: Start accepts. Automaton has 1026 states and 1334 transitions. Word has length 80 [2021-10-12 23:59:47,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:47,091 INFO L470 AbstractCegarLoop]: Abstraction has 1026 states and 1334 transitions. [2021-10-12 23:59:47,123 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:47,123 INFO L276 IsEmpty]: Start isEmpty. Operand 1026 states and 1334 transitions. [2021-10-12 23:59:47,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-12 23:59:47,124 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:47,124 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:47,125 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-12 23:59:47,125 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:47,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:47,125 INFO L82 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-10-12 23:59:47,126 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:47,126 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720636997] [2021-10-12 23:59:47,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:47,126 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:47,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:47,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:47,285 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:47,285 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720636997] [2021-10-12 23:59:47,285 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720636997] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:47,285 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-12 23:59:47,285 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-12 23:59:47,286 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485584737] [2021-10-12 23:59:47,286 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-12 23:59:47,286 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:47,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-12 23:59:47,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-12 23:59:47,287 INFO L87 Difference]: Start difference. First operand 1026 states and 1334 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:47,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:47,489 INFO L93 Difference]: Finished difference Result 2367 states and 3085 transitions. [2021-10-12 23:59:47,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-12 23:59:47,490 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-12 23:59:47,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:47,497 INFO L225 Difference]: With dead ends: 2367 [2021-10-12 23:59:47,498 INFO L226 Difference]: Without dead ends: 1436 [2021-10-12 23:59:47,499 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 15.5ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-12 23:59:47,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2021-10-12 23:59:47,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 968. [2021-10-12 23:59:47,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.300103842159917) internal successors, (1252), 967 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:47,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1252 transitions. [2021-10-12 23:59:47,628 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1252 transitions. Word has length 80 [2021-10-12 23:59:47,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:47,628 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1252 transitions. [2021-10-12 23:59:47,629 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:47,629 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1252 transitions. [2021-10-12 23:59:47,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2021-10-12 23:59:47,632 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:47,632 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:47,632 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-12 23:59:47,633 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:47,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:47,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1161164796, now seen corresponding path program 1 times [2021-10-12 23:59:47,634 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:47,634 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841579698] [2021-10-12 23:59:47,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:47,634 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:47,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:47,800 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:47,800 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:47,801 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841579698] [2021-10-12 23:59:47,803 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1841579698] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-12 23:59:47,803 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1638918695] [2021-10-12 23:59:47,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:47,804 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-12 23:59:47,805 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-12 23:59:47,810 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-12 23:59:47,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-12 23:59:48,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:48,036 INFO L263 TraceCheckSpWp]: Trace formula consists of 709 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-12 23:59:48,053 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-12 23:59:48,541 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-12 23:59:48,541 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1638918695] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-12 23:59:48,541 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-12 23:59:48,542 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-12 23:59:48,542 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [515731173] [2021-10-12 23:59:48,542 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-12 23:59:48,543 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:48,543 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-12 23:59:48,543 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-12 23:59:48,544 INFO L87 Difference]: Start difference. First operand 968 states and 1252 transitions. Second operand has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:48,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-12 23:59:48,978 INFO L93 Difference]: Finished difference Result 2490 states and 3322 transitions. [2021-10-12 23:59:48,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-12 23:59:48,978 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 125 [2021-10-12 23:59:48,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-12 23:59:49,002 INFO L225 Difference]: With dead ends: 2490 [2021-10-12 23:59:49,002 INFO L226 Difference]: Without dead ends: 1701 [2021-10-12 23:59:49,004 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 123.4ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-12 23:59:49,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1701 states. [2021-10-12 23:59:49,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1701 to 968. [2021-10-12 23:59:49,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.2990654205607477) internal successors, (1251), 967 states have internal predecessors, (1251), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:49,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1251 transitions. [2021-10-12 23:59:49,163 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1251 transitions. Word has length 125 [2021-10-12 23:59:49,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-12 23:59:49,163 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1251 transitions. [2021-10-12 23:59:49,164 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-12 23:59:49,164 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1251 transitions. [2021-10-12 23:59:49,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2021-10-12 23:59:49,167 INFO L504 BasicCegarLoop]: Found error trace [2021-10-12 23:59:49,167 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-12 23:59:49,208 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-12 23:59:49,386 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-10-12 23:59:49,387 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-12 23:59:49,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-12 23:59:49,387 INFO L82 PathProgramCache]: Analyzing trace with hash -1641852183, now seen corresponding path program 1 times [2021-10-12 23:59:49,387 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-12 23:59:49,387 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965661001] [2021-10-12 23:59:49,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:49,388 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-12 23:59:49,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:49,536 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:49,536 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-12 23:59:49,536 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [965661001] [2021-10-12 23:59:49,537 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [965661001] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-12 23:59:49,537 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1891295402] [2021-10-12 23:59:49,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-12 23:59:49,537 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-12 23:59:49,537 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-12 23:59:49,538 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-12 23:59:49,554 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-12 23:59:49,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-12 23:59:49,776 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-12 23:59:49,782 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-12 23:59:50,318 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-12 23:59:50,318 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1891295402] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-12 23:59:50,318 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-12 23:59:50,318 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-12 23:59:50,319 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134756280] [2021-10-12 23:59:50,319 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-12 23:59:50,319 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-12 23:59:50,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-12 23:59:50,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-12 23:59:50,320 INFO L87 Difference]: Start difference. First operand 968 states and 1251 transitions. Second operand has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:01,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:01,325 INFO L93 Difference]: Finished difference Result 16562 states and 22008 transitions. [2021-10-13 00:00:01,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-13 00:00:01,325 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 129 [2021-10-13 00:00:01,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:01,367 INFO L225 Difference]: With dead ends: 16562 [2021-10-13 00:00:01,367 INFO L226 Difference]: Without dead ends: 15779 [2021-10-13 00:00:01,396 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 472 GetRequests, 221 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 5631.2ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-13 00:00:01,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15779 states. [2021-10-13 00:00:01,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15779 to 2664. [2021-10-13 00:00:01,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2664 states, 2659 states have (on average 1.300112824370064) internal successors, (3457), 2663 states have internal predecessors, (3457), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:01,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2664 states to 2664 states and 3457 transitions. [2021-10-13 00:00:01,931 INFO L78 Accepts]: Start accepts. Automaton has 2664 states and 3457 transitions. Word has length 129 [2021-10-13 00:00:01,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:01,931 INFO L470 AbstractCegarLoop]: Abstraction has 2664 states and 3457 transitions. [2021-10-13 00:00:01,931 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:01,932 INFO L276 IsEmpty]: Start isEmpty. Operand 2664 states and 3457 transitions. [2021-10-13 00:00:01,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-10-13 00:00:01,938 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:01,939 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:01,974 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-13 00:00:02,156 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-13 00:00:02,157 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:02,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:02,157 INFO L82 PathProgramCache]: Analyzing trace with hash -1066693851, now seen corresponding path program 1 times [2021-10-13 00:00:02,157 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:02,158 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505463027] [2021-10-13 00:00:02,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:02,158 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:02,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:02,487 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:00:02,487 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:02,487 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505463027] [2021-10-13 00:00:02,488 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [505463027] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:00:02,488 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [957879776] [2021-10-13 00:00:02,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:02,488 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:00:02,488 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:00:02,489 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:00:02,509 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-13 00:00:02,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:02,775 INFO L263 TraceCheckSpWp]: Trace formula consists of 775 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-13 00:00:02,782 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:00:03,152 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:00:03,155 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [957879776] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:00:03,155 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:00:03,155 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-13 00:00:03,156 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653276895] [2021-10-13 00:00:03,156 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-13 00:00:03,156 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:03,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-13 00:00:03,157 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-13 00:00:03,158 INFO L87 Difference]: Start difference. First operand 2664 states and 3457 transitions. Second operand has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:04,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:04,511 INFO L93 Difference]: Finished difference Result 9414 states and 12634 transitions. [2021-10-13 00:00:04,511 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-13 00:00:04,511 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-10-13 00:00:04,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:04,528 INFO L225 Difference]: With dead ends: 9414 [2021-10-13 00:00:04,529 INFO L226 Difference]: Without dead ends: 6969 [2021-10-13 00:00:04,534 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 140 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 154.0ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-13 00:00:04,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6969 states. [2021-10-13 00:00:04,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6969 to 2248. [2021-10-13 00:00:04,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2248 states, 2243 states have (on average 1.294694605439144) internal successors, (2904), 2247 states have internal predecessors, (2904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:04,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2248 states to 2248 states and 2904 transitions. [2021-10-13 00:00:04,971 INFO L78 Accepts]: Start accepts. Automaton has 2248 states and 2904 transitions. Word has length 130 [2021-10-13 00:00:04,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:04,971 INFO L470 AbstractCegarLoop]: Abstraction has 2248 states and 2904 transitions. [2021-10-13 00:00:04,971 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:04,972 INFO L276 IsEmpty]: Start isEmpty. Operand 2248 states and 2904 transitions. [2021-10-13 00:00:04,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-13 00:00:04,977 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:04,977 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:05,015 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-13 00:00:05,190 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-13 00:00:05,190 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:05,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:05,191 INFO L82 PathProgramCache]: Analyzing trace with hash -2028457745, now seen corresponding path program 1 times [2021-10-13 00:00:05,191 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:05,191 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836188243] [2021-10-13 00:00:05,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:05,191 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:05,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:05,314 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-13 00:00:05,314 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:05,315 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836188243] [2021-10-13 00:00:05,315 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1836188243] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:00:05,315 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:00:05,315 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 00:00:05,315 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [672521464] [2021-10-13 00:00:05,316 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 00:00:05,316 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:05,317 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 00:00:05,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-13 00:00:05,317 INFO L87 Difference]: Start difference. First operand 2248 states and 2904 transitions. Second operand has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:07,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:07,138 INFO L93 Difference]: Finished difference Result 12918 states and 17076 transitions. [2021-10-13 00:00:07,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-13 00:00:07,139 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-13 00:00:07,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:07,178 INFO L225 Difference]: With dead ends: 12918 [2021-10-13 00:00:07,179 INFO L226 Difference]: Without dead ends: 10909 [2021-10-13 00:00:07,198 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 149.4ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-13 00:00:07,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10909 states. [2021-10-13 00:00:07,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10909 to 2668. [2021-10-13 00:00:07,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2771310552009012) internal successors, (3401), 2667 states have internal predecessors, (3401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:07,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3401 transitions. [2021-10-13 00:00:07,664 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3401 transitions. Word has length 131 [2021-10-13 00:00:07,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:07,664 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3401 transitions. [2021-10-13 00:00:07,665 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:07,665 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3401 transitions. [2021-10-13 00:00:07,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-13 00:00:07,670 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:07,671 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:07,671 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-13 00:00:07,671 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:07,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:07,672 INFO L82 PathProgramCache]: Analyzing trace with hash 603418006, now seen corresponding path program 1 times [2021-10-13 00:00:07,672 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:07,672 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451961080] [2021-10-13 00:00:07,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:07,673 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:07,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:07,826 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 00:00:07,826 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:07,827 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451961080] [2021-10-13 00:00:07,827 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451961080] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:00:07,827 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:00:07,827 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:00:07,827 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555369972] [2021-10-13 00:00:07,828 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:00:07,828 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:07,828 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:00:07,829 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:00:07,829 INFO L87 Difference]: Start difference. First operand 2668 states and 3401 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:08,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:08,887 INFO L93 Difference]: Finished difference Result 8583 states and 11271 transitions. [2021-10-13 00:00:08,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:00:08,887 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-13 00:00:08,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:08,900 INFO L225 Difference]: With dead ends: 8583 [2021-10-13 00:00:08,900 INFO L226 Difference]: Without dead ends: 6094 [2021-10-13 00:00:08,904 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 57.7ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 00:00:08,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6094 states. [2021-10-13 00:00:09,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6094 to 2668. [2021-10-13 00:00:09,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2756289898610589) internal successors, (3397), 2667 states have internal predecessors, (3397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:09,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3397 transitions. [2021-10-13 00:00:09,402 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3397 transitions. Word has length 132 [2021-10-13 00:00:09,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:09,402 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3397 transitions. [2021-10-13 00:00:09,403 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:09,403 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3397 transitions. [2021-10-13 00:00:09,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-13 00:00:09,409 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:09,409 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:09,416 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-13 00:00:09,417 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:09,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:09,418 INFO L82 PathProgramCache]: Analyzing trace with hash 1877464571, now seen corresponding path program 1 times [2021-10-13 00:00:09,418 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:09,418 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356858798] [2021-10-13 00:00:09,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:09,418 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:09,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:09,573 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 00:00:09,573 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:09,574 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356858798] [2021-10-13 00:00:09,574 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [356858798] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:00:09,574 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:00:09,574 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:00:09,574 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1243997423] [2021-10-13 00:00:09,575 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:00:09,576 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:09,576 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:00:09,576 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:00:09,577 INFO L87 Difference]: Start difference. First operand 2668 states and 3397 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:10,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:10,552 INFO L93 Difference]: Finished difference Result 7775 states and 10081 transitions. [2021-10-13 00:00:10,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:00:10,553 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-13 00:00:10,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:10,562 INFO L225 Difference]: With dead ends: 7775 [2021-10-13 00:00:10,563 INFO L226 Difference]: Without dead ends: 5286 [2021-10-13 00:00:10,567 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 50.8ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 00:00:10,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5286 states. [2021-10-13 00:00:11,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5286 to 2668. [2021-10-13 00:00:11,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2741269245212166) internal successors, (3393), 2667 states have internal predecessors, (3393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:11,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3393 transitions. [2021-10-13 00:00:11,115 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3393 transitions. Word has length 136 [2021-10-13 00:00:11,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:11,116 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3393 transitions. [2021-10-13 00:00:11,116 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:11,116 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3393 transitions. [2021-10-13 00:00:11,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-13 00:00:11,122 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:11,123 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:11,123 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-13 00:00:11,123 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:11,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:11,124 INFO L82 PathProgramCache]: Analyzing trace with hash 1682749301, now seen corresponding path program 1 times [2021-10-13 00:00:11,124 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:11,124 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313777057] [2021-10-13 00:00:11,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:11,124 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:11,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:11,236 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-13 00:00:11,236 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:11,236 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313777057] [2021-10-13 00:00:11,237 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313777057] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:00:11,237 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:00:11,237 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:00:11,237 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589119799] [2021-10-13 00:00:11,238 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:00:11,238 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:11,238 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:00:11,238 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:00:11,239 INFO L87 Difference]: Start difference. First operand 2668 states and 3393 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:11,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:11,507 INFO L93 Difference]: Finished difference Result 4368 states and 5586 transitions. [2021-10-13 00:00:11,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:00:11,507 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-13 00:00:11,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:11,510 INFO L225 Difference]: With dead ends: 4368 [2021-10-13 00:00:11,510 INFO L226 Difference]: Without dead ends: 1841 [2021-10-13 00:00:11,514 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.5ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:00:11,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1841 states. [2021-10-13 00:00:11,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1841 to 1841. [2021-10-13 00:00:11,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1841 states, 1836 states have (on average 1.2734204793028323) internal successors, (2338), 1840 states have internal predecessors, (2338), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:11,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1841 states to 1841 states and 2338 transitions. [2021-10-13 00:00:11,738 INFO L78 Accepts]: Start accepts. Automaton has 1841 states and 2338 transitions. Word has length 139 [2021-10-13 00:00:11,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:11,738 INFO L470 AbstractCegarLoop]: Abstraction has 1841 states and 2338 transitions. [2021-10-13 00:00:11,739 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:11,739 INFO L276 IsEmpty]: Start isEmpty. Operand 1841 states and 2338 transitions. [2021-10-13 00:00:11,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-13 00:00:11,742 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:11,742 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:11,742 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-13 00:00:11,743 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:11,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:11,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1680671061, now seen corresponding path program 1 times [2021-10-13 00:00:11,743 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:11,743 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899430434] [2021-10-13 00:00:11,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:11,743 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:11,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:11,941 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:00:11,941 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:11,941 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [899430434] [2021-10-13 00:00:11,942 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [899430434] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:00:11,942 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [567787020] [2021-10-13 00:00:11,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:11,942 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:00:11,942 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:00:11,943 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:00:11,962 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-13 00:00:12,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:12,264 INFO L263 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-13 00:00:12,268 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:00:13,119 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:00:13,120 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [567787020] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:00:13,120 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:00:13,120 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-13 00:00:13,120 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646728178] [2021-10-13 00:00:13,121 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-13 00:00:13,121 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:13,122 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-13 00:00:13,122 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-13 00:00:13,122 INFO L87 Difference]: Start difference. First operand 1841 states and 2338 transitions. Second operand has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:14,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:14,972 INFO L93 Difference]: Finished difference Result 5129 states and 6549 transitions. [2021-10-13 00:00:14,973 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-13 00:00:14,973 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-13 00:00:14,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:14,976 INFO L225 Difference]: With dead ends: 5129 [2021-10-13 00:00:14,976 INFO L226 Difference]: Without dead ends: 3477 [2021-10-13 00:00:14,979 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 442.1ms TimeCoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2021-10-13 00:00:14,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3477 states. [2021-10-13 00:00:15,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3477 to 2077. [2021-10-13 00:00:15,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2077 states, 2072 states have (on average 1.2697876447876448) internal successors, (2631), 2076 states have internal predecessors, (2631), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:15,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2077 states to 2077 states and 2631 transitions. [2021-10-13 00:00:15,261 INFO L78 Accepts]: Start accepts. Automaton has 2077 states and 2631 transitions. Word has length 139 [2021-10-13 00:00:15,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:15,262 INFO L470 AbstractCegarLoop]: Abstraction has 2077 states and 2631 transitions. [2021-10-13 00:00:15,262 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:15,263 INFO L276 IsEmpty]: Start isEmpty. Operand 2077 states and 2631 transitions. [2021-10-13 00:00:15,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-13 00:00:15,268 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:15,268 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:15,300 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2021-10-13 00:00:15,482 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:00:15,482 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:15,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:15,483 INFO L82 PathProgramCache]: Analyzing trace with hash 1991014633, now seen corresponding path program 1 times [2021-10-13 00:00:15,483 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:15,483 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814008136] [2021-10-13 00:00:15,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:15,483 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:15,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:15,569 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-10-13 00:00:15,570 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:15,570 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814008136] [2021-10-13 00:00:15,570 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [814008136] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:00:15,570 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:00:15,571 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:00:15,571 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227247077] [2021-10-13 00:00:15,571 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:00:15,571 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:15,572 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:00:15,572 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:00:15,573 INFO L87 Difference]: Start difference. First operand 2077 states and 2631 transitions. Second operand has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:15,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:15,885 INFO L93 Difference]: Finished difference Result 3899 states and 4977 transitions. [2021-10-13 00:00:15,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:00:15,885 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-13 00:00:15,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:15,887 INFO L225 Difference]: With dead ends: 3899 [2021-10-13 00:00:15,887 INFO L226 Difference]: Without dead ends: 1952 [2021-10-13 00:00:15,889 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 10.3ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:00:15,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1952 states. [2021-10-13 00:00:16,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1952 to 1952. [2021-10-13 00:00:16,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1952 states, 1947 states have (on average 1.273240883410375) internal successors, (2479), 1951 states have internal predecessors, (2479), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:16,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1952 states to 1952 states and 2479 transitions. [2021-10-13 00:00:16,142 INFO L78 Accepts]: Start accepts. Automaton has 1952 states and 2479 transitions. Word has length 139 [2021-10-13 00:00:16,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:16,142 INFO L470 AbstractCegarLoop]: Abstraction has 1952 states and 2479 transitions. [2021-10-13 00:00:16,142 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:16,143 INFO L276 IsEmpty]: Start isEmpty. Operand 1952 states and 2479 transitions. [2021-10-13 00:00:16,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-13 00:00:16,146 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:16,147 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:16,147 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-13 00:00:16,147 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:16,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:16,148 INFO L82 PathProgramCache]: Analyzing trace with hash 1475255201, now seen corresponding path program 1 times [2021-10-13 00:00:16,148 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:16,148 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142666527] [2021-10-13 00:00:16,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:16,149 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:16,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:16,359 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:00:16,359 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:16,359 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142666527] [2021-10-13 00:00:16,360 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142666527] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:00:16,360 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1813410158] [2021-10-13 00:00:16,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:16,360 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:00:16,360 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:00:16,363 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:00:16,382 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-13 00:00:16,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:16,717 INFO L263 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-13 00:00:16,720 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:00:17,536 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:00:17,536 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1813410158] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:00:17,536 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:00:17,536 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-13 00:00:17,536 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958210135] [2021-10-13 00:00:17,537 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-13 00:00:17,537 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:17,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-13 00:00:17,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-13 00:00:17,538 INFO L87 Difference]: Start difference. First operand 1952 states and 2479 transitions. Second operand has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:19,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:19,312 INFO L93 Difference]: Finished difference Result 5715 states and 7287 transitions. [2021-10-13 00:00:19,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-10-13 00:00:19,312 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-13 00:00:19,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:19,317 INFO L225 Difference]: With dead ends: 5715 [2021-10-13 00:00:19,317 INFO L226 Difference]: Without dead ends: 3952 [2021-10-13 00:00:19,319 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 458.3ms TimeCoverageRelationStatistics Valid=353, Invalid=1453, Unknown=0, NotChecked=0, Total=1806 [2021-10-13 00:00:19,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3952 states. [2021-10-13 00:00:19,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3952 to 2215. [2021-10-13 00:00:19,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2215 states, 2210 states have (on average 1.2692307692307692) internal successors, (2805), 2214 states have internal predecessors, (2805), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:19,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2215 states to 2215 states and 2805 transitions. [2021-10-13 00:00:19,901 INFO L78 Accepts]: Start accepts. Automaton has 2215 states and 2805 transitions. Word has length 140 [2021-10-13 00:00:19,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:19,902 INFO L470 AbstractCegarLoop]: Abstraction has 2215 states and 2805 transitions. [2021-10-13 00:00:19,902 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:19,903 INFO L276 IsEmpty]: Start isEmpty. Operand 2215 states and 2805 transitions. [2021-10-13 00:00:19,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-13 00:00:19,907 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:19,908 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:19,946 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-13 00:00:20,122 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2021-10-13 00:00:20,123 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:20,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:20,123 INFO L82 PathProgramCache]: Analyzing trace with hash 1593696675, now seen corresponding path program 1 times [2021-10-13 00:00:20,123 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:20,123 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795941934] [2021-10-13 00:00:20,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:20,124 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:20,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:00:20,192 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-13 00:00:20,192 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:00:20,192 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795941934] [2021-10-13 00:00:20,193 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795941934] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:00:20,193 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:00:20,193 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:00:20,193 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605114238] [2021-10-13 00:00:20,194 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:00:20,195 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:00:20,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:00:20,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:00:20,196 INFO L87 Difference]: Start difference. First operand 2215 states and 2805 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:20,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:00:20,581 INFO L93 Difference]: Finished difference Result 4093 states and 5216 transitions. [2021-10-13 00:00:20,581 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:00:20,581 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-13 00:00:20,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:00:20,583 INFO L225 Difference]: With dead ends: 4093 [2021-10-13 00:00:20,583 INFO L226 Difference]: Without dead ends: 2010 [2021-10-13 00:00:20,585 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.4ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:00:20,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2010 states. [2021-10-13 00:00:20,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2010 to 2002. [2021-10-13 00:00:20,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2002 states, 1997 states have (on average 1.2663995993990986) internal successors, (2529), 2001 states have internal predecessors, (2529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:20,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2002 states to 2002 states and 2529 transitions. [2021-10-13 00:00:20,972 INFO L78 Accepts]: Start accepts. Automaton has 2002 states and 2529 transitions. Word has length 140 [2021-10-13 00:00:20,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:00:20,973 INFO L470 AbstractCegarLoop]: Abstraction has 2002 states and 2529 transitions. [2021-10-13 00:00:20,973 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:00:20,973 INFO L276 IsEmpty]: Start isEmpty. Operand 2002 states and 2529 transitions. [2021-10-13 00:00:20,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-13 00:00:20,976 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:00:20,977 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:00:20,977 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-13 00:00:20,977 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:00:20,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:00:20,978 INFO L82 PathProgramCache]: Analyzing trace with hash 458292102, now seen corresponding path program 1 times [2021-10-13 00:00:20,978 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:00:20,978 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139935398] [2021-10-13 00:00:20,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:00:20,978 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:00:21,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:00:21,056 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 00:00:21,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:00:21,324 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 00:00:21,324 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-10-13 00:00:21,326 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,328 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,328 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,328 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,329 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,329 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,329 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,329 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,329 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,330 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,330 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,330 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,330 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,330 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,330 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,331 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,331 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,332 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,332 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,332 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,333 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,333 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,333 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:00:21,333 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-13 00:00:21,342 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-13 00:00:21,617 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 12:00:21 BoogieIcfgContainer [2021-10-13 00:00:21,617 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-13 00:00:21,618 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-13 00:00:21,618 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-13 00:00:21,618 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-13 00:00:21,619 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 11:59:37" (3/4) ... [2021-10-13 00:00:21,621 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-13 00:00:21,899 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/witness.graphml [2021-10-13 00:00:21,900 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-13 00:00:21,901 INFO L168 Benchmark]: Toolchain (without parser) took 45838.60 ms. Allocated memory was 88.1 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 48.9 MB in the beginning and 511.0 MB in the end (delta: -462.1 MB). Peak memory consumption was 725.7 MB. Max. memory is 16.1 GB. [2021-10-13 00:00:21,902 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 88.1 MB. Free memory is still 66.2 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-13 00:00:21,902 INFO L168 Benchmark]: CACSL2BoogieTranslator took 464.92 ms. Allocated memory was 88.1 MB in the beginning and 111.1 MB in the end (delta: 23.1 MB). Free memory was 48.7 MB in the beginning and 80.0 MB in the end (delta: -31.3 MB). Peak memory consumption was 8.3 MB. Max. memory is 16.1 GB. [2021-10-13 00:00:21,903 INFO L168 Benchmark]: Boogie Procedure Inliner took 83.12 ms. Allocated memory is still 111.1 MB. Free memory was 80.0 MB in the beginning and 75.1 MB in the end (delta: 4.8 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-13 00:00:21,903 INFO L168 Benchmark]: Boogie Preprocessor took 68.46 ms. Allocated memory is still 111.1 MB. Free memory was 75.1 MB in the beginning and 71.3 MB in the end (delta: 3.9 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-13 00:00:21,904 INFO L168 Benchmark]: RCFGBuilder took 1158.51 ms. Allocated memory is still 111.1 MB. Free memory was 71.3 MB in the beginning and 34.5 MB in the end (delta: 36.8 MB). Peak memory consumption was 37.7 MB. Max. memory is 16.1 GB. [2021-10-13 00:00:21,904 INFO L168 Benchmark]: TraceAbstraction took 43772.41 ms. Allocated memory was 111.1 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 33.8 MB in the beginning and 557.1 MB in the end (delta: -523.3 MB). Peak memory consumption was 641.9 MB. Max. memory is 16.1 GB. [2021-10-13 00:00:21,904 INFO L168 Benchmark]: Witness Printer took 282.00 ms. Allocated memory is still 1.3 GB. Free memory was 557.1 MB in the beginning and 511.0 MB in the end (delta: 46.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. [2021-10-13 00:00:21,910 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 88.1 MB. Free memory is still 66.2 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 464.92 ms. Allocated memory was 88.1 MB in the beginning and 111.1 MB in the end (delta: 23.1 MB). Free memory was 48.7 MB in the beginning and 80.0 MB in the end (delta: -31.3 MB). Peak memory consumption was 8.3 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 83.12 ms. Allocated memory is still 111.1 MB. Free memory was 80.0 MB in the beginning and 75.1 MB in the end (delta: 4.8 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 68.46 ms. Allocated memory is still 111.1 MB. Free memory was 75.1 MB in the beginning and 71.3 MB in the end (delta: 3.9 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1158.51 ms. Allocated memory is still 111.1 MB. Free memory was 71.3 MB in the beginning and 34.5 MB in the end (delta: 36.8 MB). Peak memory consumption was 37.7 MB. Max. memory is 16.1 GB. * TraceAbstraction took 43772.41 ms. Allocated memory was 111.1 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 33.8 MB in the beginning and 557.1 MB in the end (delta: -523.3 MB). Peak memory consumption was 641.9 MB. Max. memory is 16.1 GB. * Witness Printer took 282.00 ms. Allocated memory is still 1.3 GB. Free memory was 557.1 MB in the beginning and 511.0 MB in the end (delta: 46.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 610]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L555] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L608] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L608] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L610] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 294 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 43392.1ms, OverallIterations: 38, TraceHistogramMax: 2, EmptinessCheckTime: 124.7ms, AutomataDifference: 26255.2ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 31.3ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 16987 SDtfs, 37945 SDslu, 44510 SDs, 0 SdLazy, 7949 SolverSat, 561 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5386.6ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1360 GetRequests, 854 SyntacticMatches, 5 SemanticMatches, 501 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29934 ImplicationChecksByTransitivity, 7610.0ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=2668occurred in iteration=30, InterpolantAutomatonStates: 514, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 6085.4ms AutomataMinimizationTime, 37 MinimizatonAttempts, 45531 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 431.0ms SsaConstructionTime, 2019.7ms SatisfiabilityAnalysisTime, 5773.4ms InterpolantComputationTime, 3987 NumberOfCodeBlocks, 3987 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3804 ConstructedInterpolants, 0 QuantifiedInterpolants, 13153 SizeOfPredicates, 30 NumberOfNonLiveVariables, 3812 ConjunctsInSsa, 82 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-13 00:00:21,973 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff3c2c8b-f8ea-42fe-be67-2594408d6e2b/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...