./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e77c044 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d9ecf85320259ca6a96cafa4bf7db313d813a568 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-4e77c04 [2021-10-13 01:15:57,602 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-13 01:15:57,604 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-13 01:15:57,646 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-13 01:15:57,647 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-13 01:15:57,649 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-13 01:15:57,651 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-13 01:15:57,654 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-13 01:15:57,657 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-13 01:15:57,659 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-13 01:15:57,660 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-13 01:15:57,663 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-13 01:15:57,663 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-13 01:15:57,665 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-13 01:15:57,667 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-13 01:15:57,670 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-13 01:15:57,671 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-13 01:15:57,673 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-13 01:15:57,676 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-13 01:15:57,680 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-13 01:15:57,683 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-13 01:15:57,685 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-13 01:15:57,687 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-13 01:15:57,689 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-13 01:15:57,694 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-13 01:15:57,695 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-13 01:15:57,696 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-13 01:15:57,697 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-13 01:15:57,698 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-13 01:15:57,700 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-13 01:15:57,700 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-13 01:15:57,702 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-13 01:15:57,703 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-13 01:15:57,704 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-13 01:15:57,706 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-13 01:15:57,707 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-13 01:15:57,708 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-13 01:15:57,708 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-13 01:15:57,709 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-13 01:15:57,710 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-13 01:15:57,712 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-13 01:15:57,713 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-13 01:15:57,745 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-13 01:15:57,746 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-13 01:15:57,747 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-13 01:15:57,747 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-13 01:15:57,749 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-13 01:15:57,750 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-13 01:15:57,750 INFO L138 SettingsManager]: * Use SBE=true [2021-10-13 01:15:57,751 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-13 01:15:57,751 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-13 01:15:57,752 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-13 01:15:57,752 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-13 01:15:57,753 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-13 01:15:57,753 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-13 01:15:57,754 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-13 01:15:57,754 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-13 01:15:57,755 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-13 01:15:57,755 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-13 01:15:57,756 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-13 01:15:57,756 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-13 01:15:57,756 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-13 01:15:57,757 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-13 01:15:57,757 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-13 01:15:57,757 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 01:15:57,758 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-13 01:15:57,758 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-13 01:15:57,758 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-13 01:15:57,759 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-13 01:15:57,759 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-13 01:15:57,759 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-13 01:15:57,760 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-13 01:15:57,760 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d9ecf85320259ca6a96cafa4bf7db313d813a568 [2021-10-13 01:15:58,112 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-13 01:15:58,145 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-13 01:15:58,149 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-13 01:15:58,153 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-13 01:15:58,154 INFO L275 PluginConnector]: CDTParser initialized [2021-10-13 01:15:58,155 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-13 01:15:58,259 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/data/adaf9bc9c/298a6552db6e42f782c112aeb520ac07/FLAGdd8f1610d [2021-10-13 01:15:58,856 INFO L306 CDTParser]: Found 1 translation units. [2021-10-13 01:15:58,858 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-13 01:15:58,878 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/data/adaf9bc9c/298a6552db6e42f782c112aeb520ac07/FLAGdd8f1610d [2021-10-13 01:15:59,139 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/data/adaf9bc9c/298a6552db6e42f782c112aeb520ac07 [2021-10-13 01:15:59,141 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-13 01:15:59,142 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-13 01:15:59,146 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-13 01:15:59,146 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-13 01:15:59,149 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-13 01:15:59,149 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,150 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e1b923c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59, skipping insertion in model container [2021-10-13 01:15:59,151 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,158 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-13 01:15:59,194 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-13 01:15:59,482 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-13 01:15:59,486 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 01:15:59,497 INFO L203 MainTranslator]: Completed pre-run [2021-10-13 01:15:59,590 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-13 01:15:59,590 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 01:15:59,611 INFO L208 MainTranslator]: Completed translation [2021-10-13 01:15:59,611 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59 WrapperNode [2021-10-13 01:15:59,611 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-13 01:15:59,612 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-13 01:15:59,612 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-13 01:15:59,613 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-13 01:15:59,621 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,635 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,728 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-13 01:15:59,729 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-13 01:15:59,729 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-13 01:15:59,729 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-13 01:15:59,738 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,738 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,746 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,746 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,767 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,779 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,784 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,793 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-13 01:15:59,794 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-13 01:15:59,794 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-13 01:15:59,794 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-13 01:15:59,796 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (1/1) ... [2021-10-13 01:15:59,804 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 01:15:59,823 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:15:59,838 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-13 01:15:59,850 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-13 01:15:59,891 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-13 01:15:59,891 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-13 01:15:59,892 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-13 01:15:59,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-13 01:16:01,026 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-13 01:16:01,027 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-13 01:16:01,031 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 01:16:01 BoogieIcfgContainer [2021-10-13 01:16:01,031 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-13 01:16:01,037 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-13 01:16:01,037 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-13 01:16:01,041 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-13 01:16:01,042 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 01:15:59" (1/3) ... [2021-10-13 01:16:01,043 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38aa602e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 01:16:01, skipping insertion in model container [2021-10-13 01:16:01,045 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 01:15:59" (2/3) ... [2021-10-13 01:16:01,045 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38aa602e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 01:16:01, skipping insertion in model container [2021-10-13 01:16:01,046 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 01:16:01" (3/3) ... [2021-10-13 01:16:01,047 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-13 01:16:01,060 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-13 01:16:01,061 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-13 01:16:01,146 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-13 01:16:01,157 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-13 01:16:01,157 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-13 01:16:01,195 INFO L276 IsEmpty]: Start isEmpty. Operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:01,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-13 01:16:01,206 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:01,207 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:01,208 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:01,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:01,215 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-13 01:16:01,234 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:01,235 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467378886] [2021-10-13 01:16:01,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:01,237 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:01,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:01,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:01,497 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:01,497 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [467378886] [2021-10-13 01:16:01,498 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [467378886] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:01,498 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:01,499 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-13 01:16:01,510 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [544780529] [2021-10-13 01:16:01,520 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-13 01:16:01,520 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:01,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-13 01:16:01,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-13 01:16:01,543 INFO L87 Difference]: Start difference. First operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:01,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:01,593 INFO L93 Difference]: Finished difference Result 578 states and 901 transitions. [2021-10-13 01:16:01,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-13 01:16:01,595 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-13 01:16:01,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:01,621 INFO L225 Difference]: With dead ends: 578 [2021-10-13 01:16:01,622 INFO L226 Difference]: Without dead ends: 293 [2021-10-13 01:16:01,638 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-13 01:16:01,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-13 01:16:01,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-13 01:16:01,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5888888888888888) internal successors, (429), 292 states have internal predecessors, (429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:01,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 429 transitions. [2021-10-13 01:16:01,721 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 429 transitions. Word has length 33 [2021-10-13 01:16:01,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:01,722 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 429 transitions. [2021-10-13 01:16:01,723 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:01,723 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 429 transitions. [2021-10-13 01:16:01,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-13 01:16:01,725 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:01,725 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:01,726 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-13 01:16:01,726 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:01,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:01,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-13 01:16:01,728 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:01,728 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058886513] [2021-10-13 01:16:01,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:01,729 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:01,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:01,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:01,871 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:01,871 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058886513] [2021-10-13 01:16:01,871 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1058886513] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:01,872 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:01,872 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:01,872 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737802562] [2021-10-13 01:16:01,874 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:01,874 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:01,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:01,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:01,878 INFO L87 Difference]: Start difference. First operand 293 states and 429 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:01,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:01,983 INFO L93 Difference]: Finished difference Result 572 states and 832 transitions. [2021-10-13 01:16:01,985 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 01:16:01,985 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-13 01:16:01,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:01,993 INFO L225 Difference]: With dead ends: 572 [2021-10-13 01:16:01,993 INFO L226 Difference]: Without dead ends: 293 [2021-10-13 01:16:01,996 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 14.0ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:01,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-13 01:16:02,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-13 01:16:02,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5444444444444445) internal successors, (417), 292 states have internal predecessors, (417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 417 transitions. [2021-10-13 01:16:02,041 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 417 transitions. Word has length 33 [2021-10-13 01:16:02,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:02,042 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 417 transitions. [2021-10-13 01:16:02,042 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,043 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 417 transitions. [2021-10-13 01:16:02,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-13 01:16:02,051 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:02,052 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:02,052 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-13 01:16:02,053 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:02,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:02,060 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-13 01:16:02,060 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:02,060 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402826249] [2021-10-13 01:16:02,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:02,061 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:02,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:02,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:02,271 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:02,272 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402826249] [2021-10-13 01:16:02,273 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [402826249] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:02,274 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:02,279 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:02,280 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634754470] [2021-10-13 01:16:02,281 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:02,281 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:02,289 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:02,289 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:02,290 INFO L87 Difference]: Start difference. First operand 293 states and 417 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:02,341 INFO L93 Difference]: Finished difference Result 603 states and 867 transitions. [2021-10-13 01:16:02,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:02,341 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-13 01:16:02,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:02,346 INFO L225 Difference]: With dead ends: 603 [2021-10-13 01:16:02,346 INFO L226 Difference]: Without dead ends: 327 [2021-10-13 01:16:02,348 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:02,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2021-10-13 01:16:02,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 269. [2021-10-13 01:16:02,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 269 states, 250 states have (on average 1.524) internal successors, (381), 268 states have internal predecessors, (381), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 381 transitions. [2021-10-13 01:16:02,384 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 381 transitions. Word has length 44 [2021-10-13 01:16:02,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:02,385 INFO L470 AbstractCegarLoop]: Abstraction has 269 states and 381 transitions. [2021-10-13 01:16:02,386 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,386 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 381 transitions. [2021-10-13 01:16:02,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-13 01:16:02,389 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:02,389 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:02,390 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-13 01:16:02,390 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:02,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:02,393 INFO L82 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-13 01:16:02,393 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:02,394 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [967455322] [2021-10-13 01:16:02,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:02,394 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:02,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:02,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:02,556 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:02,557 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [967455322] [2021-10-13 01:16:02,557 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [967455322] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:02,558 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:02,558 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:02,559 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127203963] [2021-10-13 01:16:02,559 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:02,560 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:02,560 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:02,560 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:02,561 INFO L87 Difference]: Start difference. First operand 269 states and 381 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:02,597 INFO L93 Difference]: Finished difference Result 750 states and 1074 transitions. [2021-10-13 01:16:02,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:02,598 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-13 01:16:02,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:02,602 INFO L225 Difference]: With dead ends: 750 [2021-10-13 01:16:02,602 INFO L226 Difference]: Without dead ends: 498 [2021-10-13 01:16:02,603 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:02,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states. [2021-10-13 01:16:02,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 304. [2021-10-13 01:16:02,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 304 states, 285 states have (on average 1.5192982456140351) internal successors, (433), 303 states have internal predecessors, (433), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 433 transitions. [2021-10-13 01:16:02,617 INFO L78 Accepts]: Start accepts. Automaton has 304 states and 433 transitions. Word has length 53 [2021-10-13 01:16:02,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:02,618 INFO L470 AbstractCegarLoop]: Abstraction has 304 states and 433 transitions. [2021-10-13 01:16:02,618 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,618 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states and 433 transitions. [2021-10-13 01:16:02,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-13 01:16:02,619 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:02,619 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:02,620 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-13 01:16:02,620 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:02,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:02,620 INFO L82 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-13 01:16:02,621 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:02,621 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1239765619] [2021-10-13 01:16:02,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:02,621 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:02,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:02,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:02,706 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:02,706 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1239765619] [2021-10-13 01:16:02,706 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1239765619] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:02,706 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:02,707 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:02,707 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [473358430] [2021-10-13 01:16:02,707 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:02,707 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:02,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:02,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:02,708 INFO L87 Difference]: Start difference. First operand 304 states and 433 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:02,743 INFO L93 Difference]: Finished difference Result 834 states and 1199 transitions. [2021-10-13 01:16:02,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:02,744 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-13 01:16:02,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:02,747 INFO L225 Difference]: With dead ends: 834 [2021-10-13 01:16:02,748 INFO L226 Difference]: Without dead ends: 547 [2021-10-13 01:16:02,748 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:02,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2021-10-13 01:16:02,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 329. [2021-10-13 01:16:02,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 310 states have (on average 1.5193548387096774) internal successors, (471), 328 states have internal predecessors, (471), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 471 transitions. [2021-10-13 01:16:02,764 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 471 transitions. Word has length 54 [2021-10-13 01:16:02,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:02,764 INFO L470 AbstractCegarLoop]: Abstraction has 329 states and 471 transitions. [2021-10-13 01:16:02,765 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:02,765 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 471 transitions. [2021-10-13 01:16:02,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-13 01:16:02,766 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:02,766 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:02,766 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-13 01:16:02,766 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:02,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:02,767 INFO L82 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-13 01:16:02,767 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:02,767 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436597763] [2021-10-13 01:16:02,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:02,768 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:02,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:02,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:02,851 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:02,852 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1436597763] [2021-10-13 01:16:02,859 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1436597763] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:02,859 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:02,859 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:02,859 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423429702] [2021-10-13 01:16:02,860 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 01:16:02,860 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:02,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 01:16:02,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:02,861 INFO L87 Difference]: Start difference. First operand 329 states and 471 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:03,126 INFO L93 Difference]: Finished difference Result 1023 states and 1476 transitions. [2021-10-13 01:16:03,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 01:16:03,127 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-13 01:16:03,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:03,132 INFO L225 Difference]: With dead ends: 1023 [2021-10-13 01:16:03,135 INFO L226 Difference]: Without dead ends: 711 [2021-10-13 01:16:03,136 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 24.9ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-13 01:16:03,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2021-10-13 01:16:03,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 427. [2021-10-13 01:16:03,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 408 states have (on average 1.4901960784313726) internal successors, (608), 426 states have internal predecessors, (608), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 608 transitions. [2021-10-13 01:16:03,174 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 608 transitions. Word has length 54 [2021-10-13 01:16:03,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:03,174 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 608 transitions. [2021-10-13 01:16:03,175 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,175 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 608 transitions. [2021-10-13 01:16:03,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-13 01:16:03,176 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:03,176 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:03,177 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-13 01:16:03,177 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:03,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:03,178 INFO L82 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-13 01:16:03,178 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:03,178 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477063923] [2021-10-13 01:16:03,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:03,179 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:03,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:03,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:03,306 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:03,307 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477063923] [2021-10-13 01:16:03,307 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [477063923] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:03,307 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:03,308 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:03,308 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1462124216] [2021-10-13 01:16:03,309 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 01:16:03,309 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:03,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 01:16:03,310 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:03,310 INFO L87 Difference]: Start difference. First operand 427 states and 608 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:03,549 INFO L93 Difference]: Finished difference Result 1027 states and 1476 transitions. [2021-10-13 01:16:03,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 01:16:03,549 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-13 01:16:03,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:03,555 INFO L225 Difference]: With dead ends: 1027 [2021-10-13 01:16:03,555 INFO L226 Difference]: Without dead ends: 715 [2021-10-13 01:16:03,557 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 34.0ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-13 01:16:03,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-13 01:16:03,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-13 01:16:03,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4807692307692308) internal successors, (616), 434 states have internal predecessors, (616), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 616 transitions. [2021-10-13 01:16:03,590 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 616 transitions. Word has length 55 [2021-10-13 01:16:03,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:03,592 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 616 transitions. [2021-10-13 01:16:03,592 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,593 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 616 transitions. [2021-10-13 01:16:03,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-13 01:16:03,594 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:03,594 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:03,595 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-13 01:16:03,595 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:03,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:03,596 INFO L82 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-13 01:16:03,596 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:03,596 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337261908] [2021-10-13 01:16:03,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:03,597 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:03,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:03,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:03,727 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:03,728 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337261908] [2021-10-13 01:16:03,728 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [337261908] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:03,728 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:03,728 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:03,728 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [305690357] [2021-10-13 01:16:03,729 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:03,729 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:03,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:03,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:03,730 INFO L87 Difference]: Start difference. First operand 435 states and 616 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:03,965 INFO L93 Difference]: Finished difference Result 1027 states and 1468 transitions. [2021-10-13 01:16:03,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 01:16:03,966 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-13 01:16:03,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:03,971 INFO L225 Difference]: With dead ends: 1027 [2021-10-13 01:16:03,972 INFO L226 Difference]: Without dead ends: 715 [2021-10-13 01:16:03,973 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 16.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:03,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-13 01:16:03,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-13 01:16:03,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4711538461538463) internal successors, (612), 434 states have internal predecessors, (612), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:03,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 612 transitions. [2021-10-13 01:16:03,999 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 612 transitions. Word has length 57 [2021-10-13 01:16:04,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:04,000 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 612 transitions. [2021-10-13 01:16:04,001 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,001 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 612 transitions. [2021-10-13 01:16:04,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-13 01:16:04,002 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:04,003 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:04,003 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-13 01:16:04,003 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:04,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:04,004 INFO L82 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-13 01:16:04,004 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:04,004 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286815840] [2021-10-13 01:16:04,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:04,005 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:04,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:04,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:04,084 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:04,085 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286815840] [2021-10-13 01:16:04,085 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1286815840] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:04,085 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:04,085 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:04,085 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937395511] [2021-10-13 01:16:04,086 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:04,086 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:04,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:04,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,087 INFO L87 Difference]: Start difference. First operand 435 states and 612 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:04,135 INFO L93 Difference]: Finished difference Result 875 states and 1255 transitions. [2021-10-13 01:16:04,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:04,141 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-13 01:16:04,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:04,145 INFO L225 Difference]: With dead ends: 875 [2021-10-13 01:16:04,145 INFO L226 Difference]: Without dead ends: 563 [2021-10-13 01:16:04,150 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-13 01:16:04,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 430. [2021-10-13 01:16:04,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 412 states have (on average 1.4660194174757282) internal successors, (604), 429 states have internal predecessors, (604), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 604 transitions. [2021-10-13 01:16:04,182 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 604 transitions. Word has length 58 [2021-10-13 01:16:04,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:04,185 INFO L470 AbstractCegarLoop]: Abstraction has 430 states and 604 transitions. [2021-10-13 01:16:04,185 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,186 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 604 transitions. [2021-10-13 01:16:04,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-13 01:16:04,187 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:04,187 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:04,187 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-13 01:16:04,188 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:04,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:04,189 INFO L82 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-13 01:16:04,189 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:04,191 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514420565] [2021-10-13 01:16:04,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:04,191 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:04,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:04,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:04,316 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:04,317 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514420565] [2021-10-13 01:16:04,317 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [514420565] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:04,317 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:04,317 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:04,318 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944965703] [2021-10-13 01:16:04,318 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:04,318 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:04,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:04,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,320 INFO L87 Difference]: Start difference. First operand 430 states and 604 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:04,405 INFO L93 Difference]: Finished difference Result 874 states and 1254 transitions. [2021-10-13 01:16:04,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:04,406 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-13 01:16:04,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:04,410 INFO L225 Difference]: With dead ends: 874 [2021-10-13 01:16:04,410 INFO L226 Difference]: Without dead ends: 567 [2021-10-13 01:16:04,411 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2021-10-13 01:16:04,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 410. [2021-10-13 01:16:04,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 410 states, 396 states have (on average 1.4444444444444444) internal successors, (572), 409 states have internal predecessors, (572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 572 transitions. [2021-10-13 01:16:04,440 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 572 transitions. Word has length 62 [2021-10-13 01:16:04,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:04,440 INFO L470 AbstractCegarLoop]: Abstraction has 410 states and 572 transitions. [2021-10-13 01:16:04,440 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,441 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 572 transitions. [2021-10-13 01:16:04,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-13 01:16:04,441 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:04,442 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:04,446 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-13 01:16:04,446 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:04,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:04,447 INFO L82 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-13 01:16:04,447 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:04,450 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [449306659] [2021-10-13 01:16:04,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:04,450 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:04,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:04,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:04,541 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:04,542 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [449306659] [2021-10-13 01:16:04,542 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [449306659] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:04,542 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:04,542 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:04,543 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447449828] [2021-10-13 01:16:04,543 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:04,543 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:04,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:04,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,546 INFO L87 Difference]: Start difference. First operand 410 states and 572 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:04,627 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-13 01:16:04,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:04,628 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-13 01:16:04,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:04,632 INFO L225 Difference]: With dead ends: 842 [2021-10-13 01:16:04,632 INFO L226 Difference]: Without dead ends: 555 [2021-10-13 01:16:04,633 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2021-10-13 01:16:04,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 398. [2021-10-13 01:16:04,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 398 states, 386 states have (on average 1.4352331606217616) internal successors, (554), 397 states have internal predecessors, (554), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 554 transitions. [2021-10-13 01:16:04,658 INFO L78 Accepts]: Start accepts. Automaton has 398 states and 554 transitions. Word has length 66 [2021-10-13 01:16:04,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:04,659 INFO L470 AbstractCegarLoop]: Abstraction has 398 states and 554 transitions. [2021-10-13 01:16:04,659 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,659 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states and 554 transitions. [2021-10-13 01:16:04,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-13 01:16:04,660 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:04,660 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:04,660 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-13 01:16:04,661 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:04,661 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:04,661 INFO L82 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-13 01:16:04,662 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:04,662 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385782053] [2021-10-13 01:16:04,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:04,662 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:04,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:04,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:04,738 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:04,739 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385782053] [2021-10-13 01:16:04,739 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1385782053] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:04,739 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:04,739 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:04,739 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [701423588] [2021-10-13 01:16:04,740 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:04,740 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:04,740 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:04,741 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,741 INFO L87 Difference]: Start difference. First operand 398 states and 554 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:04,818 INFO L93 Difference]: Finished difference Result 838 states and 1190 transitions. [2021-10-13 01:16:04,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:04,819 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-13 01:16:04,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:04,823 INFO L225 Difference]: With dead ends: 838 [2021-10-13 01:16:04,823 INFO L226 Difference]: Without dead ends: 563 [2021-10-13 01:16:04,824 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:04,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-13 01:16:04,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 378. [2021-10-13 01:16:04,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 378 states, 370 states have (on average 1.4108108108108108) internal successors, (522), 377 states have internal predecessors, (522), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 522 transitions. [2021-10-13 01:16:04,849 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 522 transitions. Word has length 67 [2021-10-13 01:16:04,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:04,850 INFO L470 AbstractCegarLoop]: Abstraction has 378 states and 522 transitions. [2021-10-13 01:16:04,850 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:04,850 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 522 transitions. [2021-10-13 01:16:04,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-13 01:16:04,851 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:04,851 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:04,851 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-13 01:16:04,852 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:04,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:04,852 INFO L82 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-13 01:16:04,852 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:04,853 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983478623] [2021-10-13 01:16:04,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:04,853 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:04,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:04,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:04,975 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:04,975 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [983478623] [2021-10-13 01:16:04,975 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [983478623] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:04,975 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:04,975 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 01:16:04,975 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126615669] [2021-10-13 01:16:04,976 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:04,976 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:04,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:04,977 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 01:16:04,977 INFO L87 Difference]: Start difference. First operand 378 states and 522 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:05,180 INFO L93 Difference]: Finished difference Result 1133 states and 1588 transitions. [2021-10-13 01:16:05,181 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 01:16:05,181 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-13 01:16:05,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:05,187 INFO L225 Difference]: With dead ends: 1133 [2021-10-13 01:16:05,187 INFO L226 Difference]: Without dead ends: 878 [2021-10-13 01:16:05,188 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 55.7ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 01:16:05,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 878 states. [2021-10-13 01:16:05,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 878 to 428. [2021-10-13 01:16:05,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 428 states, 420 states have (on average 1.4047619047619047) internal successors, (590), 427 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 590 transitions. [2021-10-13 01:16:05,243 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 590 transitions. Word has length 72 [2021-10-13 01:16:05,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:05,243 INFO L470 AbstractCegarLoop]: Abstraction has 428 states and 590 transitions. [2021-10-13 01:16:05,243 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,244 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 590 transitions. [2021-10-13 01:16:05,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-13 01:16:05,245 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:05,245 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:05,245 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-13 01:16:05,245 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:05,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:05,246 INFO L82 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-13 01:16:05,246 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:05,246 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196582921] [2021-10-13 01:16:05,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:05,247 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:05,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:05,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:05,318 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:05,318 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196582921] [2021-10-13 01:16:05,318 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [196582921] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:05,318 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:05,318 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:05,319 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588126952] [2021-10-13 01:16:05,319 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:05,319 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:05,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:05,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:05,320 INFO L87 Difference]: Start difference. First operand 428 states and 590 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:05,380 INFO L93 Difference]: Finished difference Result 763 states and 1069 transitions. [2021-10-13 01:16:05,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:05,381 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-13 01:16:05,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:05,384 INFO L225 Difference]: With dead ends: 763 [2021-10-13 01:16:05,384 INFO L226 Difference]: Without dead ends: 508 [2021-10-13 01:16:05,385 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:05,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2021-10-13 01:16:05,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 424. [2021-10-13 01:16:05,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.3980815347721822) internal successors, (583), 423 states have internal predecessors, (583), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 583 transitions. [2021-10-13 01:16:05,418 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 583 transitions. Word has length 73 [2021-10-13 01:16:05,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:05,419 INFO L470 AbstractCegarLoop]: Abstraction has 424 states and 583 transitions. [2021-10-13 01:16:05,419 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,419 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 583 transitions. [2021-10-13 01:16:05,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-13 01:16:05,420 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:05,420 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:05,421 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-13 01:16:05,421 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:05,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:05,422 INFO L82 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-13 01:16:05,422 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:05,422 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012062808] [2021-10-13 01:16:05,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:05,422 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:05,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:05,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:05,483 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:05,483 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012062808] [2021-10-13 01:16:05,483 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2012062808] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:05,483 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:05,484 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:05,484 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349709092] [2021-10-13 01:16:05,484 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:05,484 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:05,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:05,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:05,485 INFO L87 Difference]: Start difference. First operand 424 states and 583 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:05,560 INFO L93 Difference]: Finished difference Result 862 states and 1206 transitions. [2021-10-13 01:16:05,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:05,560 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-13 01:16:05,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:05,564 INFO L225 Difference]: With dead ends: 862 [2021-10-13 01:16:05,564 INFO L226 Difference]: Without dead ends: 594 [2021-10-13 01:16:05,565 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:05,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2021-10-13 01:16:05,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 408. [2021-10-13 01:16:05,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 408 states, 403 states have (on average 1.382133995037221) internal successors, (557), 407 states have internal predecessors, (557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 408 states to 408 states and 557 transitions. [2021-10-13 01:16:05,600 INFO L78 Accepts]: Start accepts. Automaton has 408 states and 557 transitions. Word has length 73 [2021-10-13 01:16:05,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:05,600 INFO L470 AbstractCegarLoop]: Abstraction has 408 states and 557 transitions. [2021-10-13 01:16:05,600 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:05,601 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 557 transitions. [2021-10-13 01:16:05,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-13 01:16:05,602 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:05,602 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:05,602 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-13 01:16:05,602 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:05,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:05,603 INFO L82 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-13 01:16:05,603 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:05,603 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659926598] [2021-10-13 01:16:05,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:05,604 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:05,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:05,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:05,733 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:05,733 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659926598] [2021-10-13 01:16:05,733 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1659926598] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:05,733 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:05,733 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 01:16:05,734 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086432143] [2021-10-13 01:16:05,734 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 01:16:05,734 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:05,735 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 01:16:05,735 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-13 01:16:05,735 INFO L87 Difference]: Start difference. First operand 408 states and 557 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:06,076 INFO L93 Difference]: Finished difference Result 1404 states and 1944 transitions. [2021-10-13 01:16:06,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 01:16:06,077 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-13 01:16:06,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:06,084 INFO L225 Difference]: With dead ends: 1404 [2021-10-13 01:16:06,084 INFO L226 Difference]: Without dead ends: 1147 [2021-10-13 01:16:06,085 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 85.3ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 01:16:06,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1147 states. [2021-10-13 01:16:06,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1147 to 436. [2021-10-13 01:16:06,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 436 states, 431 states have (on average 1.3665893271461718) internal successors, (589), 435 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 589 transitions. [2021-10-13 01:16:06,127 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 589 transitions. Word has length 76 [2021-10-13 01:16:06,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:06,128 INFO L470 AbstractCegarLoop]: Abstraction has 436 states and 589 transitions. [2021-10-13 01:16:06,128 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,128 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 589 transitions. [2021-10-13 01:16:06,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-13 01:16:06,129 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:06,130 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:06,130 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-13 01:16:06,130 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:06,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:06,131 INFO L82 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-13 01:16:06,131 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:06,131 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704636916] [2021-10-13 01:16:06,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:06,131 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:06,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:06,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:06,184 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:06,184 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704636916] [2021-10-13 01:16:06,184 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1704636916] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:06,185 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:06,185 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:06,185 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957606915] [2021-10-13 01:16:06,185 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:06,186 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:06,186 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:06,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:06,186 INFO L87 Difference]: Start difference. First operand 436 states and 589 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:06,326 INFO L93 Difference]: Finished difference Result 1115 states and 1519 transitions. [2021-10-13 01:16:06,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 01:16:06,326 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-13 01:16:06,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:06,332 INFO L225 Difference]: With dead ends: 1115 [2021-10-13 01:16:06,332 INFO L226 Difference]: Without dead ends: 852 [2021-10-13 01:16:06,333 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:06,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 852 states. [2021-10-13 01:16:06,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 852 to 657. [2021-10-13 01:16:06,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 657 states, 652 states have (on average 1.348159509202454) internal successors, (879), 656 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 879 transitions. [2021-10-13 01:16:06,405 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 879 transitions. Word has length 76 [2021-10-13 01:16:06,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:06,406 INFO L470 AbstractCegarLoop]: Abstraction has 657 states and 879 transitions. [2021-10-13 01:16:06,406 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,406 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 879 transitions. [2021-10-13 01:16:06,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-13 01:16:06,407 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:06,408 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:06,408 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-13 01:16:06,408 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:06,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:06,409 INFO L82 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-13 01:16:06,409 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:06,409 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78103457] [2021-10-13 01:16:06,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:06,409 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:06,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:06,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:06,482 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:06,482 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78103457] [2021-10-13 01:16:06,482 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [78103457] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:06,483 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:06,483 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 01:16:06,483 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923481997] [2021-10-13 01:16:06,483 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:06,484 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:06,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:06,484 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 01:16:06,485 INFO L87 Difference]: Start difference. First operand 657 states and 879 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:06,663 INFO L93 Difference]: Finished difference Result 1021 states and 1390 transitions. [2021-10-13 01:16:06,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-13 01:16:06,664 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-13 01:16:06,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:06,670 INFO L225 Difference]: With dead ends: 1021 [2021-10-13 01:16:06,670 INFO L226 Difference]: Without dead ends: 1019 [2021-10-13 01:16:06,671 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 37.9ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 01:16:06,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1019 states. [2021-10-13 01:16:06,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1019 to 659. [2021-10-13 01:16:06,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 659 states, 654 states have (on average 1.3470948012232415) internal successors, (881), 658 states have internal predecessors, (881), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 881 transitions. [2021-10-13 01:16:06,734 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 881 transitions. Word has length 77 [2021-10-13 01:16:06,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:06,735 INFO L470 AbstractCegarLoop]: Abstraction has 659 states and 881 transitions. [2021-10-13 01:16:06,735 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:06,735 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 881 transitions. [2021-10-13 01:16:06,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-13 01:16:06,736 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:06,736 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:06,737 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-13 01:16:06,737 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:06,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:06,737 INFO L82 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-13 01:16:06,738 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:06,738 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502839008] [2021-10-13 01:16:06,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:06,738 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:06,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:06,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:06,834 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:06,834 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502839008] [2021-10-13 01:16:06,835 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1502839008] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:06,835 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:06,835 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 01:16:06,835 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1802589720] [2021-10-13 01:16:06,836 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:06,836 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:06,836 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:06,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 01:16:06,837 INFO L87 Difference]: Start difference. First operand 659 states and 881 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:07,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:07,174 INFO L93 Difference]: Finished difference Result 1988 states and 2739 transitions. [2021-10-13 01:16:07,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 01:16:07,175 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-13 01:16:07,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:07,184 INFO L225 Difference]: With dead ends: 1988 [2021-10-13 01:16:07,184 INFO L226 Difference]: Without dead ends: 1608 [2021-10-13 01:16:07,186 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 51.8ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 01:16:07,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1608 states. [2021-10-13 01:16:07,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1608 to 647. [2021-10-13 01:16:07,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 647 states, 642 states have (on average 1.3504672897196262) internal successors, (867), 646 states have internal predecessors, (867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:07,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 867 transitions. [2021-10-13 01:16:07,262 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 867 transitions. Word has length 77 [2021-10-13 01:16:07,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:07,262 INFO L470 AbstractCegarLoop]: Abstraction has 647 states and 867 transitions. [2021-10-13 01:16:07,263 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:07,263 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 867 transitions. [2021-10-13 01:16:07,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-13 01:16:07,264 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:07,264 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:07,265 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-13 01:16:07,265 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:07,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:07,266 INFO L82 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-13 01:16:07,266 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:07,266 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532892493] [2021-10-13 01:16:07,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:07,266 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:07,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:07,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:07,381 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:07,381 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532892493] [2021-10-13 01:16:07,381 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1532892493] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:07,382 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:07,382 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 01:16:07,382 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980917437] [2021-10-13 01:16:07,382 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:07,383 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:07,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:07,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 01:16:07,384 INFO L87 Difference]: Start difference. First operand 647 states and 867 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:07,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:07,664 INFO L93 Difference]: Finished difference Result 1542 states and 2165 transitions. [2021-10-13 01:16:07,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 01:16:07,665 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-13 01:16:07,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:07,673 INFO L225 Difference]: With dead ends: 1542 [2021-10-13 01:16:07,674 INFO L226 Difference]: Without dead ends: 1162 [2021-10-13 01:16:07,675 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 39.0ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 01:16:07,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1162 states. [2021-10-13 01:16:07,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1162 to 653. [2021-10-13 01:16:07,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 653 states, 648 states have (on average 1.3472222222222223) internal successors, (873), 652 states have internal predecessors, (873), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:07,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 653 states to 653 states and 873 transitions. [2021-10-13 01:16:07,761 INFO L78 Accepts]: Start accepts. Automaton has 653 states and 873 transitions. Word has length 78 [2021-10-13 01:16:07,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:07,761 INFO L470 AbstractCegarLoop]: Abstraction has 653 states and 873 transitions. [2021-10-13 01:16:07,761 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:07,762 INFO L276 IsEmpty]: Start isEmpty. Operand 653 states and 873 transitions. [2021-10-13 01:16:07,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-13 01:16:07,763 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:07,763 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:07,764 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-13 01:16:07,764 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:07,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:07,765 INFO L82 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-13 01:16:07,765 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:07,765 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541450063] [2021-10-13 01:16:07,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:07,766 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:07,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:07,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:07,837 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:07,838 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541450063] [2021-10-13 01:16:07,838 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1541450063] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:07,838 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:07,838 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:07,838 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [713799836] [2021-10-13 01:16:07,839 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:07,840 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:07,841 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:07,841 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:07,841 INFO L87 Difference]: Start difference. First operand 653 states and 873 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:08,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:08,044 INFO L93 Difference]: Finished difference Result 1511 states and 2028 transitions. [2021-10-13 01:16:08,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 01:16:08,045 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-13 01:16:08,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:08,051 INFO L225 Difference]: With dead ends: 1511 [2021-10-13 01:16:08,052 INFO L226 Difference]: Without dead ends: 1107 [2021-10-13 01:16:08,053 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:08,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-13 01:16:08,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 851. [2021-10-13 01:16:08,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 851 states, 846 states have (on average 1.339243498817967) internal successors, (1133), 850 states have internal predecessors, (1133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:08,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 851 states to 851 states and 1133 transitions. [2021-10-13 01:16:08,168 INFO L78 Accepts]: Start accepts. Automaton has 851 states and 1133 transitions. Word has length 78 [2021-10-13 01:16:08,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:08,169 INFO L470 AbstractCegarLoop]: Abstraction has 851 states and 1133 transitions. [2021-10-13 01:16:08,169 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:08,169 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 1133 transitions. [2021-10-13 01:16:08,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-13 01:16:08,171 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:08,171 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:08,171 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-13 01:16:08,171 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:08,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:08,172 INFO L82 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-13 01:16:08,172 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:08,172 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118266501] [2021-10-13 01:16:08,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:08,173 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:08,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:08,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:08,285 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:08,285 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118266501] [2021-10-13 01:16:08,285 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [118266501] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:08,285 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:08,286 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 01:16:08,286 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766736607] [2021-10-13 01:16:08,286 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:08,286 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:08,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:08,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 01:16:08,287 INFO L87 Difference]: Start difference. First operand 851 states and 1133 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:08,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:08,863 INFO L93 Difference]: Finished difference Result 3248 states and 4372 transitions. [2021-10-13 01:16:08,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 01:16:08,864 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-13 01:16:08,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:08,878 INFO L225 Difference]: With dead ends: 3248 [2021-10-13 01:16:08,878 INFO L226 Difference]: Without dead ends: 2713 [2021-10-13 01:16:08,881 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 77.2ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 01:16:08,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2713 states. [2021-10-13 01:16:08,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2713 to 901. [2021-10-13 01:16:09,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 901 states, 896 states have (on average 1.3359375) internal successors, (1197), 900 states have internal predecessors, (1197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:09,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 901 states to 901 states and 1197 transitions. [2021-10-13 01:16:09,003 INFO L78 Accepts]: Start accepts. Automaton has 901 states and 1197 transitions. Word has length 78 [2021-10-13 01:16:09,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:09,003 INFO L470 AbstractCegarLoop]: Abstraction has 901 states and 1197 transitions. [2021-10-13 01:16:09,004 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:09,004 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1197 transitions. [2021-10-13 01:16:09,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-13 01:16:09,005 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:09,005 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:09,006 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-13 01:16:09,006 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:09,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:09,007 INFO L82 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-13 01:16:09,007 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:09,007 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078081096] [2021-10-13 01:16:09,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:09,007 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:09,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:09,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:09,063 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:09,063 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078081096] [2021-10-13 01:16:09,064 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078081096] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:09,064 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:09,064 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:09,064 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605081278] [2021-10-13 01:16:09,065 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:09,065 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:09,066 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:09,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:09,067 INFO L87 Difference]: Start difference. First operand 901 states and 1197 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:09,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:09,333 INFO L93 Difference]: Finished difference Result 2319 states and 3089 transitions. [2021-10-13 01:16:09,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 01:16:09,334 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-13 01:16:09,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:09,343 INFO L225 Difference]: With dead ends: 2319 [2021-10-13 01:16:09,343 INFO L226 Difference]: Without dead ends: 1731 [2021-10-13 01:16:09,345 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:09,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1731 states. [2021-10-13 01:16:09,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1731 to 1256. [2021-10-13 01:16:09,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1256 states, 1251 states have (on average 1.3245403677058354) internal successors, (1657), 1255 states have internal predecessors, (1657), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:09,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1256 states and 1657 transitions. [2021-10-13 01:16:09,497 INFO L78 Accepts]: Start accepts. Automaton has 1256 states and 1657 transitions. Word has length 79 [2021-10-13 01:16:09,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:09,498 INFO L470 AbstractCegarLoop]: Abstraction has 1256 states and 1657 transitions. [2021-10-13 01:16:09,498 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:09,498 INFO L276 IsEmpty]: Start isEmpty. Operand 1256 states and 1657 transitions. [2021-10-13 01:16:09,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-13 01:16:09,500 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:09,500 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:09,501 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-13 01:16:09,501 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:09,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:09,501 INFO L82 PathProgramCache]: Analyzing trace with hash -676572605, now seen corresponding path program 1 times [2021-10-13 01:16:09,502 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:09,502 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371186021] [2021-10-13 01:16:09,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:09,502 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:09,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:09,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:09,553 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:09,554 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [371186021] [2021-10-13 01:16:09,554 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [371186021] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:09,554 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:09,554 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:09,554 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1056799881] [2021-10-13 01:16:09,555 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:09,555 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:09,556 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:09,556 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:09,556 INFO L87 Difference]: Start difference. First operand 1256 states and 1657 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:09,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:09,882 INFO L93 Difference]: Finished difference Result 3064 states and 4044 transitions. [2021-10-13 01:16:09,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:09,883 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-13 01:16:09,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:09,894 INFO L225 Difference]: With dead ends: 3064 [2021-10-13 01:16:09,895 INFO L226 Difference]: Without dead ends: 2078 [2021-10-13 01:16:09,897 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:09,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2078 states. [2021-10-13 01:16:10,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2078 to 1258. [2021-10-13 01:16:10,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1258 states, 1253 states have (on average 1.324022346368715) internal successors, (1659), 1257 states have internal predecessors, (1659), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:10,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1258 states to 1258 states and 1659 transitions. [2021-10-13 01:16:10,058 INFO L78 Accepts]: Start accepts. Automaton has 1258 states and 1659 transitions. Word has length 80 [2021-10-13 01:16:10,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:10,058 INFO L470 AbstractCegarLoop]: Abstraction has 1258 states and 1659 transitions. [2021-10-13 01:16:10,058 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:10,059 INFO L276 IsEmpty]: Start isEmpty. Operand 1258 states and 1659 transitions. [2021-10-13 01:16:10,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-13 01:16:10,061 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:10,061 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:10,061 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-13 01:16:10,061 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:10,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:10,062 INFO L82 PathProgramCache]: Analyzing trace with hash -659983772, now seen corresponding path program 1 times [2021-10-13 01:16:10,062 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:10,062 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323778454] [2021-10-13 01:16:10,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:10,063 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:10,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:10,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:10,159 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:10,160 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323778454] [2021-10-13 01:16:10,160 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1323778454] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:10,160 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:10,160 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:10,160 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704903071] [2021-10-13 01:16:10,161 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:10,161 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:10,162 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:10,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:10,162 INFO L87 Difference]: Start difference. First operand 1258 states and 1659 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:10,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:10,463 INFO L93 Difference]: Finished difference Result 2600 states and 3430 transitions. [2021-10-13 01:16:10,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 01:16:10,464 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2021-10-13 01:16:10,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:10,471 INFO L225 Difference]: With dead ends: 2600 [2021-10-13 01:16:10,472 INFO L226 Difference]: Without dead ends: 1418 [2021-10-13 01:16:10,474 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 18.1ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:10,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1418 states. [2021-10-13 01:16:10,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1418 to 1055. [2021-10-13 01:16:10,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1055 states, 1050 states have (on average 1.3209523809523809) internal successors, (1387), 1054 states have internal predecessors, (1387), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:10,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1055 states to 1055 states and 1387 transitions. [2021-10-13 01:16:10,620 INFO L78 Accepts]: Start accepts. Automaton has 1055 states and 1387 transitions. Word has length 81 [2021-10-13 01:16:10,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:10,620 INFO L470 AbstractCegarLoop]: Abstraction has 1055 states and 1387 transitions. [2021-10-13 01:16:10,621 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:10,621 INFO L276 IsEmpty]: Start isEmpty. Operand 1055 states and 1387 transitions. [2021-10-13 01:16:10,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-13 01:16:10,622 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:10,622 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:10,623 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-13 01:16:10,623 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:10,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:10,623 INFO L82 PathProgramCache]: Analyzing trace with hash -63459148, now seen corresponding path program 1 times [2021-10-13 01:16:10,624 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:10,624 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524350361] [2021-10-13 01:16:10,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:10,624 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:10,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:10,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:10,662 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:10,662 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524350361] [2021-10-13 01:16:10,662 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [524350361] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:10,662 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:10,662 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 01:16:10,663 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37249556] [2021-10-13 01:16:10,663 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 01:16:10,664 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:10,664 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 01:16:10,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:10,665 INFO L87 Difference]: Start difference. First operand 1055 states and 1387 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:10,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:10,985 INFO L93 Difference]: Finished difference Result 2491 states and 3293 transitions. [2021-10-13 01:16:10,985 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 01:16:10,986 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-13 01:16:10,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:10,995 INFO L225 Difference]: With dead ends: 2491 [2021-10-13 01:16:10,995 INFO L226 Difference]: Without dead ends: 1585 [2021-10-13 01:16:10,997 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 01:16:10,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1585 states. [2021-10-13 01:16:11,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1585 to 1061. [2021-10-13 01:16:11,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1061 states, 1056 states have (on average 1.3191287878787878) internal successors, (1393), 1060 states have internal predecessors, (1393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:11,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 1393 transitions. [2021-10-13 01:16:11,183 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 1393 transitions. Word has length 82 [2021-10-13 01:16:11,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:11,183 INFO L470 AbstractCegarLoop]: Abstraction has 1061 states and 1393 transitions. [2021-10-13 01:16:11,184 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:11,184 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1393 transitions. [2021-10-13 01:16:11,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-13 01:16:11,185 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:11,186 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:11,186 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-13 01:16:11,186 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:11,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:11,187 INFO L82 PathProgramCache]: Analyzing trace with hash -753963456, now seen corresponding path program 1 times [2021-10-13 01:16:11,187 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:11,187 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907092735] [2021-10-13 01:16:11,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:11,187 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:11,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:11,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:11,270 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:11,270 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1907092735] [2021-10-13 01:16:11,273 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1907092735] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:11,274 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:11,274 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:11,274 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248859584] [2021-10-13 01:16:11,275 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:11,275 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:11,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:11,276 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:11,276 INFO L87 Difference]: Start difference. First operand 1061 states and 1393 transitions. Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:11,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:11,529 INFO L93 Difference]: Finished difference Result 2440 states and 3214 transitions. [2021-10-13 01:16:11,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 01:16:11,530 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-13 01:16:11,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:11,555 INFO L225 Difference]: With dead ends: 2440 [2021-10-13 01:16:11,555 INFO L226 Difference]: Without dead ends: 1478 [2021-10-13 01:16:11,557 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 17.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:11,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1478 states. [2021-10-13 01:16:11,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1478 to 1001. [2021-10-13 01:16:11,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3142570281124497) internal successors, (1309), 1000 states have internal predecessors, (1309), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:11,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1309 transitions. [2021-10-13 01:16:11,752 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1309 transitions. Word has length 82 [2021-10-13 01:16:11,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:11,752 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1309 transitions. [2021-10-13 01:16:11,753 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:11,753 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1309 transitions. [2021-10-13 01:16:11,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2021-10-13 01:16:11,756 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:11,756 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:11,756 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-13 01:16:11,757 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:11,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:11,757 INFO L82 PathProgramCache]: Analyzing trace with hash -508619245, now seen corresponding path program 1 times [2021-10-13 01:16:11,757 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:11,758 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132910342] [2021-10-13 01:16:11,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:11,759 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:11,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:11,948 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:11,949 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:11,949 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132910342] [2021-10-13 01:16:11,949 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [132910342] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:11,949 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [596029792] [2021-10-13 01:16:11,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:11,950 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:11,950 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:11,956 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:11,983 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-13 01:16:12,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:12,183 INFO L263 TraceCheckSpWp]: Trace formula consists of 716 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-13 01:16:12,201 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:12,708 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 01:16:12,709 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [596029792] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:12,709 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 01:16:12,709 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-13 01:16:12,710 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151412413] [2021-10-13 01:16:12,710 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:12,710 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:12,711 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:12,711 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-13 01:16:12,711 INFO L87 Difference]: Start difference. First operand 1001 states and 1309 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:13,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:13,178 INFO L93 Difference]: Finished difference Result 2598 states and 3526 transitions. [2021-10-13 01:16:13,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 01:16:13,179 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 128 [2021-10-13 01:16:13,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:13,183 INFO L225 Difference]: With dead ends: 2598 [2021-10-13 01:16:13,183 INFO L226 Difference]: Without dead ends: 1784 [2021-10-13 01:16:13,185 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 120.8ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-13 01:16:13,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1784 states. [2021-10-13 01:16:13,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1784 to 1001. [2021-10-13 01:16:13,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3132530120481927) internal successors, (1308), 1000 states have internal predecessors, (1308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:13,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1308 transitions. [2021-10-13 01:16:13,353 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1308 transitions. Word has length 128 [2021-10-13 01:16:13,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:13,354 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1308 transitions. [2021-10-13 01:16:13,354 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:13,354 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1308 transitions. [2021-10-13 01:16:13,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-13 01:16:13,357 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:13,358 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:13,396 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:13,584 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:13,585 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:13,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:13,585 INFO L82 PathProgramCache]: Analyzing trace with hash 1477169230, now seen corresponding path program 1 times [2021-10-13 01:16:13,585 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:13,585 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357369890] [2021-10-13 01:16:13,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:13,586 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:13,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:13,753 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:13,753 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:13,753 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357369890] [2021-10-13 01:16:13,753 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1357369890] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:13,754 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [544537316] [2021-10-13 01:16:13,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:13,754 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:13,754 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:13,755 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:13,772 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-13 01:16:13,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:13,997 INFO L263 TraceCheckSpWp]: Trace formula consists of 730 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-13 01:16:14,026 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:14,539 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:14,539 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [544537316] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:14,539 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:16:14,540 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-13 01:16:14,540 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [552413616] [2021-10-13 01:16:14,541 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-13 01:16:14,541 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:14,541 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-13 01:16:14,542 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-13 01:16:14,542 INFO L87 Difference]: Start difference. First operand 1001 states and 1308 transitions. Second operand has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:27,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:27,261 INFO L93 Difference]: Finished difference Result 16835 states and 22497 transitions. [2021-10-13 01:16:27,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-13 01:16:27,261 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-13 01:16:27,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:27,301 INFO L225 Difference]: With dead ends: 16835 [2021-10-13 01:16:27,301 INFO L226 Difference]: Without dead ends: 16027 [2021-10-13 01:16:27,340 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 475 GetRequests, 224 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28995 ImplicationChecksByTransitivity, 6205.1ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-13 01:16:27,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16027 states. [2021-10-13 01:16:28,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16027 to 2722. [2021-10-13 01:16:28,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2722 states, 2717 states have (on average 1.3106367316893632) internal successors, (3561), 2721 states have internal predecessors, (3561), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:28,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2722 states to 2722 states and 3561 transitions. [2021-10-13 01:16:28,130 INFO L78 Accepts]: Start accepts. Automaton has 2722 states and 3561 transitions. Word has length 132 [2021-10-13 01:16:28,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:28,130 INFO L470 AbstractCegarLoop]: Abstraction has 2722 states and 3561 transitions. [2021-10-13 01:16:28,131 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:28,132 INFO L276 IsEmpty]: Start isEmpty. Operand 2722 states and 3561 transitions. [2021-10-13 01:16:28,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-13 01:16:28,139 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:28,139 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:28,184 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:28,352 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-13 01:16:28,353 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:28,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:28,354 INFO L82 PathProgramCache]: Analyzing trace with hash 199325748, now seen corresponding path program 1 times [2021-10-13 01:16:28,354 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:28,354 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [875279980] [2021-10-13 01:16:28,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:28,354 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:28,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:28,606 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:28,606 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:28,607 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [875279980] [2021-10-13 01:16:28,607 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [875279980] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:28,607 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [4931755] [2021-10-13 01:16:28,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:28,608 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:28,608 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:28,609 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:28,632 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-13 01:16:28,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:28,951 INFO L263 TraceCheckSpWp]: Trace formula consists of 782 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-13 01:16:28,957 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:29,468 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:29,469 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [4931755] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:29,469 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:16:29,469 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-13 01:16:29,469 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799678455] [2021-10-13 01:16:29,470 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-13 01:16:29,470 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:29,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-13 01:16:29,471 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-13 01:16:29,471 INFO L87 Difference]: Start difference. First operand 2722 states and 3561 transitions. Second operand has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:31,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:31,476 INFO L93 Difference]: Finished difference Result 9813 states and 13401 transitions. [2021-10-13 01:16:31,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-13 01:16:31,476 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-13 01:16:31,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:31,496 INFO L225 Difference]: With dead ends: 9813 [2021-10-13 01:16:31,496 INFO L226 Difference]: Without dead ends: 7318 [2021-10-13 01:16:31,502 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 143 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 189.1ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-13 01:16:31,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7318 states. [2021-10-13 01:16:31,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7318 to 2327. [2021-10-13 01:16:31,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2327 states, 2322 states have (on average 1.313953488372093) internal successors, (3051), 2326 states have internal predecessors, (3051), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:31,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2327 states to 2327 states and 3051 transitions. [2021-10-13 01:16:31,967 INFO L78 Accepts]: Start accepts. Automaton has 2327 states and 3051 transitions. Word has length 133 [2021-10-13 01:16:31,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:31,967 INFO L470 AbstractCegarLoop]: Abstraction has 2327 states and 3051 transitions. [2021-10-13 01:16:31,968 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:31,968 INFO L276 IsEmpty]: Start isEmpty. Operand 2327 states and 3051 transitions. [2021-10-13 01:16:31,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-13 01:16:31,974 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:31,975 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:32,018 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:32,188 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:32,189 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:32,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:32,190 INFO L82 PathProgramCache]: Analyzing trace with hash 99406826, now seen corresponding path program 1 times [2021-10-13 01:16:32,190 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:32,190 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176083794] [2021-10-13 01:16:32,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:32,190 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:32,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:32,344 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-13 01:16:32,344 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:32,344 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176083794] [2021-10-13 01:16:32,345 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1176083794] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:32,345 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:32,345 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 01:16:32,345 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112555637] [2021-10-13 01:16:32,346 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 01:16:32,346 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:32,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 01:16:32,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-13 01:16:32,347 INFO L87 Difference]: Start difference. First operand 2327 states and 3051 transitions. Second operand has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:34,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:34,776 INFO L93 Difference]: Finished difference Result 13295 states and 17793 transitions. [2021-10-13 01:16:34,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-13 01:16:34,778 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 134 [2021-10-13 01:16:34,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:34,801 INFO L225 Difference]: With dead ends: 13295 [2021-10-13 01:16:34,801 INFO L226 Difference]: Without dead ends: 11215 [2021-10-13 01:16:34,806 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 168.0ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-13 01:16:34,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11215 states. [2021-10-13 01:16:35,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11215 to 2747. [2021-10-13 01:16:35,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2747 states, 2742 states have (on average 1.2939460247994166) internal successors, (3548), 2746 states have internal predecessors, (3548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:35,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2747 states to 2747 states and 3548 transitions. [2021-10-13 01:16:35,337 INFO L78 Accepts]: Start accepts. Automaton has 2747 states and 3548 transitions. Word has length 134 [2021-10-13 01:16:35,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:35,338 INFO L470 AbstractCegarLoop]: Abstraction has 2747 states and 3548 transitions. [2021-10-13 01:16:35,338 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:35,338 INFO L276 IsEmpty]: Start isEmpty. Operand 2747 states and 3548 transitions. [2021-10-13 01:16:35,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-13 01:16:35,348 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:35,348 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:35,348 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-13 01:16:35,349 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:35,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:35,349 INFO L82 PathProgramCache]: Analyzing trace with hash -1092691825, now seen corresponding path program 1 times [2021-10-13 01:16:35,349 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:35,350 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621085498] [2021-10-13 01:16:35,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:35,350 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:35,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:35,497 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:35,497 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:35,497 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621085498] [2021-10-13 01:16:35,497 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [621085498] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:35,498 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1436943870] [2021-10-13 01:16:35,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:35,498 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:35,498 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:35,504 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:35,528 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-13 01:16:35,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:35,840 INFO L263 TraceCheckSpWp]: Trace formula consists of 761 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-13 01:16:35,843 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:36,253 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-13 01:16:36,253 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1436943870] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:36,254 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:16:36,254 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5] total 11 [2021-10-13 01:16:36,255 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121209821] [2021-10-13 01:16:36,255 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-10-13 01:16:36,256 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:36,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-13 01:16:36,257 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2021-10-13 01:16:36,259 INFO L87 Difference]: Start difference. First operand 2747 states and 3548 transitions. Second operand has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:38,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:38,326 INFO L93 Difference]: Finished difference Result 5998 states and 7876 transitions. [2021-10-13 01:16:38,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-13 01:16:38,326 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-13 01:16:38,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:38,333 INFO L225 Difference]: With dead ends: 5998 [2021-10-13 01:16:38,334 INFO L226 Difference]: Without dead ends: 3346 [2021-10-13 01:16:38,338 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 156 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 515.1ms TimeCoverageRelationStatistics Valid=525, Invalid=1545, Unknown=0, NotChecked=0, Total=2070 [2021-10-13 01:16:38,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3346 states. [2021-10-13 01:16:38,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3346 to 1880. [2021-10-13 01:16:38,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2816) internal successors, (2403), 1879 states have internal predecessors, (2403), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:38,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2403 transitions. [2021-10-13 01:16:38,704 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2403 transitions. Word has length 136 [2021-10-13 01:16:38,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:38,704 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2403 transitions. [2021-10-13 01:16:38,704 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:38,704 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2403 transitions. [2021-10-13 01:16:38,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-13 01:16:38,709 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:38,709 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:38,751 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:38,928 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:38,929 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:38,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:38,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1966931344, now seen corresponding path program 1 times [2021-10-13 01:16:38,929 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:38,929 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584684163] [2021-10-13 01:16:38,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:38,929 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:38,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:39,128 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:39,128 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:39,128 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1584684163] [2021-10-13 01:16:39,128 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1584684163] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:39,129 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1992595294] [2021-10-13 01:16:39,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:39,129 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:39,129 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:39,130 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:39,150 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-13 01:16:39,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:39,588 INFO L263 TraceCheckSpWp]: Trace formula consists of 785 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-13 01:16:39,592 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:39,987 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 01:16:39,987 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1992595294] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:39,987 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 01:16:39,987 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-13 01:16:39,988 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291649265] [2021-10-13 01:16:39,988 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:39,989 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:39,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:39,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-13 01:16:39,990 INFO L87 Difference]: Start difference. First operand 1880 states and 2403 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:40,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:40,743 INFO L93 Difference]: Finished difference Result 5962 states and 7867 transitions. [2021-10-13 01:16:40,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 01:16:40,743 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-13 01:16:40,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:40,750 INFO L225 Difference]: With dead ends: 5962 [2021-10-13 01:16:40,750 INFO L226 Difference]: Without dead ends: 4237 [2021-10-13 01:16:40,754 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 138.7ms TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2021-10-13 01:16:40,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4237 states. [2021-10-13 01:16:41,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4237 to 1880. [2021-10-13 01:16:41,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.28) internal successors, (2400), 1879 states have internal predecessors, (2400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:41,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2400 transitions. [2021-10-13 01:16:41,203 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2400 transitions. Word has length 136 [2021-10-13 01:16:41,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:41,204 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2400 transitions. [2021-10-13 01:16:41,204 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:41,204 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2400 transitions. [2021-10-13 01:16:41,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-13 01:16:41,210 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:41,210 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:41,235 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:41,412 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:41,413 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:41,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:41,413 INFO L82 PathProgramCache]: Analyzing trace with hash 2092133653, now seen corresponding path program 1 times [2021-10-13 01:16:41,414 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:41,414 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1562875479] [2021-10-13 01:16:41,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:41,414 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:41,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:41,669 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:41,669 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:41,669 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1562875479] [2021-10-13 01:16:41,670 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1562875479] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:41,670 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1450883114] [2021-10-13 01:16:41,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:41,670 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:41,671 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:41,672 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:41,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-13 01:16:42,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:42,159 INFO L263 TraceCheckSpWp]: Trace formula consists of 798 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-13 01:16:42,163 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:42,692 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 01:16:42,692 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1450883114] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:42,692 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 01:16:42,693 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-13 01:16:42,693 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [720332055] [2021-10-13 01:16:42,694 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:42,694 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:42,695 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:42,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-13 01:16:42,695 INFO L87 Difference]: Start difference. First operand 1880 states and 2400 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:43,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:43,430 INFO L93 Difference]: Finished difference Result 5402 states and 7038 transitions. [2021-10-13 01:16:43,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 01:16:43,431 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-13 01:16:43,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:43,434 INFO L225 Difference]: With dead ends: 5402 [2021-10-13 01:16:43,434 INFO L226 Difference]: Without dead ends: 3677 [2021-10-13 01:16:43,437 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 207.6ms TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2021-10-13 01:16:43,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3677 states. [2021-10-13 01:16:43,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3677 to 1880. [2021-10-13 01:16:43,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2784) internal successors, (2397), 1879 states have internal predecessors, (2397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:43,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2397 transitions. [2021-10-13 01:16:43,753 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2397 transitions. Word has length 140 [2021-10-13 01:16:43,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:43,753 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2397 transitions. [2021-10-13 01:16:43,754 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:43,754 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2397 transitions. [2021-10-13 01:16:43,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-13 01:16:43,759 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:43,760 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:43,802 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:43,984 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:43,985 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:43,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:43,985 INFO L82 PathProgramCache]: Analyzing trace with hash -1655490771, now seen corresponding path program 1 times [2021-10-13 01:16:43,986 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:43,986 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885068149] [2021-10-13 01:16:43,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:43,986 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:44,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:44,208 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:44,208 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:44,208 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885068149] [2021-10-13 01:16:44,209 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1885068149] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:44,209 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1754665273] [2021-10-13 01:16:44,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:44,209 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:44,210 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:44,211 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:44,232 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-13 01:16:44,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:44,660 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-13 01:16:44,663 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:45,582 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:45,582 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1754665273] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:45,582 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:16:45,583 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-13 01:16:45,583 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361440153] [2021-10-13 01:16:45,584 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-13 01:16:45,584 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:45,585 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-13 01:16:45,585 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-13 01:16:45,585 INFO L87 Difference]: Start difference. First operand 1880 states and 2397 transitions. Second operand has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:47,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:47,476 INFO L93 Difference]: Finished difference Result 5230 states and 6700 transitions. [2021-10-13 01:16:47,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-13 01:16:47,477 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-13 01:16:47,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:47,480 INFO L225 Difference]: With dead ends: 5230 [2021-10-13 01:16:47,480 INFO L226 Difference]: Without dead ends: 3545 [2021-10-13 01:16:47,483 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 429.1ms TimeCoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2021-10-13 01:16:47,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3545 states. [2021-10-13 01:16:47,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3545 to 2122. [2021-10-13 01:16:47,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2122 states, 2117 states have (on average 1.274444969296174) internal successors, (2698), 2121 states have internal predecessors, (2698), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:47,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2122 states to 2122 states and 2698 transitions. [2021-10-13 01:16:47,965 INFO L78 Accepts]: Start accepts. Automaton has 2122 states and 2698 transitions. Word has length 143 [2021-10-13 01:16:47,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:47,965 INFO L470 AbstractCegarLoop]: Abstraction has 2122 states and 2698 transitions. [2021-10-13 01:16:47,966 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:47,966 INFO L276 IsEmpty]: Start isEmpty. Operand 2122 states and 2698 transitions. [2021-10-13 01:16:47,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-13 01:16:47,971 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:47,971 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:48,014 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:48,196 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:48,197 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:48,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:48,197 INFO L82 PathProgramCache]: Analyzing trace with hash 508125803, now seen corresponding path program 1 times [2021-10-13 01:16:48,197 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:48,198 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605895337] [2021-10-13 01:16:48,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:48,198 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:48,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:48,308 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-13 01:16:48,309 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:48,309 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605895337] [2021-10-13 01:16:48,309 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1605895337] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:48,309 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:48,309 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:48,310 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339874513] [2021-10-13 01:16:48,310 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 01:16:48,310 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:48,311 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 01:16:48,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:48,311 INFO L87 Difference]: Start difference. First operand 2122 states and 2698 transitions. Second operand has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:48,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:48,651 INFO L93 Difference]: Finished difference Result 3982 states and 5104 transitions. [2021-10-13 01:16:48,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 01:16:48,652 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-13 01:16:48,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:48,654 INFO L225 Difference]: With dead ends: 3982 [2021-10-13 01:16:48,654 INFO L226 Difference]: Without dead ends: 1994 [2021-10-13 01:16:48,657 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 11.2ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 01:16:48,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1994 states. [2021-10-13 01:16:48,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1994 to 1994. [2021-10-13 01:16:48,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1994 states, 1989 states have (on average 1.278531925590749) internal successors, (2543), 1993 states have internal predecessors, (2543), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:48,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1994 states to 1994 states and 2543 transitions. [2021-10-13 01:16:48,992 INFO L78 Accepts]: Start accepts. Automaton has 1994 states and 2543 transitions. Word has length 143 [2021-10-13 01:16:48,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:48,992 INFO L470 AbstractCegarLoop]: Abstraction has 1994 states and 2543 transitions. [2021-10-13 01:16:48,992 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:48,992 INFO L276 IsEmpty]: Start isEmpty. Operand 1994 states and 2543 transitions. [2021-10-13 01:16:48,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-13 01:16:48,996 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:48,997 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:48,997 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-10-13 01:16:48,997 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:48,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:48,998 INFO L82 PathProgramCache]: Analyzing trace with hash -529555049, now seen corresponding path program 1 times [2021-10-13 01:16:48,998 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:48,998 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545597129] [2021-10-13 01:16:48,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:48,998 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:49,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:49,186 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:49,186 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:49,187 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545597129] [2021-10-13 01:16:49,187 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1545597129] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:49,187 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1562264800] [2021-10-13 01:16:49,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:49,187 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:49,187 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:49,189 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:49,190 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-10-13 01:16:49,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:49,721 INFO L263 TraceCheckSpWp]: Trace formula consists of 811 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-13 01:16:49,725 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:50,674 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:50,675 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1562264800] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:50,675 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:16:50,675 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-13 01:16:50,675 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518072591] [2021-10-13 01:16:50,677 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-13 01:16:50,677 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:50,677 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-13 01:16:50,678 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-13 01:16:50,678 INFO L87 Difference]: Start difference. First operand 1994 states and 2543 transitions. Second operand has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:52,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:52,987 INFO L93 Difference]: Finished difference Result 6387 states and 8158 transitions. [2021-10-13 01:16:52,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2021-10-13 01:16:52,987 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-13 01:16:52,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:52,992 INFO L225 Difference]: With dead ends: 6387 [2021-10-13 01:16:52,992 INFO L226 Difference]: Without dead ends: 4588 [2021-10-13 01:16:52,997 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 137 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 645 ImplicationChecksByTransitivity, 723.6ms TimeCoverageRelationStatistics Valid=548, Invalid=2104, Unknown=0, NotChecked=0, Total=2652 [2021-10-13 01:16:53,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4588 states. [2021-10-13 01:16:53,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4588 to 2272. [2021-10-13 01:16:53,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2272 states, 2267 states have (on average 1.27437141596824) internal successors, (2889), 2271 states have internal predecessors, (2889), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:53,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2272 states to 2272 states and 2889 transitions. [2021-10-13 01:16:53,615 INFO L78 Accepts]: Start accepts. Automaton has 2272 states and 2889 transitions. Word has length 144 [2021-10-13 01:16:53,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:53,616 INFO L470 AbstractCegarLoop]: Abstraction has 2272 states and 2889 transitions. [2021-10-13 01:16:53,617 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:53,617 INFO L276 IsEmpty]: Start isEmpty. Operand 2272 states and 2889 transitions. [2021-10-13 01:16:53,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-13 01:16:53,622 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:53,623 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:53,665 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2021-10-13 01:16:53,836 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:53,837 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:53,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:53,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1568139623, now seen corresponding path program 1 times [2021-10-13 01:16:53,837 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:53,837 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886855922] [2021-10-13 01:16:53,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:53,838 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:53,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:53,909 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2021-10-13 01:16:53,909 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:53,910 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886855922] [2021-10-13 01:16:53,910 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [886855922] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:53,910 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:53,910 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:16:53,911 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [191950841] [2021-10-13 01:16:53,912 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:16:53,912 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:53,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:16:53,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:53,913 INFO L87 Difference]: Start difference. First operand 2272 states and 2889 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:54,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:54,416 INFO L93 Difference]: Finished difference Result 4197 states and 5372 transitions. [2021-10-13 01:16:54,416 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 01:16:54,417 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-13 01:16:54,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:54,419 INFO L225 Difference]: With dead ends: 4197 [2021-10-13 01:16:54,420 INFO L226 Difference]: Without dead ends: 2061 [2021-10-13 01:16:54,422 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.5ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:16:54,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2061 states. [2021-10-13 01:16:54,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2061 to 2053. [2021-10-13 01:16:54,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2053 states, 2048 states have (on average 1.27197265625) internal successors, (2605), 2052 states have internal predecessors, (2605), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:54,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2053 states to 2053 states and 2605 transitions. [2021-10-13 01:16:54,754 INFO L78 Accepts]: Start accepts. Automaton has 2053 states and 2605 transitions. Word has length 144 [2021-10-13 01:16:54,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:54,754 INFO L470 AbstractCegarLoop]: Abstraction has 2053 states and 2605 transitions. [2021-10-13 01:16:54,755 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:54,755 INFO L276 IsEmpty]: Start isEmpty. Operand 2053 states and 2605 transitions. [2021-10-13 01:16:54,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-13 01:16:54,759 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:54,759 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:54,759 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-13 01:16:54,760 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:54,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:54,760 INFO L82 PathProgramCache]: Analyzing trace with hash -1816010656, now seen corresponding path program 1 times [2021-10-13 01:16:54,760 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:54,761 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402684574] [2021-10-13 01:16:54,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:54,761 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:54,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:54,853 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-13 01:16:54,853 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:54,854 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402684574] [2021-10-13 01:16:54,854 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [402684574] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:16:54,854 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:16:54,854 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 01:16:54,855 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402398719] [2021-10-13 01:16:54,855 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:16:54,855 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:54,856 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:16:54,856 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 01:16:54,856 INFO L87 Difference]: Start difference. First operand 2053 states and 2605 transitions. Second operand has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:56,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:56,319 INFO L93 Difference]: Finished difference Result 9022 states and 11736 transitions. [2021-10-13 01:16:56,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-13 01:16:56,320 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-13 01:16:56,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:56,326 INFO L225 Difference]: With dead ends: 9022 [2021-10-13 01:16:56,326 INFO L226 Difference]: Without dead ends: 7164 [2021-10-13 01:16:56,330 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 57.0ms TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2021-10-13 01:16:56,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7164 states. [2021-10-13 01:16:56,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7164 to 2406. [2021-10-13 01:16:56,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.2573927530195752) internal successors, (3019), 2405 states have internal predecessors, (3019), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:56,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3019 transitions. [2021-10-13 01:16:56,771 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3019 transitions. Word has length 144 [2021-10-13 01:16:56,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:16:56,771 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3019 transitions. [2021-10-13 01:16:56,771 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:56,771 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3019 transitions. [2021-10-13 01:16:56,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-13 01:16:56,775 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:16:56,775 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:16:56,775 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-10-13 01:16:56,776 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:16:56,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:16:56,776 INFO L82 PathProgramCache]: Analyzing trace with hash -922037262, now seen corresponding path program 1 times [2021-10-13 01:16:56,776 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:16:56,777 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886459254] [2021-10-13 01:16:56,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:56,777 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:16:56,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:56,993 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:56,993 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:16:56,993 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886459254] [2021-10-13 01:16:56,993 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1886459254] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:56,994 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1433100666] [2021-10-13 01:16:56,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:16:56,994 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:16:56,994 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:16:56,995 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:16:56,996 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-10-13 01:16:57,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:16:57,544 INFO L263 TraceCheckSpWp]: Trace formula consists of 812 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-13 01:16:57,547 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:16:58,775 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:16:58,776 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1433100666] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:16:58,776 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:16:58,776 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 9 [2021-10-13 01:16:58,777 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801085940] [2021-10-13 01:16:58,778 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-10-13 01:16:58,778 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:16:58,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-13 01:16:58,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2021-10-13 01:16:58,781 INFO L87 Difference]: Start difference. First operand 2406 states and 3019 transitions. Second operand has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:16:59,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:16:59,771 INFO L93 Difference]: Finished difference Result 5572 states and 7059 transitions. [2021-10-13 01:16:59,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-13 01:16:59,772 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-13 01:16:59,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:16:59,775 INFO L225 Difference]: With dead ends: 5572 [2021-10-13 01:16:59,775 INFO L226 Difference]: Without dead ends: 3361 [2021-10-13 01:16:59,778 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 139 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 189.2ms TimeCoverageRelationStatistics Valid=100, Invalid=206, Unknown=0, NotChecked=0, Total=306 [2021-10-13 01:16:59,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3361 states. [2021-10-13 01:17:00,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3361 to 2406. [2021-10-13 01:17:00,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.252811328613078) internal successors, (3008), 2405 states have internal predecessors, (3008), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:00,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3008 transitions. [2021-10-13 01:17:00,189 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3008 transitions. Word has length 145 [2021-10-13 01:17:00,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:17:00,189 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3008 transitions. [2021-10-13 01:17:00,190 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:00,190 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3008 transitions. [2021-10-13 01:17:00,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-13 01:17:00,194 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:17:00,194 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:17:00,238 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2021-10-13 01:17:00,420 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2021-10-13 01:17:00,421 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:17:00,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:17:00,421 INFO L82 PathProgramCache]: Analyzing trace with hash -1375736921, now seen corresponding path program 1 times [2021-10-13 01:17:00,421 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:17:00,421 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886945390] [2021-10-13 01:17:00,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:00,421 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:17:00,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:00,521 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:17:00,521 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:17:00,521 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886945390] [2021-10-13 01:17:00,521 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1886945390] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:17:00,522 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1255270214] [2021-10-13 01:17:00,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:00,522 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:17:00,522 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:17:00,523 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:17:00,544 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-13 01:17:01,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:01,147 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-13 01:17:01,151 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:17:01,547 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:17:01,547 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1255270214] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:17:01,547 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:17:01,548 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-13 01:17:01,548 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143281317] [2021-10-13 01:17:01,548 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 01:17:01,549 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:17:01,549 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 01:17:01,549 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-13 01:17:01,549 INFO L87 Difference]: Start difference. First operand 2406 states and 3008 transitions. Second operand has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:02,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:17:02,863 INFO L93 Difference]: Finished difference Result 8321 states and 10665 transitions. [2021-10-13 01:17:02,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-13 01:17:02,863 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-13 01:17:02,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:17:02,870 INFO L225 Difference]: With dead ends: 8321 [2021-10-13 01:17:02,870 INFO L226 Difference]: Without dead ends: 6110 [2021-10-13 01:17:02,873 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 79.3ms TimeCoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2021-10-13 01:17:02,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6110 states. [2021-10-13 01:17:03,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6110 to 4184. [2021-10-13 01:17:03,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2498205312275663) internal successors, (5223), 4183 states have internal predecessors, (5223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:03,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5223 transitions. [2021-10-13 01:17:03,647 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5223 transitions. Word has length 145 [2021-10-13 01:17:03,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:17:03,647 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5223 transitions. [2021-10-13 01:17:03,647 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:03,648 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5223 transitions. [2021-10-13 01:17:03,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-13 01:17:03,650 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:17:03,651 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:17:03,675 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-10-13 01:17:03,851 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40 [2021-10-13 01:17:03,851 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:17:03,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:17:03,852 INFO L82 PathProgramCache]: Analyzing trace with hash -415965278, now seen corresponding path program 1 times [2021-10-13 01:17:03,852 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:17:03,852 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1534882930] [2021-10-13 01:17:03,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:03,853 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:17:03,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:04,082 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:17:04,083 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:17:04,083 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1534882930] [2021-10-13 01:17:04,083 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1534882930] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:17:04,083 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1631754319] [2021-10-13 01:17:04,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:04,083 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:17:04,084 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:17:04,085 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:17:04,102 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-13 01:17:04,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:04,778 INFO L263 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-13 01:17:04,781 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:17:05,111 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-13 01:17:05,111 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1631754319] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:17:05,111 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 01:17:05,112 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-13 01:17:05,112 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700129942] [2021-10-13 01:17:05,112 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:17:05,112 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:17:05,113 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:17:05,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-13 01:17:05,113 INFO L87 Difference]: Start difference. First operand 4184 states and 5223 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:06,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:17:06,311 INFO L93 Difference]: Finished difference Result 9281 states and 11744 transitions. [2021-10-13 01:17:06,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 01:17:06,312 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-13 01:17:06,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:17:06,318 INFO L225 Difference]: With dead ends: 9281 [2021-10-13 01:17:06,318 INFO L226 Difference]: Without dead ends: 5931 [2021-10-13 01:17:06,323 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 165.8ms TimeCoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2021-10-13 01:17:06,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5931 states. [2021-10-13 01:17:06,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5931 to 4184. [2021-10-13 01:17:06,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2335486958602537) internal successors, (5155), 4183 states have internal predecessors, (5155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:06,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5155 transitions. [2021-10-13 01:17:06,999 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5155 transitions. Word has length 145 [2021-10-13 01:17:06,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:17:06,999 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5155 transitions. [2021-10-13 01:17:07,000 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:07,000 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5155 transitions. [2021-10-13 01:17:07,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-13 01:17:07,002 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:17:07,003 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:17:07,027 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2021-10-13 01:17:07,204 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:17:07,204 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:17:07,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:17:07,205 INFO L82 PathProgramCache]: Analyzing trace with hash -601450378, now seen corresponding path program 1 times [2021-10-13 01:17:07,205 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:17:07,205 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447898116] [2021-10-13 01:17:07,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:07,205 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:17:07,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:07,362 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:17:07,363 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:17:07,363 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447898116] [2021-10-13 01:17:07,363 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1447898116] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:17:07,363 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [680162988] [2021-10-13 01:17:07,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:07,364 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:17:07,364 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:17:07,369 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:17:07,388 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-10-13 01:17:08,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:08,119 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-13 01:17:08,122 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:17:08,458 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:17:08,458 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [680162988] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:17:08,458 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 01:17:08,458 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 8 [2021-10-13 01:17:08,458 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1867440133] [2021-10-13 01:17:08,459 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-13 01:17:08,459 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:17:08,459 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-13 01:17:08,459 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2021-10-13 01:17:08,460 INFO L87 Difference]: Start difference. First operand 4184 states and 5155 transitions. Second operand has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:10,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:17:10,731 INFO L93 Difference]: Finished difference Result 14982 states and 18477 transitions. [2021-10-13 01:17:10,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-10-13 01:17:10,733 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-13 01:17:10,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:17:10,743 INFO L225 Difference]: With dead ends: 14982 [2021-10-13 01:17:10,744 INFO L226 Difference]: Without dead ends: 11801 [2021-10-13 01:17:10,748 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 120.4ms TimeCoverageRelationStatistics Valid=129, Invalid=423, Unknown=0, NotChecked=0, Total=552 [2021-10-13 01:17:10,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11801 states. [2021-10-13 01:17:11,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11801 to 6811. [2021-10-13 01:17:11,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6811 states, 6806 states have (on average 1.237878342638848) internal successors, (8425), 6810 states have internal predecessors, (8425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:11,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6811 states to 6811 states and 8425 transitions. [2021-10-13 01:17:11,965 INFO L78 Accepts]: Start accepts. Automaton has 6811 states and 8425 transitions. Word has length 146 [2021-10-13 01:17:11,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:17:11,966 INFO L470 AbstractCegarLoop]: Abstraction has 6811 states and 8425 transitions. [2021-10-13 01:17:11,966 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:11,966 INFO L276 IsEmpty]: Start isEmpty. Operand 6811 states and 8425 transitions. [2021-10-13 01:17:11,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-13 01:17:11,973 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:17:11,973 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:17:12,005 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2021-10-13 01:17:12,192 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2021-10-13 01:17:12,193 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:17:12,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:17:12,193 INFO L82 PathProgramCache]: Analyzing trace with hash -1640034952, now seen corresponding path program 1 times [2021-10-13 01:17:12,193 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:17:12,193 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1727463735] [2021-10-13 01:17:12,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:12,193 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:17:12,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:12,257 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-13 01:17:12,257 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:17:12,257 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1727463735] [2021-10-13 01:17:12,258 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1727463735] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:17:12,258 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:17:12,258 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 01:17:12,258 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946439655] [2021-10-13 01:17:12,259 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 01:17:12,259 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:17:12,259 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 01:17:12,259 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:17:12,260 INFO L87 Difference]: Start difference. First operand 6811 states and 8425 transitions. Second operand has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:13,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:17:13,321 INFO L93 Difference]: Finished difference Result 11214 states and 13923 transitions. [2021-10-13 01:17:13,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 01:17:13,322 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-13 01:17:13,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:17:13,326 INFO L225 Difference]: With dead ends: 11214 [2021-10-13 01:17:13,327 INFO L226 Difference]: Without dead ends: 4986 [2021-10-13 01:17:13,332 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.1ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 01:17:13,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4986 states. [2021-10-13 01:17:14,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4986 to 4960. [2021-10-13 01:17:14,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.239556004036327) internal successors, (6142), 4959 states have internal predecessors, (6142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:14,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6142 transitions. [2021-10-13 01:17:14,239 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6142 transitions. Word has length 146 [2021-10-13 01:17:14,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:17:14,240 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6142 transitions. [2021-10-13 01:17:14,240 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:14,240 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6142 transitions. [2021-10-13 01:17:14,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-10-13 01:17:14,245 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:17:14,245 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:17:14,246 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-10-13 01:17:14,246 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:17:14,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:17:14,247 INFO L82 PathProgramCache]: Analyzing trace with hash -1660310691, now seen corresponding path program 1 times [2021-10-13 01:17:14,247 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:17:14,247 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549347001] [2021-10-13 01:17:14,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:14,247 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:17:14,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:14,471 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 01:17:14,472 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:17:14,472 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549347001] [2021-10-13 01:17:14,472 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549347001] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 01:17:14,472 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [834969624] [2021-10-13 01:17:14,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:14,472 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 01:17:14,473 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 01:17:14,477 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 01:17:14,495 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-10-13 01:17:15,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:15,416 INFO L263 TraceCheckSpWp]: Trace formula consists of 834 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-13 01:17:15,420 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 01:17:15,789 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-13 01:17:15,792 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [834969624] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:17:15,793 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 01:17:15,793 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-13 01:17:15,793 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704125453] [2021-10-13 01:17:15,794 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:17:15,794 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:17:15,794 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:17:15,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-13 01:17:15,795 INFO L87 Difference]: Start difference. First operand 4960 states and 6142 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:17,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:17:17,563 INFO L93 Difference]: Finished difference Result 12895 states and 16091 transitions. [2021-10-13 01:17:17,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 01:17:17,564 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-10-13 01:17:17,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:17:17,572 INFO L225 Difference]: With dead ends: 12895 [2021-10-13 01:17:17,573 INFO L226 Difference]: Without dead ends: 8622 [2021-10-13 01:17:17,578 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 147.5ms TimeCoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2021-10-13 01:17:17,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8622 states. [2021-10-13 01:17:18,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8622 to 4960. [2021-10-13 01:17:18,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.2391523713420787) internal successors, (6140), 4959 states have internal predecessors, (6140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:18,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6140 transitions. [2021-10-13 01:17:18,692 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6140 transitions. Word has length 149 [2021-10-13 01:17:18,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:17:18,693 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6140 transitions. [2021-10-13 01:17:18,693 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:18,693 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6140 transitions. [2021-10-13 01:17:18,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-10-13 01:17:18,698 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:17:18,698 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:17:18,735 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2021-10-13 01:17:18,912 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable44 [2021-10-13 01:17:18,913 INFO L402 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:17:18,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:17:18,913 INFO L82 PathProgramCache]: Analyzing trace with hash -2043778853, now seen corresponding path program 1 times [2021-10-13 01:17:18,913 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:17:18,913 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450856451] [2021-10-13 01:17:18,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:18,913 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:17:18,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 01:17:19,044 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-13 01:17:19,045 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 01:17:19,045 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450856451] [2021-10-13 01:17:19,045 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1450856451] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 01:17:19,045 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 01:17:19,046 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 01:17:19,046 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840490373] [2021-10-13 01:17:19,047 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 01:17:19,047 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 01:17:19,047 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 01:17:19,048 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 01:17:19,048 INFO L87 Difference]: Start difference. First operand 4960 states and 6140 transitions. Second operand has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:21,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 01:17:21,358 INFO L93 Difference]: Finished difference Result 12708 states and 15969 transitions. [2021-10-13 01:17:21,358 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 01:17:21,358 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 150 [2021-10-13 01:17:21,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 01:17:21,368 INFO L225 Difference]: With dead ends: 12708 [2021-10-13 01:17:21,368 INFO L226 Difference]: Without dead ends: 9846 [2021-10-13 01:17:21,372 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 67.7ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 01:17:21,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9846 states. [2021-10-13 01:17:22,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9846 to 5071. [2021-10-13 01:17:22,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5071 states, 5066 states have (on average 1.2376628503750493) internal successors, (6270), 5070 states have internal predecessors, (6270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:22,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5071 states to 5071 states and 6270 transitions. [2021-10-13 01:17:22,311 INFO L78 Accepts]: Start accepts. Automaton has 5071 states and 6270 transitions. Word has length 150 [2021-10-13 01:17:22,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 01:17:22,312 INFO L470 AbstractCegarLoop]: Abstraction has 5071 states and 6270 transitions. [2021-10-13 01:17:22,312 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 01:17:22,312 INFO L276 IsEmpty]: Start isEmpty. Operand 5071 states and 6270 transitions. [2021-10-13 01:17:22,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2021-10-13 01:17:22,317 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 01:17:22,317 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 01:17:22,317 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2021-10-13 01:17:22,317 INFO L402 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 01:17:22,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 01:17:22,318 INFO L82 PathProgramCache]: Analyzing trace with hash 1490980259, now seen corresponding path program 1 times [2021-10-13 01:17:22,318 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 01:17:22,318 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662058163] [2021-10-13 01:17:22,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 01:17:22,319 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 01:17:22,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:17:22,387 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 01:17:22,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 01:17:22,671 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 01:17:22,671 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-10-13 01:17:22,673 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,674 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,675 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,675 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,675 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,676 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,676 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,676 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,676 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,676 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,676 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,677 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,677 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,677 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,677 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,677 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,678 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,678 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,678 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,679 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,679 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,679 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,679 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 01:17:22,680 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2021-10-13 01:17:22,688 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-13 01:17:22,980 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 01:17:22 BoogieIcfgContainer [2021-10-13 01:17:22,980 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-13 01:17:22,981 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-13 01:17:22,981 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-13 01:17:22,982 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-13 01:17:22,982 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 01:16:01" (3/4) ... [2021-10-13 01:17:22,984 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-13 01:17:23,251 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/witness.graphml [2021-10-13 01:17:23,251 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-13 01:17:23,253 INFO L168 Benchmark]: Toolchain (without parser) took 84109.34 ms. Allocated memory was 90.2 MB in the beginning and 1.9 GB in the end (delta: 1.8 GB). Free memory was 55.4 MB in the beginning and 1.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 167.6 MB. Max. memory is 16.1 GB. [2021-10-13 01:17:23,255 INFO L168 Benchmark]: CDTParser took 0.38 ms. Allocated memory is still 90.2 MB. Free memory was 63.6 MB in the beginning and 63.6 MB in the end (delta: 26.1 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-13 01:17:23,255 INFO L168 Benchmark]: CACSL2BoogieTranslator took 465.63 ms. Allocated memory is still 90.2 MB. Free memory was 55.1 MB in the beginning and 58.6 MB in the end (delta: -3.5 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-13 01:17:23,256 INFO L168 Benchmark]: Boogie Procedure Inliner took 115.95 ms. Allocated memory is still 90.2 MB. Free memory was 58.6 MB in the beginning and 54.0 MB in the end (delta: 4.6 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-13 01:17:23,256 INFO L168 Benchmark]: Boogie Preprocessor took 64.52 ms. Allocated memory is still 90.2 MB. Free memory was 54.0 MB in the beginning and 50.7 MB in the end (delta: 3.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-13 01:17:23,257 INFO L168 Benchmark]: RCFGBuilder took 1237.54 ms. Allocated memory was 90.2 MB in the beginning and 119.5 MB in the end (delta: 29.4 MB). Free memory was 50.7 MB in the beginning and 72.4 MB in the end (delta: -21.7 MB). Peak memory consumption was 28.8 MB. Max. memory is 16.1 GB. [2021-10-13 01:17:23,257 INFO L168 Benchmark]: TraceAbstraction took 81943.83 ms. Allocated memory was 119.5 MB in the beginning and 1.9 GB in the end (delta: 1.8 GB). Free memory was 72.2 MB in the beginning and 1.8 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. [2021-10-13 01:17:23,257 INFO L168 Benchmark]: Witness Printer took 269.82 ms. Allocated memory is still 1.9 GB. Free memory was 1.8 GB in the beginning and 1.7 GB in the end (delta: 47.4 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. [2021-10-13 01:17:23,260 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.38 ms. Allocated memory is still 90.2 MB. Free memory was 63.6 MB in the beginning and 63.6 MB in the end (delta: 26.1 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 465.63 ms. Allocated memory is still 90.2 MB. Free memory was 55.1 MB in the beginning and 58.6 MB in the end (delta: -3.5 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 115.95 ms. Allocated memory is still 90.2 MB. Free memory was 58.6 MB in the beginning and 54.0 MB in the end (delta: 4.6 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 64.52 ms. Allocated memory is still 90.2 MB. Free memory was 54.0 MB in the beginning and 50.7 MB in the end (delta: 3.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1237.54 ms. Allocated memory was 90.2 MB in the beginning and 119.5 MB in the end (delta: 29.4 MB). Free memory was 50.7 MB in the beginning and 72.4 MB in the end (delta: -21.7 MB). Peak memory consumption was 28.8 MB. Max. memory is 16.1 GB. * TraceAbstraction took 81943.83 ms. Allocated memory was 119.5 MB in the beginning and 1.9 GB in the end (delta: 1.8 GB). Free memory was 72.2 MB in the beginning and 1.8 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. * Witness Printer took 269.82 ms. Allocated memory is still 1.9 GB. Free memory was 1.8 GB in the beginning and 1.7 GB in the end (delta: 47.4 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] reach_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 297 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 81541.7ms, OverallIterations: 47, TraceHistogramMax: 2, EmptinessCheckTime: 158.6ms, AutomataDifference: 44401.0ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 27.5ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 22435 SDtfs, 49588 SDslu, 61678 SDs, 0 SdLazy, 11075 SolverSat, 716 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7495.3ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2737 GetRequests, 2039 SyntacticMatches, 9 SemanticMatches, 689 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31174 ImplicationChecksByTransitivity, 10071.7ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=6811occurred in iteration=43, InterpolantAutomatonStates: 664, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 13234.9ms AutomataMinimizationTime, 46 MinimizatonAttempts, 69882 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 800.0ms SsaConstructionTime, 2877.4ms SatisfiabilityAnalysisTime, 11381.0ms InterpolantComputationTime, 6454 NumberOfCodeBlocks, 6454 NumberOfCodeBlocksAsserted, 60 NumberOfCheckSat, 6244 ConstructedInterpolants, 0 QuantifiedInterpolants, 22714 SizeOfPredicates, 57 NumberOfNonLiveVariables, 10284 ConjunctsInSsa, 175 ConjunctsInUnsatCore, 59 InterpolantComputations, 38 PerfectInterpolantSequences, 919/1290 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-13 01:17:23,329 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ff01b485-1ae8-4264-8ce2-34cfc64d46a1/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...