./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e77c044 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash cff16a021943ea8a3cbc396d88e23120375df06b ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-4e77c04 [2021-10-13 00:22:56,564 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-13 00:22:56,568 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-13 00:22:56,636 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-13 00:22:56,637 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-13 00:22:56,642 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-13 00:22:56,644 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-13 00:22:56,649 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-13 00:22:56,652 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-13 00:22:56,658 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-13 00:22:56,660 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-13 00:22:56,662 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-13 00:22:56,662 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-13 00:22:56,666 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-13 00:22:56,668 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-13 00:22:56,674 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-13 00:22:56,677 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-13 00:22:56,678 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-13 00:22:56,681 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-13 00:22:56,690 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-13 00:22:56,692 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-13 00:22:56,694 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-13 00:22:56,697 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-13 00:22:56,699 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-13 00:22:56,709 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-13 00:22:56,709 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-13 00:22:56,710 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-13 00:22:56,712 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-13 00:22:56,713 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-13 00:22:56,715 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-13 00:22:56,715 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-13 00:22:56,716 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-13 00:22:56,719 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-13 00:22:56,720 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-13 00:22:56,722 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-13 00:22:56,722 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-13 00:22:56,723 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-13 00:22:56,724 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-13 00:22:56,724 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-13 00:22:56,725 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-13 00:22:56,726 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-13 00:22:56,727 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-13 00:22:56,771 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-13 00:22:56,771 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-13 00:22:56,772 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-13 00:22:56,772 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-13 00:22:56,780 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-13 00:22:56,780 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-13 00:22:56,781 INFO L138 SettingsManager]: * Use SBE=true [2021-10-13 00:22:56,781 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-13 00:22:56,781 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-13 00:22:56,781 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-13 00:22:56,783 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-13 00:22:56,783 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-13 00:22:56,783 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-13 00:22:56,783 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-13 00:22:56,784 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-13 00:22:56,784 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-13 00:22:56,784 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-13 00:22:56,784 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-13 00:22:56,784 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-13 00:22:56,785 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-13 00:22:56,785 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-13 00:22:56,785 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-13 00:22:56,785 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 00:22:56,786 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-13 00:22:56,786 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-13 00:22:56,786 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-13 00:22:56,786 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-13 00:22:56,787 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-13 00:22:56,787 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-13 00:22:56,788 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-13 00:22:56,789 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cff16a021943ea8a3cbc396d88e23120375df06b [2021-10-13 00:22:57,195 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-13 00:22:57,235 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-13 00:22:57,239 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-13 00:22:57,240 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-13 00:22:57,241 INFO L275 PluginConnector]: CDTParser initialized [2021-10-13 00:22:57,242 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-13 00:22:57,319 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/data/25d10da5f/c3be9e2b55b248689837076b98f05b0e/FLAG7384dc20a [2021-10-13 00:22:58,011 INFO L306 CDTParser]: Found 1 translation units. [2021-10-13 00:22:58,012 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-13 00:22:58,024 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/data/25d10da5f/c3be9e2b55b248689837076b98f05b0e/FLAG7384dc20a [2021-10-13 00:22:58,037 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/data/25d10da5f/c3be9e2b55b248689837076b98f05b0e [2021-10-13 00:22:58,039 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-13 00:22:58,041 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-13 00:22:58,048 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-13 00:22:58,048 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-13 00:22:58,051 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-13 00:22:58,052 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,053 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5510e2f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58, skipping insertion in model container [2021-10-13 00:22:58,053 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,062 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-13 00:22:58,120 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-13 00:22:58,377 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2021-10-13 00:22:58,381 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 00:22:58,391 INFO L203 MainTranslator]: Completed pre-run [2021-10-13 00:22:58,498 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2021-10-13 00:22:58,499 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 00:22:58,517 INFO L208 MainTranslator]: Completed translation [2021-10-13 00:22:58,518 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58 WrapperNode [2021-10-13 00:22:58,518 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-13 00:22:58,519 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-13 00:22:58,520 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-13 00:22:58,520 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-13 00:22:58,528 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,543 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,634 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-13 00:22:58,634 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-13 00:22:58,635 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-13 00:22:58,635 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-13 00:22:58,653 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,653 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,661 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,661 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,682 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,695 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,699 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,707 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-13 00:22:58,709 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-13 00:22:58,709 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-13 00:22:58,709 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-13 00:22:58,713 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (1/1) ... [2021-10-13 00:22:58,741 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 00:22:58,768 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:22:58,782 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-13 00:22:58,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-13 00:22:58,838 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-13 00:22:58,839 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-13 00:22:58,841 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-13 00:22:58,842 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-13 00:22:59,871 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-13 00:22:59,871 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-13 00:22:59,876 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:22:59 BoogieIcfgContainer [2021-10-13 00:22:59,876 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-13 00:22:59,879 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-13 00:22:59,879 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-13 00:22:59,883 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-13 00:22:59,884 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 12:22:58" (1/3) ... [2021-10-13 00:22:59,885 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2472aafe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 12:22:59, skipping insertion in model container [2021-10-13 00:22:59,886 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:22:58" (2/3) ... [2021-10-13 00:22:59,887 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2472aafe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 12:22:59, skipping insertion in model container [2021-10-13 00:22:59,887 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:22:59" (3/3) ... [2021-10-13 00:22:59,890 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-13 00:22:59,896 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-13 00:22:59,896 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-13 00:22:59,968 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-13 00:22:59,977 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-13 00:22:59,977 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-13 00:23:00,010 INFO L276 IsEmpty]: Start isEmpty. Operand has 296 states, 272 states have (on average 1.7058823529411764) internal successors, (464), 295 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-13 00:23:00,018 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:00,019 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:00,019 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:00,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:00,026 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-13 00:23:00,037 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:00,037 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423703490] [2021-10-13 00:23:00,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:00,039 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:00,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:00,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:00,294 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:00,294 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [423703490] [2021-10-13 00:23:00,295 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [423703490] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:00,295 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:00,295 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-13 00:23:00,297 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [752048572] [2021-10-13 00:23:00,302 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-13 00:23:00,303 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:00,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-13 00:23:00,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-13 00:23:00,320 INFO L87 Difference]: Start difference. First operand has 296 states, 272 states have (on average 1.7058823529411764) internal successors, (464), 295 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:00,386 INFO L93 Difference]: Finished difference Result 572 states and 896 transitions. [2021-10-13 00:23:00,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-13 00:23:00,387 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-13 00:23:00,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:00,402 INFO L225 Difference]: With dead ends: 572 [2021-10-13 00:23:00,404 INFO L226 Difference]: Without dead ends: 292 [2021-10-13 00:23:00,412 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-13 00:23:00,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2021-10-13 00:23:00,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 292. [2021-10-13 00:23:00,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 269 states have (on average 1.5910780669144982) internal successors, (428), 291 states have internal predecessors, (428), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 428 transitions. [2021-10-13 00:23:00,476 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 428 transitions. Word has length 33 [2021-10-13 00:23:00,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:00,476 INFO L470 AbstractCegarLoop]: Abstraction has 292 states and 428 transitions. [2021-10-13 00:23:00,477 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,477 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 428 transitions. [2021-10-13 00:23:00,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-13 00:23:00,479 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:00,479 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:00,479 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-13 00:23:00,480 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:00,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:00,481 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-13 00:23:00,481 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:00,481 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038972820] [2021-10-13 00:23:00,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:00,482 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:00,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:00,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:00,568 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:00,569 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038972820] [2021-10-13 00:23:00,569 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2038972820] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:00,569 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:00,569 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:00,570 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387418590] [2021-10-13 00:23:00,571 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:00,571 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:00,572 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:00,572 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:00,573 INFO L87 Difference]: Start difference. First operand 292 states and 428 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:00,655 INFO L93 Difference]: Finished difference Result 570 states and 830 transitions. [2021-10-13 00:23:00,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:23:00,656 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-13 00:23:00,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:00,659 INFO L225 Difference]: With dead ends: 570 [2021-10-13 00:23:00,659 INFO L226 Difference]: Without dead ends: 292 [2021-10-13 00:23:00,660 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 12.2ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:00,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2021-10-13 00:23:00,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 292. [2021-10-13 00:23:00,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 269 states have (on average 1.546468401486989) internal successors, (416), 291 states have internal predecessors, (416), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 416 transitions. [2021-10-13 00:23:00,678 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 416 transitions. Word has length 33 [2021-10-13 00:23:00,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:00,678 INFO L470 AbstractCegarLoop]: Abstraction has 292 states and 416 transitions. [2021-10-13 00:23:00,678 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,679 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 416 transitions. [2021-10-13 00:23:00,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-13 00:23:00,680 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:00,681 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:00,681 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-13 00:23:00,681 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:00,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:00,682 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-13 00:23:00,682 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:00,683 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373658426] [2021-10-13 00:23:00,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:00,683 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:00,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:00,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:00,847 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:00,847 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373658426] [2021-10-13 00:23:00,847 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373658426] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:00,848 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:00,848 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:00,848 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877435397] [2021-10-13 00:23:00,848 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:00,849 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:00,849 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:00,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:00,850 INFO L87 Difference]: Start difference. First operand 292 states and 416 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:00,920 INFO L93 Difference]: Finished difference Result 600 states and 864 transitions. [2021-10-13 00:23:00,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:00,923 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-13 00:23:00,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:00,926 INFO L225 Difference]: With dead ends: 600 [2021-10-13 00:23:00,927 INFO L226 Difference]: Without dead ends: 325 [2021-10-13 00:23:00,928 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:00,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2021-10-13 00:23:00,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 268. [2021-10-13 00:23:00,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 249 states have (on average 1.5261044176706828) internal successors, (380), 267 states have internal predecessors, (380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 380 transitions. [2021-10-13 00:23:00,950 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 380 transitions. Word has length 44 [2021-10-13 00:23:00,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:00,951 INFO L470 AbstractCegarLoop]: Abstraction has 268 states and 380 transitions. [2021-10-13 00:23:00,951 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:00,951 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 380 transitions. [2021-10-13 00:23:00,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-13 00:23:00,958 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:00,958 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:00,959 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-13 00:23:00,959 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:00,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:00,961 INFO L82 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-13 00:23:00,961 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:00,962 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557458944] [2021-10-13 00:23:00,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:00,963 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:01,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:01,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:01,084 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:01,084 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1557458944] [2021-10-13 00:23:01,084 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1557458944] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:01,084 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:01,084 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:01,085 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422042248] [2021-10-13 00:23:01,085 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:01,085 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:01,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:01,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:01,087 INFO L87 Difference]: Start difference. First operand 268 states and 380 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:01,131 INFO L93 Difference]: Finished difference Result 747 states and 1071 transitions. [2021-10-13 00:23:01,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:01,138 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-13 00:23:01,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:01,142 INFO L225 Difference]: With dead ends: 747 [2021-10-13 00:23:01,143 INFO L226 Difference]: Without dead ends: 496 [2021-10-13 00:23:01,145 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:01,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states. [2021-10-13 00:23:01,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 303. [2021-10-13 00:23:01,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 303 states, 284 states have (on average 1.5211267605633803) internal successors, (432), 302 states have internal predecessors, (432), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 432 transitions. [2021-10-13 00:23:01,160 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 432 transitions. Word has length 53 [2021-10-13 00:23:01,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:01,161 INFO L470 AbstractCegarLoop]: Abstraction has 303 states and 432 transitions. [2021-10-13 00:23:01,161 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,161 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 432 transitions. [2021-10-13 00:23:01,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-13 00:23:01,163 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:01,163 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:01,163 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-13 00:23:01,163 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:01,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:01,164 INFO L82 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-13 00:23:01,164 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:01,165 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356869980] [2021-10-13 00:23:01,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:01,165 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:01,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:01,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:01,248 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:01,248 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356869980] [2021-10-13 00:23:01,249 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [356869980] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:01,249 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:01,249 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:01,249 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281706475] [2021-10-13 00:23:01,250 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:01,250 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:01,251 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:01,251 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:01,251 INFO L87 Difference]: Start difference. First operand 303 states and 432 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:01,285 INFO L93 Difference]: Finished difference Result 831 states and 1196 transitions. [2021-10-13 00:23:01,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:01,285 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-13 00:23:01,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:01,289 INFO L225 Difference]: With dead ends: 831 [2021-10-13 00:23:01,290 INFO L226 Difference]: Without dead ends: 545 [2021-10-13 00:23:01,291 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.4ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:01,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2021-10-13 00:23:01,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 328. [2021-10-13 00:23:01,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 328 states, 309 states have (on average 1.5210355987055015) internal successors, (470), 327 states have internal predecessors, (470), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 470 transitions. [2021-10-13 00:23:01,307 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 470 transitions. Word has length 54 [2021-10-13 00:23:01,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:01,307 INFO L470 AbstractCegarLoop]: Abstraction has 328 states and 470 transitions. [2021-10-13 00:23:01,308 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,308 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 470 transitions. [2021-10-13 00:23:01,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-13 00:23:01,310 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:01,310 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:01,310 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-13 00:23:01,310 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:01,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:01,311 INFO L82 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-13 00:23:01,311 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:01,312 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083372486] [2021-10-13 00:23:01,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:01,312 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:01,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:01,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:01,447 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:01,447 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083372486] [2021-10-13 00:23:01,447 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2083372486] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:01,447 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:01,448 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:01,448 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118672640] [2021-10-13 00:23:01,449 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:23:01,451 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:01,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:23:01,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:01,452 INFO L87 Difference]: Start difference. First operand 328 states and 470 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:01,713 INFO L93 Difference]: Finished difference Result 1020 states and 1473 transitions. [2021-10-13 00:23:01,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 00:23:01,714 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-13 00:23:01,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:01,722 INFO L225 Difference]: With dead ends: 1020 [2021-10-13 00:23:01,723 INFO L226 Difference]: Without dead ends: 709 [2021-10-13 00:23:01,734 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 28.4ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-13 00:23:01,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 709 states. [2021-10-13 00:23:01,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 709 to 426. [2021-10-13 00:23:01,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 426 states, 407 states have (on average 1.4914004914004915) internal successors, (607), 425 states have internal predecessors, (607), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 607 transitions. [2021-10-13 00:23:01,766 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 607 transitions. Word has length 54 [2021-10-13 00:23:01,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:01,766 INFO L470 AbstractCegarLoop]: Abstraction has 426 states and 607 transitions. [2021-10-13 00:23:01,769 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:01,769 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 607 transitions. [2021-10-13 00:23:01,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-13 00:23:01,770 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:01,770 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:01,771 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-13 00:23:01,771 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:01,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:01,772 INFO L82 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-13 00:23:01,772 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:01,777 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560959898] [2021-10-13 00:23:01,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:01,778 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:01,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:01,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:01,899 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:01,899 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560959898] [2021-10-13 00:23:01,899 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1560959898] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:01,899 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:01,899 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:01,900 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643662396] [2021-10-13 00:23:01,900 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:23:01,900 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:01,901 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:23:01,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:01,901 INFO L87 Difference]: Start difference. First operand 426 states and 607 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:02,112 INFO L93 Difference]: Finished difference Result 1024 states and 1473 transitions. [2021-10-13 00:23:02,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 00:23:02,113 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-13 00:23:02,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:02,117 INFO L225 Difference]: With dead ends: 1024 [2021-10-13 00:23:02,118 INFO L226 Difference]: Without dead ends: 713 [2021-10-13 00:23:02,119 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 27.9ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-13 00:23:02,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2021-10-13 00:23:02,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 434. [2021-10-13 00:23:02,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 415 states have (on average 1.4819277108433735) internal successors, (615), 433 states have internal predecessors, (615), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 615 transitions. [2021-10-13 00:23:02,145 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 615 transitions. Word has length 55 [2021-10-13 00:23:02,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:02,145 INFO L470 AbstractCegarLoop]: Abstraction has 434 states and 615 transitions. [2021-10-13 00:23:02,145 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,145 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 615 transitions. [2021-10-13 00:23:02,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-13 00:23:02,147 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:02,147 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:02,147 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-13 00:23:02,147 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:02,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:02,148 INFO L82 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-13 00:23:02,148 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:02,148 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727013881] [2021-10-13 00:23:02,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:02,150 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:02,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:02,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:02,261 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:02,261 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727013881] [2021-10-13 00:23:02,262 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [727013881] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:02,262 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:02,262 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:02,262 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973391985] [2021-10-13 00:23:02,263 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:02,263 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:02,263 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:02,263 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:02,264 INFO L87 Difference]: Start difference. First operand 434 states and 615 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:02,458 INFO L93 Difference]: Finished difference Result 1024 states and 1465 transitions. [2021-10-13 00:23:02,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:23:02,459 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-13 00:23:02,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:02,464 INFO L225 Difference]: With dead ends: 1024 [2021-10-13 00:23:02,464 INFO L226 Difference]: Without dead ends: 713 [2021-10-13 00:23:02,466 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 16.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:02,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2021-10-13 00:23:02,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 434. [2021-10-13 00:23:02,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 415 states have (on average 1.472289156626506) internal successors, (611), 433 states have internal predecessors, (611), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 611 transitions. [2021-10-13 00:23:02,491 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 611 transitions. Word has length 57 [2021-10-13 00:23:02,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:02,493 INFO L470 AbstractCegarLoop]: Abstraction has 434 states and 611 transitions. [2021-10-13 00:23:02,493 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,493 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 611 transitions. [2021-10-13 00:23:02,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-13 00:23:02,495 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:02,495 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:02,495 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-13 00:23:02,496 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:02,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:02,496 INFO L82 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-13 00:23:02,496 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:02,497 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849929863] [2021-10-13 00:23:02,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:02,497 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:02,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:02,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:02,572 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:02,572 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1849929863] [2021-10-13 00:23:02,573 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1849929863] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:02,573 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:02,573 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:02,573 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25358844] [2021-10-13 00:23:02,574 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:02,574 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:02,574 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:02,575 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:02,575 INFO L87 Difference]: Start difference. First operand 434 states and 611 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:02,614 INFO L93 Difference]: Finished difference Result 872 states and 1252 transitions. [2021-10-13 00:23:02,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:02,615 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-13 00:23:02,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:02,619 INFO L225 Difference]: With dead ends: 872 [2021-10-13 00:23:02,619 INFO L226 Difference]: Without dead ends: 561 [2021-10-13 00:23:02,620 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:02,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2021-10-13 00:23:02,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 429. [2021-10-13 00:23:02,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 429 states, 411 states have (on average 1.467153284671533) internal successors, (603), 428 states have internal predecessors, (603), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 603 transitions. [2021-10-13 00:23:02,646 INFO L78 Accepts]: Start accepts. Automaton has 429 states and 603 transitions. Word has length 58 [2021-10-13 00:23:02,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:02,646 INFO L470 AbstractCegarLoop]: Abstraction has 429 states and 603 transitions. [2021-10-13 00:23:02,647 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,647 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 603 transitions. [2021-10-13 00:23:02,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-13 00:23:02,648 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:02,648 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:02,648 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-13 00:23:02,648 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:02,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:02,649 INFO L82 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-13 00:23:02,649 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:02,649 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622869305] [2021-10-13 00:23:02,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:02,650 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:02,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:02,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:02,719 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:02,719 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1622869305] [2021-10-13 00:23:02,720 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1622869305] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:02,720 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:02,720 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:02,720 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [958790179] [2021-10-13 00:23:02,721 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:02,721 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:02,721 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:02,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:02,722 INFO L87 Difference]: Start difference. First operand 429 states and 603 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:02,815 INFO L93 Difference]: Finished difference Result 871 states and 1251 transitions. [2021-10-13 00:23:02,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:02,816 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-13 00:23:02,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:02,820 INFO L225 Difference]: With dead ends: 871 [2021-10-13 00:23:02,820 INFO L226 Difference]: Without dead ends: 565 [2021-10-13 00:23:02,821 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:02,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 565 states. [2021-10-13 00:23:02,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 565 to 409. [2021-10-13 00:23:02,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 395 states have (on average 1.4455696202531645) internal successors, (571), 408 states have internal predecessors, (571), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 571 transitions. [2021-10-13 00:23:02,850 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 571 transitions. Word has length 62 [2021-10-13 00:23:02,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:02,851 INFO L470 AbstractCegarLoop]: Abstraction has 409 states and 571 transitions. [2021-10-13 00:23:02,851 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:02,851 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 571 transitions. [2021-10-13 00:23:02,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-13 00:23:02,852 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:02,853 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:02,853 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-13 00:23:02,853 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:02,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:02,854 INFO L82 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-13 00:23:02,854 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:02,856 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634798573] [2021-10-13 00:23:02,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:02,857 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:02,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:02,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:02,941 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:02,941 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [634798573] [2021-10-13 00:23:02,942 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [634798573] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:02,942 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:02,942 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:02,942 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094798206] [2021-10-13 00:23:02,943 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:02,943 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:02,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:02,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:02,945 INFO L87 Difference]: Start difference. First operand 409 states and 571 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:03,000 INFO L93 Difference]: Finished difference Result 839 states and 1195 transitions. [2021-10-13 00:23:03,000 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:03,000 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-13 00:23:03,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:03,004 INFO L225 Difference]: With dead ends: 839 [2021-10-13 00:23:03,004 INFO L226 Difference]: Without dead ends: 553 [2021-10-13 00:23:03,005 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:03,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2021-10-13 00:23:03,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 397. [2021-10-13 00:23:03,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 397 states, 385 states have (on average 1.4363636363636363) internal successors, (553), 396 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 397 states to 397 states and 553 transitions. [2021-10-13 00:23:03,030 INFO L78 Accepts]: Start accepts. Automaton has 397 states and 553 transitions. Word has length 66 [2021-10-13 00:23:03,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:03,030 INFO L470 AbstractCegarLoop]: Abstraction has 397 states and 553 transitions. [2021-10-13 00:23:03,030 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,031 INFO L276 IsEmpty]: Start isEmpty. Operand 397 states and 553 transitions. [2021-10-13 00:23:03,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-13 00:23:03,031 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:03,032 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:03,032 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-13 00:23:03,032 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:03,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:03,032 INFO L82 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-13 00:23:03,033 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:03,033 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923723499] [2021-10-13 00:23:03,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:03,033 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:03,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:03,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:03,103 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:03,103 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923723499] [2021-10-13 00:23:03,103 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923723499] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:03,103 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:03,103 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:03,103 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256055827] [2021-10-13 00:23:03,104 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:03,104 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:03,104 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:03,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:03,105 INFO L87 Difference]: Start difference. First operand 397 states and 553 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:03,179 INFO L93 Difference]: Finished difference Result 835 states and 1187 transitions. [2021-10-13 00:23:03,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:03,180 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-13 00:23:03,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:03,183 INFO L225 Difference]: With dead ends: 835 [2021-10-13 00:23:03,184 INFO L226 Difference]: Without dead ends: 561 [2021-10-13 00:23:03,184 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:03,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2021-10-13 00:23:03,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 377. [2021-10-13 00:23:03,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 377 states, 369 states have (on average 1.4119241192411924) internal successors, (521), 376 states have internal predecessors, (521), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 521 transitions. [2021-10-13 00:23:03,220 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 521 transitions. Word has length 67 [2021-10-13 00:23:03,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:03,220 INFO L470 AbstractCegarLoop]: Abstraction has 377 states and 521 transitions. [2021-10-13 00:23:03,220 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,221 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 521 transitions. [2021-10-13 00:23:03,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-13 00:23:03,221 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:03,222 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:03,222 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-13 00:23:03,222 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:03,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:03,222 INFO L82 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-13 00:23:03,223 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:03,223 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778365066] [2021-10-13 00:23:03,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:03,223 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:03,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:03,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:03,370 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:03,370 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778365066] [2021-10-13 00:23:03,371 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [778365066] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:03,371 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:03,371 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:23:03,371 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531203217] [2021-10-13 00:23:03,371 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:03,372 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:03,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:03,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:23:03,372 INFO L87 Difference]: Start difference. First operand 377 states and 521 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:03,565 INFO L93 Difference]: Finished difference Result 1127 states and 1582 transitions. [2021-10-13 00:23:03,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:23:03,565 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-13 00:23:03,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:03,571 INFO L225 Difference]: With dead ends: 1127 [2021-10-13 00:23:03,571 INFO L226 Difference]: Without dead ends: 873 [2021-10-13 00:23:03,572 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 51.2ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 00:23:03,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2021-10-13 00:23:03,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 427. [2021-10-13 00:23:03,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 419 states have (on average 1.405727923627685) internal successors, (589), 426 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 589 transitions. [2021-10-13 00:23:03,609 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 589 transitions. Word has length 72 [2021-10-13 00:23:03,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:03,610 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 589 transitions. [2021-10-13 00:23:03,610 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,610 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 589 transitions. [2021-10-13 00:23:03,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-13 00:23:03,611 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:03,611 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:03,611 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-13 00:23:03,611 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:03,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:03,612 INFO L82 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-13 00:23:03,612 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:03,612 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146011902] [2021-10-13 00:23:03,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:03,612 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:03,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:03,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:03,694 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:03,694 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146011902] [2021-10-13 00:23:03,694 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146011902] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:03,694 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:03,694 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:03,694 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381913190] [2021-10-13 00:23:03,695 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:03,695 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:03,695 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:03,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:03,696 INFO L87 Difference]: Start difference. First operand 427 states and 589 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:03,752 INFO L93 Difference]: Finished difference Result 760 states and 1066 transitions. [2021-10-13 00:23:03,753 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:03,753 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-13 00:23:03,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:03,756 INFO L225 Difference]: With dead ends: 760 [2021-10-13 00:23:03,756 INFO L226 Difference]: Without dead ends: 506 [2021-10-13 00:23:03,757 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:03,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states. [2021-10-13 00:23:03,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 423. [2021-10-13 00:23:03,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 416 states have (on average 1.3990384615384615) internal successors, (582), 422 states have internal predecessors, (582), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 582 transitions. [2021-10-13 00:23:03,787 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 582 transitions. Word has length 73 [2021-10-13 00:23:03,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:03,788 INFO L470 AbstractCegarLoop]: Abstraction has 423 states and 582 transitions. [2021-10-13 00:23:03,788 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,788 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 582 transitions. [2021-10-13 00:23:03,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-13 00:23:03,789 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:03,789 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:03,789 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-13 00:23:03,789 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:03,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:03,790 INFO L82 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-13 00:23:03,790 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:03,790 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683829222] [2021-10-13 00:23:03,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:03,791 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:03,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:03,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:03,845 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:03,845 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683829222] [2021-10-13 00:23:03,845 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1683829222] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:03,845 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:03,845 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:03,845 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767641018] [2021-10-13 00:23:03,846 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:03,846 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:03,846 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:03,846 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:03,847 INFO L87 Difference]: Start difference. First operand 423 states and 582 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:03,916 INFO L93 Difference]: Finished difference Result 859 states and 1203 transitions. [2021-10-13 00:23:03,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:03,916 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-13 00:23:03,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:03,920 INFO L225 Difference]: With dead ends: 859 [2021-10-13 00:23:03,920 INFO L226 Difference]: Without dead ends: 592 [2021-10-13 00:23:03,921 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:03,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2021-10-13 00:23:03,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 407. [2021-10-13 00:23:03,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 407 states, 402 states have (on average 1.3830845771144278) internal successors, (556), 406 states have internal predecessors, (556), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 556 transitions. [2021-10-13 00:23:03,954 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 556 transitions. Word has length 73 [2021-10-13 00:23:03,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:03,954 INFO L470 AbstractCegarLoop]: Abstraction has 407 states and 556 transitions. [2021-10-13 00:23:03,954 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:03,955 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 556 transitions. [2021-10-13 00:23:03,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-13 00:23:03,955 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:03,956 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:03,956 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-13 00:23:03,956 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:03,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:03,956 INFO L82 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-13 00:23:03,957 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:03,957 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471156202] [2021-10-13 00:23:03,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:03,957 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:03,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:04,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:04,083 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:04,083 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471156202] [2021-10-13 00:23:04,083 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [471156202] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:04,083 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:04,084 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 00:23:04,084 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837952272] [2021-10-13 00:23:04,084 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 00:23:04,084 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:04,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 00:23:04,085 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-13 00:23:04,085 INFO L87 Difference]: Start difference. First operand 407 states and 556 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:04,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:04,440 INFO L93 Difference]: Finished difference Result 1397 states and 1937 transitions. [2021-10-13 00:23:04,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:23:04,440 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-13 00:23:04,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:04,447 INFO L225 Difference]: With dead ends: 1397 [2021-10-13 00:23:04,447 INFO L226 Difference]: Without dead ends: 1141 [2021-10-13 00:23:04,448 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 79.6ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 00:23:04,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states. [2021-10-13 00:23:04,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 435. [2021-10-13 00:23:04,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 430 states have (on average 1.3674418604651162) internal successors, (588), 434 states have internal predecessors, (588), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:04,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 588 transitions. [2021-10-13 00:23:04,489 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 588 transitions. Word has length 76 [2021-10-13 00:23:04,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:04,489 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 588 transitions. [2021-10-13 00:23:04,489 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:04,489 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 588 transitions. [2021-10-13 00:23:04,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-13 00:23:04,490 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:04,490 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:04,491 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-13 00:23:04,491 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:04,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:04,491 INFO L82 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-13 00:23:04,491 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:04,492 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845015299] [2021-10-13 00:23:04,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:04,492 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:04,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:04,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:04,543 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:04,543 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845015299] [2021-10-13 00:23:04,543 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [845015299] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:04,543 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:04,543 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:04,544 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [69009883] [2021-10-13 00:23:04,544 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:04,544 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:04,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:04,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:04,545 INFO L87 Difference]: Start difference. First operand 435 states and 588 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:04,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:04,692 INFO L93 Difference]: Finished difference Result 1111 states and 1515 transitions. [2021-10-13 00:23:04,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:23:04,693 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-13 00:23:04,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:04,698 INFO L225 Difference]: With dead ends: 1111 [2021-10-13 00:23:04,698 INFO L226 Difference]: Without dead ends: 849 [2021-10-13 00:23:04,699 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:04,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 849 states. [2021-10-13 00:23:04,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 849 to 656. [2021-10-13 00:23:04,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 656 states, 651 states have (on average 1.348694316436252) internal successors, (878), 655 states have internal predecessors, (878), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:04,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 656 states to 656 states and 878 transitions. [2021-10-13 00:23:04,761 INFO L78 Accepts]: Start accepts. Automaton has 656 states and 878 transitions. Word has length 76 [2021-10-13 00:23:04,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:04,761 INFO L470 AbstractCegarLoop]: Abstraction has 656 states and 878 transitions. [2021-10-13 00:23:04,761 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:04,762 INFO L276 IsEmpty]: Start isEmpty. Operand 656 states and 878 transitions. [2021-10-13 00:23:04,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-13 00:23:04,766 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:04,766 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:04,766 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-13 00:23:04,767 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:04,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:04,768 INFO L82 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-13 00:23:04,768 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:04,768 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949650323] [2021-10-13 00:23:04,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:04,768 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:04,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:04,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:04,868 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:04,868 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949650323] [2021-10-13 00:23:04,868 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [949650323] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:04,868 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:04,868 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:23:04,868 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109713359] [2021-10-13 00:23:04,869 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:04,869 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:04,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:04,869 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:23:04,870 INFO L87 Difference]: Start difference. First operand 656 states and 878 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:05,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:05,052 INFO L93 Difference]: Finished difference Result 1019 states and 1388 transitions. [2021-10-13 00:23:05,052 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-13 00:23:05,053 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-13 00:23:05,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:05,058 INFO L225 Difference]: With dead ends: 1019 [2021-10-13 00:23:05,058 INFO L226 Difference]: Without dead ends: 1017 [2021-10-13 00:23:05,059 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 37.2ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 00:23:05,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1017 states. [2021-10-13 00:23:05,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1017 to 658. [2021-10-13 00:23:05,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 658 states, 653 states have (on average 1.3476263399693722) internal successors, (880), 657 states have internal predecessors, (880), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:05,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 658 states to 658 states and 880 transitions. [2021-10-13 00:23:05,119 INFO L78 Accepts]: Start accepts. Automaton has 658 states and 880 transitions. Word has length 77 [2021-10-13 00:23:05,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:05,119 INFO L470 AbstractCegarLoop]: Abstraction has 658 states and 880 transitions. [2021-10-13 00:23:05,119 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:05,119 INFO L276 IsEmpty]: Start isEmpty. Operand 658 states and 880 transitions. [2021-10-13 00:23:05,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-13 00:23:05,121 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:05,121 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:05,121 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-13 00:23:05,121 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:05,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:05,122 INFO L82 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-13 00:23:05,122 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:05,122 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804549206] [2021-10-13 00:23:05,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:05,122 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:05,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:05,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:05,227 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:05,227 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804549206] [2021-10-13 00:23:05,227 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1804549206] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:05,227 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:05,228 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:23:05,228 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242319401] [2021-10-13 00:23:05,228 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:05,228 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:05,229 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:05,229 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:23:05,229 INFO L87 Difference]: Start difference. First operand 658 states and 880 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:05,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:05,570 INFO L93 Difference]: Finished difference Result 1981 states and 2732 transitions. [2021-10-13 00:23:05,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:23:05,570 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-13 00:23:05,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:05,579 INFO L225 Difference]: With dead ends: 1981 [2021-10-13 00:23:05,579 INFO L226 Difference]: Without dead ends: 1602 [2021-10-13 00:23:05,580 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 53.9ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 00:23:05,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1602 states. [2021-10-13 00:23:05,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1602 to 646. [2021-10-13 00:23:05,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 646 states, 641 states have (on average 1.3510140405616224) internal successors, (866), 645 states have internal predecessors, (866), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:05,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 646 states to 646 states and 866 transitions. [2021-10-13 00:23:05,649 INFO L78 Accepts]: Start accepts. Automaton has 646 states and 866 transitions. Word has length 77 [2021-10-13 00:23:05,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:05,650 INFO L470 AbstractCegarLoop]: Abstraction has 646 states and 866 transitions. [2021-10-13 00:23:05,650 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:05,650 INFO L276 IsEmpty]: Start isEmpty. Operand 646 states and 866 transitions. [2021-10-13 00:23:05,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-13 00:23:05,651 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:05,651 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:05,651 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-13 00:23:05,652 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:05,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:05,652 INFO L82 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-13 00:23:05,652 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:05,652 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919407808] [2021-10-13 00:23:05,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:05,653 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:05,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:05,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:05,719 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:05,719 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919407808] [2021-10-13 00:23:05,719 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [919407808] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:05,719 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:05,720 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:23:05,720 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494778558] [2021-10-13 00:23:05,720 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:05,720 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:05,721 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:05,721 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:23:05,721 INFO L87 Difference]: Start difference. First operand 646 states and 866 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:05,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:05,951 INFO L93 Difference]: Finished difference Result 1537 states and 2160 transitions. [2021-10-13 00:23:05,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:23:05,952 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-13 00:23:05,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:05,958 INFO L225 Difference]: With dead ends: 1537 [2021-10-13 00:23:05,959 INFO L226 Difference]: Without dead ends: 1158 [2021-10-13 00:23:05,960 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 34.3ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 00:23:05,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1158 states. [2021-10-13 00:23:06,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1158 to 652. [2021-10-13 00:23:06,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 652 states, 647 states have (on average 1.3477588871715611) internal successors, (872), 651 states have internal predecessors, (872), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:06,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 872 transitions. [2021-10-13 00:23:06,039 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 872 transitions. Word has length 78 [2021-10-13 00:23:06,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:06,040 INFO L470 AbstractCegarLoop]: Abstraction has 652 states and 872 transitions. [2021-10-13 00:23:06,040 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:06,040 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 872 transitions. [2021-10-13 00:23:06,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-13 00:23:06,041 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:06,041 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:06,041 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-13 00:23:06,042 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:06,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:06,042 INFO L82 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-13 00:23:06,042 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:06,042 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422486780] [2021-10-13 00:23:06,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:06,043 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:06,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:06,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:06,091 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:06,091 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422486780] [2021-10-13 00:23:06,091 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1422486780] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:06,091 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:06,091 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:06,092 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031193065] [2021-10-13 00:23:06,092 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:06,092 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:06,092 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:06,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:06,093 INFO L87 Difference]: Start difference. First operand 652 states and 872 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:06,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:06,296 INFO L93 Difference]: Finished difference Result 1507 states and 2024 transitions. [2021-10-13 00:23:06,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:23:06,297 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-13 00:23:06,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:06,303 INFO L225 Difference]: With dead ends: 1507 [2021-10-13 00:23:06,303 INFO L226 Difference]: Without dead ends: 1104 [2021-10-13 00:23:06,304 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:06,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1104 states. [2021-10-13 00:23:06,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1104 to 850. [2021-10-13 00:23:06,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 850 states, 845 states have (on average 1.3396449704142013) internal successors, (1132), 849 states have internal predecessors, (1132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:06,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 850 states to 850 states and 1132 transitions. [2021-10-13 00:23:06,419 INFO L78 Accepts]: Start accepts. Automaton has 850 states and 1132 transitions. Word has length 78 [2021-10-13 00:23:06,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:06,419 INFO L470 AbstractCegarLoop]: Abstraction has 850 states and 1132 transitions. [2021-10-13 00:23:06,419 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:06,419 INFO L276 IsEmpty]: Start isEmpty. Operand 850 states and 1132 transitions. [2021-10-13 00:23:06,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-13 00:23:06,421 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:06,421 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:06,421 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-13 00:23:06,421 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:06,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:06,422 INFO L82 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-13 00:23:06,422 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:06,422 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274680955] [2021-10-13 00:23:06,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:06,422 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:06,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:06,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:06,519 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:06,519 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274680955] [2021-10-13 00:23:06,520 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274680955] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:06,520 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:06,520 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:23:06,520 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1351815492] [2021-10-13 00:23:06,520 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:06,521 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:06,521 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:06,521 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:23:06,521 INFO L87 Difference]: Start difference. First operand 850 states and 1132 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:07,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:07,101 INFO L93 Difference]: Finished difference Result 3240 states and 4364 transitions. [2021-10-13 00:23:07,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:23:07,101 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-13 00:23:07,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:07,115 INFO L225 Difference]: With dead ends: 3240 [2021-10-13 00:23:07,116 INFO L226 Difference]: Without dead ends: 2706 [2021-10-13 00:23:07,118 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 76.7ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 00:23:07,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2706 states. [2021-10-13 00:23:07,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2706 to 900. [2021-10-13 00:23:07,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 900 states, 895 states have (on average 1.336312849162011) internal successors, (1196), 899 states have internal predecessors, (1196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:07,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 900 states to 900 states and 1196 transitions. [2021-10-13 00:23:07,244 INFO L78 Accepts]: Start accepts. Automaton has 900 states and 1196 transitions. Word has length 78 [2021-10-13 00:23:07,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:07,244 INFO L470 AbstractCegarLoop]: Abstraction has 900 states and 1196 transitions. [2021-10-13 00:23:07,245 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:07,245 INFO L276 IsEmpty]: Start isEmpty. Operand 900 states and 1196 transitions. [2021-10-13 00:23:07,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-13 00:23:07,246 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:07,246 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:07,246 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-13 00:23:07,247 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:07,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:07,247 INFO L82 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-13 00:23:07,247 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:07,247 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667618235] [2021-10-13 00:23:07,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:07,248 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:07,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:07,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:07,300 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:07,300 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1667618235] [2021-10-13 00:23:07,300 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1667618235] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:07,300 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:07,300 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:07,300 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128452117] [2021-10-13 00:23:07,301 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:07,301 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:07,302 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:07,302 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:07,303 INFO L87 Difference]: Start difference. First operand 900 states and 1196 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:07,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:07,579 INFO L93 Difference]: Finished difference Result 2315 states and 3085 transitions. [2021-10-13 00:23:07,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:23:07,579 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-13 00:23:07,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:07,589 INFO L225 Difference]: With dead ends: 2315 [2021-10-13 00:23:07,589 INFO L226 Difference]: Without dead ends: 1728 [2021-10-13 00:23:07,591 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:07,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1728 states. [2021-10-13 00:23:07,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1728 to 1255. [2021-10-13 00:23:07,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1255 states, 1250 states have (on average 1.3248) internal successors, (1656), 1254 states have internal predecessors, (1656), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:07,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1255 states to 1255 states and 1656 transitions. [2021-10-13 00:23:07,770 INFO L78 Accepts]: Start accepts. Automaton has 1255 states and 1656 transitions. Word has length 79 [2021-10-13 00:23:07,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:07,771 INFO L470 AbstractCegarLoop]: Abstraction has 1255 states and 1656 transitions. [2021-10-13 00:23:07,771 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:07,771 INFO L276 IsEmpty]: Start isEmpty. Operand 1255 states and 1656 transitions. [2021-10-13 00:23:07,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-13 00:23:07,773 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:07,773 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:07,773 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-13 00:23:07,774 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:07,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:07,774 INFO L82 PathProgramCache]: Analyzing trace with hash -676572605, now seen corresponding path program 1 times [2021-10-13 00:23:07,774 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:07,775 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458284205] [2021-10-13 00:23:07,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:07,775 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:07,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:07,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:07,817 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:07,818 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458284205] [2021-10-13 00:23:07,818 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1458284205] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:07,818 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:07,818 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:07,818 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1567280810] [2021-10-13 00:23:07,819 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:07,819 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:07,820 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:07,820 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:07,820 INFO L87 Difference]: Start difference. First operand 1255 states and 1656 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:08,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:08,149 INFO L93 Difference]: Finished difference Result 3061 states and 4041 transitions. [2021-10-13 00:23:08,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:08,150 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-13 00:23:08,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:08,161 INFO L225 Difference]: With dead ends: 3061 [2021-10-13 00:23:08,161 INFO L226 Difference]: Without dead ends: 2076 [2021-10-13 00:23:08,163 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:08,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2076 states. [2021-10-13 00:23:08,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2076 to 1257. [2021-10-13 00:23:08,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1257 states, 1252 states have (on average 1.3242811501597445) internal successors, (1658), 1256 states have internal predecessors, (1658), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:08,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1257 states to 1257 states and 1658 transitions. [2021-10-13 00:23:08,330 INFO L78 Accepts]: Start accepts. Automaton has 1257 states and 1658 transitions. Word has length 80 [2021-10-13 00:23:08,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:08,330 INFO L470 AbstractCegarLoop]: Abstraction has 1257 states and 1658 transitions. [2021-10-13 00:23:08,331 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:08,331 INFO L276 IsEmpty]: Start isEmpty. Operand 1257 states and 1658 transitions. [2021-10-13 00:23:08,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-13 00:23:08,332 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:08,333 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:08,333 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-13 00:23:08,333 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:08,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:08,333 INFO L82 PathProgramCache]: Analyzing trace with hash -659983772, now seen corresponding path program 1 times [2021-10-13 00:23:08,334 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:08,334 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617107559] [2021-10-13 00:23:08,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:08,334 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:08,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:08,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:08,420 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:08,420 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617107559] [2021-10-13 00:23:08,421 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1617107559] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:08,421 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:08,421 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:08,421 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1325273321] [2021-10-13 00:23:08,422 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:08,422 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:08,422 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:08,422 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:08,423 INFO L87 Difference]: Start difference. First operand 1257 states and 1658 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:08,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:08,631 INFO L93 Difference]: Finished difference Result 2597 states and 3427 transitions. [2021-10-13 00:23:08,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:23:08,631 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2021-10-13 00:23:08,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:08,639 INFO L225 Difference]: With dead ends: 2597 [2021-10-13 00:23:08,639 INFO L226 Difference]: Without dead ends: 1416 [2021-10-13 00:23:08,641 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 15.2ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:08,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1416 states. [2021-10-13 00:23:08,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1416 to 1054. [2021-10-13 00:23:08,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1054 states, 1049 states have (on average 1.321258341277407) internal successors, (1386), 1053 states have internal predecessors, (1386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:08,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1054 states to 1054 states and 1386 transitions. [2021-10-13 00:23:08,777 INFO L78 Accepts]: Start accepts. Automaton has 1054 states and 1386 transitions. Word has length 81 [2021-10-13 00:23:08,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:08,777 INFO L470 AbstractCegarLoop]: Abstraction has 1054 states and 1386 transitions. [2021-10-13 00:23:08,778 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:08,778 INFO L276 IsEmpty]: Start isEmpty. Operand 1054 states and 1386 transitions. [2021-10-13 00:23:08,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-13 00:23:08,779 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:08,779 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:08,780 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-13 00:23:08,780 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:08,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:08,780 INFO L82 PathProgramCache]: Analyzing trace with hash -63459148, now seen corresponding path program 1 times [2021-10-13 00:23:08,781 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:08,781 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2044040051] [2021-10-13 00:23:08,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:08,781 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:08,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:08,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:08,820 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:08,820 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2044040051] [2021-10-13 00:23:08,820 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2044040051] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:08,821 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:08,821 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:23:08,821 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [658794508] [2021-10-13 00:23:08,822 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:23:08,822 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:08,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:23:08,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:08,823 INFO L87 Difference]: Start difference. First operand 1054 states and 1386 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:09,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:09,082 INFO L93 Difference]: Finished difference Result 2488 states and 3290 transitions. [2021-10-13 00:23:09,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:23:09,082 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-13 00:23:09,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:09,091 INFO L225 Difference]: With dead ends: 2488 [2021-10-13 00:23:09,091 INFO L226 Difference]: Without dead ends: 1583 [2021-10-13 00:23:09,093 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:23:09,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2021-10-13 00:23:09,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1060. [2021-10-13 00:23:09,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1060 states, 1055 states have (on average 1.3194312796208532) internal successors, (1392), 1059 states have internal predecessors, (1392), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:09,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1060 states to 1060 states and 1392 transitions. [2021-10-13 00:23:09,220 INFO L78 Accepts]: Start accepts. Automaton has 1060 states and 1392 transitions. Word has length 82 [2021-10-13 00:23:09,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:09,221 INFO L470 AbstractCegarLoop]: Abstraction has 1060 states and 1392 transitions. [2021-10-13 00:23:09,221 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:09,221 INFO L276 IsEmpty]: Start isEmpty. Operand 1060 states and 1392 transitions. [2021-10-13 00:23:09,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-13 00:23:09,222 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:09,223 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:09,223 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-13 00:23:09,223 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:09,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:09,223 INFO L82 PathProgramCache]: Analyzing trace with hash -753963456, now seen corresponding path program 1 times [2021-10-13 00:23:09,224 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:09,224 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142456417] [2021-10-13 00:23:09,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:09,224 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:09,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:09,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:09,286 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:09,286 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142456417] [2021-10-13 00:23:09,288 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [142456417] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:09,288 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:09,289 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:09,289 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1590523783] [2021-10-13 00:23:09,289 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:09,289 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:09,290 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:09,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:09,290 INFO L87 Difference]: Start difference. First operand 1060 states and 1392 transitions. Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:09,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:09,515 INFO L93 Difference]: Finished difference Result 2437 states and 3211 transitions. [2021-10-13 00:23:09,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:23:09,515 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-13 00:23:09,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:09,523 INFO L225 Difference]: With dead ends: 2437 [2021-10-13 00:23:09,524 INFO L226 Difference]: Without dead ends: 1476 [2021-10-13 00:23:09,525 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 14.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:09,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1476 states. [2021-10-13 00:23:09,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1476 to 1000. [2021-10-13 00:23:09,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 995 states have (on average 1.3145728643216081) internal successors, (1308), 999 states have internal predecessors, (1308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:09,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1308 transitions. [2021-10-13 00:23:09,654 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1308 transitions. Word has length 82 [2021-10-13 00:23:09,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:09,654 INFO L470 AbstractCegarLoop]: Abstraction has 1000 states and 1308 transitions. [2021-10-13 00:23:09,654 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:09,655 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1308 transitions. [2021-10-13 00:23:09,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2021-10-13 00:23:09,657 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:09,657 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:09,658 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-13 00:23:09,658 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:09,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:09,659 INFO L82 PathProgramCache]: Analyzing trace with hash 196290815, now seen corresponding path program 1 times [2021-10-13 00:23:09,659 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:09,659 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221095866] [2021-10-13 00:23:09,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:09,659 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:09,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:09,796 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:09,796 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:09,797 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1221095866] [2021-10-13 00:23:09,797 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1221095866] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:09,797 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [121950853] [2021-10-13 00:23:09,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:09,797 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:09,798 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:09,799 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:09,828 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-13 00:23:10,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:10,030 INFO L263 TraceCheckSpWp]: Trace formula consists of 712 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-13 00:23:10,040 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:10,466 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 00:23:10,466 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [121950853] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:10,467 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 00:23:10,467 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-13 00:23:10,467 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346020288] [2021-10-13 00:23:10,468 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:10,468 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:10,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:10,469 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-13 00:23:10,469 INFO L87 Difference]: Start difference. First operand 1000 states and 1308 transitions. Second operand has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:10,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:10,931 INFO L93 Difference]: Finished difference Result 2594 states and 3522 transitions. [2021-10-13 00:23:10,931 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:23:10,931 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 127 [2021-10-13 00:23:10,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:10,952 INFO L225 Difference]: With dead ends: 2594 [2021-10-13 00:23:10,959 INFO L226 Difference]: Without dead ends: 1781 [2021-10-13 00:23:10,961 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 111.6ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-13 00:23:10,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2021-10-13 00:23:11,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1000. [2021-10-13 00:23:11,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 995 states have (on average 1.31356783919598) internal successors, (1307), 999 states have internal predecessors, (1307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:11,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1307 transitions. [2021-10-13 00:23:11,118 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1307 transitions. Word has length 127 [2021-10-13 00:23:11,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:11,120 INFO L470 AbstractCegarLoop]: Abstraction has 1000 states and 1307 transitions. [2021-10-13 00:23:11,120 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:11,121 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1307 transitions. [2021-10-13 00:23:11,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-13 00:23:11,124 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:11,124 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:11,164 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-13 00:23:11,339 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-13 00:23:11,340 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:11,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:11,340 INFO L82 PathProgramCache]: Analyzing trace with hash 537443172, now seen corresponding path program 1 times [2021-10-13 00:23:11,340 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:11,341 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577412998] [2021-10-13 00:23:11,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:11,341 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:11,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:11,532 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:11,532 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:11,532 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577412998] [2021-10-13 00:23:11,533 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1577412998] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:11,533 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1595562750] [2021-10-13 00:23:11,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:11,533 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:11,534 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:11,534 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:11,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-13 00:23:11,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:11,787 INFO L263 TraceCheckSpWp]: Trace formula consists of 726 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-13 00:23:11,793 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:12,192 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:12,193 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1595562750] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:12,193 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:23:12,193 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-13 00:23:12,193 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2003644474] [2021-10-13 00:23:12,194 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-13 00:23:12,194 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:12,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-13 00:23:12,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-13 00:23:12,195 INFO L87 Difference]: Start difference. First operand 1000 states and 1307 transitions. Second operand has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:22,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:22,394 INFO L93 Difference]: Finished difference Result 16786 states and 22448 transitions. [2021-10-13 00:23:22,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-13 00:23:22,395 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-13 00:23:22,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:22,432 INFO L225 Difference]: With dead ends: 16786 [2021-10-13 00:23:22,432 INFO L226 Difference]: Without dead ends: 15979 [2021-10-13 00:23:22,463 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 474 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28995 ImplicationChecksByTransitivity, 5140.6ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-13 00:23:22,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15979 states. [2021-10-13 00:23:23,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15979 to 2718. [2021-10-13 00:23:23,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2718 states, 2713 states have (on average 1.3110947290821968) internal successors, (3557), 2717 states have internal predecessors, (3557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:23,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2718 states to 2718 states and 3557 transitions. [2021-10-13 00:23:23,017 INFO L78 Accepts]: Start accepts. Automaton has 2718 states and 3557 transitions. Word has length 131 [2021-10-13 00:23:23,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:23,018 INFO L470 AbstractCegarLoop]: Abstraction has 2718 states and 3557 transitions. [2021-10-13 00:23:23,018 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:23,018 INFO L276 IsEmpty]: Start isEmpty. Operand 2718 states and 3557 transitions. [2021-10-13 00:23:23,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-13 00:23:23,024 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:23,025 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:23,063 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-13 00:23:23,251 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-13 00:23:23,252 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:23,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:23,252 INFO L82 PathProgramCache]: Analyzing trace with hash -57966914, now seen corresponding path program 1 times [2021-10-13 00:23:23,252 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:23,252 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094649082] [2021-10-13 00:23:23,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:23,253 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:23,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:23,432 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:23,432 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:23,432 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094649082] [2021-10-13 00:23:23,433 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2094649082] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:23,433 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1213529940] [2021-10-13 00:23:23,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:23,433 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:23,433 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:23,434 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:23,459 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-13 00:23:23,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:23,712 INFO L263 TraceCheckSpWp]: Trace formula consists of 778 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-13 00:23:23,718 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:24,176 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:24,177 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1213529940] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:24,177 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:23:24,177 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-13 00:23:24,177 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [920337205] [2021-10-13 00:23:24,179 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-13 00:23:24,179 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:24,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-13 00:23:24,180 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-13 00:23:24,181 INFO L87 Difference]: Start difference. First operand 2718 states and 3557 transitions. Second operand has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:25,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:25,869 INFO L93 Difference]: Finished difference Result 9790 states and 13378 transitions. [2021-10-13 00:23:25,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-13 00:23:25,869 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-13 00:23:25,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:25,887 INFO L225 Difference]: With dead ends: 9790 [2021-10-13 00:23:25,888 INFO L226 Difference]: Without dead ends: 7299 [2021-10-13 00:23:25,893 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 142 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 168.2ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-13 00:23:25,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7299 states. [2021-10-13 00:23:26,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7299 to 2324. [2021-10-13 00:23:26,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2324 states, 2319 states have (on average 1.314359637774903) internal successors, (3048), 2323 states have internal predecessors, (3048), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:26,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 3048 transitions. [2021-10-13 00:23:26,320 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 3048 transitions. Word has length 132 [2021-10-13 00:23:26,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:26,321 INFO L470 AbstractCegarLoop]: Abstraction has 2324 states and 3048 transitions. [2021-10-13 00:23:26,321 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:26,321 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 3048 transitions. [2021-10-13 00:23:26,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-13 00:23:26,327 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:26,328 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:26,357 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-13 00:23:26,543 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:26,544 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:26,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:26,544 INFO L82 PathProgramCache]: Analyzing trace with hash -812401068, now seen corresponding path program 1 times [2021-10-13 00:23:26,545 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:26,545 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113910760] [2021-10-13 00:23:26,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:26,545 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:26,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:26,694 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-13 00:23:26,694 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:26,695 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113910760] [2021-10-13 00:23:26,695 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [113910760] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:26,695 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:26,695 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 00:23:26,695 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279970127] [2021-10-13 00:23:26,696 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 00:23:26,696 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:26,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 00:23:26,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-13 00:23:26,697 INFO L87 Difference]: Start difference. First operand 2324 states and 3048 transitions. Second operand has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:28,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:28,531 INFO L93 Difference]: Finished difference Result 13266 states and 17764 transitions. [2021-10-13 00:23:28,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-13 00:23:28,531 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-13 00:23:28,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:28,555 INFO L225 Difference]: With dead ends: 13266 [2021-10-13 00:23:28,555 INFO L226 Difference]: Without dead ends: 11189 [2021-10-13 00:23:28,560 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 120.1ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-13 00:23:28,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11189 states. [2021-10-13 00:23:29,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11189 to 2744. [2021-10-13 00:23:29,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2744 states, 2739 states have (on average 1.2942679810149689) internal successors, (3545), 2743 states have internal predecessors, (3545), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:29,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2744 states to 2744 states and 3545 transitions. [2021-10-13 00:23:29,040 INFO L78 Accepts]: Start accepts. Automaton has 2744 states and 3545 transitions. Word has length 133 [2021-10-13 00:23:29,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:29,041 INFO L470 AbstractCegarLoop]: Abstraction has 2744 states and 3545 transitions. [2021-10-13 00:23:29,041 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:29,041 INFO L276 IsEmpty]: Start isEmpty. Operand 2744 states and 3545 transitions. [2021-10-13 00:23:29,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2021-10-13 00:23:29,048 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:29,048 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:29,048 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-13 00:23:29,049 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:29,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:29,049 INFO L82 PathProgramCache]: Analyzing trace with hash -1166749575, now seen corresponding path program 1 times [2021-10-13 00:23:29,049 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:29,049 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845288769] [2021-10-13 00:23:29,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:29,050 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:29,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:29,209 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:29,209 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:29,209 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845288769] [2021-10-13 00:23:29,209 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [845288769] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:29,210 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1512957677] [2021-10-13 00:23:29,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:29,210 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:29,210 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:29,215 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:29,231 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-13 00:23:29,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:29,556 INFO L263 TraceCheckSpWp]: Trace formula consists of 757 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-13 00:23:29,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:29,936 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-13 00:23:29,937 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1512957677] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:29,937 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:23:29,937 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5] total 11 [2021-10-13 00:23:29,938 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902071873] [2021-10-13 00:23:29,939 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-10-13 00:23:29,939 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:29,939 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-13 00:23:29,940 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2021-10-13 00:23:29,941 INFO L87 Difference]: Start difference. First operand 2744 states and 3545 transitions. Second operand has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:31,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:31,845 INFO L93 Difference]: Finished difference Result 5987 states and 7865 transitions. [2021-10-13 00:23:31,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-13 00:23:31,847 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 135 [2021-10-13 00:23:31,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:31,855 INFO L225 Difference]: With dead ends: 5987 [2021-10-13 00:23:31,855 INFO L226 Difference]: Without dead ends: 3338 [2021-10-13 00:23:31,859 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 471.7ms TimeCoverageRelationStatistics Valid=525, Invalid=1545, Unknown=0, NotChecked=0, Total=2070 [2021-10-13 00:23:31,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3338 states. [2021-10-13 00:23:32,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3338 to 1878. [2021-10-13 00:23:32,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2819006940736786) internal successors, (2401), 1877 states have internal predecessors, (2401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:32,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2401 transitions. [2021-10-13 00:23:32,327 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2401 transitions. Word has length 135 [2021-10-13 00:23:32,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:32,328 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2401 transitions. [2021-10-13 00:23:32,328 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:32,328 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2401 transitions. [2021-10-13 00:23:32,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2021-10-13 00:23:32,333 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:32,333 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:32,371 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-13 00:23:32,555 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:32,555 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:32,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:32,556 INFO L82 PathProgramCache]: Analyzing trace with hash -2040989094, now seen corresponding path program 1 times [2021-10-13 00:23:32,556 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:32,556 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411299790] [2021-10-13 00:23:32,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:32,556 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:32,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:32,804 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:32,804 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:32,804 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411299790] [2021-10-13 00:23:32,804 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1411299790] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:32,805 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2003902967] [2021-10-13 00:23:32,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:32,805 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:32,805 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:32,808 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:32,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-13 00:23:33,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:33,259 INFO L263 TraceCheckSpWp]: Trace formula consists of 781 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-13 00:23:33,262 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:33,578 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 00:23:33,578 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2003902967] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:33,579 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 00:23:33,579 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-13 00:23:33,579 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104595918] [2021-10-13 00:23:33,580 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:33,580 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:33,580 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:33,581 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-13 00:23:33,581 INFO L87 Difference]: Start difference. First operand 1878 states and 2401 transitions. Second operand has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:34,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:34,319 INFO L93 Difference]: Finished difference Result 5950 states and 7855 transitions. [2021-10-13 00:23:34,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:23:34,319 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 135 [2021-10-13 00:23:34,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:34,325 INFO L225 Difference]: With dead ends: 5950 [2021-10-13 00:23:34,325 INFO L226 Difference]: Without dead ends: 4227 [2021-10-13 00:23:34,328 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 124.1ms TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2021-10-13 00:23:34,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4227 states. [2021-10-13 00:23:34,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4227 to 1878. [2021-10-13 00:23:34,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2802989855846236) internal successors, (2398), 1877 states have internal predecessors, (2398), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:34,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2398 transitions. [2021-10-13 00:23:34,731 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2398 transitions. Word has length 135 [2021-10-13 00:23:34,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:34,731 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2398 transitions. [2021-10-13 00:23:34,732 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:34,732 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2398 transitions. [2021-10-13 00:23:34,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-13 00:23:34,738 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:34,738 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:34,785 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-13 00:23:34,951 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:34,951 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:34,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:34,952 INFO L82 PathProgramCache]: Analyzing trace with hash 722347797, now seen corresponding path program 1 times [2021-10-13 00:23:34,952 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:34,952 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792465544] [2021-10-13 00:23:34,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:34,952 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:34,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:35,142 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:35,142 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:35,143 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792465544] [2021-10-13 00:23:35,143 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [792465544] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:35,143 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [113364572] [2021-10-13 00:23:35,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:35,143 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:35,144 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:35,145 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:35,167 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-13 00:23:35,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:35,635 INFO L263 TraceCheckSpWp]: Trace formula consists of 794 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-13 00:23:35,639 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:36,053 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 00:23:36,053 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [113364572] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:36,054 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 00:23:36,054 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-13 00:23:36,055 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104392789] [2021-10-13 00:23:36,056 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:36,056 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:36,059 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:36,059 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-13 00:23:36,060 INFO L87 Difference]: Start difference. First operand 1878 states and 2398 transitions. Second operand has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:36,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:36,884 INFO L93 Difference]: Finished difference Result 5394 states and 7030 transitions. [2021-10-13 00:23:36,884 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:23:36,885 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-13 00:23:36,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:36,891 INFO L225 Difference]: With dead ends: 5394 [2021-10-13 00:23:36,892 INFO L226 Difference]: Without dead ends: 3671 [2021-10-13 00:23:36,895 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 169.7ms TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2021-10-13 00:23:36,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3671 states. [2021-10-13 00:23:37,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3671 to 1878. [2021-10-13 00:23:37,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2786972770955687) internal successors, (2395), 1877 states have internal predecessors, (2395), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:37,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2395 transitions. [2021-10-13 00:23:37,212 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2395 transitions. Word has length 139 [2021-10-13 00:23:37,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:37,212 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2395 transitions. [2021-10-13 00:23:37,213 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:37,213 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2395 transitions. [2021-10-13 00:23:37,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-10-13 00:23:37,217 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:37,218 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:37,260 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-13 00:23:37,431 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-10-13 00:23:37,432 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:37,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:37,432 INFO L82 PathProgramCache]: Analyzing trace with hash -1061111299, now seen corresponding path program 1 times [2021-10-13 00:23:37,432 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:37,432 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1483316016] [2021-10-13 00:23:37,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:37,432 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:37,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:37,710 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:37,710 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:37,710 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1483316016] [2021-10-13 00:23:37,710 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1483316016] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:37,711 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1059835154] [2021-10-13 00:23:37,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:37,711 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:37,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:37,712 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:37,715 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-13 00:23:38,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:38,145 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-13 00:23:38,148 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:39,570 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:39,570 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1059835154] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:39,570 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:23:39,570 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6] total 14 [2021-10-13 00:23:39,571 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2147146577] [2021-10-13 00:23:39,571 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2021-10-13 00:23:39,571 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:39,572 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-10-13 00:23:39,572 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2021-10-13 00:23:39,572 INFO L87 Difference]: Start difference. First operand 1878 states and 2395 transitions. Second operand has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:42,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:42,697 INFO L93 Difference]: Finished difference Result 5843 states and 7527 transitions. [2021-10-13 00:23:42,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2021-10-13 00:23:42,698 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 142 [2021-10-13 00:23:42,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:42,704 INFO L225 Difference]: With dead ends: 5843 [2021-10-13 00:23:42,704 INFO L226 Difference]: Without dead ends: 4160 [2021-10-13 00:23:42,709 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1627 ImplicationChecksByTransitivity, 1474.8ms TimeCoverageRelationStatistics Valid=942, Invalid=4314, Unknown=0, NotChecked=0, Total=5256 [2021-10-13 00:23:42,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4160 states. [2021-10-13 00:23:43,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4160 to 2115. [2021-10-13 00:23:43,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2115 states, 2110 states have (on average 1.2691943127962084) internal successors, (2678), 2114 states have internal predecessors, (2678), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:43,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2115 states to 2115 states and 2678 transitions. [2021-10-13 00:23:43,229 INFO L78 Accepts]: Start accepts. Automaton has 2115 states and 2678 transitions. Word has length 142 [2021-10-13 00:23:43,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:43,229 INFO L470 AbstractCegarLoop]: Abstraction has 2115 states and 2678 transitions. [2021-10-13 00:23:43,230 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:43,230 INFO L276 IsEmpty]: Start isEmpty. Operand 2115 states and 2678 transitions. [2021-10-13 00:23:43,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-13 00:23:43,236 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:43,236 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:43,277 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2021-10-13 00:23:43,451 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2021-10-13 00:23:43,452 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:43,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:43,452 INFO L82 PathProgramCache]: Analyzing trace with hash 1545838345, now seen corresponding path program 1 times [2021-10-13 00:23:43,452 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:43,453 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760726140] [2021-10-13 00:23:43,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:43,453 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:43,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:43,579 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-13 00:23:43,580 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:43,580 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760726140] [2021-10-13 00:23:43,580 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1760726140] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:43,580 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:43,581 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:43,581 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593836996] [2021-10-13 00:23:43,582 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:23:43,582 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:43,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:23:43,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:43,584 INFO L87 Difference]: Start difference. First operand 2115 states and 2678 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:44,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:44,017 INFO L93 Difference]: Finished difference Result 3968 states and 5065 transitions. [2021-10-13 00:23:44,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:23:44,020 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-13 00:23:44,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:44,023 INFO L225 Difference]: With dead ends: 3968 [2021-10-13 00:23:44,024 INFO L226 Difference]: Without dead ends: 1987 [2021-10-13 00:23:44,027 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 13.3ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:23:44,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1987 states. [2021-10-13 00:23:44,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1987 to 1987. [2021-10-13 00:23:44,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1987 states, 1982 states have (on average 1.2734611503531785) internal successors, (2524), 1986 states have internal predecessors, (2524), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:44,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 1987 states and 2524 transitions. [2021-10-13 00:23:44,351 INFO L78 Accepts]: Start accepts. Automaton has 1987 states and 2524 transitions. Word has length 143 [2021-10-13 00:23:44,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:44,352 INFO L470 AbstractCegarLoop]: Abstraction has 1987 states and 2524 transitions. [2021-10-13 00:23:44,352 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:44,352 INFO L276 IsEmpty]: Start isEmpty. Operand 1987 states and 2524 transitions. [2021-10-13 00:23:44,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-13 00:23:44,355 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:44,356 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:44,356 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-10-13 00:23:44,356 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:44,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:44,357 INFO L82 PathProgramCache]: Analyzing trace with hash 956328512, now seen corresponding path program 1 times [2021-10-13 00:23:44,357 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:44,357 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017685646] [2021-10-13 00:23:44,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:44,357 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:44,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:44,440 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-13 00:23:44,440 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:44,440 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017685646] [2021-10-13 00:23:44,441 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2017685646] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:44,441 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:44,441 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:23:44,441 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812762640] [2021-10-13 00:23:44,442 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:23:44,443 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:44,443 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:23:44,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:23:44,444 INFO L87 Difference]: Start difference. First operand 1987 states and 2524 transitions. Second operand has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:45,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:45,874 INFO L93 Difference]: Finished difference Result 8551 states and 11174 transitions. [2021-10-13 00:23:45,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-13 00:23:45,874 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-13 00:23:45,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:45,881 INFO L225 Difference]: With dead ends: 8551 [2021-10-13 00:23:45,881 INFO L226 Difference]: Without dead ends: 6759 [2021-10-13 00:23:45,886 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 61.7ms TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2021-10-13 00:23:45,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6759 states. [2021-10-13 00:23:46,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6759 to 2340. [2021-10-13 00:23:46,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2340 states, 2335 states have (on average 1.2582441113490364) internal successors, (2938), 2339 states have internal predecessors, (2938), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:46,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2340 states to 2340 states and 2938 transitions. [2021-10-13 00:23:46,339 INFO L78 Accepts]: Start accepts. Automaton has 2340 states and 2938 transitions. Word has length 143 [2021-10-13 00:23:46,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:46,339 INFO L470 AbstractCegarLoop]: Abstraction has 2340 states and 2938 transitions. [2021-10-13 00:23:46,339 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:46,339 INFO L276 IsEmpty]: Start isEmpty. Operand 2340 states and 2938 transitions. [2021-10-13 00:23:46,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-13 00:23:46,344 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:46,344 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:46,344 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-13 00:23:46,345 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:46,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:46,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1126731789, now seen corresponding path program 1 times [2021-10-13 00:23:46,345 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:46,345 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900817428] [2021-10-13 00:23:46,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:46,346 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:46,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:46,551 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 32 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:46,551 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:46,551 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900817428] [2021-10-13 00:23:46,552 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1900817428] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:46,552 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1166420204] [2021-10-13 00:23:46,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:46,552 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:46,553 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:46,553 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:46,575 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-10-13 00:23:47,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:47,063 INFO L263 TraceCheckSpWp]: Trace formula consists of 809 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-13 00:23:47,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:23:47,487 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 34 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:47,487 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1166420204] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:47,488 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:23:47,488 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2021-10-13 00:23:47,488 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [976719409] [2021-10-13 00:23:47,489 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2021-10-13 00:23:47,489 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:47,489 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-10-13 00:23:47,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2021-10-13 00:23:47,490 INFO L87 Difference]: Start difference. First operand 2340 states and 2938 transitions. Second operand has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:55,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:55,633 INFO L93 Difference]: Finished difference Result 15605 states and 19700 transitions. [2021-10-13 00:23:55,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 161 states. [2021-10-13 00:23:55,633 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-13 00:23:55,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:55,648 INFO L225 Difference]: With dead ends: 15605 [2021-10-13 00:23:55,649 INFO L226 Difference]: Without dead ends: 13460 [2021-10-13 00:23:55,657 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 173 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11702 ImplicationChecksByTransitivity, 3108.0ms TimeCoverageRelationStatistics Valid=3629, Invalid=26821, Unknown=0, NotChecked=0, Total=30450 [2021-10-13 00:23:55,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13460 states. [2021-10-13 00:23:56,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13460 to 4490. [2021-10-13 00:23:56,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4490 states, 4485 states have (on average 1.2550724637681159) internal successors, (5629), 4489 states have internal predecessors, (5629), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:56,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4490 states to 4490 states and 5629 transitions. [2021-10-13 00:23:56,663 INFO L78 Accepts]: Start accepts. Automaton has 4490 states and 5629 transitions. Word has length 144 [2021-10-13 00:23:56,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:56,664 INFO L470 AbstractCegarLoop]: Abstraction has 4490 states and 5629 transitions. [2021-10-13 00:23:56,664 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:56,665 INFO L276 IsEmpty]: Start isEmpty. Operand 4490 states and 5629 transitions. [2021-10-13 00:23:56,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-13 00:23:56,674 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:56,675 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:56,715 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2021-10-13 00:23:56,898 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2021-10-13 00:23:56,899 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:56,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:56,899 INFO L82 PathProgramCache]: Analyzing trace with hash -2053713263, now seen corresponding path program 1 times [2021-10-13 00:23:56,900 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:56,900 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1038930685] [2021-10-13 00:23:56,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:56,900 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:56,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:56,966 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2021-10-13 00:23:56,966 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:56,967 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1038930685] [2021-10-13 00:23:56,968 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1038930685] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:23:56,968 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:23:56,968 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:23:56,968 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011329869] [2021-10-13 00:23:56,969 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:23:56,969 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:23:56,970 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:23:56,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:56,970 INFO L87 Difference]: Start difference. First operand 4490 states and 5629 transitions. Second operand has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:57,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:23:57,965 INFO L93 Difference]: Finished difference Result 8234 states and 10375 transitions. [2021-10-13 00:23:57,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:23:57,966 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-13 00:23:57,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:23:57,970 INFO L225 Difference]: With dead ends: 8234 [2021-10-13 00:23:57,970 INFO L226 Difference]: Without dead ends: 3927 [2021-10-13 00:23:57,975 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.8ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:23:57,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3927 states. [2021-10-13 00:23:58,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3927 to 3911. [2021-10-13 00:23:58,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3911 states, 3906 states have (on average 1.2521761392729134) internal successors, (4891), 3910 states have internal predecessors, (4891), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:58,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3911 states to 3911 states and 4891 transitions. [2021-10-13 00:23:58,775 INFO L78 Accepts]: Start accepts. Automaton has 3911 states and 4891 transitions. Word has length 144 [2021-10-13 00:23:58,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:23:58,776 INFO L470 AbstractCegarLoop]: Abstraction has 3911 states and 4891 transitions. [2021-10-13 00:23:58,776 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:23:58,776 INFO L276 IsEmpty]: Start isEmpty. Operand 3911 states and 4891 transitions. [2021-10-13 00:23:58,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-13 00:23:58,782 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:23:58,782 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:23:58,782 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-10-13 00:23:58,782 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:23:58,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:23:58,783 INFO L82 PathProgramCache]: Analyzing trace with hash -1332568633, now seen corresponding path program 1 times [2021-10-13 00:23:58,783 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:23:58,783 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948472001] [2021-10-13 00:23:58,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:58,783 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:23:58,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:58,905 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:23:58,906 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:23:58,906 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948472001] [2021-10-13 00:23:58,906 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1948472001] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:23:58,906 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1036712515] [2021-10-13 00:23:58,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:23:58,907 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:23:58,907 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:23:58,911 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:23:58,931 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-10-13 00:23:59,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:23:59,568 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-13 00:23:59,573 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:24:00,063 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:24:00,063 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1036712515] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:24:00,063 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:24:00,063 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-13 00:24:00,064 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111384365] [2021-10-13 00:24:00,064 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 00:24:00,064 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:24:00,064 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 00:24:00,065 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-13 00:24:00,065 INFO L87 Difference]: Start difference. First operand 3911 states and 4891 transitions. Second operand has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:02,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:24:02,319 INFO L93 Difference]: Finished difference Result 14859 states and 18978 transitions. [2021-10-13 00:24:02,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-13 00:24:02,319 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-13 00:24:02,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:24:02,331 INFO L225 Difference]: With dead ends: 14859 [2021-10-13 00:24:02,331 INFO L226 Difference]: Without dead ends: 11247 [2021-10-13 00:24:02,337 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 79.0ms TimeCoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2021-10-13 00:24:02,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11247 states. [2021-10-13 00:24:03,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11247 to 7251. [2021-10-13 00:24:03,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7251 states, 7246 states have (on average 1.250483025117306) internal successors, (9061), 7250 states have internal predecessors, (9061), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:03,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7251 states to 7251 states and 9061 transitions. [2021-10-13 00:24:03,831 INFO L78 Accepts]: Start accepts. Automaton has 7251 states and 9061 transitions. Word has length 144 [2021-10-13 00:24:03,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:24:03,832 INFO L470 AbstractCegarLoop]: Abstraction has 7251 states and 9061 transitions. [2021-10-13 00:24:03,832 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:03,832 INFO L276 IsEmpty]: Start isEmpty. Operand 7251 states and 9061 transitions. [2021-10-13 00:24:03,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-13 00:24:03,841 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:24:03,841 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:24:03,887 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2021-10-13 00:24:04,067 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2021-10-13 00:24:04,068 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:24:04,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:24:04,068 INFO L82 PathProgramCache]: Analyzing trace with hash -372796990, now seen corresponding path program 1 times [2021-10-13 00:24:04,068 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:24:04,068 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [756752] [2021-10-13 00:24:04,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:24:04,068 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:24:04,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:24:04,258 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 26 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:24:04,258 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:24:04,258 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [756752] [2021-10-13 00:24:04,258 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [756752] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:24:04,259 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1150189446] [2021-10-13 00:24:04,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:24:04,259 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:24:04,259 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:24:04,260 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:24:04,272 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-13 00:24:05,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:24:05,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 817 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-13 00:24:05,114 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:24:05,473 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-13 00:24:05,474 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1150189446] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:24:05,474 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 00:24:05,474 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-13 00:24:05,474 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446910990] [2021-10-13 00:24:05,475 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:24:05,475 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:24:05,475 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:24:05,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-13 00:24:05,476 INFO L87 Difference]: Start difference. First operand 7251 states and 9061 transitions. Second operand has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:07,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:24:07,624 INFO L93 Difference]: Finished difference Result 16296 states and 20669 transitions. [2021-10-13 00:24:07,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:24:07,625 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-13 00:24:07,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:24:07,633 INFO L225 Difference]: With dead ends: 16296 [2021-10-13 00:24:07,633 INFO L226 Difference]: Without dead ends: 10692 [2021-10-13 00:24:07,637 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 126.8ms TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2021-10-13 00:24:07,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10692 states. [2021-10-13 00:24:08,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10692 to 7251. [2021-10-13 00:24:08,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7251 states, 7246 states have (on average 1.236820314656362) internal successors, (8962), 7250 states have internal predecessors, (8962), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:08,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7251 states to 7251 states and 8962 transitions. [2021-10-13 00:24:08,882 INFO L78 Accepts]: Start accepts. Automaton has 7251 states and 8962 transitions. Word has length 144 [2021-10-13 00:24:08,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:24:08,883 INFO L470 AbstractCegarLoop]: Abstraction has 7251 states and 8962 transitions. [2021-10-13 00:24:08,883 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:08,883 INFO L276 IsEmpty]: Start isEmpty. Operand 7251 states and 8962 transitions. [2021-10-13 00:24:08,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-13 00:24:08,892 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:24:08,892 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:24:08,941 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-10-13 00:24:09,107 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:24:09,108 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:24:09,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:24:09,108 INFO L82 PathProgramCache]: Analyzing trace with hash 729040484, now seen corresponding path program 1 times [2021-10-13 00:24:09,108 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:24:09,108 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066128806] [2021-10-13 00:24:09,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:24:09,109 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:24:09,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:24:09,169 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-13 00:24:09,170 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:24:09,170 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066128806] [2021-10-13 00:24:09,170 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2066128806] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:24:09,170 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:24:09,170 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:24:09,171 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000633587] [2021-10-13 00:24:09,171 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:24:09,171 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:24:09,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:24:09,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:24:09,172 INFO L87 Difference]: Start difference. First operand 7251 states and 8962 transitions. Second operand has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:10,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:24:10,551 INFO L93 Difference]: Finished difference Result 11820 states and 14654 transitions. [2021-10-13 00:24:10,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:24:10,552 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-13 00:24:10,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:24:10,556 INFO L225 Difference]: With dead ends: 11820 [2021-10-13 00:24:10,557 INFO L226 Difference]: Without dead ends: 5207 [2021-10-13 00:24:10,562 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.5ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:24:10,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5207 states. [2021-10-13 00:24:11,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5207 to 5179. [2021-10-13 00:24:11,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5179 states, 5174 states have (on average 1.2377270970235794) internal successors, (6404), 5178 states have internal predecessors, (6404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:11,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5179 states to 5179 states and 6404 transitions. [2021-10-13 00:24:11,605 INFO L78 Accepts]: Start accepts. Automaton has 5179 states and 6404 transitions. Word has length 145 [2021-10-13 00:24:11,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:24:11,605 INFO L470 AbstractCegarLoop]: Abstraction has 5179 states and 6404 transitions. [2021-10-13 00:24:11,605 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:11,606 INFO L276 IsEmpty]: Start isEmpty. Operand 5179 states and 6404 transitions. [2021-10-13 00:24:11,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2021-10-13 00:24:11,611 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:24:11,611 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:24:11,645 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2021-10-13 00:24:11,646 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:24:11,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:24:11,646 INFO L82 PathProgramCache]: Analyzing trace with hash -828579161, now seen corresponding path program 1 times [2021-10-13 00:24:11,646 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:24:11,646 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870568188] [2021-10-13 00:24:11,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:24:11,646 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:24:11,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:24:11,796 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 26 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:24:11,796 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:24:11,796 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870568188] [2021-10-13 00:24:11,796 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [870568188] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:24:11,797 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [559340216] [2021-10-13 00:24:11,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:24:11,797 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:24:11,797 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:24:11,798 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:24:11,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-13 00:24:12,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:24:12,497 INFO L263 TraceCheckSpWp]: Trace formula consists of 830 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-13 00:24:12,500 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:24:12,902 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-13 00:24:12,902 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [559340216] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:24:12,902 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 00:24:12,903 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-13 00:24:12,903 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164703816] [2021-10-13 00:24:12,903 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:24:12,903 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:24:12,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:24:12,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-13 00:24:12,904 INFO L87 Difference]: Start difference. First operand 5179 states and 6404 transitions. Second operand has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:14,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:24:14,684 INFO L93 Difference]: Finished difference Result 13279 states and 16533 transitions. [2021-10-13 00:24:14,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:24:14,685 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 148 [2021-10-13 00:24:14,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:24:14,693 INFO L225 Difference]: With dead ends: 13279 [2021-10-13 00:24:14,693 INFO L226 Difference]: Without dead ends: 8944 [2021-10-13 00:24:14,698 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 115.1ms TimeCoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2021-10-13 00:24:14,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8944 states. [2021-10-13 00:24:15,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8944 to 5179. [2021-10-13 00:24:15,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5179 states, 5174 states have (on average 1.2373405488983378) internal successors, (6402), 5178 states have internal predecessors, (6402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:15,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5179 states to 5179 states and 6402 transitions. [2021-10-13 00:24:15,735 INFO L78 Accepts]: Start accepts. Automaton has 5179 states and 6402 transitions. Word has length 148 [2021-10-13 00:24:15,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:24:15,740 INFO L470 AbstractCegarLoop]: Abstraction has 5179 states and 6402 transitions. [2021-10-13 00:24:15,740 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:15,741 INFO L276 IsEmpty]: Start isEmpty. Operand 5179 states and 6402 transitions. [2021-10-13 00:24:15,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-10-13 00:24:15,746 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:24:15,746 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:24:15,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2021-10-13 00:24:15,946 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:24:15,947 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:24:15,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:24:15,947 INFO L82 PathProgramCache]: Analyzing trace with hash -572580853, now seen corresponding path program 1 times [2021-10-13 00:24:15,947 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:24:15,947 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644995856] [2021-10-13 00:24:15,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:24:15,948 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:24:16,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:24:16,094 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-13 00:24:16,095 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:24:16,095 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644995856] [2021-10-13 00:24:16,095 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [644995856] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:24:16,095 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:24:16,095 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:24:16,096 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127330778] [2021-10-13 00:24:16,096 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:24:16,096 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:24:16,097 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:24:16,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:24:16,097 INFO L87 Difference]: Start difference. First operand 5179 states and 6402 transitions. Second operand has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:18,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:24:18,761 INFO L93 Difference]: Finished difference Result 13168 states and 16527 transitions. [2021-10-13 00:24:18,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:24:18,761 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-10-13 00:24:18,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:24:18,772 INFO L225 Difference]: With dead ends: 13168 [2021-10-13 00:24:18,772 INFO L226 Difference]: Without dead ends: 10225 [2021-10-13 00:24:18,777 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 75.8ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 00:24:18,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10225 states. [2021-10-13 00:24:19,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10225 to 5305. [2021-10-13 00:24:19,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5305 states, 5300 states have (on average 1.2356603773584907) internal successors, (6549), 5304 states have internal predecessors, (6549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:19,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5305 states to 5305 states and 6549 transitions. [2021-10-13 00:24:19,862 INFO L78 Accepts]: Start accepts. Automaton has 5305 states and 6549 transitions. Word has length 149 [2021-10-13 00:24:19,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:24:19,863 INFO L470 AbstractCegarLoop]: Abstraction has 5305 states and 6549 transitions. [2021-10-13 00:24:19,863 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:24:19,863 INFO L276 IsEmpty]: Start isEmpty. Operand 5305 states and 6549 transitions. [2021-10-13 00:24:19,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-10-13 00:24:19,868 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:24:19,869 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:24:19,869 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-10-13 00:24:19,869 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:24:19,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:24:19,870 INFO L82 PathProgramCache]: Analyzing trace with hash -146521997, now seen corresponding path program 1 times [2021-10-13 00:24:19,870 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:24:19,870 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161312442] [2021-10-13 00:24:19,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:24:19,871 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:24:19,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:24:19,957 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 00:24:20,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:24:20,160 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 00:24:20,160 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-10-13 00:24:20,161 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,163 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,164 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,164 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,164 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,164 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,165 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,165 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,165 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,165 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,166 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,166 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,166 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,166 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,166 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,167 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,167 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,167 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,167 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,168 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,168 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,168 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,168 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:24:20,168 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2021-10-13 00:24:20,177 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-13 00:24:20,471 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 12:24:20 BoogieIcfgContainer [2021-10-13 00:24:20,471 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-13 00:24:20,471 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-13 00:24:20,472 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-13 00:24:20,472 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-13 00:24:20,473 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:22:59" (3/4) ... [2021-10-13 00:24:20,475 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-13 00:24:20,802 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/witness.graphml [2021-10-13 00:24:20,803 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-13 00:24:20,804 INFO L168 Benchmark]: Toolchain (without parser) took 82762.36 ms. Allocated memory was 81.8 MB in the beginning and 2.7 GB in the end (delta: 2.6 GB). Free memory was 43.0 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 810.3 MB. Max. memory is 16.1 GB. [2021-10-13 00:24:20,805 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 81.8 MB. Free memory is still 60.3 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-13 00:24:20,811 INFO L168 Benchmark]: CACSL2BoogieTranslator took 470.87 ms. Allocated memory was 81.8 MB in the beginning and 107.0 MB in the end (delta: 25.2 MB). Free memory was 42.8 MB in the beginning and 73.5 MB in the end (delta: -30.8 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-13 00:24:20,812 INFO L168 Benchmark]: Boogie Procedure Inliner took 114.54 ms. Allocated memory is still 107.0 MB. Free memory was 73.5 MB in the beginning and 68.8 MB in the end (delta: 4.7 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-13 00:24:20,813 INFO L168 Benchmark]: Boogie Preprocessor took 73.23 ms. Allocated memory is still 107.0 MB. Free memory was 68.8 MB in the beginning and 65.6 MB in the end (delta: 3.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-13 00:24:20,813 INFO L168 Benchmark]: RCFGBuilder took 1168.04 ms. Allocated memory is still 107.0 MB. Free memory was 65.6 MB in the beginning and 77.9 MB in the end (delta: -12.3 MB). Peak memory consumption was 43.8 MB. Max. memory is 16.1 GB. [2021-10-13 00:24:20,813 INFO L168 Benchmark]: TraceAbstraction took 80591.85 ms. Allocated memory was 107.0 MB in the beginning and 2.7 GB in the end (delta: 2.6 GB). Free memory was 77.4 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 768.7 MB. Max. memory is 16.1 GB. [2021-10-13 00:24:20,814 INFO L168 Benchmark]: Witness Printer took 331.16 ms. Allocated memory is still 2.7 GB. Free memory was 1.9 GB in the beginning and 1.9 GB in the end (delta: 48.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. [2021-10-13 00:24:20,816 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 81.8 MB. Free memory is still 60.3 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 470.87 ms. Allocated memory was 81.8 MB in the beginning and 107.0 MB in the end (delta: 25.2 MB). Free memory was 42.8 MB in the beginning and 73.5 MB in the end (delta: -30.8 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 114.54 ms. Allocated memory is still 107.0 MB. Free memory was 73.5 MB in the beginning and 68.8 MB in the end (delta: 4.7 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 73.23 ms. Allocated memory is still 107.0 MB. Free memory was 68.8 MB in the beginning and 65.6 MB in the end (delta: 3.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1168.04 ms. Allocated memory is still 107.0 MB. Free memory was 65.6 MB in the beginning and 77.9 MB in the end (delta: -12.3 MB). Peak memory consumption was 43.8 MB. Max. memory is 16.1 GB. * TraceAbstraction took 80591.85 ms. Allocated memory was 107.0 MB in the beginning and 2.7 GB in the end (delta: 2.6 GB). Free memory was 77.4 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 768.7 MB. Max. memory is 16.1 GB. * Witness Printer took 331.16 ms. Allocated memory is still 2.7 GB. Free memory was 1.9 GB in the beginning and 1.9 GB in the end (delta: 48.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 618]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L616] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L616] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L618] reach_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 296 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 80207.6ms, OverallIterations: 45, TraceHistogramMax: 2, EmptinessCheckTime: 154.0ms, AutomataDifference: 47489.1ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 27.8ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 21531 SDtfs, 49487 SDslu, 63295 SDs, 0 SdLazy, 12847 SolverSat, 794 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7806.8ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2582 GetRequests, 1775 SyntacticMatches, 3 SemanticMatches, 804 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43369 ImplicationChecksByTransitivity, 11871.2ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=7251occurred in iteration=40, InterpolantAutomatonStates: 791, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 13514.3ms AutomataMinimizationTime, 44 MinimizatonAttempts, 74747 StatesRemovedByMinimization, 41 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 695.4ms SsaConstructionTime, 2524.0ms SatisfiabilityAnalysisTime, 8896.7ms InterpolantComputationTime, 5847 NumberOfCodeBlocks, 5847 NumberOfCodeBlocksAsserted, 56 NumberOfCheckSat, 5642 ConstructedInterpolants, 0 QuantifiedInterpolants, 19808 SizeOfPredicates, 40 NumberOfNonLiveVariables, 8616 ConjunctsInSsa, 129 ConjunctsInUnsatCore, 55 InterpolantComputations, 38 PerfectInterpolantSequences, 792/1160 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-13 00:24:20,891 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c8c3a6-d38a-480e-b79d-05d3637a611f/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...