./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/kundu1.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 7b2dab56 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/kundu1.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 296e273b1c19d017b7d3722a7c74d29ba546c812 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.0-7b2dab5 [2021-10-11 00:28:52,543 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-11 00:28:52,545 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-11 00:28:52,578 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-11 00:28:52,579 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-11 00:28:52,580 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-11 00:28:52,582 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-11 00:28:52,584 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-11 00:28:52,586 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-11 00:28:52,587 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-11 00:28:52,588 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-11 00:28:52,590 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-11 00:28:52,590 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-11 00:28:52,592 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-11 00:28:52,593 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-11 00:28:52,594 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-11 00:28:52,595 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-11 00:28:52,596 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-11 00:28:52,598 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-11 00:28:52,600 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-11 00:28:52,602 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-11 00:28:52,604 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-11 00:28:52,605 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-11 00:28:52,606 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-11 00:28:52,609 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-11 00:28:52,610 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-11 00:28:52,610 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-11 00:28:52,611 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-11 00:28:52,612 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-11 00:28:52,613 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-11 00:28:52,614 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-11 00:28:52,615 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-11 00:28:52,615 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-11 00:28:52,616 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-11 00:28:52,618 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-11 00:28:52,618 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-11 00:28:52,619 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-11 00:28:52,619 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-11 00:28:52,619 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-11 00:28:52,620 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-11 00:28:52,621 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-11 00:28:52,622 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-11 00:28:52,646 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-11 00:28:52,646 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-11 00:28:52,647 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-11 00:28:52,648 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-11 00:28:52,648 INFO L138 SettingsManager]: * Use SBE=true [2021-10-11 00:28:52,648 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-11 00:28:52,648 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-11 00:28:52,648 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-11 00:28:52,648 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-11 00:28:52,649 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-11 00:28:52,649 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-11 00:28:52,649 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-11 00:28:52,649 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-11 00:28:52,649 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-11 00:28:52,649 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-11 00:28:52,650 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-11 00:28:52,650 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-11 00:28:52,650 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-11 00:28:52,650 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-11 00:28:52,650 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-11 00:28:52,650 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-11 00:28:52,651 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-11 00:28:52,651 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-11 00:28:52,651 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-11 00:28:52,651 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-11 00:28:52,651 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-11 00:28:52,651 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-11 00:28:52,652 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-11 00:28:52,652 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 296e273b1c19d017b7d3722a7c74d29ba546c812 [2021-10-11 00:28:52,904 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-11 00:28:52,978 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-11 00:28:52,981 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-11 00:28:52,982 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-11 00:28:52,996 INFO L275 PluginConnector]: CDTParser initialized [2021-10-11 00:28:53,000 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/../../sv-benchmarks/c/systemc/kundu1.cil.c [2021-10-11 00:28:53,104 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/data/b007702f2/77f026437541410081fdd90be70a64ca/FLAG0b28ba2d8 [2021-10-11 00:28:53,803 INFO L306 CDTParser]: Found 1 translation units. [2021-10-11 00:28:53,805 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/sv-benchmarks/c/systemc/kundu1.cil.c [2021-10-11 00:28:53,824 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/data/b007702f2/77f026437541410081fdd90be70a64ca/FLAG0b28ba2d8 [2021-10-11 00:28:54,122 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/data/b007702f2/77f026437541410081fdd90be70a64ca [2021-10-11 00:28:54,128 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-11 00:28:54,130 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-11 00:28:54,133 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-11 00:28:54,133 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-11 00:28:54,137 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-11 00:28:54,137 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,139 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@88e2e3b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54, skipping insertion in model container [2021-10-11 00:28:54,140 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,151 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-11 00:28:54,181 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-11 00:28:54,325 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/sv-benchmarks/c/systemc/kundu1.cil.c[331,344] [2021-10-11 00:28:54,401 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-11 00:28:54,414 INFO L203 MainTranslator]: Completed pre-run [2021-10-11 00:28:54,425 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/sv-benchmarks/c/systemc/kundu1.cil.c[331,344] [2021-10-11 00:28:54,457 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-11 00:28:54,480 INFO L208 MainTranslator]: Completed translation [2021-10-11 00:28:54,480 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54 WrapperNode [2021-10-11 00:28:54,481 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-11 00:28:54,482 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-11 00:28:54,483 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-11 00:28:54,483 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-11 00:28:54,493 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,503 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,543 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-11 00:28:54,544 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-11 00:28:54,544 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-11 00:28:54,545 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-11 00:28:54,554 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,554 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,559 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,560 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,568 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,578 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,581 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... [2021-10-11 00:28:54,586 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-11 00:28:54,588 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-11 00:28:54,588 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-11 00:28:54,588 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-11 00:28:54,589 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (1/1) ... No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-11 00:28:54,706 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-11 00:28:54,706 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-11 00:28:54,706 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-11 00:28:54,707 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-11 00:28:55,290 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-11 00:28:55,293 INFO L299 CfgBuilder]: Removed 72 assume(true) statements. [2021-10-11 00:28:55,295 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:28:55 BoogieIcfgContainer [2021-10-11 00:28:55,296 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-11 00:28:55,299 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-11 00:28:55,300 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-11 00:28:55,303 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-11 00:28:55,304 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.10 12:28:54" (1/3) ... [2021-10-11 00:28:55,305 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9830b63 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.10 12:28:55, skipping insertion in model container [2021-10-11 00:28:55,305 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:54" (2/3) ... [2021-10-11 00:28:55,306 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9830b63 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.10 12:28:55, skipping insertion in model container [2021-10-11 00:28:55,306 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:28:55" (3/3) ... [2021-10-11 00:28:55,308 INFO L111 eAbstractionObserver]: Analyzing ICFG kundu1.cil.c [2021-10-11 00:28:55,323 INFO L180 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-11 00:28:55,327 INFO L192 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2021-10-11 00:28:55,339 INFO L253 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2021-10-11 00:28:55,379 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-10-11 00:28:55,379 INFO L378 AbstractCegarLoop]: Hoare is true [2021-10-11 00:28:55,379 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-10-11 00:28:55,379 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-11 00:28:55,379 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-11 00:28:55,380 INFO L382 AbstractCegarLoop]: Difference is false [2021-10-11 00:28:55,380 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-11 00:28:55,380 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-10-11 00:28:55,402 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states. [2021-10-11 00:28:55,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-11 00:28:55,412 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:55,412 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:55,413 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:55,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:55,420 INFO L82 PathProgramCache]: Analyzing trace with hash 1913091172, now seen corresponding path program 1 times [2021-10-11 00:28:55,431 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:55,431 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128807790] [2021-10-11 00:28:55,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:55,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:55,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:55,695 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128807790] [2021-10-11 00:28:55,696 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:55,697 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:55,743 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657888205] [2021-10-11 00:28:55,749 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:55,749 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:55,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:55,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:55,777 INFO L87 Difference]: Start difference. First operand 117 states. Second operand 3 states. [2021-10-11 00:28:55,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:55,873 INFO L93 Difference]: Finished difference Result 228 states and 346 transitions. [2021-10-11 00:28:55,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:55,875 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2021-10-11 00:28:55,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:55,907 INFO L225 Difference]: With dead ends: 228 [2021-10-11 00:28:55,909 INFO L226 Difference]: Without dead ends: 112 [2021-10-11 00:28:55,913 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:55,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2021-10-11 00:28:55,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2021-10-11 00:28:55,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2021-10-11 00:28:55,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 162 transitions. [2021-10-11 00:28:55,988 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 162 transitions. Word has length 33 [2021-10-11 00:28:55,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:55,989 INFO L481 AbstractCegarLoop]: Abstraction has 112 states and 162 transitions. [2021-10-11 00:28:55,990 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:55,990 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 162 transitions. [2021-10-11 00:28:55,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-11 00:28:55,994 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:55,995 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:55,995 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-11 00:28:55,995 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:55,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:55,999 INFO L82 PathProgramCache]: Analyzing trace with hash 526887778, now seen corresponding path program 1 times [2021-10-11 00:28:55,999 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:56,000 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270543283] [2021-10-11 00:28:56,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:56,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:56,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:56,064 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270543283] [2021-10-11 00:28:56,064 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:56,064 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:56,064 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1412064515] [2021-10-11 00:28:56,066 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:56,066 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:56,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:56,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:56,067 INFO L87 Difference]: Start difference. First operand 112 states and 162 transitions. Second operand 3 states. [2021-10-11 00:28:56,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:56,152 INFO L93 Difference]: Finished difference Result 304 states and 439 transitions. [2021-10-11 00:28:56,152 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:56,152 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2021-10-11 00:28:56,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:56,160 INFO L225 Difference]: With dead ends: 304 [2021-10-11 00:28:56,160 INFO L226 Difference]: Without dead ends: 199 [2021-10-11 00:28:56,162 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:56,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2021-10-11 00:28:56,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 189. [2021-10-11 00:28:56,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2021-10-11 00:28:56,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 273 transitions. [2021-10-11 00:28:56,201 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 273 transitions. Word has length 33 [2021-10-11 00:28:56,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:56,202 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 273 transitions. [2021-10-11 00:28:56,202 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:56,202 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 273 transitions. [2021-10-11 00:28:56,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-11 00:28:56,204 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:56,206 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:56,206 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-11 00:28:56,206 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:56,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:56,207 INFO L82 PathProgramCache]: Analyzing trace with hash -1145629853, now seen corresponding path program 1 times [2021-10-11 00:28:56,207 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:56,207 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272796791] [2021-10-11 00:28:56,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:56,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:56,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:56,264 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272796791] [2021-10-11 00:28:56,264 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:56,264 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:28:56,265 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132931975] [2021-10-11 00:28:56,265 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:28:56,265 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:56,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:28:56,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:56,266 INFO L87 Difference]: Start difference. First operand 189 states and 273 transitions. Second operand 5 states. [2021-10-11 00:28:56,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:56,391 INFO L93 Difference]: Finished difference Result 591 states and 861 transitions. [2021-10-11 00:28:56,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-11 00:28:56,392 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2021-10-11 00:28:56,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:56,396 INFO L225 Difference]: With dead ends: 591 [2021-10-11 00:28:56,397 INFO L226 Difference]: Without dead ends: 413 [2021-10-11 00:28:56,399 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:28:56,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states. [2021-10-11 00:28:56,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 195. [2021-10-11 00:28:56,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2021-10-11 00:28:56,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 276 transitions. [2021-10-11 00:28:56,473 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 276 transitions. Word has length 33 [2021-10-11 00:28:56,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:56,473 INFO L481 AbstractCegarLoop]: Abstraction has 195 states and 276 transitions. [2021-10-11 00:28:56,473 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:28:56,473 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 276 transitions. [2021-10-11 00:28:56,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-11 00:28:56,474 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:56,474 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:56,475 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-11 00:28:56,475 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:56,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:56,475 INFO L82 PathProgramCache]: Analyzing trace with hash 1343899109, now seen corresponding path program 1 times [2021-10-11 00:28:56,475 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:56,476 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975579226] [2021-10-11 00:28:56,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:56,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:56,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:56,575 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975579226] [2021-10-11 00:28:56,575 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:56,576 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:28:56,576 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803048717] [2021-10-11 00:28:56,576 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:28:56,576 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:56,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:28:56,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:28:56,578 INFO L87 Difference]: Start difference. First operand 195 states and 276 transitions. Second operand 4 states. [2021-10-11 00:28:56,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:56,738 INFO L93 Difference]: Finished difference Result 621 states and 872 transitions. [2021-10-11 00:28:56,738 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-11 00:28:56,738 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2021-10-11 00:28:56,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:56,741 INFO L225 Difference]: With dead ends: 621 [2021-10-11 00:28:56,742 INFO L226 Difference]: Without dead ends: 439 [2021-10-11 00:28:56,744 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:56,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2021-10-11 00:28:56,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 333. [2021-10-11 00:28:56,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2021-10-11 00:28:56,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 464 transitions. [2021-10-11 00:28:56,799 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 464 transitions. Word has length 33 [2021-10-11 00:28:56,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:56,799 INFO L481 AbstractCegarLoop]: Abstraction has 333 states and 464 transitions. [2021-10-11 00:28:56,799 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:28:56,799 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 464 transitions. [2021-10-11 00:28:56,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-10-11 00:28:56,801 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:56,801 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:56,801 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-11 00:28:56,801 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:56,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:56,802 INFO L82 PathProgramCache]: Analyzing trace with hash -1179728243, now seen corresponding path program 1 times [2021-10-11 00:28:56,802 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:56,802 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656715068] [2021-10-11 00:28:56,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:56,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:56,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:56,872 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656715068] [2021-10-11 00:28:56,873 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:56,873 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:28:56,873 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039386944] [2021-10-11 00:28:56,874 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:28:56,874 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:56,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:28:56,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:56,875 INFO L87 Difference]: Start difference. First operand 333 states and 464 transitions. Second operand 5 states. [2021-10-11 00:28:57,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:57,022 INFO L93 Difference]: Finished difference Result 1126 states and 1579 transitions. [2021-10-11 00:28:57,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-11 00:28:57,023 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2021-10-11 00:28:57,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:57,029 INFO L225 Difference]: With dead ends: 1126 [2021-10-11 00:28:57,029 INFO L226 Difference]: Without dead ends: 812 [2021-10-11 00:28:57,030 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:28:57,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 812 states. [2021-10-11 00:28:57,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 812 to 360. [2021-10-11 00:28:57,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2021-10-11 00:28:57,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 491 transitions. [2021-10-11 00:28:57,071 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 491 transitions. Word has length 34 [2021-10-11 00:28:57,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:57,072 INFO L481 AbstractCegarLoop]: Abstraction has 360 states and 491 transitions. [2021-10-11 00:28:57,072 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:28:57,072 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 491 transitions. [2021-10-11 00:28:57,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-10-11 00:28:57,074 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:57,074 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:57,075 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-11 00:28:57,075 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:57,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:57,076 INFO L82 PathProgramCache]: Analyzing trace with hash 1526891151, now seen corresponding path program 1 times [2021-10-11 00:28:57,076 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:57,076 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754453031] [2021-10-11 00:28:57,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:57,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:57,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:57,148 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [754453031] [2021-10-11 00:28:57,148 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:57,148 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:28:57,149 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261593780] [2021-10-11 00:28:57,149 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:28:57,149 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:57,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:28:57,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:28:57,151 INFO L87 Difference]: Start difference. First operand 360 states and 491 transitions. Second operand 4 states. [2021-10-11 00:28:57,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:57,312 INFO L93 Difference]: Finished difference Result 1662 states and 2286 transitions. [2021-10-11 00:28:57,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:28:57,313 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2021-10-11 00:28:57,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:57,322 INFO L225 Difference]: With dead ends: 1662 [2021-10-11 00:28:57,322 INFO L226 Difference]: Without dead ends: 1324 [2021-10-11 00:28:57,323 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:57,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1324 states. [2021-10-11 00:28:57,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1324 to 674. [2021-10-11 00:28:57,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 674 states. [2021-10-11 00:28:57,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 674 states to 674 states and 923 transitions. [2021-10-11 00:28:57,405 INFO L78 Accepts]: Start accepts. Automaton has 674 states and 923 transitions. Word has length 34 [2021-10-11 00:28:57,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:57,409 INFO L481 AbstractCegarLoop]: Abstraction has 674 states and 923 transitions. [2021-10-11 00:28:57,410 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:28:57,410 INFO L276 IsEmpty]: Start isEmpty. Operand 674 states and 923 transitions. [2021-10-11 00:28:57,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2021-10-11 00:28:57,414 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:57,414 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:57,414 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-11 00:28:57,414 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:57,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:57,415 INFO L82 PathProgramCache]: Analyzing trace with hash -1026068075, now seen corresponding path program 1 times [2021-10-11 00:28:57,415 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:57,422 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925307510] [2021-10-11 00:28:57,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:57,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:57,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:57,532 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925307510] [2021-10-11 00:28:57,532 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:57,533 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:28:57,533 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505929460] [2021-10-11 00:28:57,533 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:28:57,534 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:57,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:28:57,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:57,535 INFO L87 Difference]: Start difference. First operand 674 states and 923 transitions. Second operand 5 states. [2021-10-11 00:28:57,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:57,677 INFO L93 Difference]: Finished difference Result 1497 states and 2054 transitions. [2021-10-11 00:28:57,678 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:28:57,678 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2021-10-11 00:28:57,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:57,684 INFO L225 Difference]: With dead ends: 1497 [2021-10-11 00:28:57,684 INFO L226 Difference]: Without dead ends: 845 [2021-10-11 00:28:57,686 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:57,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 845 states. [2021-10-11 00:28:57,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 845 to 837. [2021-10-11 00:28:57,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 837 states. [2021-10-11 00:28:57,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 837 states to 837 states and 1144 transitions. [2021-10-11 00:28:57,776 INFO L78 Accepts]: Start accepts. Automaton has 837 states and 1144 transitions. Word has length 41 [2021-10-11 00:28:57,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:57,777 INFO L481 AbstractCegarLoop]: Abstraction has 837 states and 1144 transitions. [2021-10-11 00:28:57,777 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:28:57,777 INFO L276 IsEmpty]: Start isEmpty. Operand 837 states and 1144 transitions. [2021-10-11 00:28:57,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-11 00:28:57,783 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:57,784 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:57,784 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-11 00:28:57,784 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:57,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:57,785 INFO L82 PathProgramCache]: Analyzing trace with hash -305826283, now seen corresponding path program 1 times [2021-10-11 00:28:57,785 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:57,786 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655836521] [2021-10-11 00:28:57,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:57,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:57,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:57,889 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [655836521] [2021-10-11 00:28:57,889 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:57,889 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-11 00:28:57,889 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932960447] [2021-10-11 00:28:57,891 INFO L461 AbstractCegarLoop]: Interpolant automaton has 6 states [2021-10-11 00:28:57,891 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:57,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-11 00:28:57,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2021-10-11 00:28:57,893 INFO L87 Difference]: Start difference. First operand 837 states and 1144 transitions. Second operand 6 states. [2021-10-11 00:28:58,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:58,222 INFO L93 Difference]: Finished difference Result 3287 states and 4502 transitions. [2021-10-11 00:28:58,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-10-11 00:28:58,223 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2021-10-11 00:28:58,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:58,239 INFO L225 Difference]: With dead ends: 3287 [2021-10-11 00:28:58,239 INFO L226 Difference]: Without dead ends: 2472 [2021-10-11 00:28:58,242 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2021-10-11 00:28:58,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2472 states. [2021-10-11 00:28:58,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2472 to 1321. [2021-10-11 00:28:58,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1321 states. [2021-10-11 00:28:58,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1321 states to 1321 states and 1806 transitions. [2021-10-11 00:28:58,390 INFO L78 Accepts]: Start accepts. Automaton has 1321 states and 1806 transitions. Word has length 44 [2021-10-11 00:28:58,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:58,390 INFO L481 AbstractCegarLoop]: Abstraction has 1321 states and 1806 transitions. [2021-10-11 00:28:58,390 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2021-10-11 00:28:58,390 INFO L276 IsEmpty]: Start isEmpty. Operand 1321 states and 1806 transitions. [2021-10-11 00:28:58,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-10-11 00:28:58,391 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:58,391 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:58,391 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-11 00:28:58,391 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:58,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:58,392 INFO L82 PathProgramCache]: Analyzing trace with hash -1702134670, now seen corresponding path program 1 times [2021-10-11 00:28:58,392 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:58,392 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989599495] [2021-10-11 00:28:58,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:58,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:58,451 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-10-11 00:28:58,451 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989599495] [2021-10-11 00:28:58,452 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:58,452 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:58,452 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672172015] [2021-10-11 00:28:58,453 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:58,453 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:58,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:58,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:58,454 INFO L87 Difference]: Start difference. First operand 1321 states and 1806 transitions. Second operand 3 states. [2021-10-11 00:28:58,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:58,723 INFO L93 Difference]: Finished difference Result 3798 states and 5147 transitions. [2021-10-11 00:28:58,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:58,724 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2021-10-11 00:28:58,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:58,740 INFO L225 Difference]: With dead ends: 3798 [2021-10-11 00:28:58,741 INFO L226 Difference]: Without dead ends: 2499 [2021-10-11 00:28:58,744 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:58,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2499 states. [2021-10-11 00:28:58,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2499 to 2495. [2021-10-11 00:28:58,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2495 states. [2021-10-11 00:28:58,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2495 states to 2495 states and 3301 transitions. [2021-10-11 00:28:58,971 INFO L78 Accepts]: Start accepts. Automaton has 2495 states and 3301 transitions. Word has length 46 [2021-10-11 00:28:58,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:58,971 INFO L481 AbstractCegarLoop]: Abstraction has 2495 states and 3301 transitions. [2021-10-11 00:28:58,971 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:58,971 INFO L276 IsEmpty]: Start isEmpty. Operand 2495 states and 3301 transitions. [2021-10-11 00:28:58,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-11 00:28:58,973 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:58,973 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:58,973 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-11 00:28:58,974 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:58,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:58,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1664931104, now seen corresponding path program 1 times [2021-10-11 00:28:58,974 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:58,976 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788255573] [2021-10-11 00:28:58,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:59,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:59,061 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:59,062 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788255573] [2021-10-11 00:28:59,062 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:59,063 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:28:59,063 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1172689553] [2021-10-11 00:28:59,063 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:28:59,063 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:59,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:28:59,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:28:59,064 INFO L87 Difference]: Start difference. First operand 2495 states and 3301 transitions. Second operand 4 states. [2021-10-11 00:28:59,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:59,716 INFO L93 Difference]: Finished difference Result 9142 states and 11944 transitions. [2021-10-11 00:28:59,719 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:28:59,719 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 48 [2021-10-11 00:28:59,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:59,757 INFO L225 Difference]: With dead ends: 9142 [2021-10-11 00:28:59,757 INFO L226 Difference]: Without dead ends: 6671 [2021-10-11 00:28:59,762 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:59,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6671 states. [2021-10-11 00:29:00,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6671 to 5850. [2021-10-11 00:29:00,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5850 states. [2021-10-11 00:29:00,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5850 states to 5850 states and 7499 transitions. [2021-10-11 00:29:00,286 INFO L78 Accepts]: Start accepts. Automaton has 5850 states and 7499 transitions. Word has length 48 [2021-10-11 00:29:00,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:00,286 INFO L481 AbstractCegarLoop]: Abstraction has 5850 states and 7499 transitions. [2021-10-11 00:29:00,286 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:29:00,287 INFO L276 IsEmpty]: Start isEmpty. Operand 5850 states and 7499 transitions. [2021-10-11 00:29:00,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-11 00:29:00,288 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:00,288 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:00,288 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-11 00:29:00,288 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:00,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:00,289 INFO L82 PathProgramCache]: Analyzing trace with hash 403090641, now seen corresponding path program 1 times [2021-10-11 00:29:00,289 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:00,289 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242767160] [2021-10-11 00:29:00,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:00,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:00,319 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:00,319 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242767160] [2021-10-11 00:29:00,319 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:00,320 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:00,320 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840112418] [2021-10-11 00:29:00,320 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:00,320 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:00,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:00,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:00,321 INFO L87 Difference]: Start difference. First operand 5850 states and 7499 transitions. Second operand 3 states. [2021-10-11 00:29:00,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:00,827 INFO L93 Difference]: Finished difference Result 11044 states and 14195 transitions. [2021-10-11 00:29:00,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:00,828 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2021-10-11 00:29:00,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:00,862 INFO L225 Difference]: With dead ends: 11044 [2021-10-11 00:29:00,862 INFO L226 Difference]: Without dead ends: 5852 [2021-10-11 00:29:00,869 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:00,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5852 states. [2021-10-11 00:29:01,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5852 to 5850. [2021-10-11 00:29:01,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5850 states. [2021-10-11 00:29:01,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5850 states to 5850 states and 7394 transitions. [2021-10-11 00:29:01,415 INFO L78 Accepts]: Start accepts. Automaton has 5850 states and 7394 transitions. Word has length 48 [2021-10-11 00:29:01,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:01,417 INFO L481 AbstractCegarLoop]: Abstraction has 5850 states and 7394 transitions. [2021-10-11 00:29:01,417 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:01,417 INFO L276 IsEmpty]: Start isEmpty. Operand 5850 states and 7394 transitions. [2021-10-11 00:29:01,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-10-11 00:29:01,418 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:01,419 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:01,419 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-11 00:29:01,419 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:01,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:01,420 INFO L82 PathProgramCache]: Analyzing trace with hash 57108908, now seen corresponding path program 1 times [2021-10-11 00:29:01,420 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:01,420 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448301491] [2021-10-11 00:29:01,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:01,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:01,483 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:01,483 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448301491] [2021-10-11 00:29:01,483 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:01,484 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:29:01,484 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443649221] [2021-10-11 00:29:01,484 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:29:01,485 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:01,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:29:01,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:29:01,486 INFO L87 Difference]: Start difference. First operand 5850 states and 7394 transitions. Second operand 4 states. [2021-10-11 00:29:02,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:02,072 INFO L93 Difference]: Finished difference Result 10947 states and 13872 transitions. [2021-10-11 00:29:02,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:29:02,073 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-10-11 00:29:02,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:02,100 INFO L225 Difference]: With dead ends: 10947 [2021-10-11 00:29:02,100 INFO L226 Difference]: Without dead ends: 5013 [2021-10-11 00:29:02,107 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:02,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5013 states. [2021-10-11 00:29:02,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5013 to 4814. [2021-10-11 00:29:02,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4814 states. [2021-10-11 00:29:02,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4814 states to 4814 states and 5985 transitions. [2021-10-11 00:29:02,473 INFO L78 Accepts]: Start accepts. Automaton has 4814 states and 5985 transitions. Word has length 49 [2021-10-11 00:29:02,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:02,480 INFO L481 AbstractCegarLoop]: Abstraction has 4814 states and 5985 transitions. [2021-10-11 00:29:02,480 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:29:02,480 INFO L276 IsEmpty]: Start isEmpty. Operand 4814 states and 5985 transitions. [2021-10-11 00:29:02,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2021-10-11 00:29:02,491 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:02,491 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:02,491 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-11 00:29:02,491 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:02,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:02,492 INFO L82 PathProgramCache]: Analyzing trace with hash 652914839, now seen corresponding path program 1 times [2021-10-11 00:29:02,492 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:02,493 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25840143] [2021-10-11 00:29:02,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:02,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:02,562 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-10-11 00:29:02,562 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [25840143] [2021-10-11 00:29:02,562 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:02,562 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:29:02,562 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326075696] [2021-10-11 00:29:02,563 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:29:02,563 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:02,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:29:02,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:02,564 INFO L87 Difference]: Start difference. First operand 4814 states and 5985 transitions. Second operand 5 states. [2021-10-11 00:29:02,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:02,886 INFO L93 Difference]: Finished difference Result 8526 states and 10629 transitions. [2021-10-11 00:29:02,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-11 00:29:02,887 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2021-10-11 00:29:02,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:02,900 INFO L225 Difference]: With dead ends: 8526 [2021-10-11 00:29:02,900 INFO L226 Difference]: Without dead ends: 3744 [2021-10-11 00:29:02,907 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-11 00:29:02,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3744 states. [2021-10-11 00:29:03,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3744 to 3233. [2021-10-11 00:29:03,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3233 states. [2021-10-11 00:29:03,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3233 states to 3233 states and 4035 transitions. [2021-10-11 00:29:03,154 INFO L78 Accepts]: Start accepts. Automaton has 3233 states and 4035 transitions. Word has length 83 [2021-10-11 00:29:03,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:03,154 INFO L481 AbstractCegarLoop]: Abstraction has 3233 states and 4035 transitions. [2021-10-11 00:29:03,154 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:29:03,154 INFO L276 IsEmpty]: Start isEmpty. Operand 3233 states and 4035 transitions. [2021-10-11 00:29:03,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-10-11 00:29:03,157 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:03,157 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:03,157 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-11 00:29:03,157 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:03,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:03,158 INFO L82 PathProgramCache]: Analyzing trace with hash 994874622, now seen corresponding path program 1 times [2021-10-11 00:29:03,158 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:03,158 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492659417] [2021-10-11 00:29:03,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:03,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:03,183 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-11 00:29:03,184 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492659417] [2021-10-11 00:29:03,184 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:03,184 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:03,185 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [343258621] [2021-10-11 00:29:03,185 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:03,185 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:03,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:03,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:03,186 INFO L87 Difference]: Start difference. First operand 3233 states and 4035 transitions. Second operand 3 states. [2021-10-11 00:29:03,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:03,453 INFO L93 Difference]: Finished difference Result 3481 states and 4330 transitions. [2021-10-11 00:29:03,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:03,454 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2021-10-11 00:29:03,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:03,462 INFO L225 Difference]: With dead ends: 3481 [2021-10-11 00:29:03,462 INFO L226 Difference]: Without dead ends: 3217 [2021-10-11 00:29:03,464 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:03,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3217 states. [2021-10-11 00:29:03,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3217 to 3217. [2021-10-11 00:29:03,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3217 states. [2021-10-11 00:29:03,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3217 states to 3217 states and 4018 transitions. [2021-10-11 00:29:03,722 INFO L78 Accepts]: Start accepts. Automaton has 3217 states and 4018 transitions. Word has length 86 [2021-10-11 00:29:03,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:03,722 INFO L481 AbstractCegarLoop]: Abstraction has 3217 states and 4018 transitions. [2021-10-11 00:29:03,722 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:03,723 INFO L276 IsEmpty]: Start isEmpty. Operand 3217 states and 4018 transitions. [2021-10-11 00:29:03,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-10-11 00:29:03,726 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:03,727 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:03,727 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-11 00:29:03,727 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:03,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:03,728 INFO L82 PathProgramCache]: Analyzing trace with hash -684103662, now seen corresponding path program 1 times [2021-10-11 00:29:03,728 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:03,728 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081861597] [2021-10-11 00:29:03,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:03,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:03,869 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-11 00:29:03,869 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2081861597] [2021-10-11 00:29:03,869 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:03,870 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:03,870 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922701272] [2021-10-11 00:29:03,870 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:03,871 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:03,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:03,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:03,872 INFO L87 Difference]: Start difference. First operand 3217 states and 4018 transitions. Second operand 3 states. [2021-10-11 00:29:04,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:04,203 INFO L93 Difference]: Finished difference Result 3591 states and 4462 transitions. [2021-10-11 00:29:04,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:04,204 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2021-10-11 00:29:04,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:04,211 INFO L225 Difference]: With dead ends: 3591 [2021-10-11 00:29:04,212 INFO L226 Difference]: Without dead ends: 3202 [2021-10-11 00:29:04,214 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:04,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3202 states. [2021-10-11 00:29:04,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3202 to 3195. [2021-10-11 00:29:04,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3195 states. [2021-10-11 00:29:04,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3195 states to 3195 states and 3992 transitions. [2021-10-11 00:29:04,459 INFO L78 Accepts]: Start accepts. Automaton has 3195 states and 3992 transitions. Word has length 89 [2021-10-11 00:29:04,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:04,460 INFO L481 AbstractCegarLoop]: Abstraction has 3195 states and 3992 transitions. [2021-10-11 00:29:04,460 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:04,460 INFO L276 IsEmpty]: Start isEmpty. Operand 3195 states and 3992 transitions. [2021-10-11 00:29:04,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2021-10-11 00:29:04,464 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:04,464 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:04,464 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-11 00:29:04,465 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:04,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:04,466 INFO L82 PathProgramCache]: Analyzing trace with hash -1261043826, now seen corresponding path program 1 times [2021-10-11 00:29:04,466 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:04,466 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535195892] [2021-10-11 00:29:04,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:04,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:04,550 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-11 00:29:04,550 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1535195892] [2021-10-11 00:29:04,553 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:04,553 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:29:04,553 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [988500405] [2021-10-11 00:29:04,554 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:29:04,554 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:04,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:29:04,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:04,555 INFO L87 Difference]: Start difference. First operand 3195 states and 3992 transitions. Second operand 5 states. [2021-10-11 00:29:04,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:04,946 INFO L93 Difference]: Finished difference Result 6859 states and 8520 transitions. [2021-10-11 00:29:04,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:29:04,946 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2021-10-11 00:29:04,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:04,954 INFO L225 Difference]: With dead ends: 6859 [2021-10-11 00:29:04,954 INFO L226 Difference]: Without dead ends: 3724 [2021-10-11 00:29:04,959 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-11 00:29:04,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3724 states. [2021-10-11 00:29:05,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3724 to 3073. [2021-10-11 00:29:05,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3073 states. [2021-10-11 00:29:05,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3073 states to 3073 states and 3805 transitions. [2021-10-11 00:29:05,185 INFO L78 Accepts]: Start accepts. Automaton has 3073 states and 3805 transitions. Word has length 95 [2021-10-11 00:29:05,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:05,186 INFO L481 AbstractCegarLoop]: Abstraction has 3073 states and 3805 transitions. [2021-10-11 00:29:05,186 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:29:05,186 INFO L276 IsEmpty]: Start isEmpty. Operand 3073 states and 3805 transitions. [2021-10-11 00:29:05,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2021-10-11 00:29:05,188 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:05,188 INFO L422 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:05,189 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-11 00:29:05,189 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:05,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:05,189 INFO L82 PathProgramCache]: Analyzing trace with hash -666432318, now seen corresponding path program 1 times [2021-10-11 00:29:05,189 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:05,190 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023884787] [2021-10-11 00:29:05,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:05,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:05,252 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2021-10-11 00:29:05,252 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023884787] [2021-10-11 00:29:05,252 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:05,252 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:29:05,253 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315813905] [2021-10-11 00:29:05,253 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:29:05,253 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:05,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:29:05,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:05,254 INFO L87 Difference]: Start difference. First operand 3073 states and 3805 transitions. Second operand 5 states. [2021-10-11 00:29:05,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:05,448 INFO L93 Difference]: Finished difference Result 5583 states and 6899 transitions. [2021-10-11 00:29:05,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-11 00:29:05,449 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2021-10-11 00:29:05,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:05,453 INFO L225 Difference]: With dead ends: 5583 [2021-10-11 00:29:05,453 INFO L226 Difference]: Without dead ends: 2208 [2021-10-11 00:29:05,457 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-11 00:29:05,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2208 states. [2021-10-11 00:29:05,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2208 to 2050. [2021-10-11 00:29:05,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2050 states. [2021-10-11 00:29:05,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2050 states to 2050 states and 2515 transitions. [2021-10-11 00:29:05,592 INFO L78 Accepts]: Start accepts. Automaton has 2050 states and 2515 transitions. Word has length 98 [2021-10-11 00:29:05,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:05,593 INFO L481 AbstractCegarLoop]: Abstraction has 2050 states and 2515 transitions. [2021-10-11 00:29:05,593 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:29:05,593 INFO L276 IsEmpty]: Start isEmpty. Operand 2050 states and 2515 transitions. [2021-10-11 00:29:05,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2021-10-11 00:29:05,595 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:05,595 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:05,595 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-11 00:29:05,596 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:05,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:05,596 INFO L82 PathProgramCache]: Analyzing trace with hash -165994237, now seen corresponding path program 1 times [2021-10-11 00:29:05,596 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:05,597 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632984700] [2021-10-11 00:29:05,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:05,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:05,634 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:05,634 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632984700] [2021-10-11 00:29:05,634 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:05,635 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:05,635 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219813305] [2021-10-11 00:29:05,635 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:05,635 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:05,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:05,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:05,636 INFO L87 Difference]: Start difference. First operand 2050 states and 2515 transitions. Second operand 3 states. [2021-10-11 00:29:05,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:05,768 INFO L93 Difference]: Finished difference Result 3786 states and 4676 transitions. [2021-10-11 00:29:05,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:05,768 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2021-10-11 00:29:05,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:05,771 INFO L225 Difference]: With dead ends: 3786 [2021-10-11 00:29:05,771 INFO L226 Difference]: Without dead ends: 1796 [2021-10-11 00:29:05,774 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:05,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1796 states. [2021-10-11 00:29:05,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1796 to 1793. [2021-10-11 00:29:05,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1793 states. [2021-10-11 00:29:05,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2167 transitions. [2021-10-11 00:29:05,900 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2167 transitions. Word has length 111 [2021-10-11 00:29:05,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:05,900 INFO L481 AbstractCegarLoop]: Abstraction has 1793 states and 2167 transitions. [2021-10-11 00:29:05,901 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:05,901 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2167 transitions. [2021-10-11 00:29:05,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-10-11 00:29:05,903 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:05,903 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:05,903 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-11 00:29:05,903 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:05,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:05,904 INFO L82 PathProgramCache]: Analyzing trace with hash -896834660, now seen corresponding path program 1 times [2021-10-11 00:29:05,904 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:05,904 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593584646] [2021-10-11 00:29:05,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:05,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:05,992 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-11 00:29:05,992 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593584646] [2021-10-11 00:29:05,993 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:05,993 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:29:05,993 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926751857] [2021-10-11 00:29:05,993 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:29:05,993 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:05,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:29:05,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:05,994 INFO L87 Difference]: Start difference. First operand 1793 states and 2167 transitions. Second operand 5 states. [2021-10-11 00:29:06,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:06,170 INFO L93 Difference]: Finished difference Result 3489 states and 4203 transitions. [2021-10-11 00:29:06,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:29:06,171 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 113 [2021-10-11 00:29:06,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:06,174 INFO L225 Difference]: With dead ends: 3489 [2021-10-11 00:29:06,174 INFO L226 Difference]: Without dead ends: 1757 [2021-10-11 00:29:06,176 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-11 00:29:06,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1757 states. [2021-10-11 00:29:06,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1757 to 1618. [2021-10-11 00:29:06,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2021-10-11 00:29:06,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 1932 transitions. [2021-10-11 00:29:06,313 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 1932 transitions. Word has length 113 [2021-10-11 00:29:06,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:06,313 INFO L481 AbstractCegarLoop]: Abstraction has 1618 states and 1932 transitions. [2021-10-11 00:29:06,314 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:29:06,314 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 1932 transitions. [2021-10-11 00:29:06,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-10-11 00:29:06,316 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:06,316 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:06,316 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-11 00:29:06,316 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:06,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:06,317 INFO L82 PathProgramCache]: Analyzing trace with hash -1105184803, now seen corresponding path program 1 times [2021-10-11 00:29:06,317 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:06,317 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549873046] [2021-10-11 00:29:06,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:06,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:06,385 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:06,386 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549873046] [2021-10-11 00:29:06,386 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:06,386 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:06,386 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400915121] [2021-10-11 00:29:06,387 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:06,387 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:06,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:06,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:06,388 INFO L87 Difference]: Start difference. First operand 1618 states and 1932 transitions. Second operand 3 states. [2021-10-11 00:29:06,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:06,554 INFO L93 Difference]: Finished difference Result 3212 states and 3849 transitions. [2021-10-11 00:29:06,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:06,555 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2021-10-11 00:29:06,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:06,559 INFO L225 Difference]: With dead ends: 3212 [2021-10-11 00:29:06,559 INFO L226 Difference]: Without dead ends: 1655 [2021-10-11 00:29:06,561 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:06,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1655 states. [2021-10-11 00:29:06,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1655 to 1646. [2021-10-11 00:29:06,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1646 states. [2021-10-11 00:29:06,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1646 states to 1646 states and 1934 transitions. [2021-10-11 00:29:06,695 INFO L78 Accepts]: Start accepts. Automaton has 1646 states and 1934 transitions. Word has length 113 [2021-10-11 00:29:06,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:06,696 INFO L481 AbstractCegarLoop]: Abstraction has 1646 states and 1934 transitions. [2021-10-11 00:29:06,696 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:06,696 INFO L276 IsEmpty]: Start isEmpty. Operand 1646 states and 1934 transitions. [2021-10-11 00:29:06,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2021-10-11 00:29:06,698 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:06,698 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:06,698 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-11 00:29:06,699 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:06,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:06,700 INFO L82 PathProgramCache]: Analyzing trace with hash 1508765653, now seen corresponding path program 1 times [2021-10-11 00:29:06,700 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:06,700 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129474289] [2021-10-11 00:29:06,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:06,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:06,760 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-11 00:29:06,760 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129474289] [2021-10-11 00:29:06,760 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:06,761 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:29:06,761 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428175733] [2021-10-11 00:29:06,761 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:29:06,762 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:06,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:29:06,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:06,762 INFO L87 Difference]: Start difference. First operand 1646 states and 1934 transitions. Second operand 5 states. [2021-10-11 00:29:06,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:06,967 INFO L93 Difference]: Finished difference Result 3439 states and 4013 transitions. [2021-10-11 00:29:06,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:29:06,968 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 114 [2021-10-11 00:29:06,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:06,971 INFO L225 Difference]: With dead ends: 3439 [2021-10-11 00:29:06,972 INFO L226 Difference]: Without dead ends: 1854 [2021-10-11 00:29:06,974 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:29:06,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1854 states. [2021-10-11 00:29:07,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1854 to 1621. [2021-10-11 00:29:07,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1621 states. [2021-10-11 00:29:07,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1621 states to 1621 states and 1874 transitions. [2021-10-11 00:29:07,116 INFO L78 Accepts]: Start accepts. Automaton has 1621 states and 1874 transitions. Word has length 114 [2021-10-11 00:29:07,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:07,116 INFO L481 AbstractCegarLoop]: Abstraction has 1621 states and 1874 transitions. [2021-10-11 00:29:07,116 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:29:07,116 INFO L276 IsEmpty]: Start isEmpty. Operand 1621 states and 1874 transitions. [2021-10-11 00:29:07,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2021-10-11 00:29:07,119 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:07,119 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:07,120 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-11 00:29:07,120 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:07,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:07,120 INFO L82 PathProgramCache]: Analyzing trace with hash 2018238743, now seen corresponding path program 1 times [2021-10-11 00:29:07,120 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:07,120 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533628834] [2021-10-11 00:29:07,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:07,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:07,181 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-11 00:29:07,181 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1533628834] [2021-10-11 00:29:07,182 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:07,182 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:29:07,182 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454978767] [2021-10-11 00:29:07,182 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:29:07,182 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:07,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:29:07,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:07,183 INFO L87 Difference]: Start difference. First operand 1621 states and 1874 transitions. Second operand 5 states. [2021-10-11 00:29:07,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:07,542 INFO L93 Difference]: Finished difference Result 4536 states and 5247 transitions. [2021-10-11 00:29:07,543 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-10-11 00:29:07,543 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 114 [2021-10-11 00:29:07,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:07,549 INFO L225 Difference]: With dead ends: 4536 [2021-10-11 00:29:07,549 INFO L226 Difference]: Without dead ends: 2976 [2021-10-11 00:29:07,552 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2021-10-11 00:29:07,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2976 states. [2021-10-11 00:29:07,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2976 to 1623. [2021-10-11 00:29:07,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1623 states. [2021-10-11 00:29:07,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1623 states to 1623 states and 1872 transitions. [2021-10-11 00:29:07,675 INFO L78 Accepts]: Start accepts. Automaton has 1623 states and 1872 transitions. Word has length 114 [2021-10-11 00:29:07,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:07,675 INFO L481 AbstractCegarLoop]: Abstraction has 1623 states and 1872 transitions. [2021-10-11 00:29:07,676 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:29:07,676 INFO L276 IsEmpty]: Start isEmpty. Operand 1623 states and 1872 transitions. [2021-10-11 00:29:07,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-10-11 00:29:07,678 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:07,678 INFO L422 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:07,678 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-11 00:29:07,678 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:07,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:07,679 INFO L82 PathProgramCache]: Analyzing trace with hash -29964582, now seen corresponding path program 1 times [2021-10-11 00:29:07,679 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:07,679 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235818060] [2021-10-11 00:29:07,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:07,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:07,720 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-11 00:29:07,720 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235818060] [2021-10-11 00:29:07,720 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:07,720 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:07,721 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423704893] [2021-10-11 00:29:07,721 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:07,721 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:07,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:07,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:07,722 INFO L87 Difference]: Start difference. First operand 1623 states and 1872 transitions. Second operand 3 states. [2021-10-11 00:29:07,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:07,866 INFO L93 Difference]: Finished difference Result 2877 states and 3320 transitions. [2021-10-11 00:29:07,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:07,867 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 116 [2021-10-11 00:29:07,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:07,868 INFO L225 Difference]: With dead ends: 2877 [2021-10-11 00:29:07,869 INFO L226 Difference]: Without dead ends: 1315 [2021-10-11 00:29:07,870 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:07,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1315 states. [2021-10-11 00:29:07,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1315 to 1207. [2021-10-11 00:29:07,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1207 states. [2021-10-11 00:29:07,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1207 states to 1207 states and 1370 transitions. [2021-10-11 00:29:07,964 INFO L78 Accepts]: Start accepts. Automaton has 1207 states and 1370 transitions. Word has length 116 [2021-10-11 00:29:07,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:07,964 INFO L481 AbstractCegarLoop]: Abstraction has 1207 states and 1370 transitions. [2021-10-11 00:29:07,964 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:07,965 INFO L276 IsEmpty]: Start isEmpty. Operand 1207 states and 1370 transitions. [2021-10-11 00:29:07,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-10-11 00:29:07,966 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:07,966 INFO L422 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:07,966 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-11 00:29:07,967 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:07,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:07,967 INFO L82 PathProgramCache]: Analyzing trace with hash -1919382230, now seen corresponding path program 1 times [2021-10-11 00:29:07,967 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:07,967 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640739470] [2021-10-11 00:29:07,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:07,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:08,058 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2021-10-11 00:29:08,058 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640739470] [2021-10-11 00:29:08,058 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [883895695] [2021-10-11 00:29:08,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-11 00:29:08,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:08,194 INFO L263 TraceCheckSpWp]: Trace formula consists of 373 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-11 00:29:08,203 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-11 00:29:08,525 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2021-10-11 00:29:08,526 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-11 00:29:08,526 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2021-10-11 00:29:08,526 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1295783225] [2021-10-11 00:29:08,527 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:29:08,527 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:08,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:29:08,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:08,528 INFO L87 Difference]: Start difference. First operand 1207 states and 1370 transitions. Second operand 5 states. [2021-10-11 00:29:08,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:08,953 INFO L93 Difference]: Finished difference Result 2872 states and 3266 transitions. [2021-10-11 00:29:08,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-11 00:29:08,953 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 118 [2021-10-11 00:29:08,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:08,958 INFO L225 Difference]: With dead ends: 2872 [2021-10-11 00:29:08,958 INFO L226 Difference]: Without dead ends: 2094 [2021-10-11 00:29:08,960 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:29:08,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2094 states. [2021-10-11 00:29:09,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2094 to 1322. [2021-10-11 00:29:09,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1322 states. [2021-10-11 00:29:09,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1322 states to 1322 states and 1497 transitions. [2021-10-11 00:29:09,173 INFO L78 Accepts]: Start accepts. Automaton has 1322 states and 1497 transitions. Word has length 118 [2021-10-11 00:29:09,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:09,175 INFO L481 AbstractCegarLoop]: Abstraction has 1322 states and 1497 transitions. [2021-10-11 00:29:09,175 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:29:09,175 INFO L276 IsEmpty]: Start isEmpty. Operand 1322 states and 1497 transitions. [2021-10-11 00:29:09,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2021-10-11 00:29:09,180 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:09,180 INFO L422 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:09,395 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2021-10-11 00:29:09,396 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:09,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:09,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1404970223, now seen corresponding path program 1 times [2021-10-11 00:29:09,396 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:09,396 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181501534] [2021-10-11 00:29:09,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:09,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-11 00:29:09,425 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-11 00:29:09,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-11 00:29:09,452 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-11 00:29:09,539 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-11 00:29:09,540 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2021-10-11 00:29:09,540 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-11 00:29:09,794 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.10 12:29:09 BoogieIcfgContainer [2021-10-11 00:29:09,794 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-11 00:29:09,795 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-11 00:29:09,796 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-11 00:29:09,796 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-11 00:29:09,796 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:28:55" (3/4) ... [2021-10-11 00:29:09,798 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-11 00:29:10,014 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e922557d-d890-4c65-b764-d11a6755dbfb/bin/uautomizer-Z5i5R5N3CC/witness.graphml [2021-10-11 00:29:10,014 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-11 00:29:10,016 INFO L168 Benchmark]: Toolchain (without parser) took 15885.12 ms. Allocated memory was 83.9 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 47.1 MB in the beginning and 976.6 MB in the end (delta: -929.6 MB). Peak memory consumption was 320.5 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:10,016 INFO L168 Benchmark]: CDTParser took 0.67 ms. Allocated memory is still 83.9 MB. Free memory was 63.4 MB in the beginning and 63.4 MB in the end (delta: 41.5 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-11 00:29:10,017 INFO L168 Benchmark]: CACSL2BoogieTranslator took 348.53 ms. Allocated memory was 83.9 MB in the beginning and 111.1 MB in the end (delta: 27.3 MB). Free memory was 46.8 MB in the beginning and 85.9 MB in the end (delta: -39.1 MB). Peak memory consumption was 12.5 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:10,018 INFO L168 Benchmark]: Boogie Procedure Inliner took 60.71 ms. Allocated memory is still 111.1 MB. Free memory was 85.5 MB in the beginning and 83.4 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:10,018 INFO L168 Benchmark]: Boogie Preprocessor took 42.65 ms. Allocated memory is still 111.1 MB. Free memory was 83.4 MB in the beginning and 81.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:10,019 INFO L168 Benchmark]: RCFGBuilder took 710.48 ms. Allocated memory is still 111.1 MB. Free memory was 81.3 MB in the beginning and 46.9 MB in the end (delta: 34.4 MB). Peak memory consumption was 35.7 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:10,019 INFO L168 Benchmark]: TraceAbstraction took 14495.30 ms. Allocated memory was 111.1 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 46.5 MB in the beginning and 1.0 GB in the end (delta: -958.4 MB). Peak memory consumption was 264.0 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:10,020 INFO L168 Benchmark]: Witness Printer took 218.76 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 976.6 MB in the end (delta: 28.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:10,022 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.67 ms. Allocated memory is still 83.9 MB. Free memory was 63.4 MB in the beginning and 63.4 MB in the end (delta: 41.5 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 348.53 ms. Allocated memory was 83.9 MB in the beginning and 111.1 MB in the end (delta: 27.3 MB). Free memory was 46.8 MB in the beginning and 85.9 MB in the end (delta: -39.1 MB). Peak memory consumption was 12.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 60.71 ms. Allocated memory is still 111.1 MB. Free memory was 85.5 MB in the beginning and 83.4 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 42.65 ms. Allocated memory is still 111.1 MB. Free memory was 83.4 MB in the beginning and 81.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 710.48 ms. Allocated memory is still 111.1 MB. Free memory was 81.3 MB in the beginning and 46.9 MB in the end (delta: 34.4 MB). Peak memory consumption was 35.7 MB. Max. memory is 16.1 GB. * TraceAbstraction took 14495.30 ms. Allocated memory was 111.1 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 46.5 MB in the beginning and 1.0 GB in the end (delta: -958.4 MB). Peak memory consumption was 264.0 MB. Max. memory is 16.1 GB. * Witness Printer took 218.76 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 976.6 MB in the end (delta: 28.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int max_loop ; [L18] int num ; [L19] int i ; [L20] int e ; [L21] int timer ; [L22] char data_0 ; [L23] char data_1 ; [L66] int P_1_pc; [L67] int P_1_st ; [L68] int P_1_i ; [L69] int P_1_ev ; [L124] int C_1_pc ; [L125] int C_1_st ; [L126] int C_1_i ; [L127] int C_1_ev ; [L128] int C_1_pr ; VAL [C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L492] int count ; [L493] int __retres2 ; [L497] num = 0 [L498] i = 0 [L499] max_loop = 2 [L501] timer = 0 [L502] P_1_pc = 0 [L503] C_1_pc = 0 [L505] count = 0 [L485] P_1_i = 1 [L486] C_1_i = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L423] int kernel_st ; [L424] int tmp ; [L425] int tmp___0 ; [L429] kernel_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L228] COND TRUE (int )P_1_i == 1 [L229] P_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L233] COND TRUE (int )C_1_i == 1 [L234] C_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L109] COND FALSE !((int )P_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L119] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L121] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L188] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L191] COND FALSE !((int )C_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L211] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L213] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L437] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L296] COND TRUE (int )C_1_st == 0 [L298] tmp___1 = __VERIFIER_nondet_int() [L300] COND TRUE \read(tmp___1) [L302] C_1_st = 1 [L130] char c ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L133] COND TRUE (int )C_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L148] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L150] COND TRUE num == 0 [L151] timer = 1 [L152] i += 1 [L153] C_1_pc = 1 [L154] C_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L74] COND TRUE (int )P_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L51] COND TRUE i___0 == 0 [L52] data_0 = c VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L89] num += 1 [L90] P_1_pc = 1 [L91] P_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L296] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L444] kernel_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L448] kernel_st = 3 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L188] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L213] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L454] tmp = exists_runnable_thread() [L456] COND TRUE tmp == 0 [L458] kernel_st = 4 [L338] C_1_ev = 1 [L340] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND TRUE (int )P_1_ev == 1 [L111] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND TRUE \read(tmp) [L376] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L188] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L213] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L352] COND TRUE (int )P_1_ev == 1 [L353] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L357] COND TRUE (int )C_1_ev == 1 [L358] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L404] int tmp ; [L405] int __retres2 ; [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L409] tmp = exists_runnable_thread() [L411] COND TRUE \read(tmp) [L412] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L419] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L467] tmp___0 = stop_simulation() [L469] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L437] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L74] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L77] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L51] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L54] COND TRUE i___0 == 1 [L55] data_1 = c VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L89] num += 1 [L90] P_1_pc = 1 [L91] P_1_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L296] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L444] kernel_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L448] kernel_st = 3 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L188] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L213] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L454] tmp = exists_runnable_thread() [L456] COND TRUE tmp == 0 [L458] kernel_st = 4 [L338] C_1_ev = 1 [L340] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND TRUE (int )P_1_ev == 1 [L111] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND TRUE \read(tmp) [L376] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L188] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L213] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L352] COND TRUE (int )P_1_ev == 1 [L353] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L357] COND TRUE (int )C_1_ev == 1 [L358] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L404] int tmp ; [L405] int __retres2 ; [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L409] tmp = exists_runnable_thread() [L411] COND TRUE \read(tmp) [L412] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L419] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L467] tmp___0 = stop_simulation() [L469] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L437] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L74] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L77] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L51] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L54] COND FALSE !(i___0 == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L11] reach_error() VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 117 locations, 3 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 14.1s, OverallIterations: 25, TraceHistogramMax: 6, AutomataDifference: 6.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 4726 SDtfs, 6233 SDslu, 6768 SDs, 0 SdLazy, 720 SolverSat, 180 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 253 GetRequests, 174 SyntacticMatches, 3 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5850occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.3s AutomataMinimizationTime, 24 MinimizatonAttempts, 7565 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 2034 NumberOfCodeBlocks, 2034 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1819 ConstructedInterpolants, 0 QuantifiedInterpolants, 406730 SizeOfPredicates, 3 NumberOfNonLiveVariables, 373 ConjunctsInSsa, 9 ConjunctsInUnsatCore, 25 InterpolantComputations, 23 PerfectInterpolantSequences, 404/474 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...