./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/toy1.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 7b2dab56 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/toy1.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f4cd6a09c2ca92f0964bf6dcd7808d358e7e20e1 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.0-7b2dab5 [2021-10-11 00:32:07,081 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-11 00:32:07,083 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-11 00:32:07,116 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-11 00:32:07,116 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-11 00:32:07,118 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-11 00:32:07,120 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-11 00:32:07,122 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-11 00:32:07,125 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-11 00:32:07,126 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-11 00:32:07,127 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-11 00:32:07,129 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-11 00:32:07,129 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-11 00:32:07,131 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-11 00:32:07,132 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-11 00:32:07,133 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-11 00:32:07,135 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-11 00:32:07,136 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-11 00:32:07,138 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-11 00:32:07,140 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-11 00:32:07,142 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-11 00:32:07,144 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-11 00:32:07,145 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-11 00:32:07,146 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-11 00:32:07,150 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-11 00:32:07,150 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-11 00:32:07,151 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-11 00:32:07,152 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-11 00:32:07,153 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-11 00:32:07,154 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-11 00:32:07,155 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-11 00:32:07,156 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-11 00:32:07,157 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-11 00:32:07,158 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-11 00:32:07,159 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-11 00:32:07,159 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-11 00:32:07,160 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-11 00:32:07,161 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-11 00:32:07,161 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-11 00:32:07,162 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-11 00:32:07,163 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-11 00:32:07,165 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-11 00:32:07,189 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-11 00:32:07,189 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-11 00:32:07,191 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-11 00:32:07,191 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-11 00:32:07,192 INFO L138 SettingsManager]: * Use SBE=true [2021-10-11 00:32:07,192 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-11 00:32:07,192 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-11 00:32:07,193 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-11 00:32:07,193 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-11 00:32:07,194 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-11 00:32:07,194 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-11 00:32:07,194 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-11 00:32:07,195 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-11 00:32:07,195 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-11 00:32:07,195 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-11 00:32:07,196 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-11 00:32:07,196 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-11 00:32:07,197 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-11 00:32:07,197 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-11 00:32:07,197 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-11 00:32:07,198 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-11 00:32:07,198 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-11 00:32:07,198 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-11 00:32:07,205 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-11 00:32:07,206 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-11 00:32:07,206 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-11 00:32:07,207 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-11 00:32:07,207 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-11 00:32:07,207 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f4cd6a09c2ca92f0964bf6dcd7808d358e7e20e1 [2021-10-11 00:32:07,472 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-11 00:32:07,505 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-11 00:32:07,507 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-11 00:32:07,509 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-11 00:32:07,510 INFO L275 PluginConnector]: CDTParser initialized [2021-10-11 00:32:07,511 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/../../sv-benchmarks/c/systemc/toy1.cil.c [2021-10-11 00:32:07,574 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/data/41a6103ee/5c81aecf30ec42069af61d0a41fbdaca/FLAGe50cb7dfc [2021-10-11 00:32:08,110 INFO L306 CDTParser]: Found 1 translation units. [2021-10-11 00:32:08,110 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/sv-benchmarks/c/systemc/toy1.cil.c [2021-10-11 00:32:08,133 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/data/41a6103ee/5c81aecf30ec42069af61d0a41fbdaca/FLAGe50cb7dfc [2021-10-11 00:32:08,426 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/data/41a6103ee/5c81aecf30ec42069af61d0a41fbdaca [2021-10-11 00:32:08,428 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-11 00:32:08,431 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-11 00:32:08,432 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-11 00:32:08,433 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-11 00:32:08,436 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-11 00:32:08,437 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:08,439 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1058e32c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08, skipping insertion in model container [2021-10-11 00:32:08,439 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:08,447 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-11 00:32:08,515 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-11 00:32:08,698 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/sv-benchmarks/c/systemc/toy1.cil.c[393,406] [2021-10-11 00:32:08,821 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-11 00:32:08,840 INFO L203 MainTranslator]: Completed pre-run [2021-10-11 00:32:08,861 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/sv-benchmarks/c/systemc/toy1.cil.c[393,406] [2021-10-11 00:32:08,925 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-11 00:32:08,958 INFO L208 MainTranslator]: Completed translation [2021-10-11 00:32:08,960 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08 WrapperNode [2021-10-11 00:32:08,960 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-11 00:32:08,961 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-11 00:32:08,962 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-11 00:32:08,964 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-11 00:32:08,972 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:08,992 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,037 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-11 00:32:09,043 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-11 00:32:09,044 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-11 00:32:09,045 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-11 00:32:09,053 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,054 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,068 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,072 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,079 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,099 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,108 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... [2021-10-11 00:32:09,111 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-11 00:32:09,112 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-11 00:32:09,113 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-11 00:32:09,120 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-11 00:32:09,121 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (1/1) ... No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-11 00:32:09,195 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-11 00:32:09,195 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-11 00:32:09,195 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-11 00:32:09,195 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-11 00:32:10,119 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-11 00:32:10,119 INFO L299 CfgBuilder]: Removed 28 assume(true) statements. [2021-10-11 00:32:10,121 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:32:10 BoogieIcfgContainer [2021-10-11 00:32:10,122 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-11 00:32:10,123 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-11 00:32:10,124 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-11 00:32:10,127 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-11 00:32:10,128 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.10 12:32:08" (1/3) ... [2021-10-11 00:32:10,129 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@37078456 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.10 12:32:10, skipping insertion in model container [2021-10-11 00:32:10,129 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:32:08" (2/3) ... [2021-10-11 00:32:10,129 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@37078456 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.10 12:32:10, skipping insertion in model container [2021-10-11 00:32:10,130 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:32:10" (3/3) ... [2021-10-11 00:32:10,131 INFO L111 eAbstractionObserver]: Analyzing ICFG toy1.cil.c [2021-10-11 00:32:10,146 INFO L180 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-11 00:32:10,149 INFO L192 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2021-10-11 00:32:10,160 INFO L253 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2021-10-11 00:32:10,186 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-10-11 00:32:10,187 INFO L378 AbstractCegarLoop]: Hoare is true [2021-10-11 00:32:10,187 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-10-11 00:32:10,187 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-11 00:32:10,187 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-11 00:32:10,188 INFO L382 AbstractCegarLoop]: Difference is false [2021-10-11 00:32:10,188 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-11 00:32:10,188 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-10-11 00:32:10,206 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states. [2021-10-11 00:32:10,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:10,214 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:10,215 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:10,216 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:10,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:10,222 INFO L82 PathProgramCache]: Analyzing trace with hash -895778166, now seen corresponding path program 1 times [2021-10-11 00:32:10,230 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:10,231 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272569800] [2021-10-11 00:32:10,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:10,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:10,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:10,426 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272569800] [2021-10-11 00:32:10,426 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:10,427 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:10,428 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [668310277] [2021-10-11 00:32:10,432 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:10,432 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:10,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:10,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:10,448 INFO L87 Difference]: Start difference. First operand 129 states. Second operand 3 states. [2021-10-11 00:32:10,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:10,517 INFO L93 Difference]: Finished difference Result 250 states and 461 transitions. [2021-10-11 00:32:10,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:10,520 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2021-10-11 00:32:10,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:10,544 INFO L225 Difference]: With dead ends: 250 [2021-10-11 00:32:10,546 INFO L226 Difference]: Without dead ends: 125 [2021-10-11 00:32:10,551 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:10,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2021-10-11 00:32:10,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2021-10-11 00:32:10,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2021-10-11 00:32:10,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 218 transitions. [2021-10-11 00:32:10,622 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 218 transitions. Word has length 36 [2021-10-11 00:32:10,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:10,624 INFO L481 AbstractCegarLoop]: Abstraction has 125 states and 218 transitions. [2021-10-11 00:32:10,625 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:10,625 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 218 transitions. [2021-10-11 00:32:10,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:10,630 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:10,630 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:10,630 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-11 00:32:10,631 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:10,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:10,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1597378040, now seen corresponding path program 1 times [2021-10-11 00:32:10,635 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:10,635 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162378033] [2021-10-11 00:32:10,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:10,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:10,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:10,774 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162378033] [2021-10-11 00:32:10,775 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:10,775 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:10,775 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222336503] [2021-10-11 00:32:10,776 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:10,778 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:10,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:10,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:10,780 INFO L87 Difference]: Start difference. First operand 125 states and 218 transitions. Second operand 4 states. [2021-10-11 00:32:10,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:10,914 INFO L93 Difference]: Finished difference Result 337 states and 586 transitions. [2021-10-11 00:32:10,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-11 00:32:10,916 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:10,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:10,918 INFO L225 Difference]: With dead ends: 337 [2021-10-11 00:32:10,919 INFO L226 Difference]: Without dead ends: 215 [2021-10-11 00:32:10,920 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:10,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2021-10-11 00:32:10,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 210. [2021-10-11 00:32:10,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2021-10-11 00:32:10,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 366 transitions. [2021-10-11 00:32:10,941 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 366 transitions. Word has length 36 [2021-10-11 00:32:10,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:10,942 INFO L481 AbstractCegarLoop]: Abstraction has 210 states and 366 transitions. [2021-10-11 00:32:10,942 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:10,942 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 366 transitions. [2021-10-11 00:32:10,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:10,944 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:10,944 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:10,944 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-11 00:32:10,945 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:10,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:10,945 INFO L82 PathProgramCache]: Analyzing trace with hash -211174646, now seen corresponding path program 1 times [2021-10-11 00:32:10,946 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:10,946 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688849512] [2021-10-11 00:32:10,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:10,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:11,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:11,033 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [688849512] [2021-10-11 00:32:11,034 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:11,034 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:11,034 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281471189] [2021-10-11 00:32:11,035 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:11,035 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:11,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:11,039 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:11,042 INFO L87 Difference]: Start difference. First operand 210 states and 366 transitions. Second operand 3 states. [2021-10-11 00:32:11,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:11,160 INFO L93 Difference]: Finished difference Result 411 states and 719 transitions. [2021-10-11 00:32:11,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:11,161 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2021-10-11 00:32:11,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:11,163 INFO L225 Difference]: With dead ends: 411 [2021-10-11 00:32:11,164 INFO L226 Difference]: Without dead ends: 210 [2021-10-11 00:32:11,165 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:11,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2021-10-11 00:32:11,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 210. [2021-10-11 00:32:11,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2021-10-11 00:32:11,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 354 transitions. [2021-10-11 00:32:11,183 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 354 transitions. Word has length 36 [2021-10-11 00:32:11,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:11,183 INFO L481 AbstractCegarLoop]: Abstraction has 210 states and 354 transitions. [2021-10-11 00:32:11,184 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:11,184 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 354 transitions. [2021-10-11 00:32:11,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:11,185 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:11,186 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:11,186 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-11 00:32:11,186 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:11,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:11,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1741716090, now seen corresponding path program 1 times [2021-10-11 00:32:11,187 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:11,187 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614014212] [2021-10-11 00:32:11,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:11,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:11,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:11,235 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [614014212] [2021-10-11 00:32:11,235 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:11,236 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:11,236 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767585591] [2021-10-11 00:32:11,236 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:11,237 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:11,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:11,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:11,238 INFO L87 Difference]: Start difference. First operand 210 states and 354 transitions. Second operand 4 states. [2021-10-11 00:32:11,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:11,378 INFO L93 Difference]: Finished difference Result 571 states and 965 transitions. [2021-10-11 00:32:11,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:11,379 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:11,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:11,382 INFO L225 Difference]: With dead ends: 571 [2021-10-11 00:32:11,382 INFO L226 Difference]: Without dead ends: 371 [2021-10-11 00:32:11,384 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:11,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2021-10-11 00:32:11,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 210. [2021-10-11 00:32:11,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2021-10-11 00:32:11,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 351 transitions. [2021-10-11 00:32:11,411 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 351 transitions. Word has length 36 [2021-10-11 00:32:11,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:11,411 INFO L481 AbstractCegarLoop]: Abstraction has 210 states and 351 transitions. [2021-10-11 00:32:11,411 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:11,412 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 351 transitions. [2021-10-11 00:32:11,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:11,413 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:11,413 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:11,413 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-11 00:32:11,414 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:11,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:11,414 INFO L82 PathProgramCache]: Analyzing trace with hash 181511944, now seen corresponding path program 1 times [2021-10-11 00:32:11,414 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:11,415 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22382642] [2021-10-11 00:32:11,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:11,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:11,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:11,486 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22382642] [2021-10-11 00:32:11,487 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:11,487 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:11,488 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746714437] [2021-10-11 00:32:11,488 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:11,489 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:11,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:11,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:11,492 INFO L87 Difference]: Start difference. First operand 210 states and 351 transitions. Second operand 4 states. [2021-10-11 00:32:11,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:11,627 INFO L93 Difference]: Finished difference Result 574 states and 961 transitions. [2021-10-11 00:32:11,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:11,628 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:11,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:11,630 INFO L225 Difference]: With dead ends: 574 [2021-10-11 00:32:11,631 INFO L226 Difference]: Without dead ends: 375 [2021-10-11 00:32:11,631 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:11,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2021-10-11 00:32:11,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 210. [2021-10-11 00:32:11,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2021-10-11 00:32:11,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 348 transitions. [2021-10-11 00:32:11,648 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 348 transitions. Word has length 36 [2021-10-11 00:32:11,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:11,649 INFO L481 AbstractCegarLoop]: Abstraction has 210 states and 348 transitions. [2021-10-11 00:32:11,649 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:11,649 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 348 transitions. [2021-10-11 00:32:11,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:11,650 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:11,650 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:11,651 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-11 00:32:11,651 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:11,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:11,651 INFO L82 PathProgramCache]: Analyzing trace with hash 243551558, now seen corresponding path program 1 times [2021-10-11 00:32:11,652 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:11,652 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1890674981] [2021-10-11 00:32:11,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:11,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:11,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:11,694 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1890674981] [2021-10-11 00:32:11,694 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:11,694 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:11,695 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787856288] [2021-10-11 00:32:11,695 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:11,695 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:11,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:11,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:11,696 INFO L87 Difference]: Start difference. First operand 210 states and 348 transitions. Second operand 4 states. [2021-10-11 00:32:11,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:11,812 INFO L93 Difference]: Finished difference Result 586 states and 972 transitions. [2021-10-11 00:32:11,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:11,813 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:11,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:11,815 INFO L225 Difference]: With dead ends: 586 [2021-10-11 00:32:11,816 INFO L226 Difference]: Without dead ends: 388 [2021-10-11 00:32:11,816 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:11,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states. [2021-10-11 00:32:11,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 216. [2021-10-11 00:32:11,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2021-10-11 00:32:11,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 352 transitions. [2021-10-11 00:32:11,832 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 352 transitions. Word has length 36 [2021-10-11 00:32:11,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:11,832 INFO L481 AbstractCegarLoop]: Abstraction has 216 states and 352 transitions. [2021-10-11 00:32:11,832 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:11,833 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 352 transitions. [2021-10-11 00:32:11,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:11,834 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:11,834 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:11,834 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-11 00:32:11,834 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:11,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:11,835 INFO L82 PathProgramCache]: Analyzing trace with hash 384100168, now seen corresponding path program 1 times [2021-10-11 00:32:11,835 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:11,836 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648837744] [2021-10-11 00:32:11,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:11,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:11,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:11,874 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648837744] [2021-10-11 00:32:11,875 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:11,875 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:11,875 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1589232460] [2021-10-11 00:32:11,875 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:11,876 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:11,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:11,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:11,877 INFO L87 Difference]: Start difference. First operand 216 states and 352 transitions. Second operand 4 states. [2021-10-11 00:32:12,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:12,019 INFO L93 Difference]: Finished difference Result 737 states and 1201 transitions. [2021-10-11 00:32:12,019 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:12,020 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:12,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:12,023 INFO L225 Difference]: With dead ends: 737 [2021-10-11 00:32:12,024 INFO L226 Difference]: Without dead ends: 534 [2021-10-11 00:32:12,025 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:12,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 534 states. [2021-10-11 00:32:12,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 534 to 351. [2021-10-11 00:32:12,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2021-10-11 00:32:12,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 571 transitions. [2021-10-11 00:32:12,050 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 571 transitions. Word has length 36 [2021-10-11 00:32:12,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:12,051 INFO L481 AbstractCegarLoop]: Abstraction has 351 states and 571 transitions. [2021-10-11 00:32:12,051 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:12,051 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 571 transitions. [2021-10-11 00:32:12,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:12,052 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:12,052 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:12,053 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-11 00:32:12,053 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:12,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:12,054 INFO L82 PathProgramCache]: Analyzing trace with hash 250086662, now seen corresponding path program 1 times [2021-10-11 00:32:12,054 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:12,054 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [710762955] [2021-10-11 00:32:12,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:12,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:12,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:12,089 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [710762955] [2021-10-11 00:32:12,089 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:12,089 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:12,090 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584168580] [2021-10-11 00:32:12,090 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:12,090 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:12,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:12,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:12,091 INFO L87 Difference]: Start difference. First operand 351 states and 571 transitions. Second operand 3 states. [2021-10-11 00:32:12,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:12,152 INFO L93 Difference]: Finished difference Result 838 states and 1368 transitions. [2021-10-11 00:32:12,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:12,153 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2021-10-11 00:32:12,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:12,157 INFO L225 Difference]: With dead ends: 838 [2021-10-11 00:32:12,157 INFO L226 Difference]: Without dead ends: 511 [2021-10-11 00:32:12,158 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:12,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 511 states. [2021-10-11 00:32:12,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 511 to 507. [2021-10-11 00:32:12,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 507 states. [2021-10-11 00:32:12,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 825 transitions. [2021-10-11 00:32:12,190 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 825 transitions. Word has length 36 [2021-10-11 00:32:12,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:12,191 INFO L481 AbstractCegarLoop]: Abstraction has 507 states and 825 transitions. [2021-10-11 00:32:12,191 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:12,191 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 825 transitions. [2021-10-11 00:32:12,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:12,192 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:12,192 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:12,192 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-11 00:32:12,192 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:12,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:12,193 INFO L82 PathProgramCache]: Analyzing trace with hash 1539792002, now seen corresponding path program 1 times [2021-10-11 00:32:12,193 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:12,194 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359910544] [2021-10-11 00:32:12,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:12,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:12,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:12,247 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359910544] [2021-10-11 00:32:12,248 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:12,248 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:12,248 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [819759331] [2021-10-11 00:32:12,249 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:12,249 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:12,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:12,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:12,250 INFO L87 Difference]: Start difference. First operand 507 states and 825 transitions. Second operand 4 states. [2021-10-11 00:32:12,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:12,372 INFO L93 Difference]: Finished difference Result 1293 states and 2104 transitions. [2021-10-11 00:32:12,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-11 00:32:12,373 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:12,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:12,378 INFO L225 Difference]: With dead ends: 1293 [2021-10-11 00:32:12,379 INFO L226 Difference]: Without dead ends: 803 [2021-10-11 00:32:12,380 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:12,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 803 states. [2021-10-11 00:32:12,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 803 to 507. [2021-10-11 00:32:12,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 507 states. [2021-10-11 00:32:12,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 817 transitions. [2021-10-11 00:32:12,414 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 817 transitions. Word has length 36 [2021-10-11 00:32:12,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:12,414 INFO L481 AbstractCegarLoop]: Abstraction has 507 states and 817 transitions. [2021-10-11 00:32:12,415 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:12,415 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 817 transitions. [2021-10-11 00:32:12,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:12,415 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:12,416 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:12,416 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-11 00:32:12,416 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:12,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:12,417 INFO L82 PathProgramCache]: Analyzing trace with hash -48555900, now seen corresponding path program 1 times [2021-10-11 00:32:12,417 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:12,417 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245276269] [2021-10-11 00:32:12,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:12,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:12,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:12,460 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1245276269] [2021-10-11 00:32:12,460 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:12,460 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:12,460 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1847492412] [2021-10-11 00:32:12,461 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:12,461 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:12,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:12,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:12,462 INFO L87 Difference]: Start difference. First operand 507 states and 817 transitions. Second operand 4 states. [2021-10-11 00:32:12,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:12,633 INFO L93 Difference]: Finished difference Result 1289 states and 2077 transitions. [2021-10-11 00:32:12,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-11 00:32:12,634 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:12,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:12,639 INFO L225 Difference]: With dead ends: 1289 [2021-10-11 00:32:12,640 INFO L226 Difference]: Without dead ends: 805 [2021-10-11 00:32:12,642 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:12,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 805 states. [2021-10-11 00:32:12,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 805 to 507. [2021-10-11 00:32:12,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 507 states. [2021-10-11 00:32:12,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 809 transitions. [2021-10-11 00:32:12,707 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 809 transitions. Word has length 36 [2021-10-11 00:32:12,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:12,707 INFO L481 AbstractCegarLoop]: Abstraction has 507 states and 809 transitions. [2021-10-11 00:32:12,707 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:12,707 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 809 transitions. [2021-10-11 00:32:12,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:12,709 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:12,709 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:12,711 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-11 00:32:12,711 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:12,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:12,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1328419578, now seen corresponding path program 1 times [2021-10-11 00:32:12,712 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:12,712 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432715375] [2021-10-11 00:32:12,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:12,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:12,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:12,795 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432715375] [2021-10-11 00:32:12,796 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:12,796 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:12,796 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666571118] [2021-10-11 00:32:12,797 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:12,797 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:12,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:12,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:12,798 INFO L87 Difference]: Start difference. First operand 507 states and 809 transitions. Second operand 4 states. [2021-10-11 00:32:12,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:12,946 INFO L93 Difference]: Finished difference Result 1226 states and 1951 transitions. [2021-10-11 00:32:12,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-11 00:32:12,947 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2021-10-11 00:32:12,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:12,951 INFO L225 Difference]: With dead ends: 1226 [2021-10-11 00:32:12,952 INFO L226 Difference]: Without dead ends: 736 [2021-10-11 00:32:12,953 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:12,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 736 states. [2021-10-11 00:32:12,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 736 to 555. [2021-10-11 00:32:12,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 555 states. [2021-10-11 00:32:12,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 866 transitions. [2021-10-11 00:32:12,992 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 866 transitions. Word has length 36 [2021-10-11 00:32:12,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:12,992 INFO L481 AbstractCegarLoop]: Abstraction has 555 states and 866 transitions. [2021-10-11 00:32:12,992 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:12,992 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 866 transitions. [2021-10-11 00:32:12,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-11 00:32:12,993 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:12,993 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:12,994 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-11 00:32:12,994 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:12,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:12,994 INFO L82 PathProgramCache]: Analyzing trace with hash -1915225592, now seen corresponding path program 1 times [2021-10-11 00:32:12,994 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:12,995 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618261544] [2021-10-11 00:32:12,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:13,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:13,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:13,036 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618261544] [2021-10-11 00:32:13,037 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:13,037 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:13,037 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728599283] [2021-10-11 00:32:13,037 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:13,038 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:13,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:13,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,039 INFO L87 Difference]: Start difference. First operand 555 states and 866 transitions. Second operand 3 states. [2021-10-11 00:32:13,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:13,157 INFO L93 Difference]: Finished difference Result 1316 states and 2058 transitions. [2021-10-11 00:32:13,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:13,157 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2021-10-11 00:32:13,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:13,164 INFO L225 Difference]: With dead ends: 1316 [2021-10-11 00:32:13,164 INFO L226 Difference]: Without dead ends: 775 [2021-10-11 00:32:13,165 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 775 states. [2021-10-11 00:32:13,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 775 to 772. [2021-10-11 00:32:13,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 772 states. [2021-10-11 00:32:13,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 772 states to 772 states and 1190 transitions. [2021-10-11 00:32:13,219 INFO L78 Accepts]: Start accepts. Automaton has 772 states and 1190 transitions. Word has length 36 [2021-10-11 00:32:13,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:13,220 INFO L481 AbstractCegarLoop]: Abstraction has 772 states and 1190 transitions. [2021-10-11 00:32:13,220 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:13,220 INFO L276 IsEmpty]: Start isEmpty. Operand 772 states and 1190 transitions. [2021-10-11 00:32:13,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-10-11 00:32:13,221 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:13,221 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:13,221 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-11 00:32:13,221 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:13,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:13,222 INFO L82 PathProgramCache]: Analyzing trace with hash -547155332, now seen corresponding path program 1 times [2021-10-11 00:32:13,222 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:13,222 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523785773] [2021-10-11 00:32:13,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:13,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:13,268 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:13,268 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1523785773] [2021-10-11 00:32:13,268 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:13,268 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:13,269 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2135067338] [2021-10-11 00:32:13,269 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:13,269 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:13,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:13,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,270 INFO L87 Difference]: Start difference. First operand 772 states and 1190 transitions. Second operand 3 states. [2021-10-11 00:32:13,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:13,380 INFO L93 Difference]: Finished difference Result 1906 states and 2978 transitions. [2021-10-11 00:32:13,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:13,381 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2021-10-11 00:32:13,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:13,388 INFO L225 Difference]: With dead ends: 1906 [2021-10-11 00:32:13,388 INFO L226 Difference]: Without dead ends: 1161 [2021-10-11 00:32:13,391 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1161 states. [2021-10-11 00:32:13,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1161 to 1157. [2021-10-11 00:32:13,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1157 states. [2021-10-11 00:32:13,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1157 states to 1157 states and 1801 transitions. [2021-10-11 00:32:13,488 INFO L78 Accepts]: Start accepts. Automaton has 1157 states and 1801 transitions. Word has length 46 [2021-10-11 00:32:13,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:13,490 INFO L481 AbstractCegarLoop]: Abstraction has 1157 states and 1801 transitions. [2021-10-11 00:32:13,490 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:13,490 INFO L276 IsEmpty]: Start isEmpty. Operand 1157 states and 1801 transitions. [2021-10-11 00:32:13,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-10-11 00:32:13,491 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:13,491 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:13,492 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-11 00:32:13,492 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:13,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:13,492 INFO L82 PathProgramCache]: Analyzing trace with hash -299008838, now seen corresponding path program 1 times [2021-10-11 00:32:13,496 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:13,496 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650336030] [2021-10-11 00:32:13,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:13,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:13,526 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2021-10-11 00:32:13,527 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650336030] [2021-10-11 00:32:13,527 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:13,527 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:13,527 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2099583767] [2021-10-11 00:32:13,529 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:13,529 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:13,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:13,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,530 INFO L87 Difference]: Start difference. First operand 1157 states and 1801 transitions. Second operand 3 states. [2021-10-11 00:32:13,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:13,617 INFO L93 Difference]: Finished difference Result 2265 states and 3543 transitions. [2021-10-11 00:32:13,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:13,618 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2021-10-11 00:32:13,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:13,624 INFO L225 Difference]: With dead ends: 2265 [2021-10-11 00:32:13,624 INFO L226 Difference]: Without dead ends: 1135 [2021-10-11 00:32:13,627 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1135 states. [2021-10-11 00:32:13,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1135 to 1135. [2021-10-11 00:32:13,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1135 states. [2021-10-11 00:32:13,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1135 states to 1135 states and 1774 transitions. [2021-10-11 00:32:13,741 INFO L78 Accepts]: Start accepts. Automaton has 1135 states and 1774 transitions. Word has length 46 [2021-10-11 00:32:13,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:13,741 INFO L481 AbstractCegarLoop]: Abstraction has 1135 states and 1774 transitions. [2021-10-11 00:32:13,741 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:13,741 INFO L276 IsEmpty]: Start isEmpty. Operand 1135 states and 1774 transitions. [2021-10-11 00:32:13,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2021-10-11 00:32:13,742 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:13,743 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:13,743 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-11 00:32:13,743 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:13,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:13,744 INFO L82 PathProgramCache]: Analyzing trace with hash -336670593, now seen corresponding path program 1 times [2021-10-11 00:32:13,744 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:13,745 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051087595] [2021-10-11 00:32:13,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:13,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:13,794 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:13,794 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1051087595] [2021-10-11 00:32:13,795 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:13,795 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:13,795 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [689073558] [2021-10-11 00:32:13,795 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:13,796 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:13,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:13,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,796 INFO L87 Difference]: Start difference. First operand 1135 states and 1774 transitions. Second operand 3 states. [2021-10-11 00:32:13,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:13,963 INFO L93 Difference]: Finished difference Result 2891 states and 4579 transitions. [2021-10-11 00:32:13,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:13,964 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2021-10-11 00:32:13,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:13,976 INFO L225 Difference]: With dead ends: 2891 [2021-10-11 00:32:13,976 INFO L226 Difference]: Without dead ends: 1783 [2021-10-11 00:32:13,980 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:13,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1783 states. [2021-10-11 00:32:14,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1783 to 1779. [2021-10-11 00:32:14,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1779 states. [2021-10-11 00:32:14,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1779 states to 1779 states and 2808 transitions. [2021-10-11 00:32:14,167 INFO L78 Accepts]: Start accepts. Automaton has 1779 states and 2808 transitions. Word has length 47 [2021-10-11 00:32:14,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:14,167 INFO L481 AbstractCegarLoop]: Abstraction has 1779 states and 2808 transitions. [2021-10-11 00:32:14,168 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:14,168 INFO L276 IsEmpty]: Start isEmpty. Operand 1779 states and 2808 transitions. [2021-10-11 00:32:14,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-11 00:32:14,169 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:14,169 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:14,169 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-11 00:32:14,169 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:14,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:14,170 INFO L82 PathProgramCache]: Analyzing trace with hash 1825522215, now seen corresponding path program 1 times [2021-10-11 00:32:14,170 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:14,170 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904374845] [2021-10-11 00:32:14,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:14,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:14,199 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:14,199 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904374845] [2021-10-11 00:32:14,200 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:14,200 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:14,200 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572440577] [2021-10-11 00:32:14,200 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:14,200 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:14,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:14,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:14,201 INFO L87 Difference]: Start difference. First operand 1779 states and 2808 transitions. Second operand 3 states. [2021-10-11 00:32:14,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:14,531 INFO L93 Difference]: Finished difference Result 4794 states and 7664 transitions. [2021-10-11 00:32:14,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:14,532 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2021-10-11 00:32:14,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:14,550 INFO L225 Difference]: With dead ends: 4794 [2021-10-11 00:32:14,550 INFO L226 Difference]: Without dead ends: 3044 [2021-10-11 00:32:14,553 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:14,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3044 states. [2021-10-11 00:32:14,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3044 to 3040. [2021-10-11 00:32:14,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3040 states. [2021-10-11 00:32:14,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3040 states to 3040 states and 4843 transitions. [2021-10-11 00:32:14,827 INFO L78 Accepts]: Start accepts. Automaton has 3040 states and 4843 transitions. Word has length 48 [2021-10-11 00:32:14,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:14,827 INFO L481 AbstractCegarLoop]: Abstraction has 3040 states and 4843 transitions. [2021-10-11 00:32:14,827 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:14,828 INFO L276 IsEmpty]: Start isEmpty. Operand 3040 states and 4843 transitions. [2021-10-11 00:32:14,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-11 00:32:14,830 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:14,830 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:14,830 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-11 00:32:14,830 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:14,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:14,831 INFO L82 PathProgramCache]: Analyzing trace with hash 2073668709, now seen corresponding path program 1 times [2021-10-11 00:32:14,831 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:14,831 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193199698] [2021-10-11 00:32:14,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:14,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:14,870 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2021-10-11 00:32:14,870 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193199698] [2021-10-11 00:32:14,870 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:14,870 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:14,870 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882851385] [2021-10-11 00:32:14,871 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:14,872 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:14,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:14,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:14,873 INFO L87 Difference]: Start difference. First operand 3040 states and 4843 transitions. Second operand 3 states. [2021-10-11 00:32:15,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:15,134 INFO L93 Difference]: Finished difference Result 6029 states and 9627 transitions. [2021-10-11 00:32:15,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:15,135 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2021-10-11 00:32:15,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:15,152 INFO L225 Difference]: With dead ends: 6029 [2021-10-11 00:32:15,152 INFO L226 Difference]: Without dead ends: 3018 [2021-10-11 00:32:15,157 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:15,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3018 states. [2021-10-11 00:32:15,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3018 to 3018. [2021-10-11 00:32:15,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3018 states. [2021-10-11 00:32:15,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3018 states to 3018 states and 4817 transitions. [2021-10-11 00:32:15,418 INFO L78 Accepts]: Start accepts. Automaton has 3018 states and 4817 transitions. Word has length 48 [2021-10-11 00:32:15,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:15,418 INFO L481 AbstractCegarLoop]: Abstraction has 3018 states and 4817 transitions. [2021-10-11 00:32:15,418 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:15,418 INFO L276 IsEmpty]: Start isEmpty. Operand 3018 states and 4817 transitions. [2021-10-11 00:32:15,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-10-11 00:32:15,420 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:15,420 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:15,420 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-11 00:32:15,420 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:15,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:15,421 INFO L82 PathProgramCache]: Analyzing trace with hash 963117268, now seen corresponding path program 1 times [2021-10-11 00:32:15,421 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:15,421 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712418235] [2021-10-11 00:32:15,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:15,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:15,464 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:15,464 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712418235] [2021-10-11 00:32:15,464 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:15,465 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:15,469 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1844934111] [2021-10-11 00:32:15,471 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:15,471 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:15,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:15,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:15,472 INFO L87 Difference]: Start difference. First operand 3018 states and 4817 transitions. Second operand 4 states. [2021-10-11 00:32:15,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:15,962 INFO L93 Difference]: Finished difference Result 7617 states and 12199 transitions. [2021-10-11 00:32:15,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:15,963 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2021-10-11 00:32:15,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:15,987 INFO L225 Difference]: With dead ends: 7617 [2021-10-11 00:32:15,987 INFO L226 Difference]: Without dead ends: 3895 [2021-10-11 00:32:15,993 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:15,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3895 states. [2021-10-11 00:32:16,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3895 to 3895. [2021-10-11 00:32:16,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3895 states. [2021-10-11 00:32:16,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3895 states to 3895 states and 6183 transitions. [2021-10-11 00:32:16,316 INFO L78 Accepts]: Start accepts. Automaton has 3895 states and 6183 transitions. Word has length 49 [2021-10-11 00:32:16,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:16,316 INFO L481 AbstractCegarLoop]: Abstraction has 3895 states and 6183 transitions. [2021-10-11 00:32:16,316 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:16,316 INFO L276 IsEmpty]: Start isEmpty. Operand 3895 states and 6183 transitions. [2021-10-11 00:32:16,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-11 00:32:16,318 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:16,319 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:16,319 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-11 00:32:16,319 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:16,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:16,319 INFO L82 PathProgramCache]: Analyzing trace with hash -1671888881, now seen corresponding path program 1 times [2021-10-11 00:32:16,320 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:16,321 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247400027] [2021-10-11 00:32:16,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:16,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:16,387 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:16,387 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247400027] [2021-10-11 00:32:16,387 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:16,388 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:32:16,388 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630653190] [2021-10-11 00:32:16,389 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:32:16,389 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:16,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:32:16,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:16,390 INFO L87 Difference]: Start difference. First operand 3895 states and 6183 transitions. Second operand 5 states. [2021-10-11 00:32:17,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:17,045 INFO L93 Difference]: Finished difference Result 9940 states and 15662 transitions. [2021-10-11 00:32:17,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-11 00:32:17,046 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2021-10-11 00:32:17,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:17,095 INFO L225 Difference]: With dead ends: 9940 [2021-10-11 00:32:17,095 INFO L226 Difference]: Without dead ends: 6068 [2021-10-11 00:32:17,101 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:32:17,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6068 states. [2021-10-11 00:32:17,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6068 to 4554. [2021-10-11 00:32:17,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4554 states. [2021-10-11 00:32:17,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4554 states to 4554 states and 7072 transitions. [2021-10-11 00:32:17,539 INFO L78 Accepts]: Start accepts. Automaton has 4554 states and 7072 transitions. Word has length 54 [2021-10-11 00:32:17,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:17,540 INFO L481 AbstractCegarLoop]: Abstraction has 4554 states and 7072 transitions. [2021-10-11 00:32:17,540 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:32:17,540 INFO L276 IsEmpty]: Start isEmpty. Operand 4554 states and 7072 transitions. [2021-10-11 00:32:17,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-10-11 00:32:17,552 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:17,552 INFO L422 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:17,552 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-11 00:32:17,553 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:17,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:17,553 INFO L82 PathProgramCache]: Analyzing trace with hash -2128152978, now seen corresponding path program 1 times [2021-10-11 00:32:17,554 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:17,554 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63687942] [2021-10-11 00:32:17,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:17,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:17,609 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:17,609 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63687942] [2021-10-11 00:32:17,609 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:17,610 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:17,610 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980224981] [2021-10-11 00:32:17,610 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:17,611 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:17,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:17,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:17,611 INFO L87 Difference]: Start difference. First operand 4554 states and 7072 transitions. Second operand 3 states. [2021-10-11 00:32:18,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:18,101 INFO L93 Difference]: Finished difference Result 9431 states and 14610 transitions. [2021-10-11 00:32:18,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:18,102 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2021-10-11 00:32:18,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:18,116 INFO L225 Difference]: With dead ends: 9431 [2021-10-11 00:32:18,116 INFO L226 Difference]: Without dead ends: 4906 [2021-10-11 00:32:18,121 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:18,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4906 states. [2021-10-11 00:32:18,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4906 to 4874. [2021-10-11 00:32:18,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4874 states. [2021-10-11 00:32:18,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4874 states to 4874 states and 7321 transitions. [2021-10-11 00:32:18,491 INFO L78 Accepts]: Start accepts. Automaton has 4874 states and 7321 transitions. Word has length 86 [2021-10-11 00:32:18,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:18,491 INFO L481 AbstractCegarLoop]: Abstraction has 4874 states and 7321 transitions. [2021-10-11 00:32:18,491 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:18,491 INFO L276 IsEmpty]: Start isEmpty. Operand 4874 states and 7321 transitions. [2021-10-11 00:32:18,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2021-10-11 00:32:18,496 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:18,496 INFO L422 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:18,497 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-11 00:32:18,497 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:18,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:18,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1520792899, now seen corresponding path program 1 times [2021-10-11 00:32:18,498 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:18,498 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356232622] [2021-10-11 00:32:18,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:18,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:18,540 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:18,540 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356232622] [2021-10-11 00:32:18,540 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:18,540 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:18,540 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1622677737] [2021-10-11 00:32:18,541 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:18,541 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:18,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:18,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:18,542 INFO L87 Difference]: Start difference. First operand 4874 states and 7321 transitions. Second operand 3 states. [2021-10-11 00:32:19,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:19,013 INFO L93 Difference]: Finished difference Result 10229 states and 15320 transitions. [2021-10-11 00:32:19,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:19,013 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 87 [2021-10-11 00:32:19,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:19,025 INFO L225 Difference]: With dead ends: 10229 [2021-10-11 00:32:19,026 INFO L226 Difference]: Without dead ends: 5396 [2021-10-11 00:32:19,032 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:19,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5396 states. [2021-10-11 00:32:19,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5396 to 5348. [2021-10-11 00:32:19,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5348 states. [2021-10-11 00:32:19,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5348 states to 5348 states and 7764 transitions. [2021-10-11 00:32:19,416 INFO L78 Accepts]: Start accepts. Automaton has 5348 states and 7764 transitions. Word has length 87 [2021-10-11 00:32:19,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:19,416 INFO L481 AbstractCegarLoop]: Abstraction has 5348 states and 7764 transitions. [2021-10-11 00:32:19,416 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:19,416 INFO L276 IsEmpty]: Start isEmpty. Operand 5348 states and 7764 transitions. [2021-10-11 00:32:19,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-10-11 00:32:19,422 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:19,422 INFO L422 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:19,422 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-11 00:32:19,423 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:19,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:19,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1973365524, now seen corresponding path program 1 times [2021-10-11 00:32:19,424 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:19,424 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223404279] [2021-10-11 00:32:19,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:19,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:19,457 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:32:19,458 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223404279] [2021-10-11 00:32:19,458 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:19,458 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:19,459 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [574032695] [2021-10-11 00:32:19,459 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:19,459 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:19,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:19,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:19,460 INFO L87 Difference]: Start difference. First operand 5348 states and 7764 transitions. Second operand 3 states. [2021-10-11 00:32:20,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:20,017 INFO L93 Difference]: Finished difference Result 11003 states and 15979 transitions. [2021-10-11 00:32:20,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:20,018 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 88 [2021-10-11 00:32:20,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:20,031 INFO L225 Difference]: With dead ends: 11003 [2021-10-11 00:32:20,031 INFO L226 Difference]: Without dead ends: 5716 [2021-10-11 00:32:20,040 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:20,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5716 states. [2021-10-11 00:32:20,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5716 to 5130. [2021-10-11 00:32:20,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5130 states. [2021-10-11 00:32:20,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5130 states to 5130 states and 7126 transitions. [2021-10-11 00:32:20,474 INFO L78 Accepts]: Start accepts. Automaton has 5130 states and 7126 transitions. Word has length 88 [2021-10-11 00:32:20,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:20,475 INFO L481 AbstractCegarLoop]: Abstraction has 5130 states and 7126 transitions. [2021-10-11 00:32:20,475 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:20,475 INFO L276 IsEmpty]: Start isEmpty. Operand 5130 states and 7126 transitions. [2021-10-11 00:32:20,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-10-11 00:32:20,481 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:20,481 INFO L422 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:20,482 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-11 00:32:20,482 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:20,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:20,482 INFO L82 PathProgramCache]: Analyzing trace with hash 663253701, now seen corresponding path program 1 times [2021-10-11 00:32:20,483 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:20,483 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998437914] [2021-10-11 00:32:20,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:20,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:20,544 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-11 00:32:20,545 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998437914] [2021-10-11 00:32:20,545 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:20,545 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:20,545 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499780500] [2021-10-11 00:32:20,546 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:20,546 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:20,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:20,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:20,547 INFO L87 Difference]: Start difference. First operand 5130 states and 7126 transitions. Second operand 4 states. [2021-10-11 00:32:21,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:21,187 INFO L93 Difference]: Finished difference Result 9554 states and 13184 transitions. [2021-10-11 00:32:21,187 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:21,187 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 89 [2021-10-11 00:32:21,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:21,197 INFO L225 Difference]: With dead ends: 9554 [2021-10-11 00:32:21,197 INFO L226 Difference]: Without dead ends: 4875 [2021-10-11 00:32:21,203 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:21,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4875 states. [2021-10-11 00:32:21,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4875 to 4759. [2021-10-11 00:32:21,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4759 states. [2021-10-11 00:32:21,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4759 states to 4759 states and 6364 transitions. [2021-10-11 00:32:21,603 INFO L78 Accepts]: Start accepts. Automaton has 4759 states and 6364 transitions. Word has length 89 [2021-10-11 00:32:21,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:21,604 INFO L481 AbstractCegarLoop]: Abstraction has 4759 states and 6364 transitions. [2021-10-11 00:32:21,604 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:21,604 INFO L276 IsEmpty]: Start isEmpty. Operand 4759 states and 6364 transitions. [2021-10-11 00:32:21,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-10-11 00:32:21,614 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:21,615 INFO L422 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:21,615 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-11 00:32:21,615 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:21,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:21,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1690650567, now seen corresponding path program 1 times [2021-10-11 00:32:21,616 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:21,616 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425026015] [2021-10-11 00:32:21,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:21,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:21,669 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-11 00:32:21,669 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425026015] [2021-10-11 00:32:21,670 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:21,670 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:21,670 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352958641] [2021-10-11 00:32:21,670 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:21,671 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:21,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:21,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:21,672 INFO L87 Difference]: Start difference. First operand 4759 states and 6364 transitions. Second operand 3 states. [2021-10-11 00:32:22,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:22,052 INFO L93 Difference]: Finished difference Result 9073 states and 12125 transitions. [2021-10-11 00:32:22,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:22,053 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 116 [2021-10-11 00:32:22,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:22,063 INFO L225 Difference]: With dead ends: 9073 [2021-10-11 00:32:22,064 INFO L226 Difference]: Without dead ends: 4705 [2021-10-11 00:32:22,068 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:22,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4705 states. [2021-10-11 00:32:22,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4705 to 4705. [2021-10-11 00:32:22,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4705 states. [2021-10-11 00:32:22,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4705 states to 4705 states and 6258 transitions. [2021-10-11 00:32:22,377 INFO L78 Accepts]: Start accepts. Automaton has 4705 states and 6258 transitions. Word has length 116 [2021-10-11 00:32:22,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:22,377 INFO L481 AbstractCegarLoop]: Abstraction has 4705 states and 6258 transitions. [2021-10-11 00:32:22,377 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:22,377 INFO L276 IsEmpty]: Start isEmpty. Operand 4705 states and 6258 transitions. [2021-10-11 00:32:22,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2021-10-11 00:32:22,386 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:22,386 INFO L422 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:22,387 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-11 00:32:22,387 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:22,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:22,387 INFO L82 PathProgramCache]: Analyzing trace with hash 762576065, now seen corresponding path program 1 times [2021-10-11 00:32:22,388 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:22,388 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330804622] [2021-10-11 00:32:22,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:22,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:22,435 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-11 00:32:22,436 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [330804622] [2021-10-11 00:32:22,436 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:22,436 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:22,436 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473102280] [2021-10-11 00:32:22,437 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:22,437 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:22,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:22,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:22,438 INFO L87 Difference]: Start difference. First operand 4705 states and 6258 transitions. Second operand 4 states. [2021-10-11 00:32:22,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:22,799 INFO L93 Difference]: Finished difference Result 8363 states and 11148 transitions. [2021-10-11 00:32:22,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:22,799 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 128 [2021-10-11 00:32:22,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:22,808 INFO L225 Difference]: With dead ends: 8363 [2021-10-11 00:32:22,809 INFO L226 Difference]: Without dead ends: 4627 [2021-10-11 00:32:22,814 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:22,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4627 states. [2021-10-11 00:32:23,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4627 to 4623. [2021-10-11 00:32:23,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4623 states. [2021-10-11 00:32:23,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4623 states to 4623 states and 6037 transitions. [2021-10-11 00:32:23,186 INFO L78 Accepts]: Start accepts. Automaton has 4623 states and 6037 transitions. Word has length 128 [2021-10-11 00:32:23,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:23,186 INFO L481 AbstractCegarLoop]: Abstraction has 4623 states and 6037 transitions. [2021-10-11 00:32:23,186 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:23,186 INFO L276 IsEmpty]: Start isEmpty. Operand 4623 states and 6037 transitions. [2021-10-11 00:32:23,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-11 00:32:23,195 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:23,195 INFO L422 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:23,195 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-11 00:32:23,195 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:23,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:23,196 INFO L82 PathProgramCache]: Analyzing trace with hash 843157933, now seen corresponding path program 1 times [2021-10-11 00:32:23,196 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:23,196 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542224790] [2021-10-11 00:32:23,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:23,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:23,240 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2021-10-11 00:32:23,241 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1542224790] [2021-10-11 00:32:23,241 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:23,241 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:23,241 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17920640] [2021-10-11 00:32:23,242 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:23,242 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:23,242 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:23,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:23,243 INFO L87 Difference]: Start difference. First operand 4623 states and 6037 transitions. Second operand 3 states. [2021-10-11 00:32:23,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:23,520 INFO L93 Difference]: Finished difference Result 8859 states and 11562 transitions. [2021-10-11 00:32:23,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:23,521 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 134 [2021-10-11 00:32:23,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:23,532 INFO L225 Difference]: With dead ends: 8859 [2021-10-11 00:32:23,532 INFO L226 Difference]: Without dead ends: 4622 [2021-10-11 00:32:23,538 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:23,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4622 states. [2021-10-11 00:32:23,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4622 to 4582. [2021-10-11 00:32:23,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4582 states. [2021-10-11 00:32:23,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4582 states to 4582 states and 5954 transitions. [2021-10-11 00:32:23,988 INFO L78 Accepts]: Start accepts. Automaton has 4582 states and 5954 transitions. Word has length 134 [2021-10-11 00:32:23,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:23,988 INFO L481 AbstractCegarLoop]: Abstraction has 4582 states and 5954 transitions. [2021-10-11 00:32:23,988 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:23,989 INFO L276 IsEmpty]: Start isEmpty. Operand 4582 states and 5954 transitions. [2021-10-11 00:32:23,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-11 00:32:23,999 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:24,000 INFO L422 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:24,000 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-11 00:32:24,000 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:24,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:24,001 INFO L82 PathProgramCache]: Analyzing trace with hash 713131341, now seen corresponding path program 1 times [2021-10-11 00:32:24,001 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:24,001 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513777718] [2021-10-11 00:32:24,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:24,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:24,078 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2021-10-11 00:32:24,079 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513777718] [2021-10-11 00:32:24,079 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:24,080 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:24,080 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [209077616] [2021-10-11 00:32:24,080 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:24,080 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:24,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:24,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:24,083 INFO L87 Difference]: Start difference. First operand 4582 states and 5954 transitions. Second operand 3 states. [2021-10-11 00:32:24,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:24,440 INFO L93 Difference]: Finished difference Result 8798 states and 11423 transitions. [2021-10-11 00:32:24,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:24,441 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 134 [2021-10-11 00:32:24,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:24,448 INFO L225 Difference]: With dead ends: 8798 [2021-10-11 00:32:24,448 INFO L226 Difference]: Without dead ends: 4592 [2021-10-11 00:32:24,455 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:24,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4592 states. [2021-10-11 00:32:24,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4592 to 4552. [2021-10-11 00:32:24,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4552 states. [2021-10-11 00:32:24,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4552 states to 4552 states and 5883 transitions. [2021-10-11 00:32:24,891 INFO L78 Accepts]: Start accepts. Automaton has 4552 states and 5883 transitions. Word has length 134 [2021-10-11 00:32:24,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:24,891 INFO L481 AbstractCegarLoop]: Abstraction has 4552 states and 5883 transitions. [2021-10-11 00:32:24,891 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:24,891 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 5883 transitions. [2021-10-11 00:32:24,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-10-11 00:32:24,898 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:24,899 INFO L422 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:24,899 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-11 00:32:24,899 INFO L429 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:24,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:24,900 INFO L82 PathProgramCache]: Analyzing trace with hash -57826629, now seen corresponding path program 1 times [2021-10-11 00:32:24,900 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:24,901 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875933704] [2021-10-11 00:32:24,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:24,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:24,971 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2021-10-11 00:32:24,971 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875933704] [2021-10-11 00:32:24,971 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:24,972 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:24,972 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1321125901] [2021-10-11 00:32:24,972 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:24,973 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:24,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:24,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:24,974 INFO L87 Difference]: Start difference. First operand 4552 states and 5883 transitions. Second operand 4 states. [2021-10-11 00:32:25,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:25,283 INFO L93 Difference]: Finished difference Result 7397 states and 9599 transitions. [2021-10-11 00:32:25,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:25,284 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 137 [2021-10-11 00:32:25,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:25,288 INFO L225 Difference]: With dead ends: 7397 [2021-10-11 00:32:25,288 INFO L226 Difference]: Without dead ends: 3218 [2021-10-11 00:32:25,293 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:25,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3218 states. [2021-10-11 00:32:25,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3218 to 3214. [2021-10-11 00:32:25,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3214 states. [2021-10-11 00:32:25,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3214 states to 3214 states and 4065 transitions. [2021-10-11 00:32:25,562 INFO L78 Accepts]: Start accepts. Automaton has 3214 states and 4065 transitions. Word has length 137 [2021-10-11 00:32:25,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:25,563 INFO L481 AbstractCegarLoop]: Abstraction has 3214 states and 4065 transitions. [2021-10-11 00:32:25,563 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:25,563 INFO L276 IsEmpty]: Start isEmpty. Operand 3214 states and 4065 transitions. [2021-10-11 00:32:25,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-10-11 00:32:25,566 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:25,566 INFO L422 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:25,567 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-10-11 00:32:25,567 INFO L429 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:25,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:25,567 INFO L82 PathProgramCache]: Analyzing trace with hash -76782736, now seen corresponding path program 1 times [2021-10-11 00:32:25,567 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:25,567 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154359178] [2021-10-11 00:32:25,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:25,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:25,618 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2021-10-11 00:32:25,618 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154359178] [2021-10-11 00:32:25,618 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:25,619 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:32:25,619 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1462699676] [2021-10-11 00:32:25,619 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:32:25,619 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:25,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:32:25,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:32:25,620 INFO L87 Difference]: Start difference. First operand 3214 states and 4065 transitions. Second operand 4 states. [2021-10-11 00:32:25,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:25,825 INFO L93 Difference]: Finished difference Result 5216 states and 6609 transitions. [2021-10-11 00:32:25,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:32:25,826 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 137 [2021-10-11 00:32:25,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:25,828 INFO L225 Difference]: With dead ends: 5216 [2021-10-11 00:32:25,829 INFO L226 Difference]: Without dead ends: 2075 [2021-10-11 00:32:25,832 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:32:25,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2075 states. [2021-10-11 00:32:25,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2075 to 2071. [2021-10-11 00:32:25,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2071 states. [2021-10-11 00:32:25,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2071 states to 2071 states and 2543 transitions. [2021-10-11 00:32:25,995 INFO L78 Accepts]: Start accepts. Automaton has 2071 states and 2543 transitions. Word has length 137 [2021-10-11 00:32:25,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:25,995 INFO L481 AbstractCegarLoop]: Abstraction has 2071 states and 2543 transitions. [2021-10-11 00:32:25,995 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:32:25,995 INFO L276 IsEmpty]: Start isEmpty. Operand 2071 states and 2543 transitions. [2021-10-11 00:32:25,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2021-10-11 00:32:25,996 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:25,997 INFO L422 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:25,997 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-10-11 00:32:25,997 INFO L429 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:25,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:25,997 INFO L82 PathProgramCache]: Analyzing trace with hash 373327418, now seen corresponding path program 1 times [2021-10-11 00:32:25,997 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:25,997 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052999851] [2021-10-11 00:32:25,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:26,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:26,050 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-11 00:32:26,051 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052999851] [2021-10-11 00:32:26,051 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:26,051 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:26,051 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041560948] [2021-10-11 00:32:26,052 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:26,052 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:26,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:26,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:26,053 INFO L87 Difference]: Start difference. First operand 2071 states and 2543 transitions. Second operand 3 states. [2021-10-11 00:32:26,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:26,224 INFO L93 Difference]: Finished difference Result 3759 states and 4649 transitions. [2021-10-11 00:32:26,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:26,224 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 176 [2021-10-11 00:32:26,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:26,227 INFO L225 Difference]: With dead ends: 3759 [2021-10-11 00:32:26,227 INFO L226 Difference]: Without dead ends: 2029 [2021-10-11 00:32:26,229 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:26,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2029 states. [2021-10-11 00:32:26,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2029 to 1941. [2021-10-11 00:32:26,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1941 states. [2021-10-11 00:32:26,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1941 states to 1941 states and 2345 transitions. [2021-10-11 00:32:26,342 INFO L78 Accepts]: Start accepts. Automaton has 1941 states and 2345 transitions. Word has length 176 [2021-10-11 00:32:26,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:26,342 INFO L481 AbstractCegarLoop]: Abstraction has 1941 states and 2345 transitions. [2021-10-11 00:32:26,342 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:26,343 INFO L276 IsEmpty]: Start isEmpty. Operand 1941 states and 2345 transitions. [2021-10-11 00:32:26,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2021-10-11 00:32:26,344 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:26,344 INFO L422 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:26,344 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-11 00:32:26,344 INFO L429 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:26,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:26,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1072981429, now seen corresponding path program 1 times [2021-10-11 00:32:26,345 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:26,346 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355699150] [2021-10-11 00:32:26,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:26,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:26,401 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-11 00:32:26,402 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355699150] [2021-10-11 00:32:26,402 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:26,402 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:26,403 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2051647858] [2021-10-11 00:32:26,403 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:26,403 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:26,404 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:26,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:26,404 INFO L87 Difference]: Start difference. First operand 1941 states and 2345 transitions. Second operand 3 states. [2021-10-11 00:32:26,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:26,584 INFO L93 Difference]: Finished difference Result 4180 states and 5086 transitions. [2021-10-11 00:32:26,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:26,585 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 182 [2021-10-11 00:32:26,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:26,587 INFO L225 Difference]: With dead ends: 4180 [2021-10-11 00:32:26,588 INFO L226 Difference]: Without dead ends: 2576 [2021-10-11 00:32:26,589 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:26,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2576 states. [2021-10-11 00:32:26,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2576 to 2219. [2021-10-11 00:32:26,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2219 states. [2021-10-11 00:32:26,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2219 states to 2219 states and 2645 transitions. [2021-10-11 00:32:26,721 INFO L78 Accepts]: Start accepts. Automaton has 2219 states and 2645 transitions. Word has length 182 [2021-10-11 00:32:26,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:26,721 INFO L481 AbstractCegarLoop]: Abstraction has 2219 states and 2645 transitions. [2021-10-11 00:32:26,721 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:26,721 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 2645 transitions. [2021-10-11 00:32:26,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2021-10-11 00:32:26,722 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:26,723 INFO L422 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:26,723 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-11 00:32:26,723 INFO L429 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:26,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:26,724 INFO L82 PathProgramCache]: Analyzing trace with hash 1005799718, now seen corresponding path program 1 times [2021-10-11 00:32:26,724 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:26,724 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1234979503] [2021-10-11 00:32:26,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:26,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:26,796 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2021-10-11 00:32:26,796 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1234979503] [2021-10-11 00:32:26,796 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:26,796 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:26,797 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689096838] [2021-10-11 00:32:26,797 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:26,797 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:26,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:26,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:26,798 INFO L87 Difference]: Start difference. First operand 2219 states and 2645 transitions. Second operand 3 states. [2021-10-11 00:32:26,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:26,988 INFO L93 Difference]: Finished difference Result 3766 states and 4524 transitions. [2021-10-11 00:32:26,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:26,989 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 185 [2021-10-11 00:32:26,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:26,992 INFO L225 Difference]: With dead ends: 3766 [2021-10-11 00:32:26,992 INFO L226 Difference]: Without dead ends: 1882 [2021-10-11 00:32:26,994 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:26,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1882 states. [2021-10-11 00:32:27,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1882 to 1803. [2021-10-11 00:32:27,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1803 states. [2021-10-11 00:32:27,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1803 states to 1803 states and 2119 transitions. [2021-10-11 00:32:27,119 INFO L78 Accepts]: Start accepts. Automaton has 1803 states and 2119 transitions. Word has length 185 [2021-10-11 00:32:27,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:27,120 INFO L481 AbstractCegarLoop]: Abstraction has 1803 states and 2119 transitions. [2021-10-11 00:32:27,120 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:27,120 INFO L276 IsEmpty]: Start isEmpty. Operand 1803 states and 2119 transitions. [2021-10-11 00:32:27,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2021-10-11 00:32:27,121 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:27,121 INFO L422 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:27,122 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-11 00:32:27,122 INFO L429 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:27,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:27,122 INFO L82 PathProgramCache]: Analyzing trace with hash -1330592792, now seen corresponding path program 1 times [2021-10-11 00:32:27,123 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:27,123 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021119655] [2021-10-11 00:32:27,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:27,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:27,190 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2021-10-11 00:32:27,190 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021119655] [2021-10-11 00:32:27,190 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:32:27,191 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:32:27,191 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162054230] [2021-10-11 00:32:27,191 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:32:27,191 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:27,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:32:27,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:27,192 INFO L87 Difference]: Start difference. First operand 1803 states and 2119 transitions. Second operand 3 states. [2021-10-11 00:32:27,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:27,446 INFO L93 Difference]: Finished difference Result 1817 states and 2136 transitions. [2021-10-11 00:32:27,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:32:27,446 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 185 [2021-10-11 00:32:27,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:27,449 INFO L225 Difference]: With dead ends: 1817 [2021-10-11 00:32:27,449 INFO L226 Difference]: Without dead ends: 1815 [2021-10-11 00:32:27,450 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:32:27,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1815 states. [2021-10-11 00:32:27,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1815 to 1807. [2021-10-11 00:32:27,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1807 states. [2021-10-11 00:32:27,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1807 states to 1807 states and 2123 transitions. [2021-10-11 00:32:27,713 INFO L78 Accepts]: Start accepts. Automaton has 1807 states and 2123 transitions. Word has length 185 [2021-10-11 00:32:27,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:27,713 INFO L481 AbstractCegarLoop]: Abstraction has 1807 states and 2123 transitions. [2021-10-11 00:32:27,714 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:32:27,714 INFO L276 IsEmpty]: Start isEmpty. Operand 1807 states and 2123 transitions. [2021-10-11 00:32:27,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2021-10-11 00:32:27,715 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:27,716 INFO L422 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:27,716 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-11 00:32:27,716 INFO L429 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:27,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:27,717 INFO L82 PathProgramCache]: Analyzing trace with hash -1330591190, now seen corresponding path program 1 times [2021-10-11 00:32:27,717 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:27,717 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073671878] [2021-10-11 00:32:27,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:27,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:28,081 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 96 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-11 00:32:28,081 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2073671878] [2021-10-11 00:32:28,082 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2086940022] [2021-10-11 00:32:28,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-11 00:32:28,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:32:28,297 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 20 conjunts are in the unsatisfiable core [2021-10-11 00:32:28,308 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-11 00:32:28,932 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 81 proven. 15 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-11 00:32:28,932 INFO L219 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-11 00:32:28,932 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 19 [2021-10-11 00:32:28,933 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588605107] [2021-10-11 00:32:28,934 INFO L461 AbstractCegarLoop]: Interpolant automaton has 19 states [2021-10-11 00:32:28,934 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:32:28,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-10-11 00:32:28,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2021-10-11 00:32:28,935 INFO L87 Difference]: Start difference. First operand 1807 states and 2123 transitions. Second operand 19 states. [2021-10-11 00:32:30,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:32:30,667 INFO L93 Difference]: Finished difference Result 5673 states and 6674 transitions. [2021-10-11 00:32:30,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-10-11 00:32:30,668 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 185 [2021-10-11 00:32:30,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:32:30,675 INFO L225 Difference]: With dead ends: 5673 [2021-10-11 00:32:30,676 INFO L226 Difference]: Without dead ends: 4128 [2021-10-11 00:32:30,678 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 189 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=223, Invalid=1417, Unknown=0, NotChecked=0, Total=1640 [2021-10-11 00:32:30,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4128 states. [2021-10-11 00:32:30,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4128 to 2487. [2021-10-11 00:32:30,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2487 states. [2021-10-11 00:32:30,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2487 states to 2487 states and 2916 transitions. [2021-10-11 00:32:30,952 INFO L78 Accepts]: Start accepts. Automaton has 2487 states and 2916 transitions. Word has length 185 [2021-10-11 00:32:30,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:32:30,952 INFO L481 AbstractCegarLoop]: Abstraction has 2487 states and 2916 transitions. [2021-10-11 00:32:30,952 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2021-10-11 00:32:30,952 INFO L276 IsEmpty]: Start isEmpty. Operand 2487 states and 2916 transitions. [2021-10-11 00:32:30,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2021-10-11 00:32:30,955 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:32:30,956 INFO L422 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:32:31,171 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-10-11 00:32:31,171 INFO L429 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:32:31,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:32:31,171 INFO L82 PathProgramCache]: Analyzing trace with hash 1701344696, now seen corresponding path program 1 times [2021-10-11 00:32:31,172 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:32:31,172 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1364734577] [2021-10-11 00:32:31,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:32:31,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-11 00:32:31,195 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-11 00:32:31,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-11 00:32:31,215 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-11 00:32:31,288 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-11 00:32:31,288 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2021-10-11 00:32:31,288 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-11 00:32:31,537 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.10 12:32:31 BoogieIcfgContainer [2021-10-11 00:32:31,537 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-11 00:32:31,538 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-11 00:32:31,538 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-11 00:32:31,538 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-11 00:32:31,539 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:32:10" (3/4) ... [2021-10-11 00:32:31,541 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-11 00:32:31,756 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5e830c0-b924-46ba-b2e2-297f2f5a2d67/bin/uautomizer-Z5i5R5N3CC/witness.graphml [2021-10-11 00:32:31,757 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-11 00:32:31,759 INFO L168 Benchmark]: Toolchain (without parser) took 23326.89 ms. Allocated memory was 94.4 MB in the beginning and 1.8 GB in the end (delta: 1.7 GB). Free memory was 53.7 MB in the beginning and 957.9 MB in the end (delta: -904.2 MB). Peak memory consumption was 817.8 MB. Max. memory is 16.1 GB. [2021-10-11 00:32:31,759 INFO L168 Benchmark]: CDTParser took 0.33 ms. Allocated memory is still 94.4 MB. Free memory is still 70.2 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-11 00:32:31,760 INFO L168 Benchmark]: CACSL2BoogieTranslator took 528.43 ms. Allocated memory is still 94.4 MB. Free memory was 53.5 MB in the beginning and 66.8 MB in the end (delta: -13.3 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-11 00:32:31,760 INFO L168 Benchmark]: Boogie Procedure Inliner took 81.06 ms. Allocated memory is still 94.4 MB. Free memory was 66.8 MB in the beginning and 64.7 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-11 00:32:31,761 INFO L168 Benchmark]: Boogie Preprocessor took 68.37 ms. Allocated memory is still 94.4 MB. Free memory was 64.7 MB in the beginning and 62.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-11 00:32:31,761 INFO L168 Benchmark]: RCFGBuilder took 1009.51 ms. Allocated memory was 94.4 MB in the beginning and 117.4 MB in the end (delta: 23.1 MB). Free memory was 62.6 MB in the beginning and 81.6 MB in the end (delta: -19.0 MB). Peak memory consumption was 32.1 MB. Max. memory is 16.1 GB. [2021-10-11 00:32:31,761 INFO L168 Benchmark]: TraceAbstraction took 21414.17 ms. Allocated memory was 117.4 MB in the beginning and 1.8 GB in the end (delta: 1.7 GB). Free memory was 81.0 MB in the beginning and 995.7 MB in the end (delta: -914.6 MB). Peak memory consumption was 787.4 MB. Max. memory is 16.1 GB. [2021-10-11 00:32:31,763 INFO L168 Benchmark]: Witness Printer took 219.02 ms. Allocated memory is still 1.8 GB. Free memory was 995.7 MB in the beginning and 957.9 MB in the end (delta: 37.7 MB). Peak memory consumption was 37.7 MB. Max. memory is 16.1 GB. [2021-10-11 00:32:31,765 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33 ms. Allocated memory is still 94.4 MB. Free memory is still 70.2 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 528.43 ms. Allocated memory is still 94.4 MB. Free memory was 53.5 MB in the beginning and 66.8 MB in the end (delta: -13.3 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 81.06 ms. Allocated memory is still 94.4 MB. Free memory was 66.8 MB in the beginning and 64.7 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 68.37 ms. Allocated memory is still 94.4 MB. Free memory was 64.7 MB in the beginning and 62.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1009.51 ms. Allocated memory was 94.4 MB in the beginning and 117.4 MB in the end (delta: 23.1 MB). Free memory was 62.6 MB in the beginning and 81.6 MB in the end (delta: -19.0 MB). Peak memory consumption was 32.1 MB. Max. memory is 16.1 GB. * TraceAbstraction took 21414.17 ms. Allocated memory was 117.4 MB in the beginning and 1.8 GB in the end (delta: 1.7 GB). Free memory was 81.0 MB in the beginning and 995.7 MB in the end (delta: -914.6 MB). Peak memory consumption was 787.4 MB. Max. memory is 16.1 GB. * Witness Printer took 219.02 ms. Allocated memory is still 1.8 GB. Free memory was 995.7 MB in the beginning and 957.9 MB in the end (delta: 37.7 MB). Peak memory consumption was 37.7 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 15]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L20] int c ; [L21] int c_t ; [L22] int c_req_up ; [L23] int p_in ; [L24] int p_out ; [L25] int wl_st ; [L26] int c1_st ; [L27] int c2_st ; [L28] int wb_st ; [L29] int r_st ; [L30] int wl_i ; [L31] int c1_i ; [L32] int c2_i ; [L33] int wb_i ; [L34] int r_i ; [L35] int wl_pc ; [L36] int c1_pc ; [L37] int c2_pc ; [L38] int wb_pc ; [L39] int e_e ; [L40] int e_f ; [L41] int e_g ; [L42] int e_c ; [L43] int e_p_in ; [L44] int e_wl ; [L50] int d ; [L51] int data ; [L52] int processed ; [L53] static int t_b ; VAL [c=0, c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L693] int __retres1 ; [L697] e_wl = 2 [L698] e_c = e_wl [L699] e_g = e_c [L700] e_f = e_g [L701] e_e = e_f [L702] wl_pc = 0 [L703] c1_pc = 0 [L704] c2_pc = 0 [L705] wb_pc = 0 [L706] wb_i = 1 [L707] c2_i = wb_i [L708] c1_i = c2_i [L709] wl_i = c1_i [L710] r_i = 0 [L711] c_req_up = 0 [L712] d = 0 [L713] c = 0 [L404] int kernel_st ; [L407] kernel_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L408] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L419] COND TRUE (int )wl_i == 1 [L420] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L424] COND TRUE (int )c1_i == 1 [L425] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L429] COND TRUE (int )c2_i == 1 [L430] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L434] COND TRUE (int )wb_i == 1 [L435] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L439] COND FALSE !((int )r_i == 1) [L442] r_st = 2 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L444] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L449] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L454] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L459] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L464] COND FALSE !((int )e_wl == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L469] COND FALSE !((int )wl_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L477] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L487] COND FALSE !((int )c1_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L496] COND FALSE !((int )c2_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L505] COND FALSE !((int )wb_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L514] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L519] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L524] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L529] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L534] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L539] COND FALSE !((int )e_wl == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L545] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L548] kernel_st = 1 [L290] int tmp ; [L291] int tmp___0 ; [L292] int tmp___1 ; [L293] int tmp___2 ; [L294] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L300] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L321] COND TRUE (int )wl_st == 0 [L323] tmp = __VERIFIER_nondet_int() [L325] COND TRUE \read(tmp) [L327] wl_st = 1 [L55] int t ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L58] COND TRUE (int )wl_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L72] wl_st = 2 [L73] wl_pc = 1 [L74] e_wl = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L336] COND TRUE (int )c1_st == 0 [L338] tmp___0 = __VERIFIER_nondet_int() [L340] COND TRUE \read(tmp___0) [L342] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L141] COND TRUE (int )c1_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L152] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L154] c1_st = 2 [L155] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L351] COND TRUE (int )c2_st == 0 [L353] tmp___1 = __VERIFIER_nondet_int() [L355] COND TRUE \read(tmp___1) [L357] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L186] COND TRUE (int )c2_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L197] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L199] c2_st = 2 [L200] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L366] COND TRUE (int )wb_st == 0 [L368] tmp___2 = __VERIFIER_nondet_int() [L370] COND TRUE \read(tmp___2) [L372] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L231] COND TRUE (int )wb_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L242] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L244] wb_st = 2 [L245] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L381] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L300] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L303] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L306] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L309] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L312] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L551] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L552] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L563] kernel_st = 3 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L564] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L569] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L574] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L579] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L584] COND TRUE (int )e_wl == 0 [L585] e_wl = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L589] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L590] COND TRUE (int )e_wl == 1 [L591] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L607] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L608] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L616] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L617] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L625] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L626] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L634] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L639] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L644] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L649] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L654] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L659] COND TRUE (int )e_wl == 1 [L660] e_wl = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L664] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L545] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L548] kernel_st = 1 [L290] int tmp ; [L291] int tmp___0 ; [L292] int tmp___1 ; [L293] int tmp___2 ; [L294] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L300] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L321] COND TRUE (int )wl_st == 0 [L323] tmp = __VERIFIER_nondet_int() [L325] COND TRUE \read(tmp) [L327] wl_st = 1 [L55] int t ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L58] COND FALSE !((int )wl_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L61] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L64] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L79] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L81] t = d [L82] data = d [L83] processed = 0 [L84] e_f = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L85] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L86] COND TRUE (int )e_f == 1 [L87] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L94] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L95] COND TRUE (int )e_f == 1 [L96] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L103] e_f = 2 [L104] wl_st = 2 [L105] wl_pc = 2 [L106] t_b = t VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L336] COND TRUE (int )c1_st == 0 [L338] tmp___0 = __VERIFIER_nondet_int() [L340] COND TRUE \read(tmp___0) [L342] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L141] COND FALSE !((int )c1_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L144] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L159] COND TRUE ! processed [L160] data += 1 [L161] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L162] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L163] COND TRUE (int )e_g == 1 [L164] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L171] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L152] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L154] c1_st = 2 [L155] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L351] COND TRUE (int )c2_st == 0 [L353] tmp___1 = __VERIFIER_nondet_int() [L355] COND TRUE \read(tmp___1) [L357] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L186] COND FALSE !((int )c2_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L189] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L204] COND TRUE ! processed [L205] data += 1 [L206] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L207] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L208] COND TRUE (int )e_g == 1 [L209] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L216] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L197] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L199] c2_st = 2 [L200] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L366] COND TRUE (int )wb_st == 0 [L368] tmp___2 = __VERIFIER_nondet_int() [L370] COND TRUE \read(tmp___2) [L372] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L231] COND FALSE !((int )wb_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L234] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L249] c_t = data [L250] c_req_up = 1 [L251] processed = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L242] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L244] wb_st = 2 [L245] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L381] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L300] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L303] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L306] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L309] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L312] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L551] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L552] COND TRUE (int )c_req_up == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L553] COND TRUE c != c_t [L554] c = c_t [L555] e_c = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L559] c_req_up = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L563] kernel_st = 3 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L564] COND FALSE !((int )e_f == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L569] COND FALSE !((int )e_g == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L574] COND FALSE !((int )e_e == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L579] COND TRUE (int )e_c == 0 [L580] e_c = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L584] COND FALSE !((int )e_wl == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L589] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L597] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L598] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L607] COND TRUE (int )c1_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L608] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L616] COND TRUE (int )c2_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L617] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L625] COND TRUE (int )wb_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L626] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L634] COND TRUE (int )e_c == 1 [L635] r_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L639] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L644] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L649] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L654] COND TRUE (int )e_c == 1 [L655] e_c = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L659] COND FALSE !((int )e_wl == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L664] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L667] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L670] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L673] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L676] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L545] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L548] kernel_st = 1 [L290] int tmp ; [L291] int tmp___0 ; [L292] int tmp___1 ; [L293] int tmp___2 ; [L294] int tmp___3 ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L300] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L303] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L306] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L309] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L312] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L321] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L336] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L351] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L366] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L381] COND TRUE (int )r_st == 0 [L383] tmp___3 = __VERIFIER_nondet_int() [L385] COND TRUE \read(tmp___3) [L387] r_st = 1 [L263] d = c [L264] e_e = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L265] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L273] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L274] COND TRUE (int )e_e == 1 [L275] wl_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L283] e_e = 2 [L284] r_st = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L298] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L300] COND TRUE (int )wl_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L321] COND TRUE (int )wl_st == 0 [L323] tmp = __VERIFIER_nondet_int() [L325] COND TRUE \read(tmp) [L327] wl_st = 1 [L55] int t ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L58] COND FALSE !((int )wl_pc == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L61] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L110] t = t_b VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L111] COND FALSE !(d == t + 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L114] COND TRUE d == t + 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L122] COND FALSE !(d == t + 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L15] reach_error() VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 129 locations, 2 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 21.1s, OverallIterations: 35, TraceHistogramMax: 6, AutomataDifference: 10.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 7212 SDtfs, 9836 SDslu, 8474 SDs, 0 SdLazy, 1107 SolverSat, 265 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 371 GetRequests, 269 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 1.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5348occurred in iteration=21, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.5s AutomataMinimizationTime, 34 MinimizatonAttempts, 6041 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 3190 NumberOfCodeBlocks, 3190 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 2969 ConstructedInterpolants, 0 QuantifiedInterpolants, 737591 SizeOfPredicates, 6 NumberOfNonLiveVariables, 528 ConjunctsInSsa, 20 ConjunctsInUnsatCore, 35 InterpolantComputations, 33 PerfectInterpolantSequences, 914/1025 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...