./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/transmitter.03.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 7b2dab56 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.03.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f6768ec4cb10c0d030986cdc2e459713dbcdaadd ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.0-7b2dab5 [2021-10-11 00:28:47,776 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-11 00:28:47,777 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-11 00:28:47,835 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-11 00:28:47,836 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-11 00:28:47,843 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-11 00:28:47,846 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-11 00:28:47,851 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-11 00:28:47,854 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-11 00:28:47,863 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-11 00:28:47,864 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-11 00:28:47,866 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-11 00:28:47,866 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-11 00:28:47,870 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-11 00:28:47,872 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-11 00:28:47,873 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-11 00:28:47,875 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-11 00:28:47,881 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-11 00:28:47,883 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-11 00:28:47,894 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-11 00:28:47,896 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-11 00:28:47,898 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-11 00:28:47,901 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-11 00:28:47,902 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-11 00:28:47,906 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-11 00:28:47,907 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-11 00:28:47,907 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-11 00:28:47,909 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-11 00:28:47,910 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-11 00:28:47,912 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-11 00:28:47,912 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-11 00:28:47,913 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-11 00:28:47,916 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-11 00:28:47,917 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-11 00:28:47,919 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-11 00:28:47,919 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-11 00:28:47,920 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-11 00:28:47,920 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-11 00:28:47,921 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-11 00:28:47,922 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-11 00:28:47,922 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-11 00:28:47,923 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-11 00:28:47,973 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-11 00:28:47,974 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-11 00:28:47,976 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-11 00:28:47,976 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-11 00:28:47,976 INFO L138 SettingsManager]: * Use SBE=true [2021-10-11 00:28:47,977 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-11 00:28:47,977 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-11 00:28:47,977 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-11 00:28:47,977 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-11 00:28:47,977 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-11 00:28:47,979 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-11 00:28:47,979 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-11 00:28:47,979 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-11 00:28:47,979 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-11 00:28:47,980 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-11 00:28:47,980 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-11 00:28:47,980 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-11 00:28:47,980 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-11 00:28:47,981 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-11 00:28:47,981 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-11 00:28:47,981 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-11 00:28:47,981 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-11 00:28:47,981 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-11 00:28:47,982 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-11 00:28:47,982 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-11 00:28:47,982 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-11 00:28:47,982 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-11 00:28:47,983 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-11 00:28:47,983 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f6768ec4cb10c0d030986cdc2e459713dbcdaadd [2021-10-11 00:28:48,305 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-11 00:28:48,337 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-11 00:28:48,340 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-11 00:28:48,343 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-11 00:28:48,343 INFO L275 PluginConnector]: CDTParser initialized [2021-10-11 00:28:48,344 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/../../sv-benchmarks/c/systemc/transmitter.03.cil.c [2021-10-11 00:28:48,416 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/data/950b60daf/5995ccf299d0400ca590d4c7be815f39/FLAG46614571b [2021-10-11 00:28:48,897 INFO L306 CDTParser]: Found 1 translation units. [2021-10-11 00:28:48,898 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/sv-benchmarks/c/systemc/transmitter.03.cil.c [2021-10-11 00:28:48,914 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/data/950b60daf/5995ccf299d0400ca590d4c7be815f39/FLAG46614571b [2021-10-11 00:28:49,234 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/data/950b60daf/5995ccf299d0400ca590d4c7be815f39 [2021-10-11 00:28:49,236 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-11 00:28:49,237 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-11 00:28:49,239 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-11 00:28:49,239 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-11 00:28:49,243 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-11 00:28:49,243 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,245 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5f5d75f4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49, skipping insertion in model container [2021-10-11 00:28:49,246 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,254 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-11 00:28:49,321 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-11 00:28:49,442 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/sv-benchmarks/c/systemc/transmitter.03.cil.c[401,414] [2021-10-11 00:28:49,506 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-11 00:28:49,521 INFO L203 MainTranslator]: Completed pre-run [2021-10-11 00:28:49,534 WARN L226 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/sv-benchmarks/c/systemc/transmitter.03.cil.c[401,414] [2021-10-11 00:28:49,571 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-11 00:28:49,606 INFO L208 MainTranslator]: Completed translation [2021-10-11 00:28:49,606 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49 WrapperNode [2021-10-11 00:28:49,606 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-11 00:28:49,608 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-11 00:28:49,608 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-11 00:28:49,608 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-11 00:28:49,619 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,628 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,680 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-11 00:28:49,681 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-11 00:28:49,681 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-11 00:28:49,681 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-11 00:28:49,690 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,690 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,696 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,697 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,710 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,723 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,728 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... [2021-10-11 00:28:49,735 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-11 00:28:49,736 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-11 00:28:49,736 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-11 00:28:49,737 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-11 00:28:49,745 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (1/1) ... No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-11 00:28:49,916 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-11 00:28:49,916 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-11 00:28:49,918 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-11 00:28:49,918 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-11 00:28:50,947 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-11 00:28:50,948 INFO L299 CfgBuilder]: Removed 119 assume(true) statements. [2021-10-11 00:28:50,950 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:28:50 BoogieIcfgContainer [2021-10-11 00:28:50,950 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-11 00:28:50,952 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-11 00:28:50,952 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-11 00:28:50,955 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-11 00:28:50,955 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.10 12:28:49" (1/3) ... [2021-10-11 00:28:50,956 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@39fff267 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.10 12:28:50, skipping insertion in model container [2021-10-11 00:28:50,956 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.10 12:28:49" (2/3) ... [2021-10-11 00:28:50,957 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@39fff267 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.10 12:28:50, skipping insertion in model container [2021-10-11 00:28:50,957 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:28:50" (3/3) ... [2021-10-11 00:28:50,958 INFO L111 eAbstractionObserver]: Analyzing ICFG transmitter.03.cil.c [2021-10-11 00:28:50,971 INFO L180 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-11 00:28:50,975 INFO L192 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2021-10-11 00:28:50,985 INFO L253 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-10-11 00:28:51,012 INFO L377 AbstractCegarLoop]: Interprodecural is true [2021-10-11 00:28:51,012 INFO L378 AbstractCegarLoop]: Hoare is true [2021-10-11 00:28:51,012 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2021-10-11 00:28:51,012 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-11 00:28:51,013 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-11 00:28:51,013 INFO L382 AbstractCegarLoop]: Difference is false [2021-10-11 00:28:51,013 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-11 00:28:51,013 INFO L387 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2021-10-11 00:28:51,037 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states. [2021-10-11 00:28:51,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:51,045 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:51,046 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:51,046 INFO L429 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:51,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:51,053 INFO L82 PathProgramCache]: Analyzing trace with hash -1838342379, now seen corresponding path program 1 times [2021-10-11 00:28:51,061 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:51,062 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307182298] [2021-10-11 00:28:51,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:51,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:51,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:51,259 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307182298] [2021-10-11 00:28:51,260 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:51,260 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:51,261 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889526818] [2021-10-11 00:28:51,265 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:51,266 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:51,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:51,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:51,282 INFO L87 Difference]: Start difference. First operand 276 states. Second operand 3 states. [2021-10-11 00:28:51,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:51,396 INFO L93 Difference]: Finished difference Result 547 states and 857 transitions. [2021-10-11 00:28:51,396 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:51,397 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:51,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:51,412 INFO L225 Difference]: With dead ends: 547 [2021-10-11 00:28:51,412 INFO L226 Difference]: Without dead ends: 272 [2021-10-11 00:28:51,416 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:51,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2021-10-11 00:28:51,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 272. [2021-10-11 00:28:51,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272 states. [2021-10-11 00:28:51,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272 states to 272 states and 412 transitions. [2021-10-11 00:28:51,481 INFO L78 Accepts]: Start accepts. Automaton has 272 states and 412 transitions. Word has length 61 [2021-10-11 00:28:51,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:51,481 INFO L481 AbstractCegarLoop]: Abstraction has 272 states and 412 transitions. [2021-10-11 00:28:51,481 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:51,481 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 412 transitions. [2021-10-11 00:28:51,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:51,484 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:51,485 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:51,485 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-11 00:28:51,485 INFO L429 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:51,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:51,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1195707667, now seen corresponding path program 1 times [2021-10-11 00:28:51,487 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:51,487 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990602572] [2021-10-11 00:28:51,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:51,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:51,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:51,619 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990602572] [2021-10-11 00:28:51,619 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:51,619 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:51,620 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1678353978] [2021-10-11 00:28:51,621 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:51,621 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:51,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:51,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:51,623 INFO L87 Difference]: Start difference. First operand 272 states and 412 transitions. Second operand 3 states. [2021-10-11 00:28:51,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:51,763 INFO L93 Difference]: Finished difference Result 730 states and 1104 transitions. [2021-10-11 00:28:51,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:51,763 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:51,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:51,768 INFO L225 Difference]: With dead ends: 730 [2021-10-11 00:28:51,768 INFO L226 Difference]: Without dead ends: 466 [2021-10-11 00:28:51,770 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:51,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2021-10-11 00:28:51,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 464. [2021-10-11 00:28:51,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-10-11 00:28:51,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 694 transitions. [2021-10-11 00:28:51,845 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 694 transitions. Word has length 61 [2021-10-11 00:28:51,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:51,845 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 694 transitions. [2021-10-11 00:28:51,845 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:51,845 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 694 transitions. [2021-10-11 00:28:51,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:51,848 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:51,848 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:51,848 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-11 00:28:51,848 INFO L429 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:51,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:51,849 INFO L82 PathProgramCache]: Analyzing trace with hash 266288339, now seen corresponding path program 1 times [2021-10-11 00:28:51,849 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:51,850 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158642855] [2021-10-11 00:28:51,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:51,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:51,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:51,959 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158642855] [2021-10-11 00:28:51,960 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:51,960 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:51,960 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2083262862] [2021-10-11 00:28:51,961 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:51,961 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:51,968 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:51,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:51,971 INFO L87 Difference]: Start difference. First operand 464 states and 694 transitions. Second operand 3 states. [2021-10-11 00:28:52,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:52,031 INFO L93 Difference]: Finished difference Result 919 states and 1375 transitions. [2021-10-11 00:28:52,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:52,032 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:52,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:52,036 INFO L225 Difference]: With dead ends: 919 [2021-10-11 00:28:52,037 INFO L226 Difference]: Without dead ends: 464 [2021-10-11 00:28:52,043 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-10-11 00:28:52,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-10-11 00:28:52,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-10-11 00:28:52,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 686 transitions. [2021-10-11 00:28:52,090 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 686 transitions. Word has length 61 [2021-10-11 00:28:52,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:52,090 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 686 transitions. [2021-10-11 00:28:52,090 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:52,091 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 686 transitions. [2021-10-11 00:28:52,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:52,100 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:52,100 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:52,100 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-11 00:28:52,100 INFO L429 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:52,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:52,103 INFO L82 PathProgramCache]: Analyzing trace with hash 710189013, now seen corresponding path program 1 times [2021-10-11 00:28:52,103 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:52,103 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164834412] [2021-10-11 00:28:52,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:52,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:52,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:52,195 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164834412] [2021-10-11 00:28:52,195 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:52,195 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:52,196 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [155930729] [2021-10-11 00:28:52,196 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:52,196 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:52,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:52,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,197 INFO L87 Difference]: Start difference. First operand 464 states and 686 transitions. Second operand 3 states. [2021-10-11 00:28:52,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:52,240 INFO L93 Difference]: Finished difference Result 918 states and 1358 transitions. [2021-10-11 00:28:52,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:52,240 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:52,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:52,244 INFO L225 Difference]: With dead ends: 918 [2021-10-11 00:28:52,244 INFO L226 Difference]: Without dead ends: 464 [2021-10-11 00:28:52,246 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-10-11 00:28:52,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-10-11 00:28:52,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-10-11 00:28:52,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 678 transitions. [2021-10-11 00:28:52,283 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 678 transitions. Word has length 61 [2021-10-11 00:28:52,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:52,283 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 678 transitions. [2021-10-11 00:28:52,283 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:52,283 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 678 transitions. [2021-10-11 00:28:52,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:52,285 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:52,285 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:52,285 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-11 00:28:52,285 INFO L429 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:52,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:52,286 INFO L82 PathProgramCache]: Analyzing trace with hash -1623736427, now seen corresponding path program 1 times [2021-10-11 00:28:52,286 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:52,287 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354610990] [2021-10-11 00:28:52,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:52,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:52,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:52,365 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354610990] [2021-10-11 00:28:52,365 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:52,365 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:52,365 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [225662795] [2021-10-11 00:28:52,366 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:52,366 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:52,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:52,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,367 INFO L87 Difference]: Start difference. First operand 464 states and 678 transitions. Second operand 3 states. [2021-10-11 00:28:52,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:52,420 INFO L93 Difference]: Finished difference Result 917 states and 1341 transitions. [2021-10-11 00:28:52,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:52,421 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:52,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:52,424 INFO L225 Difference]: With dead ends: 917 [2021-10-11 00:28:52,424 INFO L226 Difference]: Without dead ends: 464 [2021-10-11 00:28:52,425 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-10-11 00:28:52,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-10-11 00:28:52,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-10-11 00:28:52,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 670 transitions. [2021-10-11 00:28:52,455 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 670 transitions. Word has length 61 [2021-10-11 00:28:52,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:52,456 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 670 transitions. [2021-10-11 00:28:52,456 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:52,456 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 670 transitions. [2021-10-11 00:28:52,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:52,458 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:52,458 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:52,458 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-11 00:28:52,458 INFO L429 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:52,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:52,459 INFO L82 PathProgramCache]: Analyzing trace with hash -175003691, now seen corresponding path program 1 times [2021-10-11 00:28:52,459 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:52,459 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496885960] [2021-10-11 00:28:52,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:52,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:52,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:52,557 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496885960] [2021-10-11 00:28:52,558 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:52,558 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:52,558 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208035435] [2021-10-11 00:28:52,558 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:52,559 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:52,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:52,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,559 INFO L87 Difference]: Start difference. First operand 464 states and 670 transitions. Second operand 3 states. [2021-10-11 00:28:52,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:52,619 INFO L93 Difference]: Finished difference Result 916 states and 1324 transitions. [2021-10-11 00:28:52,620 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:52,620 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:52,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:52,623 INFO L225 Difference]: With dead ends: 916 [2021-10-11 00:28:52,623 INFO L226 Difference]: Without dead ends: 464 [2021-10-11 00:28:52,624 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-10-11 00:28:52,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-10-11 00:28:52,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-10-11 00:28:52,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 654 transitions. [2021-10-11 00:28:52,649 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 654 transitions. Word has length 61 [2021-10-11 00:28:52,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:52,649 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 654 transitions. [2021-10-11 00:28:52,649 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:52,649 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 654 transitions. [2021-10-11 00:28:52,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:52,650 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:52,650 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:52,650 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-11 00:28:52,650 INFO L429 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:52,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:52,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1945036492, now seen corresponding path program 1 times [2021-10-11 00:28:52,651 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:52,651 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481495042] [2021-10-11 00:28:52,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:52,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:52,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:52,726 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481495042] [2021-10-11 00:28:52,726 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:52,726 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:52,726 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [788507398] [2021-10-11 00:28:52,726 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:52,726 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:52,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:52,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,727 INFO L87 Difference]: Start difference. First operand 464 states and 654 transitions. Second operand 3 states. [2021-10-11 00:28:52,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:52,800 INFO L93 Difference]: Finished difference Result 914 states and 1289 transitions. [2021-10-11 00:28:52,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:52,800 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:52,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:52,803 INFO L225 Difference]: With dead ends: 914 [2021-10-11 00:28:52,803 INFO L226 Difference]: Without dead ends: 464 [2021-10-11 00:28:52,804 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:52,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2021-10-11 00:28:52,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 464. [2021-10-11 00:28:52,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 464 states. [2021-10-11 00:28:52,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 638 transitions. [2021-10-11 00:28:52,829 INFO L78 Accepts]: Start accepts. Automaton has 464 states and 638 transitions. Word has length 61 [2021-10-11 00:28:52,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:52,830 INFO L481 AbstractCegarLoop]: Abstraction has 464 states and 638 transitions. [2021-10-11 00:28:52,830 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:52,830 INFO L276 IsEmpty]: Start isEmpty. Operand 464 states and 638 transitions. [2021-10-11 00:28:52,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:52,831 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:52,831 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:52,831 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-11 00:28:52,831 INFO L429 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:52,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:52,832 INFO L82 PathProgramCache]: Analyzing trace with hash -1902661357, now seen corresponding path program 1 times [2021-10-11 00:28:52,832 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:52,833 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58422859] [2021-10-11 00:28:52,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:52,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:52,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:52,872 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [58422859] [2021-10-11 00:28:52,873 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:52,873 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:28:52,873 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182241592] [2021-10-11 00:28:52,873 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:28:52,874 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:52,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:28:52,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:52,875 INFO L87 Difference]: Start difference. First operand 464 states and 638 transitions. Second operand 5 states. [2021-10-11 00:28:53,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:53,042 INFO L93 Difference]: Finished difference Result 1468 states and 2029 transitions. [2021-10-11 00:28:53,043 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-11 00:28:53,043 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-10-11 00:28:53,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:53,049 INFO L225 Difference]: With dead ends: 1468 [2021-10-11 00:28:53,049 INFO L226 Difference]: Without dead ends: 1025 [2021-10-11 00:28:53,051 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:28:53,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1025 states. [2021-10-11 00:28:53,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1025 to 479. [2021-10-11 00:28:53,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 479 states. [2021-10-11 00:28:53,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 479 states to 479 states and 648 transitions. [2021-10-11 00:28:53,088 INFO L78 Accepts]: Start accepts. Automaton has 479 states and 648 transitions. Word has length 61 [2021-10-11 00:28:53,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:53,088 INFO L481 AbstractCegarLoop]: Abstraction has 479 states and 648 transitions. [2021-10-11 00:28:53,088 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:28:53,089 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 648 transitions. [2021-10-11 00:28:53,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:53,089 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:53,090 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:53,090 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-11 00:28:53,090 INFO L429 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:53,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:53,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1654514863, now seen corresponding path program 1 times [2021-10-11 00:28:53,091 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:53,091 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95013108] [2021-10-11 00:28:53,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:53,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:53,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:53,155 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95013108] [2021-10-11 00:28:53,159 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:53,160 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:28:53,160 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2049952120] [2021-10-11 00:28:53,161 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:28:53,162 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:53,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:28:53,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:53,163 INFO L87 Difference]: Start difference. First operand 479 states and 648 transitions. Second operand 5 states. [2021-10-11 00:28:53,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:53,329 INFO L93 Difference]: Finished difference Result 1256 states and 1713 transitions. [2021-10-11 00:28:53,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-11 00:28:53,329 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-10-11 00:28:53,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:53,334 INFO L225 Difference]: With dead ends: 1256 [2021-10-11 00:28:53,334 INFO L226 Difference]: Without dead ends: 805 [2021-10-11 00:28:53,336 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:28:53,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 805 states. [2021-10-11 00:28:53,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 805 to 485. [2021-10-11 00:28:53,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 485 states. [2021-10-11 00:28:53,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 646 transitions. [2021-10-11 00:28:53,376 INFO L78 Accepts]: Start accepts. Automaton has 485 states and 646 transitions. Word has length 61 [2021-10-11 00:28:53,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:53,376 INFO L481 AbstractCegarLoop]: Abstraction has 485 states and 646 transitions. [2021-10-11 00:28:53,376 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:28:53,376 INFO L276 IsEmpty]: Start isEmpty. Operand 485 states and 646 transitions. [2021-10-11 00:28:53,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:53,377 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:53,377 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:53,377 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-11 00:28:53,377 INFO L429 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:53,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:53,378 INFO L82 PathProgramCache]: Analyzing trace with hash -2048881649, now seen corresponding path program 1 times [2021-10-11 00:28:53,378 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:53,378 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621432192] [2021-10-11 00:28:53,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:53,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:53,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:53,414 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621432192] [2021-10-11 00:28:53,415 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:53,415 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:28:53,415 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062462953] [2021-10-11 00:28:53,415 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:28:53,415 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:53,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:28:53,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:53,416 INFO L87 Difference]: Start difference. First operand 485 states and 646 transitions. Second operand 5 states. [2021-10-11 00:28:53,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:53,638 INFO L93 Difference]: Finished difference Result 1610 states and 2151 transitions. [2021-10-11 00:28:53,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-11 00:28:53,640 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-10-11 00:28:53,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:53,646 INFO L225 Difference]: With dead ends: 1610 [2021-10-11 00:28:53,646 INFO L226 Difference]: Without dead ends: 1160 [2021-10-11 00:28:53,648 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:28:53,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1160 states. [2021-10-11 00:28:53,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1160 to 515. [2021-10-11 00:28:53,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 515 states. [2021-10-11 00:28:53,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 515 states to 515 states and 676 transitions. [2021-10-11 00:28:53,704 INFO L78 Accepts]: Start accepts. Automaton has 515 states and 676 transitions. Word has length 61 [2021-10-11 00:28:53,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:53,705 INFO L481 AbstractCegarLoop]: Abstraction has 515 states and 676 transitions. [2021-10-11 00:28:53,705 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:28:53,705 INFO L276 IsEmpty]: Start isEmpty. Operand 515 states and 676 transitions. [2021-10-11 00:28:53,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:53,706 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:53,706 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:53,706 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-11 00:28:53,706 INFO L429 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:53,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:53,707 INFO L82 PathProgramCache]: Analyzing trace with hash -2026249395, now seen corresponding path program 1 times [2021-10-11 00:28:53,707 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:53,707 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533712353] [2021-10-11 00:28:53,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:53,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:53,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:53,762 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1533712353] [2021-10-11 00:28:53,762 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:53,763 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-11 00:28:53,763 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518271839] [2021-10-11 00:28:53,764 INFO L461 AbstractCegarLoop]: Interpolant automaton has 5 states [2021-10-11 00:28:53,764 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:53,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-11 00:28:53,766 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:53,766 INFO L87 Difference]: Start difference. First operand 515 states and 676 transitions. Second operand 5 states. [2021-10-11 00:28:53,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:53,977 INFO L93 Difference]: Finished difference Result 1397 states and 1850 transitions. [2021-10-11 00:28:53,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-11 00:28:53,978 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2021-10-11 00:28:53,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:53,983 INFO L225 Difference]: With dead ends: 1397 [2021-10-11 00:28:53,983 INFO L226 Difference]: Without dead ends: 927 [2021-10-11 00:28:53,984 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-11 00:28:53,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 927 states. [2021-10-11 00:28:54,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 927 to 521. [2021-10-11 00:28:54,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 521 states. [2021-10-11 00:28:54,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 521 states to 521 states and 674 transitions. [2021-10-11 00:28:54,049 INFO L78 Accepts]: Start accepts. Automaton has 521 states and 674 transitions. Word has length 61 [2021-10-11 00:28:54,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:54,050 INFO L481 AbstractCegarLoop]: Abstraction has 521 states and 674 transitions. [2021-10-11 00:28:54,050 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2021-10-11 00:28:54,050 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 674 transitions. [2021-10-11 00:28:54,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:54,051 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:54,051 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:54,051 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-11 00:28:54,051 INFO L429 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:54,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:54,052 INFO L82 PathProgramCache]: Analyzing trace with hash 2134704395, now seen corresponding path program 1 times [2021-10-11 00:28:54,052 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:54,052 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584349417] [2021-10-11 00:28:54,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:54,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:54,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:54,089 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584349417] [2021-10-11 00:28:54,089 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:54,089 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:54,089 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948580150] [2021-10-11 00:28:54,090 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:54,090 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:54,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:54,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:54,090 INFO L87 Difference]: Start difference. First operand 521 states and 674 transitions. Second operand 3 states. [2021-10-11 00:28:54,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:54,176 INFO L93 Difference]: Finished difference Result 1005 states and 1299 transitions. [2021-10-11 00:28:54,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:54,177 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:54,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:54,180 INFO L225 Difference]: With dead ends: 1005 [2021-10-11 00:28:54,180 INFO L226 Difference]: Without dead ends: 497 [2021-10-11 00:28:54,181 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:54,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2021-10-11 00:28:54,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 497. [2021-10-11 00:28:54,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2021-10-11 00:28:54,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 626 transitions. [2021-10-11 00:28:54,234 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 626 transitions. Word has length 61 [2021-10-11 00:28:54,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:54,234 INFO L481 AbstractCegarLoop]: Abstraction has 497 states and 626 transitions. [2021-10-11 00:28:54,235 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:54,235 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 626 transitions. [2021-10-11 00:28:54,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-11 00:28:54,235 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:54,235 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:54,236 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-11 00:28:54,236 INFO L429 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:54,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:54,236 INFO L82 PathProgramCache]: Analyzing trace with hash 140559689, now seen corresponding path program 1 times [2021-10-11 00:28:54,236 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:54,237 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846003814] [2021-10-11 00:28:54,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:54,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:54,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:54,267 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846003814] [2021-10-11 00:28:54,267 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:54,268 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:54,268 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1697325114] [2021-10-11 00:28:54,268 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:54,268 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:54,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:54,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:54,269 INFO L87 Difference]: Start difference. First operand 497 states and 626 transitions. Second operand 3 states. [2021-10-11 00:28:54,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:54,420 INFO L93 Difference]: Finished difference Result 1368 states and 1714 transitions. [2021-10-11 00:28:54,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:54,421 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2021-10-11 00:28:54,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:54,426 INFO L225 Difference]: With dead ends: 1368 [2021-10-11 00:28:54,427 INFO L226 Difference]: Without dead ends: 920 [2021-10-11 00:28:54,428 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:54,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 920 states. [2021-10-11 00:28:54,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 920 to 891. [2021-10-11 00:28:54,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 891 states. [2021-10-11 00:28:54,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 891 states to 891 states and 1103 transitions. [2021-10-11 00:28:54,523 INFO L78 Accepts]: Start accepts. Automaton has 891 states and 1103 transitions. Word has length 61 [2021-10-11 00:28:54,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:54,523 INFO L481 AbstractCegarLoop]: Abstraction has 891 states and 1103 transitions. [2021-10-11 00:28:54,523 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:54,524 INFO L276 IsEmpty]: Start isEmpty. Operand 891 states and 1103 transitions. [2021-10-11 00:28:54,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-11 00:28:54,524 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:54,525 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:54,525 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-11 00:28:54,525 INFO L429 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:54,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:54,525 INFO L82 PathProgramCache]: Analyzing trace with hash 327530686, now seen corresponding path program 1 times [2021-10-11 00:28:54,525 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:54,526 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1625806186] [2021-10-11 00:28:54,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:54,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:54,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:54,556 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1625806186] [2021-10-11 00:28:54,556 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:54,556 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:54,557 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890068211] [2021-10-11 00:28:54,557 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:54,557 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:54,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:54,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:54,558 INFO L87 Difference]: Start difference. First operand 891 states and 1103 transitions. Second operand 3 states. [2021-10-11 00:28:54,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:54,758 INFO L93 Difference]: Finished difference Result 2319 states and 2877 transitions. [2021-10-11 00:28:54,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:54,758 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2021-10-11 00:28:54,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:54,766 INFO L225 Difference]: With dead ends: 2319 [2021-10-11 00:28:54,767 INFO L226 Difference]: Without dead ends: 1522 [2021-10-11 00:28:54,768 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:54,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1522 states. [2021-10-11 00:28:54,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1522 to 1520. [2021-10-11 00:28:54,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1520 states. [2021-10-11 00:28:54,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1520 states to 1520 states and 1870 transitions. [2021-10-11 00:28:54,925 INFO L78 Accepts]: Start accepts. Automaton has 1520 states and 1870 transitions. Word has length 62 [2021-10-11 00:28:54,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:54,925 INFO L481 AbstractCegarLoop]: Abstraction has 1520 states and 1870 transitions. [2021-10-11 00:28:54,925 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:54,926 INFO L276 IsEmpty]: Start isEmpty. Operand 1520 states and 1870 transitions. [2021-10-11 00:28:54,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-10-11 00:28:54,926 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:54,927 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:54,927 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-11 00:28:54,927 INFO L429 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:54,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:54,927 INFO L82 PathProgramCache]: Analyzing trace with hash -479572275, now seen corresponding path program 1 times [2021-10-11 00:28:54,928 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:54,928 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713913047] [2021-10-11 00:28:54,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:54,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:54,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:54,958 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713913047] [2021-10-11 00:28:54,959 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:54,959 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:54,959 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [552028262] [2021-10-11 00:28:54,959 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:54,959 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:54,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:54,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:54,960 INFO L87 Difference]: Start difference. First operand 1520 states and 1870 transitions. Second operand 3 states. [2021-10-11 00:28:55,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:55,244 INFO L93 Difference]: Finished difference Result 4144 states and 5092 transitions. [2021-10-11 00:28:55,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:55,244 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 63 [2021-10-11 00:28:55,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:55,259 INFO L225 Difference]: With dead ends: 4144 [2021-10-11 00:28:55,259 INFO L226 Difference]: Without dead ends: 2718 [2021-10-11 00:28:55,262 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:55,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2718 states. [2021-10-11 00:28:55,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2718 to 2716. [2021-10-11 00:28:55,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2716 states. [2021-10-11 00:28:55,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2716 states to 2716 states and 3314 transitions. [2021-10-11 00:28:55,528 INFO L78 Accepts]: Start accepts. Automaton has 2716 states and 3314 transitions. Word has length 63 [2021-10-11 00:28:55,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:55,528 INFO L481 AbstractCegarLoop]: Abstraction has 2716 states and 3314 transitions. [2021-10-11 00:28:55,528 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:55,528 INFO L276 IsEmpty]: Start isEmpty. Operand 2716 states and 3314 transitions. [2021-10-11 00:28:55,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-10-11 00:28:55,529 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:55,530 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:55,530 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-11 00:28:55,530 INFO L429 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:55,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:55,530 INFO L82 PathProgramCache]: Analyzing trace with hash -45843189, now seen corresponding path program 1 times [2021-10-11 00:28:55,530 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:55,531 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011917907] [2021-10-11 00:28:55,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:55,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:55,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:55,549 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011917907] [2021-10-11 00:28:55,550 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:55,550 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:28:55,550 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1059672761] [2021-10-11 00:28:55,550 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:55,550 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:55,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:55,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:55,551 INFO L87 Difference]: Start difference. First operand 2716 states and 3314 transitions. Second operand 3 states. [2021-10-11 00:28:55,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:55,775 INFO L93 Difference]: Finished difference Result 5252 states and 6425 transitions. [2021-10-11 00:28:55,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:55,776 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 63 [2021-10-11 00:28:55,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:55,789 INFO L225 Difference]: With dead ends: 5252 [2021-10-11 00:28:55,789 INFO L226 Difference]: Without dead ends: 2630 [2021-10-11 00:28:55,793 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:55,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2630 states. [2021-10-11 00:28:56,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2630 to 2630. [2021-10-11 00:28:56,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2630 states. [2021-10-11 00:28:56,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2630 states to 2630 states and 3216 transitions. [2021-10-11 00:28:56,034 INFO L78 Accepts]: Start accepts. Automaton has 2630 states and 3216 transitions. Word has length 63 [2021-10-11 00:28:56,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:56,035 INFO L481 AbstractCegarLoop]: Abstraction has 2630 states and 3216 transitions. [2021-10-11 00:28:56,035 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:56,035 INFO L276 IsEmpty]: Start isEmpty. Operand 2630 states and 3216 transitions. [2021-10-11 00:28:56,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-11 00:28:56,036 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:56,036 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:56,036 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-11 00:28:56,036 INFO L429 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:56,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:56,037 INFO L82 PathProgramCache]: Analyzing trace with hash -709022745, now seen corresponding path program 1 times [2021-10-11 00:28:56,037 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:56,037 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227060830] [2021-10-11 00:28:56,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:56,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:56,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:56,067 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227060830] [2021-10-11 00:28:56,067 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:56,067 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:56,067 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850398238] [2021-10-11 00:28:56,068 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:56,068 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:56,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:56,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:56,069 INFO L87 Difference]: Start difference. First operand 2630 states and 3216 transitions. Second operand 3 states. [2021-10-11 00:28:56,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:56,497 INFO L93 Difference]: Finished difference Result 7634 states and 9339 transitions. [2021-10-11 00:28:56,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:56,498 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2021-10-11 00:28:56,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:56,523 INFO L225 Difference]: With dead ends: 7634 [2021-10-11 00:28:56,523 INFO L226 Difference]: Without dead ends: 5074 [2021-10-11 00:28:56,527 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:56,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5074 states. [2021-10-11 00:28:57,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5074 to 5042. [2021-10-11 00:28:57,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5042 states. [2021-10-11 00:28:57,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5042 states to 5042 states and 6106 transitions. [2021-10-11 00:28:57,028 INFO L78 Accepts]: Start accepts. Automaton has 5042 states and 6106 transitions. Word has length 64 [2021-10-11 00:28:57,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:57,028 INFO L481 AbstractCegarLoop]: Abstraction has 5042 states and 6106 transitions. [2021-10-11 00:28:57,029 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:28:57,029 INFO L276 IsEmpty]: Start isEmpty. Operand 5042 states and 6106 transitions. [2021-10-11 00:28:57,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-11 00:28:57,031 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:57,033 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:57,033 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-11 00:28:57,033 INFO L429 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:57,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:57,034 INFO L82 PathProgramCache]: Analyzing trace with hash -1717276157, now seen corresponding path program 1 times [2021-10-11 00:28:57,034 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:57,034 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953877899] [2021-10-11 00:28:57,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:57,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:57,074 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:28:57,074 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953877899] [2021-10-11 00:28:57,075 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:57,075 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:28:57,075 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841551357] [2021-10-11 00:28:57,075 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:28:57,075 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:57,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:28:57,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:28:57,076 INFO L87 Difference]: Start difference. First operand 5042 states and 6106 transitions. Second operand 4 states. [2021-10-11 00:28:58,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:58,053 INFO L93 Difference]: Finished difference Result 14910 states and 18027 transitions. [2021-10-11 00:28:58,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:28:58,053 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2021-10-11 00:28:58,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:58,110 INFO L225 Difference]: With dead ends: 14910 [2021-10-11 00:28:58,110 INFO L226 Difference]: Without dead ends: 7496 [2021-10-11 00:28:58,119 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:28:58,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7496 states. [2021-10-11 00:28:58,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7496 to 7496. [2021-10-11 00:28:58,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7496 states. [2021-10-11 00:28:58,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7496 states to 7496 states and 9042 transitions. [2021-10-11 00:28:58,769 INFO L78 Accepts]: Start accepts. Automaton has 7496 states and 9042 transitions. Word has length 81 [2021-10-11 00:28:58,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:28:58,770 INFO L481 AbstractCegarLoop]: Abstraction has 7496 states and 9042 transitions. [2021-10-11 00:28:58,770 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:28:58,770 INFO L276 IsEmpty]: Start isEmpty. Operand 7496 states and 9042 transitions. [2021-10-11 00:28:58,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2021-10-11 00:28:58,775 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:28:58,775 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:28:58,775 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-11 00:28:58,775 INFO L429 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:28:58,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:28:58,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1115959489, now seen corresponding path program 1 times [2021-10-11 00:28:58,776 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:28:58,778 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1772208055] [2021-10-11 00:28:58,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:28:58,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:28:58,892 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2021-10-11 00:28:58,893 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1772208055] [2021-10-11 00:28:58,893 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:28:58,893 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:28:58,893 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431958054] [2021-10-11 00:28:58,895 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:28:58,895 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:28:58,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:28:58,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:58,896 INFO L87 Difference]: Start difference. First operand 7496 states and 9042 transitions. Second operand 3 states. [2021-10-11 00:28:59,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:28:59,794 INFO L93 Difference]: Finished difference Result 17102 states and 20603 transitions. [2021-10-11 00:28:59,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:28:59,795 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 110 [2021-10-11 00:28:59,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:28:59,814 INFO L225 Difference]: With dead ends: 17102 [2021-10-11 00:28:59,814 INFO L226 Difference]: Without dead ends: 9662 [2021-10-11 00:28:59,824 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:28:59,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9662 states. [2021-10-11 00:29:00,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9662 to 9614. [2021-10-11 00:29:00,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9614 states. [2021-10-11 00:29:00,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9614 states to 9614 states and 11518 transitions. [2021-10-11 00:29:00,651 INFO L78 Accepts]: Start accepts. Automaton has 9614 states and 11518 transitions. Word has length 110 [2021-10-11 00:29:00,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:00,652 INFO L481 AbstractCegarLoop]: Abstraction has 9614 states and 11518 transitions. [2021-10-11 00:29:00,652 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:00,652 INFO L276 IsEmpty]: Start isEmpty. Operand 9614 states and 11518 transitions. [2021-10-11 00:29:00,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-10-11 00:29:00,658 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:00,658 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:00,658 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-11 00:29:00,658 INFO L429 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:00,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:00,659 INFO L82 PathProgramCache]: Analyzing trace with hash 577449217, now seen corresponding path program 1 times [2021-10-11 00:29:00,659 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:00,659 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296892902] [2021-10-11 00:29:00,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:00,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:00,712 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:00,712 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296892902] [2021-10-11 00:29:00,712 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:00,713 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:29:00,713 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206413654] [2021-10-11 00:29:00,713 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:29:00,713 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:00,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:29:00,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:29:00,714 INFO L87 Difference]: Start difference. First operand 9614 states and 11518 transitions. Second operand 4 states. [2021-10-11 00:29:01,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:01,473 INFO L93 Difference]: Finished difference Result 17020 states and 20462 transitions. [2021-10-11 00:29:01,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:29:01,474 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2021-10-11 00:29:01,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:01,491 INFO L225 Difference]: With dead ends: 17020 [2021-10-11 00:29:01,491 INFO L226 Difference]: Without dead ends: 9616 [2021-10-11 00:29:01,501 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:01,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9616 states. [2021-10-11 00:29:02,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9616 to 9614. [2021-10-11 00:29:02,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9614 states. [2021-10-11 00:29:02,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9614 states to 9614 states and 11476 transitions. [2021-10-11 00:29:02,172 INFO L78 Accepts]: Start accepts. Automaton has 9614 states and 11476 transitions. Word has length 113 [2021-10-11 00:29:02,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:02,173 INFO L481 AbstractCegarLoop]: Abstraction has 9614 states and 11476 transitions. [2021-10-11 00:29:02,173 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:29:02,173 INFO L276 IsEmpty]: Start isEmpty. Operand 9614 states and 11476 transitions. [2021-10-11 00:29:02,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-10-11 00:29:02,182 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:02,183 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:02,183 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-11 00:29:02,183 INFO L429 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:02,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:02,184 INFO L82 PathProgramCache]: Analyzing trace with hash 163247736, now seen corresponding path program 1 times [2021-10-11 00:29:02,184 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:02,184 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142654646] [2021-10-11 00:29:02,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:02,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:02,258 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2021-10-11 00:29:02,258 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142654646] [2021-10-11 00:29:02,259 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:02,259 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-11 00:29:02,259 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091682985] [2021-10-11 00:29:02,259 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:02,259 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:02,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:02,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:02,260 INFO L87 Difference]: Start difference. First operand 9614 states and 11476 transitions. Second operand 3 states. [2021-10-11 00:29:03,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:03,202 INFO L93 Difference]: Finished difference Result 21076 states and 25107 transitions. [2021-10-11 00:29:03,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:03,203 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 142 [2021-10-11 00:29:03,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:03,225 INFO L225 Difference]: With dead ends: 21076 [2021-10-11 00:29:03,225 INFO L226 Difference]: Without dead ends: 11504 [2021-10-11 00:29:03,239 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:03,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11504 states. [2021-10-11 00:29:03,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11504 to 11440. [2021-10-11 00:29:03,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11440 states. [2021-10-11 00:29:03,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11440 states to 11440 states and 13564 transitions. [2021-10-11 00:29:03,961 INFO L78 Accepts]: Start accepts. Automaton has 11440 states and 13564 transitions. Word has length 142 [2021-10-11 00:29:03,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:03,962 INFO L481 AbstractCegarLoop]: Abstraction has 11440 states and 13564 transitions. [2021-10-11 00:29:03,962 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:03,962 INFO L276 IsEmpty]: Start isEmpty. Operand 11440 states and 13564 transitions. [2021-10-11 00:29:03,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-11 00:29:03,972 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:03,973 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:03,973 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-11 00:29:03,973 INFO L429 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:03,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:03,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1331585155, now seen corresponding path program 1 times [2021-10-11 00:29:03,974 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:03,974 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981175261] [2021-10-11 00:29:03,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:03,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:04,031 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:04,031 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981175261] [2021-10-11 00:29:04,031 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:04,031 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-11 00:29:04,032 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240403024] [2021-10-11 00:29:04,032 INFO L461 AbstractCegarLoop]: Interpolant automaton has 4 states [2021-10-11 00:29:04,032 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:04,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-11 00:29:04,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-11 00:29:04,033 INFO L87 Difference]: Start difference. First operand 11440 states and 13564 transitions. Second operand 4 states. [2021-10-11 00:29:04,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:04,843 INFO L93 Difference]: Finished difference Result 20966 states and 24946 transitions. [2021-10-11 00:29:04,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-11 00:29:04,844 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 145 [2021-10-11 00:29:04,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:04,865 INFO L225 Difference]: With dead ends: 20966 [2021-10-11 00:29:04,865 INFO L226 Difference]: Without dead ends: 11442 [2021-10-11 00:29:04,877 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-11 00:29:04,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11442 states. [2021-10-11 00:29:05,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11442 to 11440. [2021-10-11 00:29:05,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11440 states. [2021-10-11 00:29:05,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11440 states to 11440 states and 13484 transitions. [2021-10-11 00:29:05,535 INFO L78 Accepts]: Start accepts. Automaton has 11440 states and 13484 transitions. Word has length 145 [2021-10-11 00:29:05,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:05,535 INFO L481 AbstractCegarLoop]: Abstraction has 11440 states and 13484 transitions. [2021-10-11 00:29:05,535 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2021-10-11 00:29:05,535 INFO L276 IsEmpty]: Start isEmpty. Operand 11440 states and 13484 transitions. [2021-10-11 00:29:05,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2021-10-11 00:29:05,552 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:05,553 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:05,553 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-11 00:29:05,553 INFO L429 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:05,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:05,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1031093230, now seen corresponding path program 1 times [2021-10-11 00:29:05,554 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:05,554 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588205398] [2021-10-11 00:29:05,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:05,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:05,612 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:05,613 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588205398] [2021-10-11 00:29:05,613 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:05,613 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:05,613 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536796594] [2021-10-11 00:29:05,614 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:05,614 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:05,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:05,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:05,615 INFO L87 Difference]: Start difference. First operand 11440 states and 13484 transitions. Second operand 3 states. [2021-10-11 00:29:06,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:06,267 INFO L93 Difference]: Finished difference Result 19782 states and 23399 transitions. [2021-10-11 00:29:06,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:06,268 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 174 [2021-10-11 00:29:06,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:06,290 INFO L225 Difference]: With dead ends: 19782 [2021-10-11 00:29:06,290 INFO L226 Difference]: Without dead ends: 11472 [2021-10-11 00:29:06,301 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:06,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11472 states. [2021-10-11 00:29:07,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11472 to 11440. [2021-10-11 00:29:07,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11440 states. [2021-10-11 00:29:07,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11440 states to 11440 states and 13276 transitions. [2021-10-11 00:29:07,015 INFO L78 Accepts]: Start accepts. Automaton has 11440 states and 13276 transitions. Word has length 174 [2021-10-11 00:29:07,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:07,015 INFO L481 AbstractCegarLoop]: Abstraction has 11440 states and 13276 transitions. [2021-10-11 00:29:07,015 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:07,015 INFO L276 IsEmpty]: Start isEmpty. Operand 11440 states and 13276 transitions. [2021-10-11 00:29:07,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2021-10-11 00:29:07,025 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:07,025 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:07,025 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-11 00:29:07,025 INFO L429 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:07,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:07,026 INFO L82 PathProgramCache]: Analyzing trace with hash 807546521, now seen corresponding path program 1 times [2021-10-11 00:29:07,026 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:07,026 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676499081] [2021-10-11 00:29:07,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:07,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:07,090 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:07,091 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676499081] [2021-10-11 00:29:07,091 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:07,091 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:07,091 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512658584] [2021-10-11 00:29:07,092 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:07,092 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:07,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:07,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:07,093 INFO L87 Difference]: Start difference. First operand 11440 states and 13276 transitions. Second operand 3 states. [2021-10-11 00:29:07,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:07,811 INFO L93 Difference]: Finished difference Result 18390 states and 21415 transitions. [2021-10-11 00:29:07,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:07,811 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 176 [2021-10-11 00:29:07,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:07,836 INFO L225 Difference]: With dead ends: 18390 [2021-10-11 00:29:07,836 INFO L226 Difference]: Without dead ends: 11440 [2021-10-11 00:29:07,843 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:07,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11440 states. [2021-10-11 00:29:08,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11440 to 11410. [2021-10-11 00:29:08,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11410 states. [2021-10-11 00:29:08,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11410 states to 11410 states and 13082 transitions. [2021-10-11 00:29:08,737 INFO L78 Accepts]: Start accepts. Automaton has 11410 states and 13082 transitions. Word has length 176 [2021-10-11 00:29:08,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:08,737 INFO L481 AbstractCegarLoop]: Abstraction has 11410 states and 13082 transitions. [2021-10-11 00:29:08,737 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:08,737 INFO L276 IsEmpty]: Start isEmpty. Operand 11410 states and 13082 transitions. [2021-10-11 00:29:08,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2021-10-11 00:29:08,747 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:08,747 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:08,747 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-11 00:29:08,747 INFO L429 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:08,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:08,748 INFO L82 PathProgramCache]: Analyzing trace with hash 251088387, now seen corresponding path program 1 times [2021-10-11 00:29:08,748 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:08,748 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680163303] [2021-10-11 00:29:08,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:08,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:08,828 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-11 00:29:08,829 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680163303] [2021-10-11 00:29:08,829 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:08,829 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:08,829 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605611736] [2021-10-11 00:29:08,830 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:08,830 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:08,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:08,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:08,831 INFO L87 Difference]: Start difference. First operand 11410 states and 13082 transitions. Second operand 3 states. [2021-10-11 00:29:09,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:09,690 INFO L93 Difference]: Finished difference Result 22664 states and 25781 transitions. [2021-10-11 00:29:09,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:09,690 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 178 [2021-10-11 00:29:09,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:09,701 INFO L225 Difference]: With dead ends: 22664 [2021-10-11 00:29:09,702 INFO L226 Difference]: Without dead ends: 6788 [2021-10-11 00:29:09,713 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:09,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6788 states. [2021-10-11 00:29:10,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6788 to 6580. [2021-10-11 00:29:10,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6580 states. [2021-10-11 00:29:10,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6580 states to 6580 states and 7246 transitions. [2021-10-11 00:29:10,195 INFO L78 Accepts]: Start accepts. Automaton has 6580 states and 7246 transitions. Word has length 178 [2021-10-11 00:29:10,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:10,196 INFO L481 AbstractCegarLoop]: Abstraction has 6580 states and 7246 transitions. [2021-10-11 00:29:10,196 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:10,196 INFO L276 IsEmpty]: Start isEmpty. Operand 6580 states and 7246 transitions. [2021-10-11 00:29:10,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2021-10-11 00:29:10,203 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:10,203 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:10,203 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-11 00:29:10,203 INFO L429 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:10,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:10,204 INFO L82 PathProgramCache]: Analyzing trace with hash -32931800, now seen corresponding path program 1 times [2021-10-11 00:29:10,204 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:10,204 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795569258] [2021-10-11 00:29:10,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:10,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-11 00:29:10,293 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-11 00:29:10,293 INFO L353 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795569258] [2021-10-11 00:29:10,294 INFO L219 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-11 00:29:10,294 INFO L232 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-11 00:29:10,294 INFO L155 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781742156] [2021-10-11 00:29:10,294 INFO L461 AbstractCegarLoop]: Interpolant automaton has 3 states [2021-10-11 00:29:10,295 INFO L142 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-11 00:29:10,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-11 00:29:10,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:10,296 INFO L87 Difference]: Start difference. First operand 6580 states and 7246 transitions. Second operand 3 states. [2021-10-11 00:29:10,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-11 00:29:10,750 INFO L93 Difference]: Finished difference Result 11554 states and 12749 transitions. [2021-10-11 00:29:10,750 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-11 00:29:10,750 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 180 [2021-10-11 00:29:10,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-11 00:29:10,759 INFO L225 Difference]: With dead ends: 11554 [2021-10-11 00:29:10,759 INFO L226 Difference]: Without dead ends: 6580 [2021-10-11 00:29:10,764 INFO L677 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-11 00:29:10,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6580 states. [2021-10-11 00:29:11,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6580 to 6580. [2021-10-11 00:29:11,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6580 states. [2021-10-11 00:29:11,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6580 states to 6580 states and 7168 transitions. [2021-10-11 00:29:11,184 INFO L78 Accepts]: Start accepts. Automaton has 6580 states and 7168 transitions. Word has length 180 [2021-10-11 00:29:11,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-11 00:29:11,185 INFO L481 AbstractCegarLoop]: Abstraction has 6580 states and 7168 transitions. [2021-10-11 00:29:11,185 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2021-10-11 00:29:11,185 INFO L276 IsEmpty]: Start isEmpty. Operand 6580 states and 7168 transitions. [2021-10-11 00:29:11,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2021-10-11 00:29:11,190 INFO L414 BasicCegarLoop]: Found error trace [2021-10-11 00:29:11,191 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-11 00:29:11,192 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-11 00:29:11,192 INFO L429 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2021-10-11 00:29:11,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-11 00:29:11,192 INFO L82 PathProgramCache]: Analyzing trace with hash 1382104249, now seen corresponding path program 1 times [2021-10-11 00:29:11,192 INFO L162 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-11 00:29:11,192 INFO L353 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601609159] [2021-10-11 00:29:11,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-11 00:29:11,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-11 00:29:11,215 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-11 00:29:11,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-11 00:29:11,235 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-11 00:29:11,333 INFO L173 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-11 00:29:11,333 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2021-10-11 00:29:11,333 WARN L518 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-11 00:29:11,544 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.10 12:29:11 BoogieIcfgContainer [2021-10-11 00:29:11,545 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-11 00:29:11,545 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-11 00:29:11,545 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-11 00:29:11,545 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-11 00:29:11,546 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.10 12:28:50" (3/4) ... [2021-10-11 00:29:11,548 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-11 00:29:11,711 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1abea315-5767-4661-a358-79aa99a18ade/bin/uautomizer-Z5i5R5N3CC/witness.graphml [2021-10-11 00:29:11,712 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-11 00:29:11,714 INFO L168 Benchmark]: Toolchain (without parser) took 22475.40 ms. Allocated memory was 117.4 MB in the beginning and 3.0 GB in the end (delta: 2.9 GB). Free memory was 81.2 MB in the beginning and 2.8 GB in the end (delta: -2.7 GB). Peak memory consumption was 254.6 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:11,714 INFO L168 Benchmark]: CDTParser took 0.72 ms. Allocated memory is still 117.4 MB. Free memory is still 97.7 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-11 00:29:11,715 INFO L168 Benchmark]: CACSL2BoogieTranslator took 367.79 ms. Allocated memory is still 117.4 MB. Free memory was 81.1 MB in the beginning and 66.7 MB in the end (delta: 14.4 MB). Peak memory consumption was 14.7 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:11,715 INFO L168 Benchmark]: Boogie Procedure Inliner took 72.46 ms. Allocated memory is still 117.4 MB. Free memory was 66.5 MB in the beginning and 63.2 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:11,716 INFO L168 Benchmark]: Boogie Preprocessor took 54.33 ms. Allocated memory is still 117.4 MB. Free memory was 63.2 MB in the beginning and 60.1 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:11,716 INFO L168 Benchmark]: RCFGBuilder took 1214.12 ms. Allocated memory is still 117.4 MB. Free memory was 60.1 MB in the beginning and 84.3 MB in the end (delta: -24.2 MB). Peak memory consumption was 27.0 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:11,717 INFO L168 Benchmark]: TraceAbstraction took 20592.86 ms. Allocated memory was 117.4 MB in the beginning and 3.0 GB in the end (delta: 2.9 GB). Free memory was 83.7 MB in the beginning and 2.8 GB in the end (delta: -2.7 GB). Peak memory consumption was 225.5 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:11,720 INFO L168 Benchmark]: Witness Printer took 166.75 ms. Allocated memory is still 3.0 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 28.3 MB). Peak memory consumption was 29.4 MB. Max. memory is 16.1 GB. [2021-10-11 00:29:11,723 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.72 ms. Allocated memory is still 117.4 MB. Free memory is still 97.7 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 367.79 ms. Allocated memory is still 117.4 MB. Free memory was 81.1 MB in the beginning and 66.7 MB in the end (delta: 14.4 MB). Peak memory consumption was 14.7 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 72.46 ms. Allocated memory is still 117.4 MB. Free memory was 66.5 MB in the beginning and 63.2 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 54.33 ms. Allocated memory is still 117.4 MB. Free memory was 63.2 MB in the beginning and 60.1 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1214.12 ms. Allocated memory is still 117.4 MB. Free memory was 60.1 MB in the beginning and 84.3 MB in the end (delta: -24.2 MB). Peak memory consumption was 27.0 MB. Max. memory is 16.1 GB. * TraceAbstraction took 20592.86 ms. Allocated memory was 117.4 MB in the beginning and 3.0 GB in the end (delta: 2.9 GB). Free memory was 83.7 MB in the beginning and 2.8 GB in the end (delta: -2.7 GB). Peak memory consumption was 225.5 MB. Max. memory is 16.1 GB. * Witness Printer took 166.75 ms. Allocated memory is still 3.0 GB. Free memory was 2.8 GB in the beginning and 2.8 GB in the end (delta: 28.3 MB). Peak memory consumption was 29.4 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 13]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int m_pc = 0; [L18] int t1_pc = 0; [L19] int t2_pc = 0; [L20] int t3_pc = 0; [L21] int m_st ; [L22] int t1_st ; [L23] int t2_st ; [L24] int t3_st ; [L25] int m_i ; [L26] int t1_i ; [L27] int t2_i ; [L28] int t3_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int E_1 = 2; [L34] int E_2 = 2; [L35] int E_3 = 2; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L689] int __retres1 ; [L602] m_i = 1 [L603] t1_i = 1 [L604] t2_i = 1 [L605] t3_i = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L630] int kernel_st ; [L631] int tmp ; [L632] int tmp___0 ; [L636] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L273] COND TRUE m_i == 1 [L274] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L278] COND TRUE t1_i == 1 [L279] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L283] COND TRUE t2_i == 1 [L284] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L288] COND TRUE t3_i == 1 [L289] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L410] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L415] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L420] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L425] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L430] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L435] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L440] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L189] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L199] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L201] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L205] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L208] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L218] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L220] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L508] tmp___0 = is_transmit1_triggered() [L510] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L224] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L227] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L237] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L239] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L516] tmp___1 = is_transmit2_triggered() [L518] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L243] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L246] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L256] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L258] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L524] tmp___2 = is_transmit3_triggered() [L526] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L453] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L458] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L463] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L468] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L473] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L478] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L483] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L644] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L647] kernel_st = 1 [L329] int tmp ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L333] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L298] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L301] COND TRUE m_st == 0 [L302] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L324] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L336] tmp = exists_runnable_thread() [L338] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L343] COND TRUE m_st == 0 [L344] int tmp_ndt_1; [L345] tmp_ndt_1 = __VERIFIER_nondet_int() [L346] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L357] COND TRUE t1_st == 0 [L358] int tmp_ndt_2; [L359] tmp_ndt_2 = __VERIFIER_nondet_int() [L360] COND TRUE \read(tmp_ndt_2) [L362] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L86] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L97] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L99] t1_pc = 1 [L100] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L371] COND TRUE t2_st == 0 [L372] int tmp_ndt_3; [L373] tmp_ndt_3 = __VERIFIER_nondet_int() [L374] COND TRUE \read(tmp_ndt_3) [L376] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L121] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L132] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L134] t2_pc = 1 [L135] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L385] COND TRUE t3_st == 0 [L386] int tmp_ndt_4; [L387] tmp_ndt_4 = __VERIFIER_nondet_int() [L388] COND TRUE \read(tmp_ndt_4) [L390] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L156] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L167] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L169] t3_pc = 1 [L170] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L333] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L298] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L301] COND TRUE m_st == 0 [L302] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L324] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L336] tmp = exists_runnable_thread() [L338] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L343] COND TRUE m_st == 0 [L344] int tmp_ndt_1; [L345] tmp_ndt_1 = __VERIFIER_nondet_int() [L346] COND TRUE \read(tmp_ndt_1) [L348] m_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L45] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L56] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L59] E_1 = 1 [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L189] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L201] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L205] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L208] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L209] COND TRUE E_1 == 1 [L210] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L220] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L508] tmp___0 = is_transmit1_triggered() [L510] COND TRUE \read(tmp___0) [L511] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L224] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L227] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L228] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L239] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L516] tmp___1 = is_transmit2_triggered() [L518] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L243] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L246] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L247] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L258] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L524] tmp___2 = is_transmit3_triggered() [L526] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L61] E_1 = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L64] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L66] m_pc = 1 [L67] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L357] COND TRUE t1_st == 0 [L358] int tmp_ndt_2; [L359] tmp_ndt_2 = __VERIFIER_nondet_int() [L360] COND TRUE \read(tmp_ndt_2) [L362] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L86] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L89] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L105] E_2 = 1 [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L189] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L190] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L201] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L205] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L208] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L209] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L220] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L508] tmp___0 = is_transmit1_triggered() [L510] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L224] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L227] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L228] COND TRUE E_2 == 1 [L229] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L239] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L516] tmp___1 = is_transmit2_triggered() [L518] COND TRUE \read(tmp___1) [L519] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L243] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L246] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L247] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L258] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L524] tmp___2 = is_transmit3_triggered() [L526] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L107] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L97] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L99] t1_pc = 1 [L100] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L371] COND TRUE t2_st == 0 [L372] int tmp_ndt_3; [L373] tmp_ndt_3 = __VERIFIER_nondet_int() [L374] COND TRUE \read(tmp_ndt_3) [L376] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L121] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L124] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L140] E_3 = 1 [L493] int tmp ; [L494] int tmp___0 ; [L495] int tmp___1 ; [L496] int tmp___2 ; [L186] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L189] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L190] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L201] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L500] tmp = is_master_triggered() [L502] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L205] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L208] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L209] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L220] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L508] tmp___0 = is_transmit1_triggered() [L510] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L224] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L227] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L228] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L239] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L516] tmp___1 = is_transmit2_triggered() [L518] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L243] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L246] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L247] COND TRUE E_3 == 1 [L248] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L258] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L524] tmp___2 = is_transmit3_triggered() [L526] COND TRUE \read(tmp___2) [L527] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L142] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L132] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L134] t2_pc = 1 [L135] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L385] COND TRUE t3_st == 0 [L386] int tmp_ndt_4; [L387] tmp_ndt_4 = __VERIFIER_nondet_int() [L388] COND TRUE \read(tmp_ndt_4) [L390] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L156] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L159] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L13] reach_error() VAL [E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 276 locations, 1 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 20.3s, OverallIterations: 27, TraceHistogramMax: 2, AutomataDifference: 10.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 10841 SDtfs, 11167 SDslu, 8647 SDs, 0 SdLazy, 600 SolverSat, 245 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 93 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=11440occurred in iteration=21, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.8s AutomataMinimizationTime, 26 MinimizatonAttempts, 2370 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 2526 NumberOfCodeBlocks, 2526 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 2318 ConstructedInterpolants, 0 QuantifiedInterpolants, 405898 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 171/171 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...