./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4e77c044 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4232b4ba156e25efb1c3d6c50a48cd7b8244ddaf ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-4e77c04 [2021-10-13 00:14:32,488 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-13 00:14:32,490 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-13 00:14:32,547 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-13 00:14:32,548 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-13 00:14:32,552 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-13 00:14:32,555 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-13 00:14:32,559 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-13 00:14:32,561 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-13 00:14:32,566 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-13 00:14:32,567 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-13 00:14:32,569 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-13 00:14:32,569 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-13 00:14:32,572 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-13 00:14:32,573 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-13 00:14:32,576 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-13 00:14:32,577 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-13 00:14:32,578 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-13 00:14:32,587 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-13 00:14:32,593 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-13 00:14:32,595 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-13 00:14:32,596 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-13 00:14:32,599 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-13 00:14:32,600 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-13 00:14:32,607 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-13 00:14:32,607 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-13 00:14:32,607 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-13 00:14:32,608 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-13 00:14:32,609 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-13 00:14:32,610 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-13 00:14:32,610 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-13 00:14:32,611 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-13 00:14:32,612 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-13 00:14:32,613 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-13 00:14:32,614 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-13 00:14:32,621 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-13 00:14:32,622 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-13 00:14:32,622 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-13 00:14:32,622 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-13 00:14:32,623 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-13 00:14:32,624 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-13 00:14:32,624 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-13 00:14:32,671 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-13 00:14:32,671 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-13 00:14:32,672 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-13 00:14:32,672 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-13 00:14:32,679 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-13 00:14:32,679 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-13 00:14:32,679 INFO L138 SettingsManager]: * Use SBE=true [2021-10-13 00:14:32,680 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-13 00:14:32,680 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-13 00:14:32,680 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-13 00:14:32,680 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-13 00:14:32,680 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-13 00:14:32,681 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-13 00:14:32,681 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-13 00:14:32,681 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-13 00:14:32,681 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-13 00:14:32,681 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-13 00:14:32,681 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-13 00:14:32,682 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-13 00:14:32,682 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-13 00:14:32,682 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-13 00:14:32,682 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-13 00:14:32,682 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 00:14:32,683 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-13 00:14:32,683 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-13 00:14:32,683 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-13 00:14:32,683 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-13 00:14:32,683 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-13 00:14:32,684 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-13 00:14:32,684 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-13 00:14:32,684 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4232b4ba156e25efb1c3d6c50a48cd7b8244ddaf [2021-10-13 00:14:32,945 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-13 00:14:32,969 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-13 00:14:32,972 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-13 00:14:32,975 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-13 00:14:32,975 INFO L275 PluginConnector]: CDTParser initialized [2021-10-13 00:14:32,976 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-13 00:14:33,052 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/data/9414c65c0/293f483cbc814fb684f826ddb2d22bb4/FLAG72599327e [2021-10-13 00:14:33,552 INFO L306 CDTParser]: Found 1 translation units. [2021-10-13 00:14:33,553 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-13 00:14:33,579 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/data/9414c65c0/293f483cbc814fb684f826ddb2d22bb4/FLAG72599327e [2021-10-13 00:14:33,872 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/data/9414c65c0/293f483cbc814fb684f826ddb2d22bb4 [2021-10-13 00:14:33,874 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-13 00:14:33,879 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-13 00:14:33,883 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-13 00:14:33,884 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-13 00:14:33,887 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-13 00:14:33,888 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 12:14:33" (1/1) ... [2021-10-13 00:14:33,890 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@22fa7565 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:33, skipping insertion in model container [2021-10-13 00:14:33,891 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 12:14:33" (1/1) ... [2021-10-13 00:14:33,898 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-13 00:14:33,953 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-13 00:14:34,250 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2021-10-13 00:14:34,261 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 00:14:34,269 INFO L203 MainTranslator]: Completed pre-run [2021-10-13 00:14:34,326 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2021-10-13 00:14:34,326 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-13 00:14:34,341 INFO L208 MainTranslator]: Completed translation [2021-10-13 00:14:34,342 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34 WrapperNode [2021-10-13 00:14:34,342 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-13 00:14:34,343 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-13 00:14:34,343 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-13 00:14:34,343 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-13 00:14:34,355 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,380 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,464 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-13 00:14:34,465 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-13 00:14:34,465 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-13 00:14:34,466 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-13 00:14:34,474 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,474 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,480 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,480 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,498 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,521 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,525 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,531 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-13 00:14:34,543 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-13 00:14:34,543 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-13 00:14:34,543 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-13 00:14:34,546 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (1/1) ... [2021-10-13 00:14:34,556 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-13 00:14:34,566 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:14:34,576 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-13 00:14:34,579 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-13 00:14:34,613 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-13 00:14:34,613 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-13 00:14:34,616 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-13 00:14:34,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-13 00:14:35,616 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-13 00:14:35,617 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-13 00:14:35,619 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:14:35 BoogieIcfgContainer [2021-10-13 00:14:35,619 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-13 00:14:35,621 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-13 00:14:35,621 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-13 00:14:35,624 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-13 00:14:35,624 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.10 12:14:33" (1/3) ... [2021-10-13 00:14:35,625 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@216445e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 12:14:35, skipping insertion in model container [2021-10-13 00:14:35,625 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 12:14:34" (2/3) ... [2021-10-13 00:14:35,626 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@216445e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.10 12:14:35, skipping insertion in model container [2021-10-13 00:14:35,626 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:14:35" (3/3) ... [2021-10-13 00:14:35,627 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-13 00:14:35,632 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-13 00:14:35,632 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-13 00:14:35,680 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-13 00:14:35,686 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-13 00:14:35,686 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-13 00:14:35,708 INFO L276 IsEmpty]: Start isEmpty. Operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:35,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-13 00:14:35,715 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:35,715 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:35,716 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:35,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:35,721 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-13 00:14:35,729 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:35,730 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417743365] [2021-10-13 00:14:35,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:35,731 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:35,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:35,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:35,910 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:35,910 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417743365] [2021-10-13 00:14:35,911 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1417743365] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:35,911 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:35,911 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-13 00:14:35,913 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847914313] [2021-10-13 00:14:35,917 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-13 00:14:35,917 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:35,929 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-13 00:14:35,930 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-13 00:14:35,933 INFO L87 Difference]: Start difference. First operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:35,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:35,978 INFO L93 Difference]: Finished difference Result 574 states and 893 transitions. [2021-10-13 00:14:35,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-13 00:14:35,980 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-13 00:14:35,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:35,995 INFO L225 Difference]: With dead ends: 574 [2021-10-13 00:14:35,996 INFO L226 Difference]: Without dead ends: 291 [2021-10-13 00:14:36,001 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-13 00:14:36,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-10-13 00:14:36,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-10-13 00:14:36,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.585820895522388) internal successors, (425), 290 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 425 transitions. [2021-10-13 00:14:36,073 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 425 transitions. Word has length 33 [2021-10-13 00:14:36,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:36,074 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 425 transitions. [2021-10-13 00:14:36,074 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,074 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 425 transitions. [2021-10-13 00:14:36,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-13 00:14:36,076 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:36,076 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:36,076 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-13 00:14:36,077 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:36,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:36,077 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-13 00:14:36,078 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:36,078 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375996705] [2021-10-13 00:14:36,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:36,078 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:36,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:36,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:36,170 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:36,170 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375996705] [2021-10-13 00:14:36,171 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1375996705] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:36,171 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:36,171 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:36,171 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231360835] [2021-10-13 00:14:36,173 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:14:36,173 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:36,174 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:14:36,174 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:14:36,174 INFO L87 Difference]: Start difference. First operand 291 states and 425 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:36,264 INFO L93 Difference]: Finished difference Result 568 states and 824 transitions. [2021-10-13 00:14:36,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:14:36,264 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-13 00:14:36,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:36,267 INFO L225 Difference]: With dead ends: 568 [2021-10-13 00:14:36,270 INFO L226 Difference]: Without dead ends: 291 [2021-10-13 00:14:36,272 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 11.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:36,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-10-13 00:14:36,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-10-13 00:14:36,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.541044776119403) internal successors, (413), 290 states have internal predecessors, (413), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 413 transitions. [2021-10-13 00:14:36,299 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 413 transitions. Word has length 33 [2021-10-13 00:14:36,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:36,299 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 413 transitions. [2021-10-13 00:14:36,299 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,300 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 413 transitions. [2021-10-13 00:14:36,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-13 00:14:36,305 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:36,305 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:36,305 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-13 00:14:36,306 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:36,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:36,309 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-13 00:14:36,309 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:36,310 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226169409] [2021-10-13 00:14:36,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:36,311 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:36,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:36,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:36,600 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:36,600 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1226169409] [2021-10-13 00:14:36,601 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1226169409] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:36,602 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:36,605 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:36,606 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [670067549] [2021-10-13 00:14:36,607 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:36,607 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:36,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:36,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:36,612 INFO L87 Difference]: Start difference. First operand 291 states and 413 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:36,668 INFO L93 Difference]: Finished difference Result 599 states and 859 transitions. [2021-10-13 00:14:36,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:36,675 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-13 00:14:36,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:36,680 INFO L225 Difference]: With dead ends: 599 [2021-10-13 00:14:36,680 INFO L226 Difference]: Without dead ends: 325 [2021-10-13 00:14:36,681 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.4ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:36,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2021-10-13 00:14:36,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 267. [2021-10-13 00:14:36,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 267 states, 248 states have (on average 1.5201612903225807) internal successors, (377), 266 states have internal predecessors, (377), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 377 transitions. [2021-10-13 00:14:36,709 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 377 transitions. Word has length 44 [2021-10-13 00:14:36,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:36,710 INFO L470 AbstractCegarLoop]: Abstraction has 267 states and 377 transitions. [2021-10-13 00:14:36,710 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,710 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 377 transitions. [2021-10-13 00:14:36,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-13 00:14:36,716 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:36,716 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:36,717 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-13 00:14:36,717 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:36,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:36,718 INFO L82 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-10-13 00:14:36,718 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:36,718 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16829904] [2021-10-13 00:14:36,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:36,719 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:36,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:36,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:36,853 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:36,853 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16829904] [2021-10-13 00:14:36,853 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [16829904] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:36,853 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:36,853 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:36,854 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956625744] [2021-10-13 00:14:36,854 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:36,854 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:36,855 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:36,855 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:36,855 INFO L87 Difference]: Start difference. First operand 267 states and 377 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:36,896 INFO L93 Difference]: Finished difference Result 744 states and 1062 transitions. [2021-10-13 00:14:36,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:36,896 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-13 00:14:36,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:36,900 INFO L225 Difference]: With dead ends: 744 [2021-10-13 00:14:36,900 INFO L226 Difference]: Without dead ends: 494 [2021-10-13 00:14:36,901 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:36,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2021-10-13 00:14:36,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 300. [2021-10-13 00:14:36,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 300 states, 281 states have (on average 1.5124555160142348) internal successors, (425), 299 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 425 transitions. [2021-10-13 00:14:36,918 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 425 transitions. Word has length 53 [2021-10-13 00:14:36,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:36,920 INFO L470 AbstractCegarLoop]: Abstraction has 300 states and 425 transitions. [2021-10-13 00:14:36,920 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:36,920 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 425 transitions. [2021-10-13 00:14:36,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-13 00:14:36,923 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:36,923 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:36,923 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-13 00:14:36,924 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:36,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:36,924 INFO L82 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-10-13 00:14:36,924 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:36,925 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60595457] [2021-10-13 00:14:36,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:36,925 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:36,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:37,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:37,042 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:37,042 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [60595457] [2021-10-13 00:14:37,043 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [60595457] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:37,043 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:37,043 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:37,043 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340883888] [2021-10-13 00:14:37,044 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:37,044 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:37,044 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:37,044 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:37,045 INFO L87 Difference]: Start difference. First operand 300 states and 425 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:37,091 INFO L93 Difference]: Finished difference Result 822 states and 1175 transitions. [2021-10-13 00:14:37,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:37,092 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-13 00:14:37,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:37,096 INFO L225 Difference]: With dead ends: 822 [2021-10-13 00:14:37,096 INFO L226 Difference]: Without dead ends: 539 [2021-10-13 00:14:37,097 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:37,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-13 00:14:37,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 321. [2021-10-13 00:14:37,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 321 states, 302 states have (on average 1.5066225165562914) internal successors, (455), 320 states have internal predecessors, (455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 455 transitions. [2021-10-13 00:14:37,113 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 455 transitions. Word has length 54 [2021-10-13 00:14:37,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:37,114 INFO L470 AbstractCegarLoop]: Abstraction has 321 states and 455 transitions. [2021-10-13 00:14:37,114 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,114 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 455 transitions. [2021-10-13 00:14:37,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-13 00:14:37,116 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:37,116 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:37,117 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-13 00:14:37,117 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:37,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:37,117 INFO L82 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-10-13 00:14:37,118 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:37,118 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750500844] [2021-10-13 00:14:37,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:37,118 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:37,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:37,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:37,234 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:37,235 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1750500844] [2021-10-13 00:14:37,235 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1750500844] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:37,235 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:37,235 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:37,235 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250249477] [2021-10-13 00:14:37,237 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:14:37,238 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:37,242 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:14:37,242 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:37,242 INFO L87 Difference]: Start difference. First operand 321 states and 455 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:37,447 INFO L93 Difference]: Finished difference Result 1003 states and 1436 transitions. [2021-10-13 00:14:37,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 00:14:37,448 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-13 00:14:37,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:37,453 INFO L225 Difference]: With dead ends: 1003 [2021-10-13 00:14:37,455 INFO L226 Difference]: Without dead ends: 699 [2021-10-13 00:14:37,456 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 25.5ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-13 00:14:37,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-10-13 00:14:37,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-10-13 00:14:37,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.48) internal successors, (592), 418 states have internal predecessors, (592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 592 transitions. [2021-10-13 00:14:37,479 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 592 transitions. Word has length 54 [2021-10-13 00:14:37,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:37,480 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 592 transitions. [2021-10-13 00:14:37,480 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,480 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 592 transitions. [2021-10-13 00:14:37,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-13 00:14:37,481 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:37,481 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:37,482 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-13 00:14:37,482 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:37,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:37,482 INFO L82 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-10-13 00:14:37,482 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:37,487 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275288431] [2021-10-13 00:14:37,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:37,487 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:37,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:37,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:37,566 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:37,566 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275288431] [2021-10-13 00:14:37,566 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1275288431] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:37,566 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:37,567 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:37,567 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462976363] [2021-10-13 00:14:37,567 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:14:37,567 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:37,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:14:37,568 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:37,568 INFO L87 Difference]: Start difference. First operand 419 states and 592 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:37,779 INFO L93 Difference]: Finished difference Result 1003 states and 1428 transitions. [2021-10-13 00:14:37,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-13 00:14:37,779 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-13 00:14:37,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:37,783 INFO L225 Difference]: With dead ends: 1003 [2021-10-13 00:14:37,783 INFO L226 Difference]: Without dead ends: 699 [2021-10-13 00:14:37,784 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 35.7ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-13 00:14:37,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-10-13 00:14:37,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-10-13 00:14:37,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.47) internal successors, (588), 418 states have internal predecessors, (588), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 588 transitions. [2021-10-13 00:14:37,805 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 588 transitions. Word has length 55 [2021-10-13 00:14:37,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:37,805 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 588 transitions. [2021-10-13 00:14:37,805 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,806 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 588 transitions. [2021-10-13 00:14:37,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-10-13 00:14:37,806 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:37,806 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:37,807 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-13 00:14:37,807 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:37,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:37,807 INFO L82 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-10-13 00:14:37,808 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:37,808 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394623902] [2021-10-13 00:14:37,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:37,808 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:37,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:37,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:37,903 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:37,903 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394623902] [2021-10-13 00:14:37,904 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [394623902] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:37,904 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:37,904 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:37,904 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1133061058] [2021-10-13 00:14:37,905 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:37,905 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:37,905 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:37,906 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:37,906 INFO L87 Difference]: Start difference. First operand 419 states and 588 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:37,942 INFO L93 Difference]: Finished difference Result 843 states and 1199 transitions. [2021-10-13 00:14:37,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:37,942 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-10-13 00:14:37,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:37,946 INFO L225 Difference]: With dead ends: 843 [2021-10-13 00:14:37,947 INFO L226 Difference]: Without dead ends: 539 [2021-10-13 00:14:37,947 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:37,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-13 00:14:37,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 414. [2021-10-13 00:14:37,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 414 states, 396 states have (on average 1.4646464646464648) internal successors, (580), 413 states have internal predecessors, (580), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 414 states to 414 states and 580 transitions. [2021-10-13 00:14:37,968 INFO L78 Accepts]: Start accepts. Automaton has 414 states and 580 transitions. Word has length 56 [2021-10-13 00:14:37,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:37,969 INFO L470 AbstractCegarLoop]: Abstraction has 414 states and 580 transitions. [2021-10-13 00:14:37,969 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:37,969 INFO L276 IsEmpty]: Start isEmpty. Operand 414 states and 580 transitions. [2021-10-13 00:14:37,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-10-13 00:14:37,970 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:37,971 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:37,971 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-13 00:14:37,971 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:37,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:37,972 INFO L82 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-10-13 00:14:37,972 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:37,972 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1596297299] [2021-10-13 00:14:37,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:37,973 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:38,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:38,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:38,080 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:38,080 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1596297299] [2021-10-13 00:14:38,081 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1596297299] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:38,081 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:38,081 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:38,081 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1897629408] [2021-10-13 00:14:38,082 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:38,082 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:38,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:38,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:38,088 INFO L87 Difference]: Start difference. First operand 414 states and 580 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:38,154 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-13 00:14:38,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:38,155 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-10-13 00:14:38,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:38,158 INFO L225 Difference]: With dead ends: 842 [2021-10-13 00:14:38,158 INFO L226 Difference]: Without dead ends: 543 [2021-10-13 00:14:38,159 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:38,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2021-10-13 00:14:38,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 394. [2021-10-13 00:14:38,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 380 states have (on average 1.4421052631578948) internal successors, (548), 393 states have internal predecessors, (548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 548 transitions. [2021-10-13 00:14:38,179 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 548 transitions. Word has length 60 [2021-10-13 00:14:38,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:38,179 INFO L470 AbstractCegarLoop]: Abstraction has 394 states and 548 transitions. [2021-10-13 00:14:38,180 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,180 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 548 transitions. [2021-10-13 00:14:38,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-13 00:14:38,181 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:38,181 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:38,181 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-13 00:14:38,181 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:38,182 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:38,182 INFO L82 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-10-13 00:14:38,182 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:38,183 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052927227] [2021-10-13 00:14:38,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:38,184 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:38,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:38,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:38,273 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:38,273 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052927227] [2021-10-13 00:14:38,273 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1052927227] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:38,273 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:38,273 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:38,274 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196605277] [2021-10-13 00:14:38,274 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:38,274 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:38,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:38,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:38,275 INFO L87 Difference]: Start difference. First operand 394 states and 548 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:38,326 INFO L93 Difference]: Finished difference Result 810 states and 1142 transitions. [2021-10-13 00:14:38,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:38,327 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-13 00:14:38,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:38,330 INFO L225 Difference]: With dead ends: 810 [2021-10-13 00:14:38,330 INFO L226 Difference]: Without dead ends: 531 [2021-10-13 00:14:38,331 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:38,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 531 states. [2021-10-13 00:14:38,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 531 to 382. [2021-10-13 00:14:38,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 382 states, 370 states have (on average 1.4324324324324325) internal successors, (530), 381 states have internal predecessors, (530), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 530 transitions. [2021-10-13 00:14:38,352 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 530 transitions. Word has length 64 [2021-10-13 00:14:38,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:38,352 INFO L470 AbstractCegarLoop]: Abstraction has 382 states and 530 transitions. [2021-10-13 00:14:38,353 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,353 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 530 transitions. [2021-10-13 00:14:38,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-10-13 00:14:38,354 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:38,354 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:38,354 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-13 00:14:38,354 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:38,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:38,355 INFO L82 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-10-13 00:14:38,355 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:38,357 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316424215] [2021-10-13 00:14:38,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:38,358 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:38,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:38,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:38,446 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:38,446 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316424215] [2021-10-13 00:14:38,446 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1316424215] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:38,446 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:38,446 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:38,447 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602793467] [2021-10-13 00:14:38,447 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:38,447 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:38,449 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:38,449 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:38,449 INFO L87 Difference]: Start difference. First operand 382 states and 530 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:38,523 INFO L93 Difference]: Finished difference Result 806 states and 1134 transitions. [2021-10-13 00:14:38,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:38,524 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-10-13 00:14:38,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:38,527 INFO L225 Difference]: With dead ends: 806 [2021-10-13 00:14:38,527 INFO L226 Difference]: Without dead ends: 539 [2021-10-13 00:14:38,528 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:38,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-13 00:14:38,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 362. [2021-10-13 00:14:38,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 362 states, 354 states have (on average 1.4067796610169492) internal successors, (498), 361 states have internal predecessors, (498), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 498 transitions. [2021-10-13 00:14:38,552 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 498 transitions. Word has length 65 [2021-10-13 00:14:38,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:38,552 INFO L470 AbstractCegarLoop]: Abstraction has 362 states and 498 transitions. [2021-10-13 00:14:38,552 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,553 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 498 transitions. [2021-10-13 00:14:38,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-10-13 00:14:38,558 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:38,558 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:38,558 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-13 00:14:38,559 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:38,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:38,559 INFO L82 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-10-13 00:14:38,559 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:38,560 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007811274] [2021-10-13 00:14:38,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:38,560 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:38,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:38,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:38,695 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:38,695 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007811274] [2021-10-13 00:14:38,695 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1007811274] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:38,695 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:38,696 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:14:38,696 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898529901] [2021-10-13 00:14:38,696 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:14:38,696 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:38,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:14:38,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:14:38,697 INFO L87 Difference]: Start difference. First operand 362 states and 498 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:38,873 INFO L93 Difference]: Finished difference Result 1093 states and 1516 transitions. [2021-10-13 00:14:38,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:14:38,873 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-10-13 00:14:38,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:38,878 INFO L225 Difference]: With dead ends: 1093 [2021-10-13 00:14:38,878 INFO L226 Difference]: Without dead ends: 846 [2021-10-13 00:14:38,879 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 50.7ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 00:14:38,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2021-10-13 00:14:38,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 412. [2021-10-13 00:14:38,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 412 states, 404 states have (on average 1.400990099009901) internal successors, (566), 411 states have internal predecessors, (566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 412 states to 412 states and 566 transitions. [2021-10-13 00:14:38,922 INFO L78 Accepts]: Start accepts. Automaton has 412 states and 566 transitions. Word has length 70 [2021-10-13 00:14:38,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:38,923 INFO L470 AbstractCegarLoop]: Abstraction has 412 states and 566 transitions. [2021-10-13 00:14:38,923 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:38,923 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 566 transitions. [2021-10-13 00:14:38,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-13 00:14:38,924 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:38,924 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:38,924 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-13 00:14:38,925 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:38,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:38,925 INFO L82 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-10-13 00:14:38,925 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:38,926 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179654062] [2021-10-13 00:14:38,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:38,926 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:38,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:38,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:38,983 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:38,984 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [179654062] [2021-10-13 00:14:38,984 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [179654062] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:38,984 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:38,984 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:38,984 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157609075] [2021-10-13 00:14:38,985 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:38,985 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:38,985 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:38,986 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:38,986 INFO L87 Difference]: Start difference. First operand 412 states and 566 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:39,049 INFO L93 Difference]: Finished difference Result 842 states and 1171 transitions. [2021-10-13 00:14:39,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:39,049 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-13 00:14:39,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:39,053 INFO L225 Difference]: With dead ends: 842 [2021-10-13 00:14:39,053 INFO L226 Difference]: Without dead ends: 578 [2021-10-13 00:14:39,054 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:39,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states. [2021-10-13 00:14:39,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 396. [2021-10-13 00:14:39,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 390 states have (on average 1.3846153846153846) internal successors, (540), 395 states have internal predecessors, (540), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 540 transitions. [2021-10-13 00:14:39,084 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 540 transitions. Word has length 71 [2021-10-13 00:14:39,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:39,084 INFO L470 AbstractCegarLoop]: Abstraction has 396 states and 540 transitions. [2021-10-13 00:14:39,084 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,084 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 540 transitions. [2021-10-13 00:14:39,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-13 00:14:39,085 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:39,086 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:39,086 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-13 00:14:39,086 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:39,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:39,087 INFO L82 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-10-13 00:14:39,087 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:39,087 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684853624] [2021-10-13 00:14:39,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:39,087 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:39,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:39,166 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:39,166 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:39,166 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684853624] [2021-10-13 00:14:39,166 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [684853624] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:39,167 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:39,167 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:39,167 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [818139034] [2021-10-13 00:14:39,167 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:39,167 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:39,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:39,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:39,168 INFO L87 Difference]: Start difference. First operand 396 states and 540 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:39,222 INFO L93 Difference]: Finished difference Result 711 states and 985 transitions. [2021-10-13 00:14:39,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:39,223 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-13 00:14:39,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:39,226 INFO L225 Difference]: With dead ends: 711 [2021-10-13 00:14:39,226 INFO L226 Difference]: Without dead ends: 476 [2021-10-13 00:14:39,227 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:39,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 476 states. [2021-10-13 00:14:39,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 476 to 392. [2021-10-13 00:14:39,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.3772609819121446) internal successors, (533), 391 states have internal predecessors, (533), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 533 transitions. [2021-10-13 00:14:39,256 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 533 transitions. Word has length 71 [2021-10-13 00:14:39,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:39,256 INFO L470 AbstractCegarLoop]: Abstraction has 392 states and 533 transitions. [2021-10-13 00:14:39,257 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,257 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 533 transitions. [2021-10-13 00:14:39,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-13 00:14:39,258 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:39,258 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:39,258 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-13 00:14:39,258 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:39,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:39,259 INFO L82 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-10-13 00:14:39,259 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:39,259 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1819010427] [2021-10-13 00:14:39,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:39,260 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:39,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:39,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:39,386 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:39,387 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1819010427] [2021-10-13 00:14:39,387 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1819010427] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:39,387 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:39,387 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 00:14:39,387 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187741494] [2021-10-13 00:14:39,388 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 00:14:39,388 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:39,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 00:14:39,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-13 00:14:39,389 INFO L87 Difference]: Start difference. First operand 392 states and 533 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:39,727 INFO L93 Difference]: Finished difference Result 1356 states and 1856 transitions. [2021-10-13 00:14:39,728 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:14:39,728 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-13 00:14:39,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:39,734 INFO L225 Difference]: With dead ends: 1356 [2021-10-13 00:14:39,734 INFO L226 Difference]: Without dead ends: 1107 [2021-10-13 00:14:39,739 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 74.0ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 00:14:39,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-13 00:14:39,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 420. [2021-10-13 00:14:39,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 420 states, 415 states have (on average 1.3614457831325302) internal successors, (565), 419 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 565 transitions. [2021-10-13 00:14:39,778 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 565 transitions. Word has length 74 [2021-10-13 00:14:39,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:39,778 INFO L470 AbstractCegarLoop]: Abstraction has 420 states and 565 transitions. [2021-10-13 00:14:39,778 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,779 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 565 transitions. [2021-10-13 00:14:39,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-13 00:14:39,779 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:39,780 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:39,780 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-13 00:14:39,780 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:39,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:39,782 INFO L82 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-10-13 00:14:39,783 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:39,785 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406959043] [2021-10-13 00:14:39,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:39,785 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:39,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:39,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:39,852 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:39,852 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406959043] [2021-10-13 00:14:39,854 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406959043] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:39,854 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:39,854 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:39,854 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194897515] [2021-10-13 00:14:39,855 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:14:39,855 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:39,856 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:14:39,856 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:14:39,856 INFO L87 Difference]: Start difference. First operand 420 states and 565 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:39,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:39,984 INFO L93 Difference]: Finished difference Result 1083 states and 1467 transitions. [2021-10-13 00:14:39,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:14:39,984 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-13 00:14:39,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:40,001 INFO L225 Difference]: With dead ends: 1083 [2021-10-13 00:14:40,001 INFO L226 Difference]: Without dead ends: 828 [2021-10-13 00:14:40,002 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.4ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:40,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 828 states. [2021-10-13 00:14:40,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 828 to 633. [2021-10-13 00:14:40,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 633 states, 628 states have (on average 1.3423566878980893) internal successors, (843), 632 states have internal predecessors, (843), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 843 transitions. [2021-10-13 00:14:40,053 INFO L78 Accepts]: Start accepts. Automaton has 633 states and 843 transitions. Word has length 74 [2021-10-13 00:14:40,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:40,053 INFO L470 AbstractCegarLoop]: Abstraction has 633 states and 843 transitions. [2021-10-13 00:14:40,053 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,053 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 843 transitions. [2021-10-13 00:14:40,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-13 00:14:40,055 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:40,055 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:40,055 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-13 00:14:40,055 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:40,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:40,056 INFO L82 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-10-13 00:14:40,056 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:40,056 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255307378] [2021-10-13 00:14:40,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:40,056 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:40,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:40,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:40,152 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:40,152 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255307378] [2021-10-13 00:14:40,152 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1255307378] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:40,153 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:40,153 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:14:40,153 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [23044550] [2021-10-13 00:14:40,153 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:14:40,153 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:40,154 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:14:40,154 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:14:40,154 INFO L87 Difference]: Start difference. First operand 633 states and 843 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:40,437 INFO L93 Difference]: Finished difference Result 1906 states and 2597 transitions. [2021-10-13 00:14:40,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:14:40,438 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-13 00:14:40,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:40,446 INFO L225 Difference]: With dead ends: 1906 [2021-10-13 00:14:40,446 INFO L226 Difference]: Without dead ends: 1540 [2021-10-13 00:14:40,448 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 47.9ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 00:14:40,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2021-10-13 00:14:40,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 621. [2021-10-13 00:14:40,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 621 states, 616 states have (on average 1.3457792207792207) internal successors, (829), 620 states have internal predecessors, (829), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 621 states to 621 states and 829 transitions. [2021-10-13 00:14:40,530 INFO L78 Accepts]: Start accepts. Automaton has 621 states and 829 transitions. Word has length 75 [2021-10-13 00:14:40,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:40,530 INFO L470 AbstractCegarLoop]: Abstraction has 621 states and 829 transitions. [2021-10-13 00:14:40,531 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,531 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 829 transitions. [2021-10-13 00:14:40,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-13 00:14:40,532 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:40,532 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:40,532 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-13 00:14:40,533 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:40,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:40,533 INFO L82 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-10-13 00:14:40,533 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:40,534 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323765453] [2021-10-13 00:14:40,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:40,534 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:40,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:40,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:40,608 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:40,608 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323765453] [2021-10-13 00:14:40,608 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1323765453] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:40,609 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:40,609 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:14:40,609 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605451672] [2021-10-13 00:14:40,609 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:14:40,610 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:40,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:14:40,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:14:40,611 INFO L87 Difference]: Start difference. First operand 621 states and 829 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:40,777 INFO L93 Difference]: Finished difference Result 973 states and 1316 transitions. [2021-10-13 00:14:40,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-13 00:14:40,778 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-13 00:14:40,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:40,783 INFO L225 Difference]: With dead ends: 973 [2021-10-13 00:14:40,783 INFO L226 Difference]: Without dead ends: 971 [2021-10-13 00:14:40,784 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 38.0ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 00:14:40,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 971 states. [2021-10-13 00:14:40,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 971 to 623. [2021-10-13 00:14:40,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 623 states, 618 states have (on average 1.3446601941747574) internal successors, (831), 622 states have internal predecessors, (831), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 623 states to 623 states and 831 transitions. [2021-10-13 00:14:40,843 INFO L78 Accepts]: Start accepts. Automaton has 623 states and 831 transitions. Word has length 75 [2021-10-13 00:14:40,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:40,843 INFO L470 AbstractCegarLoop]: Abstraction has 623 states and 831 transitions. [2021-10-13 00:14:40,844 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:40,844 INFO L276 IsEmpty]: Start isEmpty. Operand 623 states and 831 transitions. [2021-10-13 00:14:40,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-13 00:14:40,845 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:40,845 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:40,845 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-13 00:14:40,846 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:40,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:40,846 INFO L82 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-10-13 00:14:40,846 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:40,846 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674500154] [2021-10-13 00:14:40,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:40,847 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:40,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:40,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:40,910 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:40,910 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674500154] [2021-10-13 00:14:40,910 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [674500154] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:40,911 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:40,911 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:14:40,911 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584327723] [2021-10-13 00:14:40,912 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:14:40,912 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:40,912 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:14:40,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:14:40,916 INFO L87 Difference]: Start difference. First operand 623 states and 831 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:41,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:41,104 INFO L93 Difference]: Finished difference Result 1470 states and 2033 transitions. [2021-10-13 00:14:41,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:14:41,104 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-13 00:14:41,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:41,110 INFO L225 Difference]: With dead ends: 1470 [2021-10-13 00:14:41,111 INFO L226 Difference]: Without dead ends: 1102 [2021-10-13 00:14:41,112 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 31.6ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 00:14:41,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states. [2021-10-13 00:14:41,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 629. [2021-10-13 00:14:41,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 629 states, 624 states have (on average 1.3413461538461537) internal successors, (837), 628 states have internal predecessors, (837), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:41,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 629 states to 629 states and 837 transitions. [2021-10-13 00:14:41,172 INFO L78 Accepts]: Start accepts. Automaton has 629 states and 837 transitions. Word has length 76 [2021-10-13 00:14:41,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:41,173 INFO L470 AbstractCegarLoop]: Abstraction has 629 states and 837 transitions. [2021-10-13 00:14:41,173 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:41,173 INFO L276 IsEmpty]: Start isEmpty. Operand 629 states and 837 transitions. [2021-10-13 00:14:41,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-13 00:14:41,174 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:41,175 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:41,175 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-13 00:14:41,175 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:41,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:41,176 INFO L82 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-10-13 00:14:41,176 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:41,176 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566872397] [2021-10-13 00:14:41,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:41,176 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:41,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:41,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:41,226 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:41,226 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566872397] [2021-10-13 00:14:41,226 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1566872397] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:41,226 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:41,226 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:41,227 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699769743] [2021-10-13 00:14:41,227 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:14:41,227 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:41,228 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:14:41,228 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:14:41,228 INFO L87 Difference]: Start difference. First operand 629 states and 837 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:41,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:41,409 INFO L93 Difference]: Finished difference Result 1467 states and 1956 transitions. [2021-10-13 00:14:41,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:14:41,410 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-13 00:14:41,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:41,416 INFO L225 Difference]: With dead ends: 1467 [2021-10-13 00:14:41,416 INFO L226 Difference]: Without dead ends: 1075 [2021-10-13 00:14:41,417 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:41,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1075 states. [2021-10-13 00:14:41,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1075 to 819. [2021-10-13 00:14:41,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 819 states, 814 states have (on average 1.3329238329238329) internal successors, (1085), 818 states have internal predecessors, (1085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:41,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 819 states to 819 states and 1085 transitions. [2021-10-13 00:14:41,507 INFO L78 Accepts]: Start accepts. Automaton has 819 states and 1085 transitions. Word has length 76 [2021-10-13 00:14:41,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:41,508 INFO L470 AbstractCegarLoop]: Abstraction has 819 states and 1085 transitions. [2021-10-13 00:14:41,508 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:41,508 INFO L276 IsEmpty]: Start isEmpty. Operand 819 states and 1085 transitions. [2021-10-13 00:14:41,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-13 00:14:41,509 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:41,510 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:41,510 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-13 00:14:41,510 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:41,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:41,511 INFO L82 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-10-13 00:14:41,511 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:41,511 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294497996] [2021-10-13 00:14:41,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:41,511 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:41,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:41,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:41,596 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:41,596 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294497996] [2021-10-13 00:14:41,596 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1294497996] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:41,596 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:41,597 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:14:41,597 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989273331] [2021-10-13 00:14:41,597 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:14:41,597 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:41,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:14:41,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:14:41,598 INFO L87 Difference]: Start difference. First operand 819 states and 1085 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:42,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:42,089 INFO L93 Difference]: Finished difference Result 3152 states and 4196 transitions. [2021-10-13 00:14:42,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:14:42,090 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-13 00:14:42,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:42,103 INFO L225 Difference]: With dead ends: 3152 [2021-10-13 00:14:42,103 INFO L226 Difference]: Without dead ends: 2633 [2021-10-13 00:14:42,105 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 73.4ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-13 00:14:42,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2633 states. [2021-10-13 00:14:42,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2633 to 873. [2021-10-13 00:14:42,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.3283410138248848) internal successors, (1153), 872 states have internal predecessors, (1153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:42,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1153 transitions. [2021-10-13 00:14:42,208 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1153 transitions. Word has length 76 [2021-10-13 00:14:42,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:42,209 INFO L470 AbstractCegarLoop]: Abstraction has 873 states and 1153 transitions. [2021-10-13 00:14:42,209 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:42,209 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1153 transitions. [2021-10-13 00:14:42,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-13 00:14:42,210 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:42,211 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:42,211 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-13 00:14:42,211 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:42,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:42,212 INFO L82 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-10-13 00:14:42,212 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:42,212 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340035843] [2021-10-13 00:14:42,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:42,212 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:42,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:42,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:42,265 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:42,265 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340035843] [2021-10-13 00:14:42,265 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1340035843] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:42,266 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:42,266 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:42,266 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816546224] [2021-10-13 00:14:42,266 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:14:42,267 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:42,267 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:14:42,267 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:14:42,268 INFO L87 Difference]: Start difference. First operand 873 states and 1153 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:42,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:42,511 INFO L93 Difference]: Finished difference Result 2259 states and 2989 transitions. [2021-10-13 00:14:42,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:14:42,512 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-13 00:14:42,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:42,521 INFO L225 Difference]: With dead ends: 2259 [2021-10-13 00:14:42,522 INFO L226 Difference]: Without dead ends: 1687 [2021-10-13 00:14:42,523 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:42,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1687 states. [2021-10-13 00:14:42,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1687 to 1214. [2021-10-13 00:14:42,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1214 states, 1209 states have (on average 1.315963606286187) internal successors, (1591), 1213 states have internal predecessors, (1591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:42,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1214 states to 1214 states and 1591 transitions. [2021-10-13 00:14:42,641 INFO L78 Accepts]: Start accepts. Automaton has 1214 states and 1591 transitions. Word has length 77 [2021-10-13 00:14:42,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:42,641 INFO L470 AbstractCegarLoop]: Abstraction has 1214 states and 1591 transitions. [2021-10-13 00:14:42,642 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:42,642 INFO L276 IsEmpty]: Start isEmpty. Operand 1214 states and 1591 transitions. [2021-10-13 00:14:42,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-13 00:14:42,643 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:42,644 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:42,644 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-13 00:14:42,644 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:42,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:42,645 INFO L82 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-10-13 00:14:42,645 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:42,645 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343047076] [2021-10-13 00:14:42,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:42,645 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:42,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:42,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:42,682 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:42,682 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343047076] [2021-10-13 00:14:42,683 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1343047076] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:42,683 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:42,683 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:42,684 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630640063] [2021-10-13 00:14:42,685 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:42,685 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:42,686 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:42,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:42,686 INFO L87 Difference]: Start difference. First operand 1214 states and 1591 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:42,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:42,965 INFO L93 Difference]: Finished difference Result 2970 states and 3890 transitions. [2021-10-13 00:14:42,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:42,966 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-13 00:14:42,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:42,977 INFO L225 Difference]: With dead ends: 2970 [2021-10-13 00:14:42,977 INFO L226 Difference]: Without dead ends: 2014 [2021-10-13 00:14:42,979 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:42,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2014 states. [2021-10-13 00:14:43,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2014 to 1216. [2021-10-13 00:14:43,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1216 states, 1211 states have (on average 1.3154417836498762) internal successors, (1593), 1215 states have internal predecessors, (1593), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:43,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1216 states to 1216 states and 1593 transitions. [2021-10-13 00:14:43,104 INFO L78 Accepts]: Start accepts. Automaton has 1216 states and 1593 transitions. Word has length 78 [2021-10-13 00:14:43,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:43,104 INFO L470 AbstractCegarLoop]: Abstraction has 1216 states and 1593 transitions. [2021-10-13 00:14:43,105 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:43,105 INFO L276 IsEmpty]: Start isEmpty. Operand 1216 states and 1593 transitions. [2021-10-13 00:14:43,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-13 00:14:43,106 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:43,107 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:43,107 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-13 00:14:43,107 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:43,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:43,107 INFO L82 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-10-13 00:14:43,108 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:43,108 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25962837] [2021-10-13 00:14:43,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:43,108 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:43,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:43,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:43,193 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:43,193 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [25962837] [2021-10-13 00:14:43,193 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [25962837] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:43,193 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:43,193 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:43,194 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215928908] [2021-10-13 00:14:43,194 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:14:43,194 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:43,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:14:43,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:14:43,195 INFO L87 Difference]: Start difference. First operand 1216 states and 1593 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:43,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:43,430 INFO L93 Difference]: Finished difference Result 2522 states and 3298 transitions. [2021-10-13 00:14:43,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:14:43,430 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-13 00:14:43,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:43,438 INFO L225 Difference]: With dead ends: 2522 [2021-10-13 00:14:43,438 INFO L226 Difference]: Without dead ends: 1378 [2021-10-13 00:14:43,440 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 14.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:43,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1378 states. [2021-10-13 00:14:43,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1378 to 1021. [2021-10-13 00:14:43,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1021 states, 1016 states have (on average 1.3080708661417322) internal successors, (1329), 1020 states have internal predecessors, (1329), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:43,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1021 states to 1021 states and 1329 transitions. [2021-10-13 00:14:43,582 INFO L78 Accepts]: Start accepts. Automaton has 1021 states and 1329 transitions. Word has length 79 [2021-10-13 00:14:43,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:43,582 INFO L470 AbstractCegarLoop]: Abstraction has 1021 states and 1329 transitions. [2021-10-13 00:14:43,582 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:43,582 INFO L276 IsEmpty]: Start isEmpty. Operand 1021 states and 1329 transitions. [2021-10-13 00:14:43,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-13 00:14:43,584 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:43,584 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:43,584 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-13 00:14:43,584 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:43,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:43,585 INFO L82 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-10-13 00:14:43,585 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:43,585 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466491628] [2021-10-13 00:14:43,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:43,586 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:43,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:43,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:43,629 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:43,629 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466491628] [2021-10-13 00:14:43,629 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [466491628] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:43,629 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:43,630 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-13 00:14:43,630 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531835754] [2021-10-13 00:14:43,630 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-13 00:14:43,630 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:43,631 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-13 00:14:43,631 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:43,631 INFO L87 Difference]: Start difference. First operand 1021 states and 1329 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:43,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:43,872 INFO L93 Difference]: Finished difference Result 2417 states and 3163 transitions. [2021-10-13 00:14:43,872 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-13 00:14:43,873 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-13 00:14:43,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:43,881 INFO L225 Difference]: With dead ends: 2417 [2021-10-13 00:14:43,881 INFO L226 Difference]: Without dead ends: 1539 [2021-10-13 00:14:43,882 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-13 00:14:43,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1539 states. [2021-10-13 00:14:44,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1539 to 1027. [2021-10-13 00:14:44,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1027 states, 1022 states have (on average 1.3062622309197651) internal successors, (1335), 1026 states have internal predecessors, (1335), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:44,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1027 states to 1027 states and 1335 transitions. [2021-10-13 00:14:44,033 INFO L78 Accepts]: Start accepts. Automaton has 1027 states and 1335 transitions. Word has length 80 [2021-10-13 00:14:44,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:44,033 INFO L470 AbstractCegarLoop]: Abstraction has 1027 states and 1335 transitions. [2021-10-13 00:14:44,034 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:44,034 INFO L276 IsEmpty]: Start isEmpty. Operand 1027 states and 1335 transitions. [2021-10-13 00:14:44,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-13 00:14:44,035 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:44,035 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:44,036 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-13 00:14:44,036 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:44,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:44,036 INFO L82 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-10-13 00:14:44,036 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:44,037 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838419295] [2021-10-13 00:14:44,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:44,037 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:44,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:44,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:44,119 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:44,120 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838419295] [2021-10-13 00:14:44,120 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1838419295] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:44,120 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:14:44,120 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:14:44,120 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1876941328] [2021-10-13 00:14:44,121 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:14:44,121 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:44,122 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:14:44,122 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:14:44,122 INFO L87 Difference]: Start difference. First operand 1027 states and 1335 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:44,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:44,315 INFO L93 Difference]: Finished difference Result 2370 states and 3088 transitions. [2021-10-13 00:14:44,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:14:44,315 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-13 00:14:44,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:44,323 INFO L225 Difference]: With dead ends: 2370 [2021-10-13 00:14:44,323 INFO L226 Difference]: Without dead ends: 1438 [2021-10-13 00:14:44,325 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 15.0ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:14:44,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1438 states. [2021-10-13 00:14:44,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1438 to 969. [2021-10-13 00:14:44,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.299792531120332) internal successors, (1253), 968 states have internal predecessors, (1253), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:44,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1253 transitions. [2021-10-13 00:14:44,446 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1253 transitions. Word has length 80 [2021-10-13 00:14:44,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:44,446 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1253 transitions. [2021-10-13 00:14:44,446 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:44,446 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1253 transitions. [2021-10-13 00:14:44,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2021-10-13 00:14:44,462 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:44,462 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:44,463 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-13 00:14:44,463 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:44,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:44,463 INFO L82 PathProgramCache]: Analyzing trace with hash -1625709510, now seen corresponding path program 1 times [2021-10-13 00:14:44,464 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:44,464 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492915671] [2021-10-13 00:14:44,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:44,464 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:44,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:44,640 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:44,640 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:44,641 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492915671] [2021-10-13 00:14:44,641 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492915671] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:14:44,641 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [407716031] [2021-10-13 00:14:44,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:44,642 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:14:44,642 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:14:44,647 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:14:44,684 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-13 00:14:44,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:44,884 INFO L263 TraceCheckSpWp]: Trace formula consists of 713 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-13 00:14:44,894 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:14:45,424 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-13 00:14:45,424 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [407716031] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:14:45,425 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-13 00:14:45,425 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-13 00:14:45,425 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1152995916] [2021-10-13 00:14:45,425 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:14:45,426 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:45,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:14:45,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-13 00:14:45,427 INFO L87 Difference]: Start difference. First operand 969 states and 1253 transitions. Second operand has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:45,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:45,817 INFO L93 Difference]: Finished difference Result 2494 states and 3326 transitions. [2021-10-13 00:14:45,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:14:45,818 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 126 [2021-10-13 00:14:45,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:45,827 INFO L225 Difference]: With dead ends: 2494 [2021-10-13 00:14:45,827 INFO L226 Difference]: Without dead ends: 1704 [2021-10-13 00:14:45,829 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 121.3ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-13 00:14:45,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1704 states. [2021-10-13 00:14:45,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1704 to 969. [2021-10-13 00:14:45,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.2987551867219918) internal successors, (1252), 968 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:45,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1252 transitions. [2021-10-13 00:14:45,989 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1252 transitions. Word has length 126 [2021-10-13 00:14:45,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:45,989 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1252 transitions. [2021-10-13 00:14:45,990 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:45,990 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1252 transitions. [2021-10-13 00:14:45,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-10-13 00:14:45,993 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:45,993 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:46,031 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-13 00:14:46,218 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:14:46,219 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:46,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:46,219 INFO L82 PathProgramCache]: Analyzing trace with hash 652850677, now seen corresponding path program 1 times [2021-10-13 00:14:46,219 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:46,219 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97633961] [2021-10-13 00:14:46,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:46,219 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:46,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:46,387 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:46,387 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:46,387 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97633961] [2021-10-13 00:14:46,388 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97633961] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:14:46,388 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [975887431] [2021-10-13 00:14:46,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:46,388 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:14:46,388 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:14:46,390 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:14:46,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-13 00:14:46,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:46,629 INFO L263 TraceCheckSpWp]: Trace formula consists of 727 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-13 00:14:46,634 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:14:47,096 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:47,097 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [975887431] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:14:47,097 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:14:47,097 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-13 00:14:47,097 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052772009] [2021-10-13 00:14:47,098 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-13 00:14:47,098 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:47,099 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-13 00:14:47,099 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-13 00:14:47,099 INFO L87 Difference]: Start difference. First operand 969 states and 1252 transitions. Second operand has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:57,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:14:57,246 INFO L93 Difference]: Finished difference Result 16611 states and 22057 transitions. [2021-10-13 00:14:57,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-13 00:14:57,246 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-10-13 00:14:57,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:14:57,300 INFO L225 Difference]: With dead ends: 16611 [2021-10-13 00:14:57,300 INFO L226 Difference]: Without dead ends: 15827 [2021-10-13 00:14:57,325 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 222 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 5295.9ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-13 00:14:57,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15827 states. [2021-10-13 00:14:57,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15827 to 2668. [2021-10-13 00:14:57,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2996620352985355) internal successors, (3461), 2667 states have internal predecessors, (3461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:57,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3461 transitions. [2021-10-13 00:14:57,890 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3461 transitions. Word has length 130 [2021-10-13 00:14:57,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:14:57,891 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3461 transitions. [2021-10-13 00:14:57,891 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:14:57,891 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3461 transitions. [2021-10-13 00:14:57,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-13 00:14:57,897 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:14:57,897 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:14:57,936 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-13 00:14:58,110 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:14:58,110 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:14:58,111 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:14:58,111 INFO L82 PathProgramCache]: Analyzing trace with hash 1302889785, now seen corresponding path program 1 times [2021-10-13 00:14:58,111 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:14:58,111 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1974484367] [2021-10-13 00:14:58,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:58,112 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:14:58,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:58,300 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:58,300 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:14:58,300 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1974484367] [2021-10-13 00:14:58,301 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1974484367] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:14:58,301 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1445906422] [2021-10-13 00:14:58,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:14:58,301 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:14:58,301 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:14:58,306 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:14:58,323 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-13 00:14:58,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:14:58,568 INFO L263 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-13 00:14:58,573 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:14:58,955 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:14:58,955 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1445906422] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:14:58,955 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:14:58,956 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-13 00:14:58,956 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249401174] [2021-10-13 00:14:58,957 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-13 00:14:58,957 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:14:58,957 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-13 00:14:58,957 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-13 00:14:58,958 INFO L87 Difference]: Start difference. First operand 2668 states and 3461 transitions. Second operand has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:00,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:00,565 INFO L93 Difference]: Finished difference Result 9437 states and 12657 transitions. [2021-10-13 00:15:00,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-13 00:15:00,566 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-13 00:15:00,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:00,580 INFO L225 Difference]: With dead ends: 9437 [2021-10-13 00:15:00,581 INFO L226 Difference]: Without dead ends: 6988 [2021-10-13 00:15:00,585 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 141 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 142.7ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-13 00:15:00,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6988 states. [2021-10-13 00:15:00,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6988 to 2251. [2021-10-13 00:15:00,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2251 states, 2246 states have (on average 1.2943009795191451) internal successors, (2907), 2250 states have internal predecessors, (2907), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:00,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2251 states to 2251 states and 2907 transitions. [2021-10-13 00:15:00,942 INFO L78 Accepts]: Start accepts. Automaton has 2251 states and 2907 transitions. Word has length 131 [2021-10-13 00:15:00,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:00,942 INFO L470 AbstractCegarLoop]: Abstraction has 2251 states and 2907 transitions. [2021-10-13 00:15:00,942 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:00,943 INFO L276 IsEmpty]: Start isEmpty. Operand 2251 states and 2907 transitions. [2021-10-13 00:15:00,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-13 00:15:00,948 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:00,948 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:00,990 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-13 00:15:01,162 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-13 00:15:01,162 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:01,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:01,163 INFO L82 PathProgramCache]: Analyzing trace with hash 1342385059, now seen corresponding path program 1 times [2021-10-13 00:15:01,163 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:01,163 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623901598] [2021-10-13 00:15:01,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:01,163 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:01,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:01,294 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-13 00:15:01,295 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:01,295 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623901598] [2021-10-13 00:15:01,296 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1623901598] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:15:01,296 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:15:01,296 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-13 00:15:01,296 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2043185603] [2021-10-13 00:15:01,297 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-13 00:15:01,297 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:01,297 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-13 00:15:01,298 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-13 00:15:01,298 INFO L87 Difference]: Start difference. First operand 2251 states and 2907 transitions. Second operand has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:03,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:03,393 INFO L93 Difference]: Finished difference Result 12947 states and 17105 transitions. [2021-10-13 00:15:03,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-13 00:15:03,393 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-13 00:15:03,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:03,417 INFO L225 Difference]: With dead ends: 12947 [2021-10-13 00:15:03,417 INFO L226 Difference]: Without dead ends: 10935 [2021-10-13 00:15:03,422 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 130.5ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-13 00:15:03,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10935 states. [2021-10-13 00:15:03,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10935 to 2671. [2021-10-13 00:15:03,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2768192048012004) internal successors, (3404), 2670 states have internal predecessors, (3404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:03,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3404 transitions. [2021-10-13 00:15:03,943 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3404 transitions. Word has length 132 [2021-10-13 00:15:03,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:03,943 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3404 transitions. [2021-10-13 00:15:03,944 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:03,944 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3404 transitions. [2021-10-13 00:15:03,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-13 00:15:03,950 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:03,951 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:03,951 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-13 00:15:03,951 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:03,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:03,952 INFO L82 PathProgramCache]: Analyzing trace with hash 2020329826, now seen corresponding path program 1 times [2021-10-13 00:15:03,952 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:03,952 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957051282] [2021-10-13 00:15:03,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:03,953 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:04,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:04,094 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 00:15:04,094 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:04,094 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1957051282] [2021-10-13 00:15:04,094 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1957051282] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:15:04,095 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:15:04,095 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:15:04,095 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [5653789] [2021-10-13 00:15:04,095 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:15:04,096 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:04,096 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:15:04,096 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:15:04,097 INFO L87 Difference]: Start difference. First operand 2671 states and 3404 transitions. Second operand has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:05,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:05,096 INFO L93 Difference]: Finished difference Result 8601 states and 11289 transitions. [2021-10-13 00:15:05,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-13 00:15:05,097 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-13 00:15:05,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:05,108 INFO L225 Difference]: With dead ends: 8601 [2021-10-13 00:15:05,108 INFO L226 Difference]: Without dead ends: 6109 [2021-10-13 00:15:05,111 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 50.1ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-13 00:15:05,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6109 states. [2021-10-13 00:15:05,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6109 to 2671. [2021-10-13 00:15:05,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.275318829707427) internal successors, (3400), 2670 states have internal predecessors, (3400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:05,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3400 transitions. [2021-10-13 00:15:05,544 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3400 transitions. Word has length 133 [2021-10-13 00:15:05,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:05,544 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3400 transitions. [2021-10-13 00:15:05,545 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:05,545 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3400 transitions. [2021-10-13 00:15:05,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-10-13 00:15:05,550 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:05,550 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:05,550 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-13 00:15:05,550 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:05,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:05,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1433899619, now seen corresponding path program 1 times [2021-10-13 00:15:05,551 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:05,551 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612134309] [2021-10-13 00:15:05,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:05,552 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:05,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:05,695 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-13 00:15:05,695 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:05,696 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612134309] [2021-10-13 00:15:05,696 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612134309] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:15:05,696 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:15:05,696 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-13 00:15:05,696 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [688673552] [2021-10-13 00:15:05,697 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-13 00:15:05,698 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:05,698 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-13 00:15:05,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-13 00:15:05,699 INFO L87 Difference]: Start difference. First operand 2671 states and 3400 transitions. Second operand has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:06,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:06,678 INFO L93 Difference]: Finished difference Result 7787 states and 10093 transitions. [2021-10-13 00:15:06,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-13 00:15:06,679 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 137 [2021-10-13 00:15:06,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:06,686 INFO L225 Difference]: With dead ends: 7787 [2021-10-13 00:15:06,686 INFO L226 Difference]: Without dead ends: 5295 [2021-10-13 00:15:06,690 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 47.7ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-13 00:15:06,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5295 states. [2021-10-13 00:15:07,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5295 to 2671. [2021-10-13 00:15:07,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2738184546136535) internal successors, (3396), 2670 states have internal predecessors, (3396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:07,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3396 transitions. [2021-10-13 00:15:07,119 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3396 transitions. Word has length 137 [2021-10-13 00:15:07,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:07,119 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3396 transitions. [2021-10-13 00:15:07,119 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:07,120 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3396 transitions. [2021-10-13 00:15:07,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-13 00:15:07,125 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:07,125 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:07,125 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-13 00:15:07,125 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:07,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:07,126 INFO L82 PathProgramCache]: Analyzing trace with hash 1119861603, now seen corresponding path program 1 times [2021-10-13 00:15:07,126 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:07,126 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028648593] [2021-10-13 00:15:07,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:07,127 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:07,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:07,247 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-13 00:15:07,247 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:07,247 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028648593] [2021-10-13 00:15:07,247 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1028648593] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:15:07,248 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:15:07,248 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:15:07,248 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1360877994] [2021-10-13 00:15:07,248 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:15:07,249 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:07,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:15:07,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:15:07,249 INFO L87 Difference]: Start difference. First operand 2671 states and 3396 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:07,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:07,582 INFO L93 Difference]: Finished difference Result 4373 states and 5591 transitions. [2021-10-13 00:15:07,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:15:07,582 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-13 00:15:07,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:07,585 INFO L225 Difference]: With dead ends: 4373 [2021-10-13 00:15:07,585 INFO L226 Difference]: Without dead ends: 1843 [2021-10-13 00:15:07,588 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.2ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:15:07,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1843 states. [2021-10-13 00:15:07,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1843 to 1843. [2021-10-13 00:15:07,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1843 states, 1838 states have (on average 1.2731229597388465) internal successors, (2340), 1842 states have internal predecessors, (2340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:07,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1843 states to 1843 states and 2340 transitions. [2021-10-13 00:15:07,800 INFO L78 Accepts]: Start accepts. Automaton has 1843 states and 2340 transitions. Word has length 140 [2021-10-13 00:15:07,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:07,801 INFO L470 AbstractCegarLoop]: Abstraction has 1843 states and 2340 transitions. [2021-10-13 00:15:07,801 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:07,801 INFO L276 IsEmpty]: Start isEmpty. Operand 1843 states and 2340 transitions. [2021-10-13 00:15:07,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-13 00:15:07,805 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:07,805 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:07,805 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-13 00:15:07,805 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:07,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:07,806 INFO L82 PathProgramCache]: Analyzing trace with hash 2051408537, now seen corresponding path program 1 times [2021-10-13 00:15:07,806 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:07,806 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564501709] [2021-10-13 00:15:07,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:07,807 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:07,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:08,014 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:15:08,014 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:08,014 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564501709] [2021-10-13 00:15:08,014 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1564501709] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:15:08,014 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [675699702] [2021-10-13 00:15:08,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:08,015 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:15:08,015 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:15:08,018 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:15:08,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-13 00:15:08,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:08,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-13 00:15:08,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:15:09,211 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:15:09,211 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [675699702] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:15:09,212 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:15:09,213 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 17 [2021-10-13 00:15:09,213 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119681762] [2021-10-13 00:15:09,214 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2021-10-13 00:15:09,214 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:09,215 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-13 00:15:09,216 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2021-10-13 00:15:09,216 INFO L87 Difference]: Start difference. First operand 1843 states and 2340 transitions. Second operand has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:11,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:11,250 INFO L93 Difference]: Finished difference Result 5137 states and 6557 transitions. [2021-10-13 00:15:11,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-13 00:15:11,251 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-13 00:15:11,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:11,254 INFO L225 Difference]: With dead ends: 5137 [2021-10-13 00:15:11,254 INFO L226 Difference]: Without dead ends: 3483 [2021-10-13 00:15:11,256 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 132 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 608.8ms TimeCoverageRelationStatistics Valid=309, Invalid=1173, Unknown=0, NotChecked=0, Total=1482 [2021-10-13 00:15:11,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3483 states. [2021-10-13 00:15:11,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3483 to 2080. [2021-10-13 00:15:11,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2080 states, 2075 states have (on average 1.2693975903614458) internal successors, (2634), 2079 states have internal predecessors, (2634), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:11,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2634 transitions. [2021-10-13 00:15:11,604 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2634 transitions. Word has length 140 [2021-10-13 00:15:11,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:11,605 INFO L470 AbstractCegarLoop]: Abstraction has 2080 states and 2634 transitions. [2021-10-13 00:15:11,605 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:11,605 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2634 transitions. [2021-10-13 00:15:11,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-13 00:15:11,610 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:11,610 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:11,647 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-13 00:15:11,829 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-10-13 00:15:11,829 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:11,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:11,829 INFO L82 PathProgramCache]: Analyzing trace with hash -90451941, now seen corresponding path program 1 times [2021-10-13 00:15:11,830 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:11,830 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [994312501] [2021-10-13 00:15:11,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:11,830 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:11,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:11,929 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-10-13 00:15:11,929 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:11,930 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [994312501] [2021-10-13 00:15:11,930 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [994312501] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:15:11,930 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:15:11,930 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:15:11,930 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [5490588] [2021-10-13 00:15:11,931 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-13 00:15:11,931 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:11,932 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-13 00:15:11,932 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:15:11,932 INFO L87 Difference]: Start difference. First operand 2080 states and 2634 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:12,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:12,310 INFO L93 Difference]: Finished difference Result 3905 states and 4983 transitions. [2021-10-13 00:15:12,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-13 00:15:12,310 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-13 00:15:12,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:12,312 INFO L225 Difference]: With dead ends: 3905 [2021-10-13 00:15:12,312 INFO L226 Difference]: Without dead ends: 1955 [2021-10-13 00:15:12,314 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 10.9ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-13 00:15:12,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1955 states. [2021-10-13 00:15:12,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1955 to 1955. [2021-10-13 00:15:12,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1955 states, 1950 states have (on average 1.2728205128205128) internal successors, (2482), 1954 states have internal predecessors, (2482), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:12,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1955 states to 1955 states and 2482 transitions. [2021-10-13 00:15:12,547 INFO L78 Accepts]: Start accepts. Automaton has 1955 states and 2482 transitions. Word has length 140 [2021-10-13 00:15:12,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:12,547 INFO L470 AbstractCegarLoop]: Abstraction has 1955 states and 2482 transitions. [2021-10-13 00:15:12,547 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:12,547 INFO L276 IsEmpty]: Start isEmpty. Operand 1955 states and 2482 transitions. [2021-10-13 00:15:12,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-13 00:15:12,550 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:12,550 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:12,551 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-13 00:15:12,551 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:12,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:12,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1205605747, now seen corresponding path program 1 times [2021-10-13 00:15:12,551 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:12,552 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579363185] [2021-10-13 00:15:12,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:12,552 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:12,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:12,734 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:15:12,734 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:12,734 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579363185] [2021-10-13 00:15:12,734 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [579363185] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:15:12,735 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [533038882] [2021-10-13 00:15:12,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:12,735 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-13 00:15:12,735 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 [2021-10-13 00:15:12,738 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-13 00:15:12,753 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-13 00:15:13,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:13,149 INFO L263 TraceCheckSpWp]: Trace formula consists of 807 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-13 00:15:13,151 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-13 00:15:13,963 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-13 00:15:13,963 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [533038882] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-13 00:15:13,963 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-13 00:15:13,963 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 17 [2021-10-13 00:15:13,963 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89377109] [2021-10-13 00:15:13,964 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2021-10-13 00:15:13,964 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:13,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-13 00:15:13,964 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2021-10-13 00:15:13,965 INFO L87 Difference]: Start difference. First operand 1955 states and 2482 transitions. Second operand has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:15,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:15,774 INFO L93 Difference]: Finished difference Result 5727 states and 7299 transitions. [2021-10-13 00:15:15,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-10-13 00:15:15,775 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-10-13 00:15:15,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:15,779 INFO L225 Difference]: With dead ends: 5727 [2021-10-13 00:15:15,779 INFO L226 Difference]: Without dead ends: 3961 [2021-10-13 00:15:15,781 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 133 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 426 ImplicationChecksByTransitivity, 630.4ms TimeCoverageRelationStatistics Valid=401, Invalid=1579, Unknown=0, NotChecked=0, Total=1980 [2021-10-13 00:15:15,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3961 states. [2021-10-13 00:15:16,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3961 to 2219. [2021-10-13 00:15:16,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2219 states, 2214 states have (on average 1.2687443541102077) internal successors, (2809), 2218 states have internal predecessors, (2809), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:16,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2219 states to 2219 states and 2809 transitions. [2021-10-13 00:15:16,202 INFO L78 Accepts]: Start accepts. Automaton has 2219 states and 2809 transitions. Word has length 141 [2021-10-13 00:15:16,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:16,202 INFO L470 AbstractCegarLoop]: Abstraction has 2219 states and 2809 transitions. [2021-10-13 00:15:16,203 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:16,203 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 2809 transitions. [2021-10-13 00:15:16,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-13 00:15:16,206 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:16,206 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:16,247 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-13 00:15:16,426 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2021-10-13 00:15:16,426 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:16,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:16,427 INFO L82 PathProgramCache]: Analyzing trace with hash 582324145, now seen corresponding path program 1 times [2021-10-13 00:15:16,427 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:16,427 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025797454] [2021-10-13 00:15:16,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:16,427 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:16,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-13 00:15:16,478 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-13 00:15:16,478 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-13 00:15:16,478 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025797454] [2021-10-13 00:15:16,478 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2025797454] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-13 00:15:16,478 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-13 00:15:16,479 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-13 00:15:16,479 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1552237848] [2021-10-13 00:15:16,480 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-13 00:15:16,480 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-13 00:15:16,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-13 00:15:16,480 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:15:16,481 INFO L87 Difference]: Start difference. First operand 2219 states and 2809 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:16,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-13 00:15:16,888 INFO L93 Difference]: Finished difference Result 4100 states and 5223 transitions. [2021-10-13 00:15:16,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-13 00:15:16,888 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-10-13 00:15:16,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-13 00:15:16,891 INFO L225 Difference]: With dead ends: 4100 [2021-10-13 00:15:16,891 INFO L226 Difference]: Without dead ends: 2013 [2021-10-13 00:15:16,894 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.9ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-13 00:15:16,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2013 states. [2021-10-13 00:15:17,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2013 to 2005. [2021-10-13 00:15:17,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2005 states, 2000 states have (on average 1.266) internal successors, (2532), 2004 states have internal predecessors, (2532), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:17,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2005 states to 2005 states and 2532 transitions. [2021-10-13 00:15:17,237 INFO L78 Accepts]: Start accepts. Automaton has 2005 states and 2532 transitions. Word has length 141 [2021-10-13 00:15:17,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-13 00:15:17,237 INFO L470 AbstractCegarLoop]: Abstraction has 2005 states and 2532 transitions. [2021-10-13 00:15:17,237 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-13 00:15:17,237 INFO L276 IsEmpty]: Start isEmpty. Operand 2005 states and 2532 transitions. [2021-10-13 00:15:17,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-10-13 00:15:17,240 INFO L504 BasicCegarLoop]: Found error trace [2021-10-13 00:15:17,240 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-13 00:15:17,240 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-13 00:15:17,240 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-13 00:15:17,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-13 00:15:17,241 INFO L82 PathProgramCache]: Analyzing trace with hash 689093620, now seen corresponding path program 1 times [2021-10-13 00:15:17,241 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-13 00:15:17,241 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587330243] [2021-10-13 00:15:17,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-13 00:15:17,242 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-13 00:15:17,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:15:17,300 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-13 00:15:17,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-13 00:15:17,474 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-13 00:15:17,474 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-10-13 00:15:17,475 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,477 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,477 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,477 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,478 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,478 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,478 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,478 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,478 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,479 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,479 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,479 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,479 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,479 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,479 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,480 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,480 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,480 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,480 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,480 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,481 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,481 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,481 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-13 00:15:17,481 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-13 00:15:17,488 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-13 00:15:17,685 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.10 12:15:17 BoogieIcfgContainer [2021-10-13 00:15:17,685 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-13 00:15:17,685 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-13 00:15:17,686 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-13 00:15:17,686 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-13 00:15:17,686 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 12:14:35" (3/4) ... [2021-10-13 00:15:17,688 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-13 00:15:17,886 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/witness.graphml [2021-10-13 00:15:17,887 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-13 00:15:17,888 INFO L168 Benchmark]: Toolchain (without parser) took 44007.78 ms. Allocated memory was 127.9 MB in the beginning and 1.4 GB in the end (delta: 1.3 GB). Free memory was 89.6 MB in the beginning and 1.1 GB in the end (delta: -968.1 MB). Peak memory consumption was 352.4 MB. Max. memory is 16.1 GB. [2021-10-13 00:15:17,888 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 127.9 MB. Free memory is still 107.2 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-13 00:15:17,889 INFO L168 Benchmark]: CACSL2BoogieTranslator took 459.06 ms. Allocated memory is still 127.9 MB. Free memory was 89.5 MB in the beginning and 96.2 MB in the end (delta: -6.7 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-13 00:15:17,889 INFO L168 Benchmark]: Boogie Procedure Inliner took 121.61 ms. Allocated memory is still 127.9 MB. Free memory was 95.7 MB in the beginning and 91.0 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-13 00:15:17,889 INFO L168 Benchmark]: Boogie Preprocessor took 76.71 ms. Allocated memory is still 127.9 MB. Free memory was 91.0 MB in the beginning and 87.8 MB in the end (delta: 3.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-13 00:15:17,890 INFO L168 Benchmark]: RCFGBuilder took 1076.53 ms. Allocated memory is still 127.9 MB. Free memory was 87.8 MB in the beginning and 95.3 MB in the end (delta: -7.5 MB). Peak memory consumption was 37.1 MB. Max. memory is 16.1 GB. [2021-10-13 00:15:17,890 INFO L168 Benchmark]: TraceAbstraction took 42064.03 ms. Allocated memory was 127.9 MB in the beginning and 1.4 GB in the end (delta: 1.3 GB). Free memory was 95.2 MB in the beginning and 1.1 GB in the end (delta: -1.0 GB). Peak memory consumption was 315.7 MB. Max. memory is 16.1 GB. [2021-10-13 00:15:17,890 INFO L168 Benchmark]: Witness Printer took 201.23 ms. Allocated memory is still 1.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. [2021-10-13 00:15:17,892 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 127.9 MB. Free memory is still 107.2 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 459.06 ms. Allocated memory is still 127.9 MB. Free memory was 89.5 MB in the beginning and 96.2 MB in the end (delta: -6.7 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 121.61 ms. Allocated memory is still 127.9 MB. Free memory was 95.7 MB in the beginning and 91.0 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 76.71 ms. Allocated memory is still 127.9 MB. Free memory was 91.0 MB in the beginning and 87.8 MB in the end (delta: 3.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1076.53 ms. Allocated memory is still 127.9 MB. Free memory was 87.8 MB in the beginning and 95.3 MB in the end (delta: -7.5 MB). Peak memory consumption was 37.1 MB. Max. memory is 16.1 GB. * TraceAbstraction took 42064.03 ms. Allocated memory was 127.9 MB in the beginning and 1.4 GB in the end (delta: 1.3 GB). Free memory was 95.2 MB in the beginning and 1.1 GB in the end (delta: -1.0 GB). Peak memory consumption was 315.7 MB. Max. memory is 16.1 GB. * Witness Printer took 201.23 ms. Allocated memory is still 1.4 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 611]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L555] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L609] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L609] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L611] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 295 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 41807.5ms, OverallIterations: 38, TraceHistogramMax: 2, EmptinessCheckTime: 116.6ms, AutomataDifference: 25837.5ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 17.0ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 17056 SDtfs, 37704 SDslu, 45483 SDs, 0 SdLazy, 7967 SolverSat, 565 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5025.0ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1365 GetRequests, 857 SyntacticMatches, 3 SemanticMatches, 505 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29978 ImplicationChecksByTransitivity, 7514.0ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=2671occurred in iteration=30, InterpolantAutomatonStates: 514, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 5529.5ms AutomataMinimizationTime, 37 MinimizatonAttempts, 45687 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 380.4ms SsaConstructionTime, 1778.2ms SatisfiabilityAnalysisTime, 5599.9ms InterpolantComputationTime, 4004 NumberOfCodeBlocks, 4004 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3820 ConstructedInterpolants, 0 QuantifiedInterpolants, 13046 SizeOfPredicates, 30 NumberOfNonLiveVariables, 3832 ConjunctsInSsa, 82 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-13 00:15:17,951 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a9c93dac-9d64-4d40-844a-780bf4bc64a4/bin/uautomizer-WNIpwEf4Nt/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...