./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e943c265 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/config using search string *Termination*64bit*_Bitvector*.epf No suitable settings file found using Termination*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: ArithmeticException: integer overflow --- Real Ultimate output --- This is Ultimate 0.2.1-dev-e943c26 [2021-10-21 20:03:19,469 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-21 20:03:19,472 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-21 20:03:19,529 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-21 20:03:19,530 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-21 20:03:19,535 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-21 20:03:19,538 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-21 20:03:19,543 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-21 20:03:19,545 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-21 20:03:19,553 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-21 20:03:19,554 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-21 20:03:19,557 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-21 20:03:19,557 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-21 20:03:19,560 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-21 20:03:19,562 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-21 20:03:19,565 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-21 20:03:19,567 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-21 20:03:19,568 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-21 20:03:19,573 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-21 20:03:19,581 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-21 20:03:19,583 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-21 20:03:19,584 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-21 20:03:19,588 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-21 20:03:19,589 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-21 20:03:19,593 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-21 20:03:19,594 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-21 20:03:19,594 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-21 20:03:19,596 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-21 20:03:19,597 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-21 20:03:19,599 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-21 20:03:19,599 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-21 20:03:19,600 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-21 20:03:19,602 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-21 20:03:19,604 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-21 20:03:19,605 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-21 20:03:19,606 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-21 20:03:19,607 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-21 20:03:19,607 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-21 20:03:19,607 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-21 20:03:19,608 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-21 20:03:19,609 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-21 20:03:19,610 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-10-21 20:03:19,663 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-21 20:03:19,664 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-21 20:03:19,665 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-21 20:03:19,665 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-21 20:03:19,666 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-21 20:03:19,667 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-21 20:03:19,667 INFO L138 SettingsManager]: * Use SBE=true [2021-10-21 20:03:19,667 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-21 20:03:19,667 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-21 20:03:19,668 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-21 20:03:19,669 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-21 20:03:19,669 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-21 20:03:19,669 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-21 20:03:19,669 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-21 20:03:19,670 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-21 20:03:19,670 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-21 20:03:19,670 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-21 20:03:19,670 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-21 20:03:19,671 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-21 20:03:19,671 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-21 20:03:19,671 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-21 20:03:19,671 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-21 20:03:19,672 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-21 20:03:19,672 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-21 20:03:19,672 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-21 20:03:19,672 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-21 20:03:19,674 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-21 20:03:19,674 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-21 20:03:19,674 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-21 20:03:19,676 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-21 20:03:19,676 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 [2021-10-21 20:03:20,010 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-21 20:03:20,045 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-21 20:03:20,048 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-21 20:03:20,049 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-21 20:03:20,050 INFO L275 PluginConnector]: CDTParser initialized [2021-10-21 20:03:20,051 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2021-10-21 20:03:20,127 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/data/68472e248/28d40230ed4a4924b6d52829e8bb2940/FLAGada1d5b39 [2021-10-21 20:03:20,706 INFO L306 CDTParser]: Found 1 translation units. [2021-10-21 20:03:20,709 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2021-10-21 20:03:20,725 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/data/68472e248/28d40230ed4a4924b6d52829e8bb2940/FLAGada1d5b39 [2021-10-21 20:03:21,034 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/data/68472e248/28d40230ed4a4924b6d52829e8bb2940 [2021-10-21 20:03:21,040 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-21 20:03:21,046 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-21 20:03:21,049 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-21 20:03:21,050 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-21 20:03:21,054 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-21 20:03:21,055 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,056 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@34da77e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21, skipping insertion in model container [2021-10-21 20:03:21,057 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,064 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-21 20:03:21,121 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-21 20:03:21,424 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 20:03:21,437 INFO L203 MainTranslator]: Completed pre-run [2021-10-21 20:03:21,477 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 20:03:21,518 INFO L208 MainTranslator]: Completed translation [2021-10-21 20:03:21,518 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21 WrapperNode [2021-10-21 20:03:21,518 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-21 20:03:21,520 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-21 20:03:21,520 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-21 20:03:21,520 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-21 20:03:21,534 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,552 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,570 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-21 20:03:21,571 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-21 20:03:21,572 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-21 20:03:21,572 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-21 20:03:21,580 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,581 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,584 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,584 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,589 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,602 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,603 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,605 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-21 20:03:21,606 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-21 20:03:21,607 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-21 20:03:21,607 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-21 20:03:21,616 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (1/1) ... [2021-10-21 20:03:21,622 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-21 20:03:21,631 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:21,642 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-21 20:03:21,647 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-21 20:03:21,686 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-10-21 20:03:21,686 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-10-21 20:03:21,687 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-21 20:03:21,687 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-10-21 20:03:21,690 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-21 20:03:21,690 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-21 20:03:22,068 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-21 20:03:22,069 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2021-10-21 20:03:22,070 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 08:03:22 BoogieIcfgContainer [2021-10-21 20:03:22,071 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-21 20:03:22,072 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-21 20:03:22,077 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-21 20:03:22,080 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-21 20:03:22,081 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-21 20:03:22,081 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 21.10 08:03:21" (1/3) ... [2021-10-21 20:03:22,083 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@76326524 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.10 08:03:22, skipping insertion in model container [2021-10-21 20:03:22,083 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-21 20:03:22,083 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:03:21" (2/3) ... [2021-10-21 20:03:22,084 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@76326524 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.10 08:03:22, skipping insertion in model container [2021-10-21 20:03:22,084 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-21 20:03:22,084 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 08:03:22" (3/3) ... [2021-10-21 20:03:22,085 INFO L389 chiAutomizerObserver]: Analyzing ICFG java_Nested-alloca.i [2021-10-21 20:03:22,149 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-21 20:03:22,149 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-21 20:03:22,149 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-21 20:03:22,150 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-21 20:03:22,150 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-21 20:03:22,150 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-21 20:03:22,150 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-21 20:03:22,150 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-21 20:03:22,167 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:22,188 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-21 20:03:22,189 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:22,189 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:22,195 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:22,196 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-10-21 20:03:22,196 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-21 20:03:22,196 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:22,200 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-21 20:03:22,200 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:22,200 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:22,201 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:22,201 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-10-21 20:03:22,208 INFO L791 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 10#L-1true havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 6#L552-4true [2021-10-21 20:03:22,210 INFO L793 eck$LassoCheckResult]: Loop: 6#L552-4true call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 13#L552-1true assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 12#L553-4true assume !true; 5#L552-3true call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 6#L552-4true [2021-10-21 20:03:22,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:22,217 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-10-21 20:03:22,226 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:22,227 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810361107] [2021-10-21 20:03:22,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:22,229 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:22,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:22,383 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:22,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:22,460 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:22,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:22,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1113608, now seen corresponding path program 1 times [2021-10-21 20:03:22,463 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:22,464 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239501739] [2021-10-21 20:03:22,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:22,464 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:22,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:22,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:22,563 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:22,564 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239501739] [2021-10-21 20:03:22,564 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [239501739] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:03:22,565 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:03:22,565 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-21 20:03:22,566 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630018105] [2021-10-21 20:03:22,578 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:22,579 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:22,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-21 20:03:22,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-21 20:03:22,595 INFO L87 Difference]: Start difference. First operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:22,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:22,601 INFO L93 Difference]: Finished difference Result 12 states and 13 transitions. [2021-10-21 20:03:22,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-21 20:03:22,604 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 13 transitions. [2021-10-21 20:03:22,605 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-21 20:03:22,609 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 8 states and 9 transitions. [2021-10-21 20:03:22,610 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2021-10-21 20:03:22,610 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2021-10-21 20:03:22,611 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 9 transitions. [2021-10-21 20:03:22,613 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:22,613 INFO L681 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-10-21 20:03:22,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 9 transitions. [2021-10-21 20:03:22,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2021-10-21 20:03:22,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:22,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2021-10-21 20:03:22,645 INFO L704 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-10-21 20:03:22,645 INFO L587 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-10-21 20:03:22,646 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-21 20:03:22,646 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2021-10-21 20:03:22,648 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-21 20:03:22,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:22,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:22,649 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:22,649 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-10-21 20:03:22,649 INFO L791 eck$LassoCheckResult]: Stem: 32#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 33#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 35#L552-4 [2021-10-21 20:03:22,649 INFO L793 eck$LassoCheckResult]: Loop: 35#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 36#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 38#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 39#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 34#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 35#L552-4 [2021-10-21 20:03:22,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:22,650 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2021-10-21 20:03:22,650 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:22,651 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482273930] [2021-10-21 20:03:22,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:22,651 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:22,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:22,679 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:22,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:22,701 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:22,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:22,702 INFO L82 PathProgramCache]: Analyzing trace with hash 34512977, now seen corresponding path program 1 times [2021-10-21 20:03:22,702 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:22,702 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1917941729] [2021-10-21 20:03:22,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:22,703 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:22,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:22,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:22,747 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:22,747 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1917941729] [2021-10-21 20:03:22,748 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1917941729] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:03:22,748 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:03:22,748 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:03:22,748 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635024537] [2021-10-21 20:03:22,749 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:22,749 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:22,750 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:03:22,750 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:03:22,750 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:22,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:22,788 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2021-10-21 20:03:22,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 20:03:22,789 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2021-10-21 20:03:22,790 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2021-10-21 20:03:22,791 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2021-10-21 20:03:22,791 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2021-10-21 20:03:22,791 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2021-10-21 20:03:22,791 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2021-10-21 20:03:22,791 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:22,807 INFO L681 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-10-21 20:03:22,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2021-10-21 20:03:22,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2021-10-21 20:03:22,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:22,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2021-10-21 20:03:22,811 INFO L704 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-10-21 20:03:22,811 INFO L587 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-10-21 20:03:22,811 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-21 20:03:22,811 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2021-10-21 20:03:22,813 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2021-10-21 20:03:22,813 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:22,814 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:22,815 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:22,815 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1] [2021-10-21 20:03:22,815 INFO L791 eck$LassoCheckResult]: Stem: 61#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 62#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 60#L552-4 [2021-10-21 20:03:22,815 INFO L793 eck$LassoCheckResult]: Loop: 60#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 63#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 67#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 66#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 64#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 65#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 68#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 59#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 60#L552-4 [2021-10-21 20:03:22,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:22,817 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2021-10-21 20:03:22,818 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:22,819 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103263282] [2021-10-21 20:03:22,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:22,819 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:22,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:22,851 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:22,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:22,893 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:22,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:22,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1680656940, now seen corresponding path program 1 times [2021-10-21 20:03:22,895 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:22,895 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003567328] [2021-10-21 20:03:22,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:22,895 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:22,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:23,045 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:23,046 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:23,046 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003567328] [2021-10-21 20:03:23,046 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2003567328] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:23,047 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1905421673] [2021-10-21 20:03:23,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:23,047 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:03:23,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:23,049 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:03:23,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-21 20:03:23,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:23,109 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 5 conjunts are in the unsatisfiable core [2021-10-21 20:03:23,111 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:03:23,194 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-21 20:03:23,289 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:23,290 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-21 20:03:23,537 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:23,538 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:23,546 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:23,673 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:23,673 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 22 [2021-10-21 20:03:23,705 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:23,706 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 22 [2021-10-21 20:03:23,739 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-10-21 20:03:23,767 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-10-21 20:03:23,786 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:23,786 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1905421673] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:23,786 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:03:23,786 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 10 [2021-10-21 20:03:23,787 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [230502886] [2021-10-21 20:03:23,787 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:23,787 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:23,788 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-21 20:03:23,788 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2021-10-21 20:03:23,789 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:23,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:23,873 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2021-10-21 20:03:23,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 20:03:23,874 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 18 transitions. [2021-10-21 20:03:23,875 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 15 [2021-10-21 20:03:23,875 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 17 states and 18 transitions. [2021-10-21 20:03:23,876 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-10-21 20:03:23,876 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-10-21 20:03:23,876 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 18 transitions. [2021-10-21 20:03:23,876 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:23,876 INFO L681 BuchiCegarLoop]: Abstraction has 17 states and 18 transitions. [2021-10-21 20:03:23,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 18 transitions. [2021-10-21 20:03:23,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2021-10-21 20:03:23,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:23,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2021-10-21 20:03:23,879 INFO L704 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-10-21 20:03:23,879 INFO L587 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-10-21 20:03:23,879 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-21 20:03:23,880 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2021-10-21 20:03:23,880 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 14 [2021-10-21 20:03:23,880 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:23,881 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:23,881 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:23,881 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [4, 3, 3, 1, 1, 1, 1] [2021-10-21 20:03:23,882 INFO L791 eck$LassoCheckResult]: Stem: 124#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 125#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 127#L552-4 [2021-10-21 20:03:23,882 INFO L793 eck$LassoCheckResult]: Loop: 127#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 128#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 133#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 139#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 129#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 130#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 131#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 132#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 138#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 137#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 135#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 136#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 134#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 126#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 127#L552-4 [2021-10-21 20:03:23,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:23,882 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2021-10-21 20:03:23,883 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:23,883 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409649977] [2021-10-21 20:03:23,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:23,883 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:23,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:23,896 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:23,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:23,910 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:23,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:23,911 INFO L82 PathProgramCache]: Analyzing trace with hash 1818601484, now seen corresponding path program 2 times [2021-10-21 20:03:23,911 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:23,912 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706159255] [2021-10-21 20:03:23,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:23,912 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:23,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:24,367 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:24,370 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:24,380 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706159255] [2021-10-21 20:03:24,381 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [706159255] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:24,381 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [257596484] [2021-10-21 20:03:24,381 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-21 20:03:24,382 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:03:24,382 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:24,387 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:03:24,405 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-21 20:03:24,465 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-21 20:03:24,465 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-21 20:03:24,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-21 20:03:24,478 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:03:24,499 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-21 20:03:24,565 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:24,566 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-21 20:03:24,649 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:24,650 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:24,655 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:24,732 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:24,733 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:24,852 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:24,853 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:25,040 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:25,042 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:25,123 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:25,125 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-10-21 20:03:25,157 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:25,261 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-10-21 20:03:25,277 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:25,278 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-21 20:03:25,391 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:25,392 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:25,543 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:25,543 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:25,598 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:25,600 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:25,699 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:25,711 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:25,711 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:25,771 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-10-21 20:03:25,802 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-10-21 20:03:25,812 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:25,813 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [257596484] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:25,813 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:03:25,813 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 18 [2021-10-21 20:03:25,813 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288636179] [2021-10-21 20:03:25,814 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:25,815 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:25,815 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-21 20:03:25,817 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2021-10-21 20:03:25,819 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 2 Second operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:26,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:26,073 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2021-10-21 20:03:26,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-21 20:03:26,073 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 21 transitions. [2021-10-21 20:03:26,074 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 18 [2021-10-21 20:03:26,075 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 21 transitions. [2021-10-21 20:03:26,075 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-21 20:03:26,075 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-21 20:03:26,075 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 21 transitions. [2021-10-21 20:03:26,076 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:26,076 INFO L681 BuchiCegarLoop]: Abstraction has 20 states and 21 transitions. [2021-10-21 20:03:26,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 21 transitions. [2021-10-21 20:03:26,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2021-10-21 20:03:26,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 18 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:26,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2021-10-21 20:03:26,078 INFO L704 BuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2021-10-21 20:03:26,078 INFO L587 BuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2021-10-21 20:03:26,078 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-21 20:03:26,078 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 20 transitions. [2021-10-21 20:03:26,079 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2021-10-21 20:03:26,079 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:26,079 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:26,080 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:26,080 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [5, 4, 4, 1, 1, 1, 1] [2021-10-21 20:03:26,080 INFO L791 eck$LassoCheckResult]: Stem: 230#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 231#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 229#L552-4 [2021-10-21 20:03:26,080 INFO L793 eck$LassoCheckResult]: Loop: 229#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 232#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 237#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 246#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 233#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 234#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 235#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 236#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 245#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 244#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 243#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 242#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 241#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 239#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 240#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 238#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 228#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 229#L552-4 [2021-10-21 20:03:26,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:26,080 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2021-10-21 20:03:26,081 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:26,081 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169640016] [2021-10-21 20:03:26,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:26,081 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:26,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:26,104 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:26,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:26,124 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:26,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:26,126 INFO L82 PathProgramCache]: Analyzing trace with hash 1241080977, now seen corresponding path program 3 times [2021-10-21 20:03:26,127 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:26,127 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398116818] [2021-10-21 20:03:26,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:26,127 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:26,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:26,542 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:26,543 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:26,543 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398116818] [2021-10-21 20:03:26,543 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [398116818] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:26,543 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [697570591] [2021-10-21 20:03:26,544 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-21 20:03:26,544 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:03:26,544 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:26,559 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:03:26,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-21 20:03:26,672 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2021-10-21 20:03:26,673 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-21 20:03:26,674 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 11 conjunts are in the unsatisfiable core [2021-10-21 20:03:26,676 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:03:26,686 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-21 20:03:26,747 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:26,748 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-21 20:03:26,785 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:26,787 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:26,819 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:26,819 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-21 20:03:26,906 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:26,907 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:27,044 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:27,044 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:27,072 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:27,196 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:27,216 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:27,217 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:27,353 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:27,354 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:27,495 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:27,495 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:27,521 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:27,592 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:27,592 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:27,698 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:27,699 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:27,840 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:27,841 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:27,869 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:28,027 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:28,028 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:28,036 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:28,090 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-10-21 20:03:28,119 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-10-21 20:03:28,128 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:28,128 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [697570591] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:28,129 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:03:28,129 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12] total 23 [2021-10-21 20:03:28,129 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375353335] [2021-10-21 20:03:28,130 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:28,130 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:28,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-10-21 20:03:28,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=371, Unknown=0, NotChecked=0, Total=506 [2021-10-21 20:03:28,131 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. cyclomatic complexity: 2 Second operand has 23 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:28,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:28,479 INFO L93 Difference]: Finished difference Result 23 states and 24 transitions. [2021-10-21 20:03:28,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-10-21 20:03:28,480 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 24 transitions. [2021-10-21 20:03:28,481 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 21 [2021-10-21 20:03:28,481 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 24 transitions. [2021-10-21 20:03:28,481 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2021-10-21 20:03:28,481 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2021-10-21 20:03:28,482 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 24 transitions. [2021-10-21 20:03:28,482 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:28,482 INFO L681 BuchiCegarLoop]: Abstraction has 23 states and 24 transitions. [2021-10-21 20:03:28,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 24 transitions. [2021-10-21 20:03:28,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2021-10-21 20:03:28,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.0454545454545454) internal successors, (23), 21 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:28,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2021-10-21 20:03:28,487 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 23 transitions. [2021-10-21 20:03:28,487 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 23 transitions. [2021-10-21 20:03:28,487 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-21 20:03:28,487 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 23 transitions. [2021-10-21 20:03:28,488 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2021-10-21 20:03:28,489 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:28,489 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:28,490 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:28,490 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [6, 5, 5, 1, 1, 1, 1] [2021-10-21 20:03:28,490 INFO L791 eck$LassoCheckResult]: Stem: 356#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 357#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 355#L552-4 [2021-10-21 20:03:28,491 INFO L793 eck$LassoCheckResult]: Loop: 355#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 358#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 363#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 375#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 359#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 360#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 361#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 362#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 374#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 373#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 372#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 371#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 370#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 369#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 368#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 367#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 365#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 366#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 364#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 354#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 355#L552-4 [2021-10-21 20:03:28,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:28,492 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2021-10-21 20:03:28,493 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:28,493 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808832869] [2021-10-21 20:03:28,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:28,493 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:28,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:28,511 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:28,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:28,530 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:28,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:28,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1966644716, now seen corresponding path program 4 times [2021-10-21 20:03:28,531 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:28,531 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506742698] [2021-10-21 20:03:28,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:28,532 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:28,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:28,577 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:28,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:28,633 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:28,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:28,634 INFO L82 PathProgramCache]: Analyzing trace with hash -872207186, now seen corresponding path program 1 times [2021-10-21 20:03:28,634 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:28,635 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445511561] [2021-10-21 20:03:28,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:28,635 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:28,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:28,878 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:28,879 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:28,879 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445511561] [2021-10-21 20:03:28,879 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1445511561] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:28,879 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1433040561] [2021-10-21 20:03:28,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:28,879 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:03:28,879 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:28,881 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:03:28,901 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-21 20:03:28,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:28,995 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 21 conjunts are in the unsatisfiable core [2021-10-21 20:03:28,997 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:03:29,009 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2021-10-21 20:03:29,024 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-21 20:03:29,045 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-21 20:03:29,049 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-21 20:03:29,072 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:29,101 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-21 20:03:29,104 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-21 20:03:29,118 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:29,149 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-21 20:03:29,152 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-21 20:03:29,163 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:29,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-21 20:03:29,197 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-21 20:03:29,211 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:29,263 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-21 20:03:29,263 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 118 treesize of output 66 [2021-10-21 20:03:29,289 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:29,307 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:29,323 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-21 20:03:29,328 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:29,328 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1433040561] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:29,328 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:03:29,328 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 24 [2021-10-21 20:03:29,331 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956994074] [2021-10-21 20:03:39,475 WARN L207 SmtUtils]: Spent 10.14 s on a formula simplification. DAG size of input: 169 DAG size of output: 158 [2021-10-21 20:03:41,155 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:41,155 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2021-10-21 20:03:41,155 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=397, Unknown=0, NotChecked=0, Total=552 [2021-10-21 20:03:41,156 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. cyclomatic complexity: 2 Second operand has 24 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:41,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:41,376 INFO L93 Difference]: Finished difference Result 26 states and 27 transitions. [2021-10-21 20:03:41,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-21 20:03:41,376 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 27 transitions. [2021-10-21 20:03:41,377 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 24 [2021-10-21 20:03:41,378 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 27 transitions. [2021-10-21 20:03:41,378 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 26 [2021-10-21 20:03:41,378 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2021-10-21 20:03:41,378 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 27 transitions. [2021-10-21 20:03:41,378 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:41,378 INFO L681 BuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2021-10-21 20:03:41,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 27 transitions. [2021-10-21 20:03:41,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2021-10-21 20:03:41,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.04) internal successors, (26), 24 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:41,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2021-10-21 20:03:41,381 INFO L704 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-10-21 20:03:41,381 INFO L587 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-10-21 20:03:41,381 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-21 20:03:41,381 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 26 transitions. [2021-10-21 20:03:41,382 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 23 [2021-10-21 20:03:41,382 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:41,382 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:41,382 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:41,382 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [7, 6, 6, 1, 1, 1, 1] [2021-10-21 20:03:41,383 INFO L791 eck$LassoCheckResult]: Stem: 506#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 507#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 509#L552-4 [2021-10-21 20:03:41,383 INFO L793 eck$LassoCheckResult]: Loop: 509#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 510#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 515#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 530#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 511#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 512#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 513#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 514#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 529#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 528#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 527#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 526#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 525#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 524#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 523#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 522#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 521#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 520#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 519#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 517#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 518#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 516#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 508#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 509#L552-4 [2021-10-21 20:03:41,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:41,383 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2021-10-21 20:03:41,383 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:41,383 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125142001] [2021-10-21 20:03:41,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:41,384 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:41,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:41,391 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:41,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:41,399 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:41,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:41,400 INFO L82 PathProgramCache]: Analyzing trace with hash 665592497, now seen corresponding path program 5 times [2021-10-21 20:03:41,400 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:41,400 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724390762] [2021-10-21 20:03:41,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:41,400 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:41,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:42,313 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:42,313 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:42,313 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724390762] [2021-10-21 20:03:42,313 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724390762] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:42,314 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1361939045] [2021-10-21 20:03:42,314 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-21 20:03:42,314 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:03:42,314 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:42,316 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:03:42,336 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-21 20:03:42,569 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2021-10-21 20:03:42,569 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-21 20:03:42,571 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 17 conjunts are in the unsatisfiable core [2021-10-21 20:03:42,572 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:03:42,578 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-21 20:03:42,627 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:42,628 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-21 20:03:42,663 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:42,663 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 17 [2021-10-21 20:03:42,763 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2021-10-21 20:03:42,777 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2021-10-21 20:03:42,905 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:42,905 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:43,062 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:43,062 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:43,092 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:43,163 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:43,163 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:43,303 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:43,303 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:43,462 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:43,462 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:43,510 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:43,511 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:43,594 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:43,634 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:43,634 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:43,758 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:43,758 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:43,935 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:43,936 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:43,960 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:44,077 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:44,124 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:44,124 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:44,253 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:44,253 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:44,400 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:44,400 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:44,417 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:44,540 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:44,540 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 39 [2021-10-21 20:03:44,550 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 39 [2021-10-21 20:03:44,709 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:44,709 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:44,896 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-21 20:03:44,896 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-10-21 20:03:44,915 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-21 20:03:44,927 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:44,927 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:44,964 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:45,008 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-21 20:03:45,014 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:45,014 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1361939045] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:45,015 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:03:45,015 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 17] total 34 [2021-10-21 20:03:45,015 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945528478] [2021-10-21 20:03:45,016 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:45,016 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:45,016 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2021-10-21 20:03:45,017 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=1005, Unknown=0, NotChecked=0, Total=1122 [2021-10-21 20:03:45,017 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. cyclomatic complexity: 2 Second operand has 34 states, 34 states have (on average 1.2352941176470589) internal successors, (42), 34 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:45,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:45,644 INFO L93 Difference]: Finished difference Result 29 states and 30 transitions. [2021-10-21 20:03:45,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-10-21 20:03:45,645 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 30 transitions. [2021-10-21 20:03:45,646 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 27 [2021-10-21 20:03:45,646 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 30 transitions. [2021-10-21 20:03:45,646 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2021-10-21 20:03:45,646 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2021-10-21 20:03:45,647 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 30 transitions. [2021-10-21 20:03:45,647 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:45,647 INFO L681 BuchiCegarLoop]: Abstraction has 29 states and 30 transitions. [2021-10-21 20:03:45,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 30 transitions. [2021-10-21 20:03:45,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2021-10-21 20:03:45,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:45,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2021-10-21 20:03:45,651 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-10-21 20:03:45,651 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-10-21 20:03:45,651 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-21 20:03:45,651 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2021-10-21 20:03:45,651 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 26 [2021-10-21 20:03:45,651 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:45,652 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:45,652 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:45,652 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [8, 7, 7, 1, 1, 1, 1] [2021-10-21 20:03:45,653 INFO L791 eck$LassoCheckResult]: Stem: 679#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 680#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 678#L552-4 [2021-10-21 20:03:45,653 INFO L793 eck$LassoCheckResult]: Loop: 678#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 681#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 686#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 704#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 682#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 683#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 684#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 685#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 703#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 702#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 701#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 700#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 699#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 698#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 697#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 696#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 695#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 694#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 693#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 692#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 691#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 690#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 688#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 689#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 687#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 677#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 678#L552-4 [2021-10-21 20:03:45,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:45,653 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2021-10-21 20:03:45,653 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:45,654 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1997318274] [2021-10-21 20:03:45,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:45,654 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:45,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:45,662 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:45,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:45,668 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:45,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:45,669 INFO L82 PathProgramCache]: Analyzing trace with hash -1196184628, now seen corresponding path program 6 times [2021-10-21 20:03:45,669 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:45,669 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839618679] [2021-10-21 20:03:45,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:45,670 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:45,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:46,665 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:46,665 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:46,665 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839618679] [2021-10-21 20:03:46,666 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [839618679] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:46,666 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [235936584] [2021-10-21 20:03:46,666 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-21 20:03:46,666 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:03:46,666 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:46,671 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:03:46,692 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-21 20:03:47,065 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2021-10-21 20:03:47,065 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-21 20:03:47,067 INFO L263 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-21 20:03:47,069 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:03:47,075 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-21 20:03:47,139 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:47,139 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-21 20:03:47,171 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:47,217 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:47,217 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:47,243 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-21 20:03:47,406 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:47,406 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:47,561 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:47,561 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:47,581 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:47,648 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:47,648 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:47,680 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-21 20:03:47,784 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:47,784 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:47,920 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:47,920 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:47,943 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:48,071 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:48,071 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-21 20:03:48,080 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-10-21 20:03:48,217 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:48,218 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:48,355 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:48,355 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:48,392 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:48,441 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-21 20:03:48,495 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:48,518 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:48,518 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:48,639 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:48,639 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:48,796 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:48,797 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:48,832 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:48,970 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:48,987 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:48,987 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:49,105 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:49,105 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:49,241 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:49,242 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:49,261 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:49,376 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:49,376 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:49,390 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:49,503 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:49,503 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:49,681 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-21 20:03:49,681 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-10-21 20:03:49,741 INFO L354 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2021-10-21 20:03:49,742 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 31 [2021-10-21 20:03:49,792 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:49,826 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-21 20:03:49,831 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:49,831 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [235936584] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:49,831 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:03:49,832 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 19] total 39 [2021-10-21 20:03:49,832 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134249985] [2021-10-21 20:03:49,832 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:49,832 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:49,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2021-10-21 20:03:49,834 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1348, Unknown=0, NotChecked=0, Total=1482 [2021-10-21 20:03:49,834 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 2 Second operand has 39 states, 39 states have (on average 1.2307692307692308) internal successors, (48), 39 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:50,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:50,580 INFO L93 Difference]: Finished difference Result 32 states and 33 transitions. [2021-10-21 20:03:50,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-10-21 20:03:50,580 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 33 transitions. [2021-10-21 20:03:50,581 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 30 [2021-10-21 20:03:50,581 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 33 transitions. [2021-10-21 20:03:50,582 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2021-10-21 20:03:50,582 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2021-10-21 20:03:50,582 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 33 transitions. [2021-10-21 20:03:50,582 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:50,582 INFO L681 BuchiCegarLoop]: Abstraction has 32 states and 33 transitions. [2021-10-21 20:03:50,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 33 transitions. [2021-10-21 20:03:50,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2021-10-21 20:03:50,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.032258064516129) internal successors, (32), 30 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:50,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 32 transitions. [2021-10-21 20:03:50,585 INFO L704 BuchiCegarLoop]: Abstraction has 31 states and 32 transitions. [2021-10-21 20:03:50,585 INFO L587 BuchiCegarLoop]: Abstraction has 31 states and 32 transitions. [2021-10-21 20:03:50,585 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-21 20:03:50,585 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 32 transitions. [2021-10-21 20:03:50,586 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 29 [2021-10-21 20:03:50,586 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:50,586 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:50,587 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:50,587 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [9, 8, 8, 1, 1, 1, 1] [2021-10-21 20:03:50,587 INFO L791 eck$LassoCheckResult]: Stem: 876#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 877#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 875#L552-4 [2021-10-21 20:03:50,587 INFO L793 eck$LassoCheckResult]: Loop: 875#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 878#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 883#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 904#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 879#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 880#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 881#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 882#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 903#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 902#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 901#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 900#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 899#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 898#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 897#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 896#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 895#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 894#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 893#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 892#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 891#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 890#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 889#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 888#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 887#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 885#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 886#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 884#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 874#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 875#L552-4 [2021-10-21 20:03:50,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:50,588 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2021-10-21 20:03:50,588 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:50,588 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363267887] [2021-10-21 20:03:50,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:50,588 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:50,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:50,597 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:50,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:50,604 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:50,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:50,605 INFO L82 PathProgramCache]: Analyzing trace with hash -190854959, now seen corresponding path program 7 times [2021-10-21 20:03:50,605 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:50,605 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896585029] [2021-10-21 20:03:50,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:50,605 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:50,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:51,776 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:51,777 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:03:51,777 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1896585029] [2021-10-21 20:03:51,777 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1896585029] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:51,777 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [310255068] [2021-10-21 20:03:51,777 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-21 20:03:51,777 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:03:51,777 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:03:51,778 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:03:51,779 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-21 20:03:51,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:03:51,978 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 21 conjunts are in the unsatisfiable core [2021-10-21 20:03:51,980 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:03:51,986 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-21 20:03:52,032 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:52,032 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-21 20:03:52,055 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-21 20:03:52,077 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:52,078 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 9 [2021-10-21 20:03:52,116 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2021-10-21 20:03:52,262 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:52,263 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:52,421 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:52,421 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:52,453 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:52,454 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:52,455 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-10-21 20:03:52,473 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:52,509 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:52,510 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-21 20:03:52,620 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:52,620 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:52,740 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:52,740 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:52,803 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:52,885 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 39 [2021-10-21 20:03:52,909 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:52,909 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 39 [2021-10-21 20:03:53,020 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:53,021 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-21 20:03:53,148 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:53,148 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:53,185 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-21 20:03:53,243 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:53,244 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:53,248 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:53,372 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:53,373 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:53,527 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-21 20:03:53,527 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-21 20:03:53,570 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-21 20:03:53,570 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-10-21 20:03:53,632 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-21 20:03:53,702 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-21 20:03:53,703 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-21 20:03:53,715 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-10-21 20:03:53,821 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-21 20:03:53,821 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-21 20:03:53,988 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-21 20:03:53,988 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 62 [2021-10-21 20:03:54,004 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:54,004 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 7 [2021-10-21 20:03:54,068 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:54,135 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-21 20:03:54,135 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 62 [2021-10-21 20:03:54,148 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-21 20:03:54,159 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-21 20:03:54,160 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-21 20:03:54,203 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:54,281 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-21 20:03:54,281 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-10-21 20:03:54,348 INFO L354 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2021-10-21 20:03:54,348 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 31 [2021-10-21 20:03:54,391 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-21 20:03:54,431 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-21 20:03:54,437 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:03:54,440 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [310255068] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:03:54,440 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:03:54,440 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21] total 44 [2021-10-21 20:03:54,440 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1657960881] [2021-10-21 20:03:54,442 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-21 20:03:54,444 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:03:54,444 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-10-21 20:03:54,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=1722, Unknown=0, NotChecked=0, Total=1892 [2021-10-21 20:03:54,447 INFO L87 Difference]: Start difference. First operand 31 states and 32 transitions. cyclomatic complexity: 2 Second operand has 44 states, 44 states have (on average 1.2272727272727273) internal successors, (54), 44 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:55,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:03:55,123 INFO L93 Difference]: Finished difference Result 35 states and 36 transitions. [2021-10-21 20:03:55,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2021-10-21 20:03:55,124 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 36 transitions. [2021-10-21 20:03:55,124 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 33 [2021-10-21 20:03:55,124 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 36 transitions. [2021-10-21 20:03:55,125 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2021-10-21 20:03:55,125 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2021-10-21 20:03:55,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 36 transitions. [2021-10-21 20:03:55,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-21 20:03:55,125 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 36 transitions. [2021-10-21 20:03:55,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 36 transitions. [2021-10-21 20:03:55,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2021-10-21 20:03:55,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.0294117647058822) internal successors, (35), 33 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:03:55,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 35 transitions. [2021-10-21 20:03:55,128 INFO L704 BuchiCegarLoop]: Abstraction has 34 states and 35 transitions. [2021-10-21 20:03:55,128 INFO L587 BuchiCegarLoop]: Abstraction has 34 states and 35 transitions. [2021-10-21 20:03:55,129 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-21 20:03:55,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 35 transitions. [2021-10-21 20:03:55,129 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 32 [2021-10-21 20:03:55,129 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-21 20:03:55,129 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-21 20:03:55,130 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-21 20:03:55,130 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [10, 9, 9, 1, 1, 1, 1] [2021-10-21 20:03:55,130 INFO L791 eck$LassoCheckResult]: Stem: 1087#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1088#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 1090#L552-4 [2021-10-21 20:03:55,131 INFO L793 eck$LassoCheckResult]: Loop: 1090#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 1091#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 1096#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1120#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1092#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1093#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1094#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1095#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1119#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1118#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1117#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1116#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1115#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1114#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1113#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1112#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1111#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1110#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1109#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1108#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1107#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1106#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1105#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1104#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1103#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1102#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1101#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1100#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1098#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1099#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1097#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 1089#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 1090#L552-4 [2021-10-21 20:03:55,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:55,131 INFO L82 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2021-10-21 20:03:55,131 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:55,131 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394187416] [2021-10-21 20:03:55,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:55,132 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:55,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:55,141 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:55,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:55,147 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:55,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:55,148 INFO L82 PathProgramCache]: Analyzing trace with hash 778359212, now seen corresponding path program 8 times [2021-10-21 20:03:55,148 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:55,148 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1039985705] [2021-10-21 20:03:55,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:55,148 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:55,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:55,205 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:55,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:55,244 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:03:55,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:03:55,245 INFO L82 PathProgramCache]: Analyzing trace with hash 320163182, now seen corresponding path program 2 times [2021-10-21 20:03:55,245 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:03:55,245 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [837624629] [2021-10-21 20:03:55,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:03:55,246 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:03:55,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:55,284 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:03:55,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:03:55,325 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:04:54,696 WARN L207 SmtUtils]: Spent 59.37 s on a formula simplification. DAG size of input: 257 DAG size of output: 247 [2021-10-21 20:05:01,920 INFO L210 LassoAnalysis]: Preferences: [2021-10-21 20:05:01,920 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-21 20:05:01,920 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-21 20:05:01,921 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-21 20:05:01,921 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-21 20:05:01,921 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-21 20:05:01,921 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-21 20:05:01,921 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-21 20:05:01,921 INFO L133 ssoRankerPreferences]: Filename of dumped script: java_Nested-alloca.i_Iteration10_Lasso [2021-10-21 20:05:01,921 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-21 20:05:01,921 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-21 20:05:01,928 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer has thrown an exception: java.lang.ArithmeticException: integer overflow at java.base/java.lang.Math.toIntExact(Math.java:1071) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis$PreprocessingBenchmark.(LassoAnalysis.java:551) at de.uni_freiburg.informatik.ultimate.lassoranker.variables.LassoBuilder.preprocess(LassoBuilder.java:255) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.preprocess(LassoAnalysis.java:280) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.(LassoAnalysis.java:229) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.synthesize(LassoCheck.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkLassoTermination(LassoCheck.java:953) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.(LassoCheck.java:862) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.(LassoCheck.java:252) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiCegarLoop.iterate(BuchiCegarLoop.java:457) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:143) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:398) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-10-21 20:05:01,931 INFO L168 Benchmark]: Toolchain (without parser) took 100884.09 ms. Allocated memory was 88.1 MB in the beginning and 146.8 MB in the end (delta: 58.7 MB). Free memory was 50.3 MB in the beginning and 48.1 MB in the end (delta: 2.3 MB). Peak memory consumption was 88.1 MB. Max. memory is 16.1 GB. [2021-10-21 20:05:01,931 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 88.1 MB. Free memory is still 67.6 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-21 20:05:01,931 INFO L168 Benchmark]: CACSL2BoogieTranslator took 469.60 ms. Allocated memory was 88.1 MB in the beginning and 121.6 MB in the end (delta: 33.6 MB). Free memory was 50.1 MB in the beginning and 92.5 MB in the end (delta: -42.4 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-21 20:05:01,932 INFO L168 Benchmark]: Boogie Procedure Inliner took 51.09 ms. Allocated memory is still 121.6 MB. Free memory was 92.5 MB in the beginning and 90.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-21 20:05:01,932 INFO L168 Benchmark]: Boogie Preprocessor took 34.35 ms. Allocated memory is still 121.6 MB. Free memory was 90.5 MB in the beginning and 89.3 MB in the end (delta: 1.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-21 20:05:01,932 INFO L168 Benchmark]: RCFGBuilder took 464.39 ms. Allocated memory is still 121.6 MB. Free memory was 89.3 MB in the beginning and 78.8 MB in the end (delta: 10.5 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-21 20:05:01,933 INFO L168 Benchmark]: BuchiAutomizer took 99858.23 ms. Allocated memory was 121.6 MB in the beginning and 146.8 MB in the end (delta: 25.2 MB). Free memory was 78.3 MB in the beginning and 48.1 MB in the end (delta: 30.3 MB). Peak memory consumption was 84.3 MB. Max. memory is 16.1 GB. [2021-10-21 20:05:01,935 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 88.1 MB. Free memory is still 67.6 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 469.60 ms. Allocated memory was 88.1 MB in the beginning and 121.6 MB in the end (delta: 33.6 MB). Free memory was 50.1 MB in the beginning and 92.5 MB in the end (delta: -42.4 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 51.09 ms. Allocated memory is still 121.6 MB. Free memory was 92.5 MB in the beginning and 90.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 34.35 ms. Allocated memory is still 121.6 MB. Free memory was 90.5 MB in the beginning and 89.3 MB in the end (delta: 1.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 464.39 ms. Allocated memory is still 121.6 MB. Free memory was 89.3 MB in the beginning and 78.8 MB in the end (delta: 10.5 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 99858.23 ms. Allocated memory was 121.6 MB in the beginning and 146.8 MB in the end (delta: 25.2 MB). Free memory was 78.3 MB in the beginning and 48.1 MB in the end (delta: 30.3 MB). Peak memory consumption was 84.3 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: ArithmeticException: integer overflow de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: ArithmeticException: integer overflow: java.base/java.lang.Math.toIntExact(Math.java:1071) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2021-10-21 20:05:01,969 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2021-10-21 20:05:02,172 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-21 20:05:02,371 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-21 20:05:02,570 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-21 20:05:02,771 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-21 20:05:02,970 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2021-10-21 20:05:03,171 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-21 20:05:03,386 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_33fa17ca-32db-4176-ae7e-586c752d0f8c/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...