./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e943c265 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-e943c26 [2021-10-21 20:17:40,141 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-21 20:17:40,145 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-21 20:17:40,220 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-21 20:17:40,222 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-21 20:17:40,228 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-21 20:17:40,231 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-21 20:17:40,237 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-21 20:17:40,240 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-21 20:17:40,250 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-21 20:17:40,252 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-21 20:17:40,254 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-21 20:17:40,255 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-21 20:17:40,259 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-21 20:17:40,262 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-21 20:17:40,270 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-21 20:17:40,272 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-21 20:17:40,274 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-21 20:17:40,277 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-21 20:17:40,285 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-21 20:17:40,288 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-21 20:17:40,290 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-21 20:17:40,292 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-21 20:17:40,293 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-21 20:17:40,297 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-21 20:17:40,298 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-21 20:17:40,299 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-21 20:17:40,300 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-21 20:17:40,301 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-21 20:17:40,302 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-21 20:17:40,302 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-21 20:17:40,304 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-21 20:17:40,305 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-21 20:17:40,306 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-21 20:17:40,307 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-21 20:17:40,307 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-21 20:17:40,308 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-21 20:17:40,309 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-21 20:17:40,309 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-21 20:17:40,310 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-21 20:17:40,311 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-21 20:17:40,312 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-21 20:17:40,341 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-21 20:17:40,341 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-21 20:17:40,342 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-21 20:17:40,342 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-21 20:17:40,343 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-21 20:17:40,344 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-21 20:17:40,344 INFO L138 SettingsManager]: * Use SBE=true [2021-10-21 20:17:40,344 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-21 20:17:40,345 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-21 20:17:40,345 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-21 20:17:40,345 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-21 20:17:40,345 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-21 20:17:40,346 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-21 20:17:40,346 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-21 20:17:40,346 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-21 20:17:40,346 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-21 20:17:40,347 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-21 20:17:40,347 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-21 20:17:40,347 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-21 20:17:40,348 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-21 20:17:40,348 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-21 20:17:40,348 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-21 20:17:40,348 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-21 20:17:40,349 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-21 20:17:40,349 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-21 20:17:40,349 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-21 20:17:40,350 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-21 20:17:40,350 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-21 20:17:40,350 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-21 20:17:40,350 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-21 20:17:40,351 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-21 20:17:40,351 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-21 20:17:40,351 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb [2021-10-21 20:17:40,626 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-21 20:17:40,653 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-21 20:17:40,656 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-21 20:17:40,658 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-21 20:17:40,659 INFO L275 PluginConnector]: CDTParser initialized [2021-10-21 20:17:40,660 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-21 20:17:40,757 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/data/dac492e3f/576c6739f9c0413d96ce037a2fd23a1e/FLAGe3f0e6bec [2021-10-21 20:17:41,361 INFO L306 CDTParser]: Found 1 translation units. [2021-10-21 20:17:41,362 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-21 20:17:41,376 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/data/dac492e3f/576c6739f9c0413d96ce037a2fd23a1e/FLAGe3f0e6bec [2021-10-21 20:17:41,615 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/data/dac492e3f/576c6739f9c0413d96ce037a2fd23a1e [2021-10-21 20:17:41,618 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-21 20:17:41,620 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-21 20:17:41,628 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-21 20:17:41,628 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-21 20:17:41,633 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-21 20:17:41,634 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 08:17:41" (1/1) ... [2021-10-21 20:17:41,636 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3eccc1eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:41, skipping insertion in model container [2021-10-21 20:17:41,638 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 08:17:41" (1/1) ... [2021-10-21 20:17:41,646 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-21 20:17:41,727 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-21 20:17:42,048 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-21 20:17:42,051 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 20:17:42,061 INFO L203 MainTranslator]: Completed pre-run [2021-10-21 20:17:42,178 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-21 20:17:42,179 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 20:17:42,200 INFO L208 MainTranslator]: Completed translation [2021-10-21 20:17:42,200 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42 WrapperNode [2021-10-21 20:17:42,201 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-21 20:17:42,202 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-21 20:17:42,202 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-21 20:17:42,203 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-21 20:17:42,212 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,236 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,311 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-21 20:17:42,312 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-21 20:17:42,312 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-21 20:17:42,312 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-21 20:17:42,322 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,322 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,332 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,336 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,362 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,395 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,405 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,414 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-21 20:17:42,415 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-21 20:17:42,415 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-21 20:17:42,416 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-21 20:17:42,422 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (1/1) ... [2021-10-21 20:17:42,450 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-21 20:17:42,462 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:17:42,476 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-21 20:17:42,496 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-21 20:17:42,539 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-21 20:17:42,540 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-21 20:17:42,540 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-21 20:17:42,540 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-21 20:17:43,921 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-21 20:17:43,921 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-21 20:17:43,924 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 08:17:43 BoogieIcfgContainer [2021-10-21 20:17:43,924 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-21 20:17:43,927 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-21 20:17:43,927 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-21 20:17:43,945 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-21 20:17:43,945 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.10 08:17:41" (1/3) ... [2021-10-21 20:17:43,946 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c9da4cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.10 08:17:43, skipping insertion in model container [2021-10-21 20:17:43,947 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 08:17:42" (2/3) ... [2021-10-21 20:17:43,947 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c9da4cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.10 08:17:43, skipping insertion in model container [2021-10-21 20:17:43,947 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 08:17:43" (3/3) ... [2021-10-21 20:17:43,949 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-21 20:17:43,956 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-21 20:17:43,969 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-21 20:17:44,041 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-21 20:17:44,049 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-21 20:17:44,049 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-21 20:17:44,121 INFO L276 IsEmpty]: Start isEmpty. Operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:44,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-21 20:17:44,130 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:44,131 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:44,131 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:44,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:44,138 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-21 20:17:44,151 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:44,151 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085052461] [2021-10-21 20:17:44,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:44,153 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:44,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:44,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:44,414 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:44,415 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085052461] [2021-10-21 20:17:44,416 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2085052461] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:44,416 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:44,416 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-21 20:17:44,419 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406579588] [2021-10-21 20:17:44,425 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-21 20:17:44,425 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:44,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-21 20:17:44,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-21 20:17:44,452 INFO L87 Difference]: Start difference. First operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:44,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:44,539 INFO L93 Difference]: Finished difference Result 578 states and 901 transitions. [2021-10-21 20:17:44,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-21 20:17:44,540 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-21 20:17:44,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:44,573 INFO L225 Difference]: With dead ends: 578 [2021-10-21 20:17:44,574 INFO L226 Difference]: Without dead ends: 293 [2021-10-21 20:17:44,584 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-21 20:17:44,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-21 20:17:44,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-21 20:17:44,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5888888888888888) internal successors, (429), 292 states have internal predecessors, (429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:44,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 429 transitions. [2021-10-21 20:17:44,669 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 429 transitions. Word has length 33 [2021-10-21 20:17:44,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:44,670 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 429 transitions. [2021-10-21 20:17:44,670 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:44,670 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 429 transitions. [2021-10-21 20:17:44,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-21 20:17:44,672 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:44,673 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:44,673 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-21 20:17:44,674 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:44,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:44,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-21 20:17:44,675 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:44,676 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452789244] [2021-10-21 20:17:44,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:44,676 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:44,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:44,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:44,810 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:44,810 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452789244] [2021-10-21 20:17:44,811 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1452789244] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:44,811 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:44,811 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:44,812 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978901284] [2021-10-21 20:17:44,814 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:17:44,815 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:44,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:17:44,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:17:44,819 INFO L87 Difference]: Start difference. First operand 293 states and 429 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:44,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:44,920 INFO L93 Difference]: Finished difference Result 572 states and 832 transitions. [2021-10-21 20:17:44,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 20:17:44,921 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-21 20:17:44,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:44,924 INFO L225 Difference]: With dead ends: 572 [2021-10-21 20:17:44,924 INFO L226 Difference]: Without dead ends: 293 [2021-10-21 20:17:44,926 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 22.0ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:44,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-21 20:17:44,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-21 20:17:44,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5444444444444445) internal successors, (417), 292 states have internal predecessors, (417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:44,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 417 transitions. [2021-10-21 20:17:44,952 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 417 transitions. Word has length 33 [2021-10-21 20:17:44,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:44,952 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 417 transitions. [2021-10-21 20:17:44,953 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:44,953 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 417 transitions. [2021-10-21 20:17:44,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-21 20:17:44,955 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:44,956 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:44,956 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-21 20:17:44,957 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:44,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:44,958 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-21 20:17:44,958 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:44,959 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407403677] [2021-10-21 20:17:44,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:44,959 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:45,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:45,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:45,173 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:45,173 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1407403677] [2021-10-21 20:17:45,173 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1407403677] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:45,174 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:45,174 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:45,174 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965859812] [2021-10-21 20:17:45,175 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:45,175 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:45,176 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:45,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:45,177 INFO L87 Difference]: Start difference. First operand 293 states and 417 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:45,276 INFO L93 Difference]: Finished difference Result 603 states and 867 transitions. [2021-10-21 20:17:45,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:45,277 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-21 20:17:45,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:45,281 INFO L225 Difference]: With dead ends: 603 [2021-10-21 20:17:45,282 INFO L226 Difference]: Without dead ends: 327 [2021-10-21 20:17:45,283 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:45,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2021-10-21 20:17:45,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 269. [2021-10-21 20:17:45,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 269 states, 250 states have (on average 1.524) internal successors, (381), 268 states have internal predecessors, (381), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 381 transitions. [2021-10-21 20:17:45,333 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 381 transitions. Word has length 44 [2021-10-21 20:17:45,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:45,336 INFO L470 AbstractCegarLoop]: Abstraction has 269 states and 381 transitions. [2021-10-21 20:17:45,337 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,337 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 381 transitions. [2021-10-21 20:17:45,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-21 20:17:45,340 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:45,340 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:45,340 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-21 20:17:45,341 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:45,341 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:45,342 INFO L82 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-21 20:17:45,342 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:45,342 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434229935] [2021-10-21 20:17:45,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:45,344 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:45,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:45,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:45,534 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:45,534 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434229935] [2021-10-21 20:17:45,534 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1434229935] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:45,535 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:45,535 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:45,535 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190738618] [2021-10-21 20:17:45,536 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:45,536 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:45,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:45,537 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:45,538 INFO L87 Difference]: Start difference. First operand 269 states and 381 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:45,607 INFO L93 Difference]: Finished difference Result 750 states and 1074 transitions. [2021-10-21 20:17:45,608 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:45,609 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-21 20:17:45,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:45,614 INFO L225 Difference]: With dead ends: 750 [2021-10-21 20:17:45,614 INFO L226 Difference]: Without dead ends: 498 [2021-10-21 20:17:45,617 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.5ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:45,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states. [2021-10-21 20:17:45,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 304. [2021-10-21 20:17:45,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 304 states, 285 states have (on average 1.5192982456140351) internal successors, (433), 303 states have internal predecessors, (433), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 433 transitions. [2021-10-21 20:17:45,654 INFO L78 Accepts]: Start accepts. Automaton has 304 states and 433 transitions. Word has length 53 [2021-10-21 20:17:45,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:45,657 INFO L470 AbstractCegarLoop]: Abstraction has 304 states and 433 transitions. [2021-10-21 20:17:45,657 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,657 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states and 433 transitions. [2021-10-21 20:17:45,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-21 20:17:45,667 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:45,667 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:45,668 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-21 20:17:45,668 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:45,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:45,669 INFO L82 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-21 20:17:45,669 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:45,669 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422620153] [2021-10-21 20:17:45,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:45,670 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:45,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:45,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:45,804 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:45,805 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422620153] [2021-10-21 20:17:45,805 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [422620153] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:45,805 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:45,805 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:45,805 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808915329] [2021-10-21 20:17:45,806 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:45,806 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:45,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:45,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:45,808 INFO L87 Difference]: Start difference. First operand 304 states and 433 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:45,878 INFO L93 Difference]: Finished difference Result 834 states and 1199 transitions. [2021-10-21 20:17:45,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:45,878 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-21 20:17:45,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:45,884 INFO L225 Difference]: With dead ends: 834 [2021-10-21 20:17:45,884 INFO L226 Difference]: Without dead ends: 547 [2021-10-21 20:17:45,885 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.0ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:45,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2021-10-21 20:17:45,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 329. [2021-10-21 20:17:45,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 310 states have (on average 1.5193548387096774) internal successors, (471), 328 states have internal predecessors, (471), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 471 transitions. [2021-10-21 20:17:45,914 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 471 transitions. Word has length 54 [2021-10-21 20:17:45,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:45,916 INFO L470 AbstractCegarLoop]: Abstraction has 329 states and 471 transitions. [2021-10-21 20:17:45,918 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:45,918 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 471 transitions. [2021-10-21 20:17:45,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-21 20:17:45,921 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:45,922 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:45,922 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-21 20:17:45,922 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:45,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:45,924 INFO L82 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-21 20:17:45,924 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:45,924 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727716861] [2021-10-21 20:17:45,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:45,925 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:46,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:46,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:46,104 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:46,104 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727716861] [2021-10-21 20:17:46,104 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [727716861] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:46,105 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:46,105 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:46,105 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458198686] [2021-10-21 20:17:46,106 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 20:17:46,106 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:46,107 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 20:17:46,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:46,107 INFO L87 Difference]: Start difference. First operand 329 states and 471 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:46,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:46,387 INFO L93 Difference]: Finished difference Result 1023 states and 1476 transitions. [2021-10-21 20:17:46,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 20:17:46,388 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-21 20:17:46,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:46,406 INFO L225 Difference]: With dead ends: 1023 [2021-10-21 20:17:46,407 INFO L226 Difference]: Without dead ends: 711 [2021-10-21 20:17:46,408 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 35.6ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-21 20:17:46,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2021-10-21 20:17:46,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 427. [2021-10-21 20:17:46,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 408 states have (on average 1.4901960784313726) internal successors, (608), 426 states have internal predecessors, (608), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:46,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 608 transitions. [2021-10-21 20:17:46,440 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 608 transitions. Word has length 54 [2021-10-21 20:17:46,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:46,441 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 608 transitions. [2021-10-21 20:17:46,442 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:46,442 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 608 transitions. [2021-10-21 20:17:46,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-21 20:17:46,443 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:46,443 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:46,444 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-21 20:17:46,444 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:46,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:46,445 INFO L82 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-21 20:17:46,445 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:46,446 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694428431] [2021-10-21 20:17:46,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:46,446 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:46,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:46,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:46,542 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:46,542 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694428431] [2021-10-21 20:17:46,542 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [694428431] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:46,543 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:46,543 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:46,543 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722534578] [2021-10-21 20:17:46,544 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 20:17:46,544 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:46,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 20:17:46,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:46,546 INFO L87 Difference]: Start difference. First operand 427 states and 608 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:46,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:46,799 INFO L93 Difference]: Finished difference Result 1027 states and 1476 transitions. [2021-10-21 20:17:46,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 20:17:46,800 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-21 20:17:46,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:46,805 INFO L225 Difference]: With dead ends: 1027 [2021-10-21 20:17:46,806 INFO L226 Difference]: Without dead ends: 715 [2021-10-21 20:17:46,807 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 31.8ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-21 20:17:46,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-21 20:17:46,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-21 20:17:46,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4807692307692308) internal successors, (616), 434 states have internal predecessors, (616), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:46,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 616 transitions. [2021-10-21 20:17:46,838 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 616 transitions. Word has length 55 [2021-10-21 20:17:46,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:46,839 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 616 transitions. [2021-10-21 20:17:46,839 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:46,839 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 616 transitions. [2021-10-21 20:17:46,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-21 20:17:46,840 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:46,841 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:46,841 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-21 20:17:46,841 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:46,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:46,842 INFO L82 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-21 20:17:46,842 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:46,843 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300533092] [2021-10-21 20:17:46,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:46,843 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:46,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:46,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:46,935 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:46,935 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300533092] [2021-10-21 20:17:46,935 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1300533092] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:46,936 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:46,936 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:46,936 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [131748675] [2021-10-21 20:17:46,937 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:17:46,937 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:46,938 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:17:46,938 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:17:46,938 INFO L87 Difference]: Start difference. First operand 435 states and 616 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:47,221 INFO L93 Difference]: Finished difference Result 1027 states and 1468 transitions. [2021-10-21 20:17:47,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 20:17:47,221 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-21 20:17:47,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:47,227 INFO L225 Difference]: With dead ends: 1027 [2021-10-21 20:17:47,227 INFO L226 Difference]: Without dead ends: 715 [2021-10-21 20:17:47,229 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 22.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:47,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-21 20:17:47,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-21 20:17:47,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4711538461538463) internal successors, (612), 434 states have internal predecessors, (612), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 612 transitions. [2021-10-21 20:17:47,262 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 612 transitions. Word has length 57 [2021-10-21 20:17:47,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:47,263 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 612 transitions. [2021-10-21 20:17:47,263 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,264 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 612 transitions. [2021-10-21 20:17:47,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-21 20:17:47,264 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:47,265 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:47,265 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-21 20:17:47,265 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:47,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:47,266 INFO L82 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-21 20:17:47,266 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:47,267 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968120969] [2021-10-21 20:17:47,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:47,267 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:47,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:47,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:47,369 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:47,369 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968120969] [2021-10-21 20:17:47,369 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1968120969] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:47,369 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:47,369 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:47,370 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156413430] [2021-10-21 20:17:47,371 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:47,372 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:47,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:47,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:47,373 INFO L87 Difference]: Start difference. First operand 435 states and 612 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:47,428 INFO L93 Difference]: Finished difference Result 875 states and 1255 transitions. [2021-10-21 20:17:47,429 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:47,429 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-21 20:17:47,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:47,434 INFO L225 Difference]: With dead ends: 875 [2021-10-21 20:17:47,435 INFO L226 Difference]: Without dead ends: 563 [2021-10-21 20:17:47,440 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:47,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-21 20:17:47,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 430. [2021-10-21 20:17:47,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 412 states have (on average 1.4660194174757282) internal successors, (604), 429 states have internal predecessors, (604), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 604 transitions. [2021-10-21 20:17:47,479 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 604 transitions. Word has length 58 [2021-10-21 20:17:47,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:47,480 INFO L470 AbstractCegarLoop]: Abstraction has 430 states and 604 transitions. [2021-10-21 20:17:47,480 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,480 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 604 transitions. [2021-10-21 20:17:47,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-21 20:17:47,481 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:47,481 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:47,481 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-21 20:17:47,482 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:47,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:47,482 INFO L82 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-21 20:17:47,482 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:47,484 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863651278] [2021-10-21 20:17:47,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:47,485 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:47,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:47,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:47,624 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:47,625 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863651278] [2021-10-21 20:17:47,625 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [863651278] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:47,625 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:47,625 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:47,625 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074350905] [2021-10-21 20:17:47,626 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:47,626 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:47,627 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:47,627 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:47,627 INFO L87 Difference]: Start difference. First operand 430 states and 604 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:47,729 INFO L93 Difference]: Finished difference Result 874 states and 1254 transitions. [2021-10-21 20:17:47,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:47,730 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-21 20:17:47,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:47,734 INFO L225 Difference]: With dead ends: 874 [2021-10-21 20:17:47,734 INFO L226 Difference]: Without dead ends: 567 [2021-10-21 20:17:47,735 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:47,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2021-10-21 20:17:47,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 410. [2021-10-21 20:17:47,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 410 states, 396 states have (on average 1.4444444444444444) internal successors, (572), 409 states have internal predecessors, (572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 572 transitions. [2021-10-21 20:17:47,768 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 572 transitions. Word has length 62 [2021-10-21 20:17:47,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:47,769 INFO L470 AbstractCegarLoop]: Abstraction has 410 states and 572 transitions. [2021-10-21 20:17:47,769 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,769 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 572 transitions. [2021-10-21 20:17:47,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-21 20:17:47,770 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:47,770 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:47,771 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-21 20:17:47,771 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:47,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:47,772 INFO L82 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-21 20:17:47,772 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:47,775 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131197929] [2021-10-21 20:17:47,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:47,775 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:47,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:47,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:47,902 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:47,902 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131197929] [2021-10-21 20:17:47,903 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2131197929] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:47,903 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:47,903 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:47,903 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641487345] [2021-10-21 20:17:47,904 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:47,904 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:47,912 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:47,912 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:47,912 INFO L87 Difference]: Start difference. First operand 410 states and 572 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:47,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:47,989 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-21 20:17:47,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:47,990 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-21 20:17:47,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:47,994 INFO L225 Difference]: With dead ends: 842 [2021-10-21 20:17:47,995 INFO L226 Difference]: Without dead ends: 555 [2021-10-21 20:17:47,996 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:47,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2021-10-21 20:17:48,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 398. [2021-10-21 20:17:48,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 398 states, 386 states have (on average 1.4352331606217616) internal successors, (554), 397 states have internal predecessors, (554), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 554 transitions. [2021-10-21 20:17:48,028 INFO L78 Accepts]: Start accepts. Automaton has 398 states and 554 transitions. Word has length 66 [2021-10-21 20:17:48,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:48,029 INFO L470 AbstractCegarLoop]: Abstraction has 398 states and 554 transitions. [2021-10-21 20:17:48,029 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,029 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states and 554 transitions. [2021-10-21 20:17:48,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-21 20:17:48,037 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:48,037 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:48,038 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-21 20:17:48,038 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:48,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:48,038 INFO L82 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-21 20:17:48,039 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:48,039 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383309486] [2021-10-21 20:17:48,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:48,039 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:48,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:48,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:48,153 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:48,153 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383309486] [2021-10-21 20:17:48,154 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1383309486] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:48,154 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:48,154 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:48,154 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054937346] [2021-10-21 20:17:48,155 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:48,155 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:48,156 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:48,156 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:48,156 INFO L87 Difference]: Start difference. First operand 398 states and 554 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:48,255 INFO L93 Difference]: Finished difference Result 838 states and 1190 transitions. [2021-10-21 20:17:48,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:48,256 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-21 20:17:48,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:48,264 INFO L225 Difference]: With dead ends: 838 [2021-10-21 20:17:48,264 INFO L226 Difference]: Without dead ends: 563 [2021-10-21 20:17:48,265 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:48,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-21 20:17:48,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 378. [2021-10-21 20:17:48,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 378 states, 370 states have (on average 1.4108108108108108) internal successors, (522), 377 states have internal predecessors, (522), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 522 transitions. [2021-10-21 20:17:48,303 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 522 transitions. Word has length 67 [2021-10-21 20:17:48,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:48,305 INFO L470 AbstractCegarLoop]: Abstraction has 378 states and 522 transitions. [2021-10-21 20:17:48,305 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,305 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 522 transitions. [2021-10-21 20:17:48,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-21 20:17:48,307 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:48,307 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:48,307 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-21 20:17:48,308 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:48,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:48,308 INFO L82 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-21 20:17:48,309 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:48,309 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319991461] [2021-10-21 20:17:48,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:48,309 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:48,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:48,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:48,539 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:48,539 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319991461] [2021-10-21 20:17:48,539 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [319991461] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:48,540 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:48,540 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 20:17:48,540 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639750636] [2021-10-21 20:17:48,540 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:17:48,541 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:48,542 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:17:48,542 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 20:17:48,542 INFO L87 Difference]: Start difference. First operand 378 states and 522 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:48,831 INFO L93 Difference]: Finished difference Result 1133 states and 1588 transitions. [2021-10-21 20:17:48,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 20:17:48,832 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-21 20:17:48,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:48,839 INFO L225 Difference]: With dead ends: 1133 [2021-10-21 20:17:48,840 INFO L226 Difference]: Without dead ends: 878 [2021-10-21 20:17:48,841 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 88.7ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-21 20:17:48,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 878 states. [2021-10-21 20:17:48,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 878 to 428. [2021-10-21 20:17:48,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 428 states, 420 states have (on average 1.4047619047619047) internal successors, (590), 427 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 590 transitions. [2021-10-21 20:17:48,891 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 590 transitions. Word has length 72 [2021-10-21 20:17:48,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:48,892 INFO L470 AbstractCegarLoop]: Abstraction has 428 states and 590 transitions. [2021-10-21 20:17:48,892 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:48,892 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 590 transitions. [2021-10-21 20:17:48,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-21 20:17:48,893 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:48,894 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:48,894 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-21 20:17:48,894 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:48,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:48,895 INFO L82 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-21 20:17:48,895 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:48,895 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832086167] [2021-10-21 20:17:48,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:48,896 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:48,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:48,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:48,996 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:48,996 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832086167] [2021-10-21 20:17:48,996 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832086167] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:48,996 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:48,997 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:48,997 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062906346] [2021-10-21 20:17:48,997 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:48,997 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:48,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:48,998 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:48,999 INFO L87 Difference]: Start difference. First operand 428 states and 590 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:49,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:49,073 INFO L93 Difference]: Finished difference Result 763 states and 1069 transitions. [2021-10-21 20:17:49,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:49,074 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-21 20:17:49,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:49,078 INFO L225 Difference]: With dead ends: 763 [2021-10-21 20:17:49,078 INFO L226 Difference]: Without dead ends: 508 [2021-10-21 20:17:49,080 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:49,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2021-10-21 20:17:49,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 424. [2021-10-21 20:17:49,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.3980815347721822) internal successors, (583), 423 states have internal predecessors, (583), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:49,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 583 transitions. [2021-10-21 20:17:49,125 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 583 transitions. Word has length 73 [2021-10-21 20:17:49,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:49,125 INFO L470 AbstractCegarLoop]: Abstraction has 424 states and 583 transitions. [2021-10-21 20:17:49,126 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:49,126 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 583 transitions. [2021-10-21 20:17:49,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-21 20:17:49,127 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:49,127 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:49,128 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-21 20:17:49,128 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:49,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:49,129 INFO L82 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-21 20:17:49,129 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:49,129 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784155689] [2021-10-21 20:17:49,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:49,130 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:49,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:49,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:49,202 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:49,202 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784155689] [2021-10-21 20:17:49,203 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1784155689] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:49,203 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:49,203 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:49,203 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1981518716] [2021-10-21 20:17:49,204 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:49,204 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:49,205 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:49,205 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:49,205 INFO L87 Difference]: Start difference. First operand 424 states and 583 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:49,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:49,332 INFO L93 Difference]: Finished difference Result 862 states and 1206 transitions. [2021-10-21 20:17:49,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:49,333 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-21 20:17:49,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:49,337 INFO L225 Difference]: With dead ends: 862 [2021-10-21 20:17:49,338 INFO L226 Difference]: Without dead ends: 594 [2021-10-21 20:17:49,339 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:49,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2021-10-21 20:17:49,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 408. [2021-10-21 20:17:49,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 408 states, 403 states have (on average 1.382133995037221) internal successors, (557), 407 states have internal predecessors, (557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:49,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 408 states to 408 states and 557 transitions. [2021-10-21 20:17:49,390 INFO L78 Accepts]: Start accepts. Automaton has 408 states and 557 transitions. Word has length 73 [2021-10-21 20:17:49,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:49,390 INFO L470 AbstractCegarLoop]: Abstraction has 408 states and 557 transitions. [2021-10-21 20:17:49,391 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:49,391 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 557 transitions. [2021-10-21 20:17:49,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-21 20:17:49,393 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:49,393 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:49,393 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-21 20:17:49,393 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:49,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:49,394 INFO L82 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-21 20:17:49,394 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:49,395 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277821042] [2021-10-21 20:17:49,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:49,395 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:49,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:49,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:49,534 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:49,535 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277821042] [2021-10-21 20:17:49,535 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [277821042] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:49,535 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:49,535 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-21 20:17:49,535 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [69159587] [2021-10-21 20:17:49,536 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-21 20:17:49,536 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:49,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-21 20:17:49,537 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-21 20:17:49,537 INFO L87 Difference]: Start difference. First operand 408 states and 557 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:49,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:49,951 INFO L93 Difference]: Finished difference Result 1404 states and 1944 transitions. [2021-10-21 20:17:49,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 20:17:49,952 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-21 20:17:49,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:49,960 INFO L225 Difference]: With dead ends: 1404 [2021-10-21 20:17:49,960 INFO L226 Difference]: Without dead ends: 1147 [2021-10-21 20:17:49,961 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 97.6ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-21 20:17:49,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1147 states. [2021-10-21 20:17:50,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1147 to 436. [2021-10-21 20:17:50,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 436 states, 431 states have (on average 1.3665893271461718) internal successors, (589), 435 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 589 transitions. [2021-10-21 20:17:50,055 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 589 transitions. Word has length 76 [2021-10-21 20:17:50,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:50,055 INFO L470 AbstractCegarLoop]: Abstraction has 436 states and 589 transitions. [2021-10-21 20:17:50,056 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,056 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 589 transitions. [2021-10-21 20:17:50,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-21 20:17:50,057 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:50,057 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:50,058 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-21 20:17:50,058 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:50,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:50,059 INFO L82 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-21 20:17:50,059 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:50,059 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125962737] [2021-10-21 20:17:50,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:50,060 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:50,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:50,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:50,123 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:50,123 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1125962737] [2021-10-21 20:17:50,123 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1125962737] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:50,123 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:50,124 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:50,124 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190692775] [2021-10-21 20:17:50,124 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:17:50,125 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:50,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:17:50,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:17:50,126 INFO L87 Difference]: Start difference. First operand 436 states and 589 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:50,302 INFO L93 Difference]: Finished difference Result 1115 states and 1519 transitions. [2021-10-21 20:17:50,303 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 20:17:50,303 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-21 20:17:50,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:50,309 INFO L225 Difference]: With dead ends: 1115 [2021-10-21 20:17:50,310 INFO L226 Difference]: Without dead ends: 852 [2021-10-21 20:17:50,311 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.2ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:50,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 852 states. [2021-10-21 20:17:50,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 852 to 657. [2021-10-21 20:17:50,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 657 states, 652 states have (on average 1.348159509202454) internal successors, (879), 656 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 879 transitions. [2021-10-21 20:17:50,393 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 879 transitions. Word has length 76 [2021-10-21 20:17:50,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:50,393 INFO L470 AbstractCegarLoop]: Abstraction has 657 states and 879 transitions. [2021-10-21 20:17:50,394 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,394 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 879 transitions. [2021-10-21 20:17:50,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-21 20:17:50,396 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:50,396 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:50,396 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-21 20:17:50,396 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:50,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:50,397 INFO L82 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-21 20:17:50,397 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:50,397 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [801644876] [2021-10-21 20:17:50,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:50,398 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:50,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:50,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:50,490 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:50,490 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [801644876] [2021-10-21 20:17:50,490 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [801644876] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:50,491 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:50,491 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 20:17:50,491 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989892527] [2021-10-21 20:17:50,491 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:17:50,492 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:50,492 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:17:50,492 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 20:17:50,493 INFO L87 Difference]: Start difference. First operand 657 states and 879 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:50,741 INFO L93 Difference]: Finished difference Result 1021 states and 1390 transitions. [2021-10-21 20:17:50,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-21 20:17:50,742 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-21 20:17:50,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:50,749 INFO L225 Difference]: With dead ends: 1021 [2021-10-21 20:17:50,749 INFO L226 Difference]: Without dead ends: 1019 [2021-10-21 20:17:50,750 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 44.4ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-21 20:17:50,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1019 states. [2021-10-21 20:17:50,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1019 to 659. [2021-10-21 20:17:50,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 659 states, 654 states have (on average 1.3470948012232415) internal successors, (881), 658 states have internal predecessors, (881), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 881 transitions. [2021-10-21 20:17:50,838 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 881 transitions. Word has length 77 [2021-10-21 20:17:50,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:50,838 INFO L470 AbstractCegarLoop]: Abstraction has 659 states and 881 transitions. [2021-10-21 20:17:50,839 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:50,839 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 881 transitions. [2021-10-21 20:17:50,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-21 20:17:50,840 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:50,841 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:50,841 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-21 20:17:50,841 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:50,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:50,842 INFO L82 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-21 20:17:50,842 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:50,842 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24538256] [2021-10-21 20:17:50,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:50,843 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:50,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:50,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:50,967 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:50,967 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [24538256] [2021-10-21 20:17:50,967 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [24538256] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:50,967 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:50,968 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 20:17:50,968 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1662652733] [2021-10-21 20:17:50,968 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:17:50,968 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:50,969 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:17:50,969 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 20:17:50,970 INFO L87 Difference]: Start difference. First operand 659 states and 881 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:51,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:51,411 INFO L93 Difference]: Finished difference Result 1988 states and 2739 transitions. [2021-10-21 20:17:51,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 20:17:51,412 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-21 20:17:51,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:51,423 INFO L225 Difference]: With dead ends: 1988 [2021-10-21 20:17:51,424 INFO L226 Difference]: Without dead ends: 1608 [2021-10-21 20:17:51,425 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 62.7ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-21 20:17:51,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1608 states. [2021-10-21 20:17:51,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1608 to 647. [2021-10-21 20:17:51,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 647 states, 642 states have (on average 1.3504672897196262) internal successors, (867), 646 states have internal predecessors, (867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:51,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 867 transitions. [2021-10-21 20:17:51,525 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 867 transitions. Word has length 77 [2021-10-21 20:17:51,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:51,525 INFO L470 AbstractCegarLoop]: Abstraction has 647 states and 867 transitions. [2021-10-21 20:17:51,525 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:51,526 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 867 transitions. [2021-10-21 20:17:51,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-21 20:17:51,527 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:51,527 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:51,528 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-21 20:17:51,528 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:51,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:51,529 INFO L82 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-21 20:17:51,529 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:51,529 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [743731984] [2021-10-21 20:17:51,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:51,530 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:51,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:51,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:51,667 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:51,667 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [743731984] [2021-10-21 20:17:51,668 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [743731984] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:51,668 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:51,668 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 20:17:51,668 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977283505] [2021-10-21 20:17:51,669 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:17:51,669 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:51,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:17:51,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 20:17:51,670 INFO L87 Difference]: Start difference. First operand 647 states and 867 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:51,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:51,974 INFO L93 Difference]: Finished difference Result 1542 states and 2165 transitions. [2021-10-21 20:17:51,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 20:17:51,975 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-21 20:17:51,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:51,984 INFO L225 Difference]: With dead ends: 1542 [2021-10-21 20:17:51,984 INFO L226 Difference]: Without dead ends: 1162 [2021-10-21 20:17:51,985 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 39.5ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-21 20:17:51,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1162 states. [2021-10-21 20:17:52,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1162 to 653. [2021-10-21 20:17:52,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 653 states, 648 states have (on average 1.3472222222222223) internal successors, (873), 652 states have internal predecessors, (873), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:52,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 653 states to 653 states and 873 transitions. [2021-10-21 20:17:52,087 INFO L78 Accepts]: Start accepts. Automaton has 653 states and 873 transitions. Word has length 78 [2021-10-21 20:17:52,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:52,087 INFO L470 AbstractCegarLoop]: Abstraction has 653 states and 873 transitions. [2021-10-21 20:17:52,088 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:52,088 INFO L276 IsEmpty]: Start isEmpty. Operand 653 states and 873 transitions. [2021-10-21 20:17:52,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-21 20:17:52,089 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:52,090 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:52,090 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-21 20:17:52,090 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:52,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:52,091 INFO L82 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-21 20:17:52,091 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:52,092 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602940115] [2021-10-21 20:17:52,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:52,092 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:52,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:52,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:52,162 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:52,163 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602940115] [2021-10-21 20:17:52,163 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1602940115] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:52,163 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:52,163 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:52,163 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1621867168] [2021-10-21 20:17:52,164 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:17:52,165 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:52,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:17:52,166 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:17:52,166 INFO L87 Difference]: Start difference. First operand 653 states and 873 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:52,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:52,381 INFO L93 Difference]: Finished difference Result 1511 states and 2028 transitions. [2021-10-21 20:17:52,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 20:17:52,382 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-21 20:17:52,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:52,389 INFO L225 Difference]: With dead ends: 1511 [2021-10-21 20:17:52,390 INFO L226 Difference]: Without dead ends: 1107 [2021-10-21 20:17:52,391 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:52,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-21 20:17:52,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 851. [2021-10-21 20:17:52,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 851 states, 846 states have (on average 1.339243498817967) internal successors, (1133), 850 states have internal predecessors, (1133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:52,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 851 states to 851 states and 1133 transitions. [2021-10-21 20:17:52,534 INFO L78 Accepts]: Start accepts. Automaton has 851 states and 1133 transitions. Word has length 78 [2021-10-21 20:17:52,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:52,535 INFO L470 AbstractCegarLoop]: Abstraction has 851 states and 1133 transitions. [2021-10-21 20:17:52,535 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:52,535 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 1133 transitions. [2021-10-21 20:17:52,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-21 20:17:52,537 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:52,537 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:52,537 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-21 20:17:52,538 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:52,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:52,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-21 20:17:52,538 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:52,539 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [177342545] [2021-10-21 20:17:52,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:52,539 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:52,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:52,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:52,663 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:52,663 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [177342545] [2021-10-21 20:17:52,663 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [177342545] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:52,663 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:52,664 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 20:17:52,664 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489744332] [2021-10-21 20:17:52,664 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:17:52,664 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:52,665 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:17:52,665 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 20:17:52,666 INFO L87 Difference]: Start difference. First operand 851 states and 1133 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:53,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:53,324 INFO L93 Difference]: Finished difference Result 3248 states and 4372 transitions. [2021-10-21 20:17:53,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 20:17:53,325 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-21 20:17:53,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:53,343 INFO L225 Difference]: With dead ends: 3248 [2021-10-21 20:17:53,343 INFO L226 Difference]: Without dead ends: 2713 [2021-10-21 20:17:53,346 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 90.5ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-21 20:17:53,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2713 states. [2021-10-21 20:17:53,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2713 to 901. [2021-10-21 20:17:53,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 901 states, 896 states have (on average 1.3359375) internal successors, (1197), 900 states have internal predecessors, (1197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:53,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 901 states to 901 states and 1197 transitions. [2021-10-21 20:17:53,492 INFO L78 Accepts]: Start accepts. Automaton has 901 states and 1197 transitions. Word has length 78 [2021-10-21 20:17:53,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:53,492 INFO L470 AbstractCegarLoop]: Abstraction has 901 states and 1197 transitions. [2021-10-21 20:17:53,493 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:53,493 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1197 transitions. [2021-10-21 20:17:53,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-21 20:17:53,495 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:53,495 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:53,495 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-21 20:17:53,495 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:53,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:53,496 INFO L82 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-21 20:17:53,496 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:53,496 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066015486] [2021-10-21 20:17:53,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:53,497 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:53,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:53,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:53,569 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:53,569 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066015486] [2021-10-21 20:17:53,570 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2066015486] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:53,570 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:53,570 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:53,570 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698858918] [2021-10-21 20:17:53,571 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:17:53,571 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:53,573 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:17:53,573 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:17:53,573 INFO L87 Difference]: Start difference. First operand 901 states and 1197 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:53,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:53,882 INFO L93 Difference]: Finished difference Result 2319 states and 3089 transitions. [2021-10-21 20:17:53,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 20:17:53,882 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-21 20:17:53,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:53,894 INFO L225 Difference]: With dead ends: 2319 [2021-10-21 20:17:53,895 INFO L226 Difference]: Without dead ends: 1731 [2021-10-21 20:17:53,896 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:53,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1731 states. [2021-10-21 20:17:54,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1731 to 1256. [2021-10-21 20:17:54,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1256 states, 1251 states have (on average 1.3245403677058354) internal successors, (1657), 1255 states have internal predecessors, (1657), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:54,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1256 states and 1657 transitions. [2021-10-21 20:17:54,073 INFO L78 Accepts]: Start accepts. Automaton has 1256 states and 1657 transitions. Word has length 79 [2021-10-21 20:17:54,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:54,074 INFO L470 AbstractCegarLoop]: Abstraction has 1256 states and 1657 transitions. [2021-10-21 20:17:54,074 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:54,074 INFO L276 IsEmpty]: Start isEmpty. Operand 1256 states and 1657 transitions. [2021-10-21 20:17:54,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-21 20:17:54,076 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:54,076 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:54,077 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-21 20:17:54,077 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:54,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:54,077 INFO L82 PathProgramCache]: Analyzing trace with hash -676572605, now seen corresponding path program 1 times [2021-10-21 20:17:54,078 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:54,078 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529857877] [2021-10-21 20:17:54,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:54,078 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:54,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:54,135 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:54,136 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:54,136 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529857877] [2021-10-21 20:17:54,136 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [529857877] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:54,137 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:54,137 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:54,137 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112582041] [2021-10-21 20:17:54,137 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:54,138 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:54,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:54,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:54,139 INFO L87 Difference]: Start difference. First operand 1256 states and 1657 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:54,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:54,547 INFO L93 Difference]: Finished difference Result 3064 states and 4044 transitions. [2021-10-21 20:17:54,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:54,547 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-21 20:17:54,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:54,562 INFO L225 Difference]: With dead ends: 3064 [2021-10-21 20:17:54,562 INFO L226 Difference]: Without dead ends: 2078 [2021-10-21 20:17:54,565 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:54,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2078 states. [2021-10-21 20:17:54,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2078 to 1258. [2021-10-21 20:17:54,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1258 states, 1253 states have (on average 1.324022346368715) internal successors, (1659), 1257 states have internal predecessors, (1659), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:54,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1258 states to 1258 states and 1659 transitions. [2021-10-21 20:17:54,740 INFO L78 Accepts]: Start accepts. Automaton has 1258 states and 1659 transitions. Word has length 80 [2021-10-21 20:17:54,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:54,741 INFO L470 AbstractCegarLoop]: Abstraction has 1258 states and 1659 transitions. [2021-10-21 20:17:54,741 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:54,741 INFO L276 IsEmpty]: Start isEmpty. Operand 1258 states and 1659 transitions. [2021-10-21 20:17:54,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-21 20:17:54,743 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:54,743 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:54,744 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-21 20:17:54,744 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:54,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:54,745 INFO L82 PathProgramCache]: Analyzing trace with hash -659983772, now seen corresponding path program 1 times [2021-10-21 20:17:54,745 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:54,745 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855836565] [2021-10-21 20:17:54,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:54,745 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:54,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:54,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:54,825 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:54,826 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855836565] [2021-10-21 20:17:54,826 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1855836565] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:54,826 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:54,826 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:54,826 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411506515] [2021-10-21 20:17:54,827 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:17:54,827 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:54,827 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:17:54,828 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:17:54,828 INFO L87 Difference]: Start difference. First operand 1258 states and 1659 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:55,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:55,107 INFO L93 Difference]: Finished difference Result 2600 states and 3430 transitions. [2021-10-21 20:17:55,107 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 20:17:55,108 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2021-10-21 20:17:55,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:55,117 INFO L225 Difference]: With dead ends: 2600 [2021-10-21 20:17:55,118 INFO L226 Difference]: Without dead ends: 1418 [2021-10-21 20:17:55,120 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 19.7ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:55,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1418 states. [2021-10-21 20:17:55,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1418 to 1055. [2021-10-21 20:17:55,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1055 states, 1050 states have (on average 1.3209523809523809) internal successors, (1387), 1054 states have internal predecessors, (1387), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:55,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1055 states to 1055 states and 1387 transitions. [2021-10-21 20:17:55,291 INFO L78 Accepts]: Start accepts. Automaton has 1055 states and 1387 transitions. Word has length 81 [2021-10-21 20:17:55,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:55,292 INFO L470 AbstractCegarLoop]: Abstraction has 1055 states and 1387 transitions. [2021-10-21 20:17:55,292 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:55,293 INFO L276 IsEmpty]: Start isEmpty. Operand 1055 states and 1387 transitions. [2021-10-21 20:17:55,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-21 20:17:55,294 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:55,294 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:55,295 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-21 20:17:55,295 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:55,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:55,295 INFO L82 PathProgramCache]: Analyzing trace with hash -63459148, now seen corresponding path program 1 times [2021-10-21 20:17:55,296 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:55,296 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [633125128] [2021-10-21 20:17:55,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:55,296 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:55,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:55,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:55,341 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:55,341 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [633125128] [2021-10-21 20:17:55,341 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [633125128] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:55,341 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:55,341 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 20:17:55,342 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1481002135] [2021-10-21 20:17:55,343 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 20:17:55,343 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:55,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 20:17:55,344 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:55,344 INFO L87 Difference]: Start difference. First operand 1055 states and 1387 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:55,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:55,690 INFO L93 Difference]: Finished difference Result 2491 states and 3293 transitions. [2021-10-21 20:17:55,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 20:17:55,690 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-21 20:17:55,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:55,701 INFO L225 Difference]: With dead ends: 2491 [2021-10-21 20:17:55,701 INFO L226 Difference]: Without dead ends: 1585 [2021-10-21 20:17:55,703 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 20:17:55,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1585 states. [2021-10-21 20:17:55,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1585 to 1061. [2021-10-21 20:17:55,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1061 states, 1056 states have (on average 1.3191287878787878) internal successors, (1393), 1060 states have internal predecessors, (1393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:55,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 1393 transitions. [2021-10-21 20:17:55,869 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 1393 transitions. Word has length 82 [2021-10-21 20:17:55,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:55,869 INFO L470 AbstractCegarLoop]: Abstraction has 1061 states and 1393 transitions. [2021-10-21 20:17:55,870 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:55,870 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1393 transitions. [2021-10-21 20:17:55,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-21 20:17:55,871 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:55,872 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:55,872 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-21 20:17:55,872 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:55,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:55,873 INFO L82 PathProgramCache]: Analyzing trace with hash -753963456, now seen corresponding path program 1 times [2021-10-21 20:17:55,873 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:55,873 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433916281] [2021-10-21 20:17:55,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:55,874 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:55,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:55,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:55,955 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:55,955 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [433916281] [2021-10-21 20:17:55,958 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [433916281] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:55,958 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:17:55,959 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:17:55,959 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2137253582] [2021-10-21 20:17:55,959 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:17:55,959 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:55,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:17:55,960 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:17:55,960 INFO L87 Difference]: Start difference. First operand 1061 states and 1393 transitions. Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:56,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:56,221 INFO L93 Difference]: Finished difference Result 2440 states and 3214 transitions. [2021-10-21 20:17:56,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 20:17:56,222 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-21 20:17:56,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:56,248 INFO L225 Difference]: With dead ends: 2440 [2021-10-21 20:17:56,248 INFO L226 Difference]: Without dead ends: 1478 [2021-10-21 20:17:56,251 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 19.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:17:56,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1478 states. [2021-10-21 20:17:56,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1478 to 1001. [2021-10-21 20:17:56,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3142570281124497) internal successors, (1309), 1000 states have internal predecessors, (1309), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:56,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1309 transitions. [2021-10-21 20:17:56,447 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1309 transitions. Word has length 82 [2021-10-21 20:17:56,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:56,447 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1309 transitions. [2021-10-21 20:17:56,447 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:56,448 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1309 transitions. [2021-10-21 20:17:56,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2021-10-21 20:17:56,451 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:56,452 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:56,452 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-21 20:17:56,452 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:56,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:56,453 INFO L82 PathProgramCache]: Analyzing trace with hash -508619245, now seen corresponding path program 1 times [2021-10-21 20:17:56,453 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:56,453 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798570010] [2021-10-21 20:17:56,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:56,455 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:56,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:56,666 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:56,666 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:56,666 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1798570010] [2021-10-21 20:17:56,667 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1798570010] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:17:56,667 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1670140604] [2021-10-21 20:17:56,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:56,667 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:17:56,668 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:17:56,674 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:17:56,693 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-21 20:17:56,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:56,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 716 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-21 20:17:56,957 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:17:57,607 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-21 20:17:57,608 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1670140604] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:17:57,608 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 20:17:57,608 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-21 20:17:57,609 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1856448773] [2021-10-21 20:17:57,609 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:17:57,609 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:57,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:17:57,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-21 20:17:57,611 INFO L87 Difference]: Start difference. First operand 1001 states and 1309 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:58,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:17:58,340 INFO L93 Difference]: Finished difference Result 2598 states and 3526 transitions. [2021-10-21 20:17:58,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 20:17:58,340 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 128 [2021-10-21 20:17:58,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:17:58,346 INFO L225 Difference]: With dead ends: 2598 [2021-10-21 20:17:58,347 INFO L226 Difference]: Without dead ends: 1784 [2021-10-21 20:17:58,349 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 148.4ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-21 20:17:58,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1784 states. [2021-10-21 20:17:58,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1784 to 1001. [2021-10-21 20:17:58,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3132530120481927) internal successors, (1308), 1000 states have internal predecessors, (1308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:58,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1308 transitions. [2021-10-21 20:17:58,576 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1308 transitions. Word has length 128 [2021-10-21 20:17:58,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:17:58,578 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1308 transitions. [2021-10-21 20:17:58,579 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:17:58,579 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1308 transitions. [2021-10-21 20:17:58,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-21 20:17:58,583 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:17:58,583 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:17:58,638 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-21 20:17:58,810 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-21 20:17:58,810 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:17:58,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:17:58,811 INFO L82 PathProgramCache]: Analyzing trace with hash 1477169230, now seen corresponding path program 1 times [2021-10-21 20:17:58,811 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:17:58,811 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [889807002] [2021-10-21 20:17:58,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:58,811 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:17:58,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:59,026 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:59,026 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:17:59,027 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [889807002] [2021-10-21 20:17:59,027 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [889807002] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:17:59,027 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [489803720] [2021-10-21 20:17:59,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:17:59,027 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:17:59,028 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:17:59,029 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:17:59,055 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-21 20:17:59,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:17:59,326 INFO L263 TraceCheckSpWp]: Trace formula consists of 730 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-21 20:17:59,334 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:17:59,939 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:17:59,939 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [489803720] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:17:59,939 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:17:59,940 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-21 20:17:59,940 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685364604] [2021-10-21 20:17:59,941 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-21 20:17:59,941 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:17:59,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-21 20:17:59,942 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-21 20:17:59,942 INFO L87 Difference]: Start difference. First operand 1001 states and 1308 transitions. Second operand has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:13,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:13,202 INFO L93 Difference]: Finished difference Result 16835 states and 22497 transitions. [2021-10-21 20:18:13,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-21 20:18:13,203 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-21 20:18:13,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:13,264 INFO L225 Difference]: With dead ends: 16835 [2021-10-21 20:18:13,264 INFO L226 Difference]: Without dead ends: 16027 [2021-10-21 20:18:13,306 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 475 GetRequests, 224 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28995 ImplicationChecksByTransitivity, 6653.2ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-21 20:18:13,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16027 states. [2021-10-21 20:18:14,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16027 to 2722. [2021-10-21 20:18:14,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2722 states, 2717 states have (on average 1.3106367316893632) internal successors, (3561), 2721 states have internal predecessors, (3561), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:14,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2722 states to 2722 states and 3561 transitions. [2021-10-21 20:18:14,050 INFO L78 Accepts]: Start accepts. Automaton has 2722 states and 3561 transitions. Word has length 132 [2021-10-21 20:18:14,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:14,050 INFO L470 AbstractCegarLoop]: Abstraction has 2722 states and 3561 transitions. [2021-10-21 20:18:14,051 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:14,052 INFO L276 IsEmpty]: Start isEmpty. Operand 2722 states and 3561 transitions. [2021-10-21 20:18:14,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-21 20:18:14,059 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:14,059 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:14,106 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:14,286 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-21 20:18:14,286 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:14,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:14,287 INFO L82 PathProgramCache]: Analyzing trace with hash 199325748, now seen corresponding path program 1 times [2021-10-21 20:18:14,287 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:14,287 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79228047] [2021-10-21 20:18:14,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:14,287 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:14,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:14,563 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:14,563 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:14,564 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79228047] [2021-10-21 20:18:14,564 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [79228047] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:14,564 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1145908243] [2021-10-21 20:18:14,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:14,564 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:14,565 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:14,566 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:14,581 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-21 20:18:14,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:14,933 INFO L263 TraceCheckSpWp]: Trace formula consists of 782 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-21 20:18:14,940 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:15,442 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:15,443 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1145908243] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:15,443 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:18:15,443 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-21 20:18:15,444 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1492618397] [2021-10-21 20:18:15,444 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-21 20:18:15,445 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:15,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-21 20:18:15,445 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-21 20:18:15,446 INFO L87 Difference]: Start difference. First operand 2722 states and 3561 transitions. Second operand has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:17,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:17,131 INFO L93 Difference]: Finished difference Result 9813 states and 13401 transitions. [2021-10-21 20:18:17,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-21 20:18:17,131 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-21 20:18:17,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:17,216 INFO L225 Difference]: With dead ends: 9813 [2021-10-21 20:18:17,216 INFO L226 Difference]: Without dead ends: 7318 [2021-10-21 20:18:17,222 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 143 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 213.8ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-21 20:18:17,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7318 states. [2021-10-21 20:18:17,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7318 to 2327. [2021-10-21 20:18:17,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2327 states, 2322 states have (on average 1.313953488372093) internal successors, (3051), 2326 states have internal predecessors, (3051), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:17,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2327 states to 2327 states and 3051 transitions. [2021-10-21 20:18:17,753 INFO L78 Accepts]: Start accepts. Automaton has 2327 states and 3051 transitions. Word has length 133 [2021-10-21 20:18:17,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:17,754 INFO L470 AbstractCegarLoop]: Abstraction has 2327 states and 3051 transitions. [2021-10-21 20:18:17,754 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:17,754 INFO L276 IsEmpty]: Start isEmpty. Operand 2327 states and 3051 transitions. [2021-10-21 20:18:17,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-21 20:18:17,761 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:17,761 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:17,805 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:17,990 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:17,990 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:17,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:17,991 INFO L82 PathProgramCache]: Analyzing trace with hash 99406826, now seen corresponding path program 1 times [2021-10-21 20:18:17,991 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:17,991 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350743282] [2021-10-21 20:18:17,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:17,991 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:18,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:18,164 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-21 20:18:18,164 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:18,165 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350743282] [2021-10-21 20:18:18,165 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1350743282] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:18:18,165 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:18:18,165 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-21 20:18:18,165 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712935288] [2021-10-21 20:18:18,166 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-21 20:18:18,166 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:18,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-21 20:18:18,167 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-21 20:18:18,167 INFO L87 Difference]: Start difference. First operand 2327 states and 3051 transitions. Second operand has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:20,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:20,488 INFO L93 Difference]: Finished difference Result 13295 states and 17793 transitions. [2021-10-21 20:18:20,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-21 20:18:20,488 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 134 [2021-10-21 20:18:20,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:20,518 INFO L225 Difference]: With dead ends: 13295 [2021-10-21 20:18:20,519 INFO L226 Difference]: Without dead ends: 11215 [2021-10-21 20:18:20,526 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 153.8ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-21 20:18:20,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11215 states. [2021-10-21 20:18:21,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11215 to 2747. [2021-10-21 20:18:21,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2747 states, 2742 states have (on average 1.2939460247994166) internal successors, (3548), 2746 states have internal predecessors, (3548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:21,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2747 states to 2747 states and 3548 transitions. [2021-10-21 20:18:21,101 INFO L78 Accepts]: Start accepts. Automaton has 2747 states and 3548 transitions. Word has length 134 [2021-10-21 20:18:21,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:21,101 INFO L470 AbstractCegarLoop]: Abstraction has 2747 states and 3548 transitions. [2021-10-21 20:18:21,101 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:21,102 INFO L276 IsEmpty]: Start isEmpty. Operand 2747 states and 3548 transitions. [2021-10-21 20:18:21,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-21 20:18:21,108 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:21,109 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:21,109 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-21 20:18:21,109 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:21,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:21,110 INFO L82 PathProgramCache]: Analyzing trace with hash -1092691825, now seen corresponding path program 1 times [2021-10-21 20:18:21,110 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:21,110 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249816847] [2021-10-21 20:18:21,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:21,110 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:21,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:21,302 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:21,302 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:21,302 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249816847] [2021-10-21 20:18:21,303 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1249816847] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:21,303 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [213170483] [2021-10-21 20:18:21,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:21,303 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:21,303 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:21,304 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:21,305 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-21 20:18:21,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:21,709 INFO L263 TraceCheckSpWp]: Trace formula consists of 761 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-21 20:18:21,714 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:22,125 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-21 20:18:22,125 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [213170483] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:22,125 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:18:22,125 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5] total 11 [2021-10-21 20:18:22,127 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059013264] [2021-10-21 20:18:22,127 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-10-21 20:18:22,127 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:22,128 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-21 20:18:22,128 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2021-10-21 20:18:22,129 INFO L87 Difference]: Start difference. First operand 2747 states and 3548 transitions. Second operand has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:24,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:24,465 INFO L93 Difference]: Finished difference Result 5998 states and 7876 transitions. [2021-10-21 20:18:24,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-21 20:18:24,466 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-21 20:18:24,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:24,473 INFO L225 Difference]: With dead ends: 5998 [2021-10-21 20:18:24,473 INFO L226 Difference]: Without dead ends: 3346 [2021-10-21 20:18:24,479 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 156 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 626.7ms TimeCoverageRelationStatistics Valid=525, Invalid=1545, Unknown=0, NotChecked=0, Total=2070 [2021-10-21 20:18:24,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3346 states. [2021-10-21 20:18:24,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3346 to 1880. [2021-10-21 20:18:24,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2816) internal successors, (2403), 1879 states have internal predecessors, (2403), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:24,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2403 transitions. [2021-10-21 20:18:24,865 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2403 transitions. Word has length 136 [2021-10-21 20:18:24,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:24,866 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2403 transitions. [2021-10-21 20:18:24,866 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:24,866 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2403 transitions. [2021-10-21 20:18:24,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-21 20:18:24,872 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:24,872 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:24,911 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:25,098 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2021-10-21 20:18:25,098 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:25,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:25,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1966931344, now seen corresponding path program 1 times [2021-10-21 20:18:25,098 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:25,099 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [876122288] [2021-10-21 20:18:25,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:25,099 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:25,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:25,359 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:25,359 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:25,360 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [876122288] [2021-10-21 20:18:25,360 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [876122288] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:25,360 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1932340490] [2021-10-21 20:18:25,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:25,360 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:25,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:25,362 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:25,385 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-21 20:18:25,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:25,831 INFO L263 TraceCheckSpWp]: Trace formula consists of 785 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-21 20:18:25,836 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:26,254 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-21 20:18:26,254 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1932340490] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:18:26,254 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 20:18:26,255 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-21 20:18:26,255 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1921822484] [2021-10-21 20:18:26,255 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:18:26,255 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:26,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:18:26,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-21 20:18:26,256 INFO L87 Difference]: Start difference. First operand 1880 states and 2403 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:27,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:27,119 INFO L93 Difference]: Finished difference Result 5962 states and 7867 transitions. [2021-10-21 20:18:27,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 20:18:27,120 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-21 20:18:27,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:27,127 INFO L225 Difference]: With dead ends: 5962 [2021-10-21 20:18:27,128 INFO L226 Difference]: Without dead ends: 4237 [2021-10-21 20:18:27,132 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 147.8ms TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2021-10-21 20:18:27,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4237 states. [2021-10-21 20:18:27,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4237 to 1880. [2021-10-21 20:18:27,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.28) internal successors, (2400), 1879 states have internal predecessors, (2400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:27,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2400 transitions. [2021-10-21 20:18:27,527 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2400 transitions. Word has length 136 [2021-10-21 20:18:27,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:27,527 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2400 transitions. [2021-10-21 20:18:27,527 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:27,527 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2400 transitions. [2021-10-21 20:18:27,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-21 20:18:27,532 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:27,533 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:27,570 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:27,758 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2021-10-21 20:18:27,758 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:27,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:27,758 INFO L82 PathProgramCache]: Analyzing trace with hash 2092133653, now seen corresponding path program 1 times [2021-10-21 20:18:27,759 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:27,759 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995384163] [2021-10-21 20:18:27,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:27,759 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:27,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:28,032 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:28,032 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:28,032 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995384163] [2021-10-21 20:18:28,033 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995384163] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:28,033 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1085554344] [2021-10-21 20:18:28,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:28,033 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:28,033 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:28,038 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:28,053 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-21 20:18:28,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:28,569 INFO L263 TraceCheckSpWp]: Trace formula consists of 798 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-21 20:18:28,573 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:29,085 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-21 20:18:29,085 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1085554344] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:18:29,085 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 20:18:29,085 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-21 20:18:29,086 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343713653] [2021-10-21 20:18:29,086 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:18:29,086 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:29,087 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:18:29,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-21 20:18:29,087 INFO L87 Difference]: Start difference. First operand 1880 states and 2400 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:29,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:29,835 INFO L93 Difference]: Finished difference Result 5402 states and 7038 transitions. [2021-10-21 20:18:29,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 20:18:29,836 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-21 20:18:29,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:29,843 INFO L225 Difference]: With dead ends: 5402 [2021-10-21 20:18:29,843 INFO L226 Difference]: Without dead ends: 3677 [2021-10-21 20:18:29,847 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 210.9ms TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2021-10-21 20:18:29,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3677 states. [2021-10-21 20:18:30,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3677 to 1880. [2021-10-21 20:18:30,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2784) internal successors, (2397), 1879 states have internal predecessors, (2397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:30,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2397 transitions. [2021-10-21 20:18:30,258 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2397 transitions. Word has length 140 [2021-10-21 20:18:30,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:30,259 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2397 transitions. [2021-10-21 20:18:30,259 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:30,259 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2397 transitions. [2021-10-21 20:18:30,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-21 20:18:30,264 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:30,265 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:30,318 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:30,478 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:30,478 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:30,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:30,479 INFO L82 PathProgramCache]: Analyzing trace with hash -1655490771, now seen corresponding path program 1 times [2021-10-21 20:18:30,479 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:30,479 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588934030] [2021-10-21 20:18:30,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:30,479 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:30,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:30,745 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:30,745 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:30,745 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588934030] [2021-10-21 20:18:30,745 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [588934030] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:30,745 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1173961305] [2021-10-21 20:18:30,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:30,746 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:30,746 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:30,747 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:30,769 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-21 20:18:31,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:31,338 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-21 20:18:31,342 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:32,367 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:32,368 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1173961305] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:32,368 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:18:32,368 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-21 20:18:32,368 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [133775488] [2021-10-21 20:18:32,369 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-21 20:18:32,369 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:32,370 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-21 20:18:32,370 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-21 20:18:32,370 INFO L87 Difference]: Start difference. First operand 1880 states and 2397 transitions. Second operand has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:34,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:34,418 INFO L93 Difference]: Finished difference Result 5230 states and 6700 transitions. [2021-10-21 20:18:34,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-21 20:18:34,419 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-21 20:18:34,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:34,425 INFO L225 Difference]: With dead ends: 5230 [2021-10-21 20:18:34,426 INFO L226 Difference]: Without dead ends: 3545 [2021-10-21 20:18:34,429 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 468.4ms TimeCoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2021-10-21 20:18:34,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3545 states. [2021-10-21 20:18:34,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3545 to 2122. [2021-10-21 20:18:34,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2122 states, 2117 states have (on average 1.274444969296174) internal successors, (2698), 2121 states have internal predecessors, (2698), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:34,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2122 states to 2122 states and 2698 transitions. [2021-10-21 20:18:34,928 INFO L78 Accepts]: Start accepts. Automaton has 2122 states and 2698 transitions. Word has length 143 [2021-10-21 20:18:34,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:34,931 INFO L470 AbstractCegarLoop]: Abstraction has 2122 states and 2698 transitions. [2021-10-21 20:18:34,932 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:34,932 INFO L276 IsEmpty]: Start isEmpty. Operand 2122 states and 2698 transitions. [2021-10-21 20:18:34,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-21 20:18:34,937 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:34,937 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:34,972 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2021-10-21 20:18:35,153 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:35,154 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:35,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:35,154 INFO L82 PathProgramCache]: Analyzing trace with hash 508125803, now seen corresponding path program 1 times [2021-10-21 20:18:35,154 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:35,155 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750659128] [2021-10-21 20:18:35,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:35,155 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:35,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:35,256 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-21 20:18:35,257 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:35,257 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750659128] [2021-10-21 20:18:35,257 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [750659128] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:18:35,257 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:18:35,258 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:18:35,258 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458011457] [2021-10-21 20:18:35,258 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 20:18:35,259 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:35,259 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 20:18:35,259 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:18:35,260 INFO L87 Difference]: Start difference. First operand 2122 states and 2698 transitions. Second operand has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:35,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:35,656 INFO L93 Difference]: Finished difference Result 3982 states and 5104 transitions. [2021-10-21 20:18:35,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 20:18:35,656 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-21 20:18:35,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:35,659 INFO L225 Difference]: With dead ends: 3982 [2021-10-21 20:18:35,659 INFO L226 Difference]: Without dead ends: 1994 [2021-10-21 20:18:35,662 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 13.1ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-21 20:18:35,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1994 states. [2021-10-21 20:18:36,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1994 to 1994. [2021-10-21 20:18:36,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1994 states, 1989 states have (on average 1.278531925590749) internal successors, (2543), 1993 states have internal predecessors, (2543), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:36,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1994 states to 1994 states and 2543 transitions. [2021-10-21 20:18:36,027 INFO L78 Accepts]: Start accepts. Automaton has 1994 states and 2543 transitions. Word has length 143 [2021-10-21 20:18:36,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:36,028 INFO L470 AbstractCegarLoop]: Abstraction has 1994 states and 2543 transitions. [2021-10-21 20:18:36,028 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:36,028 INFO L276 IsEmpty]: Start isEmpty. Operand 1994 states and 2543 transitions. [2021-10-21 20:18:36,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-21 20:18:36,033 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:36,033 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:36,033 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-10-21 20:18:36,033 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:36,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:36,034 INFO L82 PathProgramCache]: Analyzing trace with hash -529555049, now seen corresponding path program 1 times [2021-10-21 20:18:36,034 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:36,034 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804510494] [2021-10-21 20:18:36,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:36,035 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:36,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:36,281 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:36,281 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:36,282 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804510494] [2021-10-21 20:18:36,282 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1804510494] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:36,282 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [676542759] [2021-10-21 20:18:36,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:36,282 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:36,283 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:36,286 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:36,305 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-10-21 20:18:36,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:36,997 INFO L263 TraceCheckSpWp]: Trace formula consists of 811 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-21 20:18:37,002 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:38,077 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:38,077 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [676542759] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:38,078 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:18:38,078 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-21 20:18:38,078 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1814608447] [2021-10-21 20:18:38,079 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-21 20:18:38,079 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:38,080 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-21 20:18:38,080 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-21 20:18:38,080 INFO L87 Difference]: Start difference. First operand 1994 states and 2543 transitions. Second operand has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:40,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:40,317 INFO L93 Difference]: Finished difference Result 6387 states and 8158 transitions. [2021-10-21 20:18:40,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2021-10-21 20:18:40,317 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-21 20:18:40,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:40,323 INFO L225 Difference]: With dead ends: 6387 [2021-10-21 20:18:40,323 INFO L226 Difference]: Without dead ends: 4588 [2021-10-21 20:18:40,326 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 137 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 645 ImplicationChecksByTransitivity, 693.8ms TimeCoverageRelationStatistics Valid=548, Invalid=2104, Unknown=0, NotChecked=0, Total=2652 [2021-10-21 20:18:40,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4588 states. [2021-10-21 20:18:40,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4588 to 2272. [2021-10-21 20:18:40,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2272 states, 2267 states have (on average 1.27437141596824) internal successors, (2889), 2271 states have internal predecessors, (2889), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:40,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2272 states to 2272 states and 2889 transitions. [2021-10-21 20:18:40,808 INFO L78 Accepts]: Start accepts. Automaton has 2272 states and 2889 transitions. Word has length 144 [2021-10-21 20:18:40,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:40,808 INFO L470 AbstractCegarLoop]: Abstraction has 2272 states and 2889 transitions. [2021-10-21 20:18:40,809 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:40,809 INFO L276 IsEmpty]: Start isEmpty. Operand 2272 states and 2889 transitions. [2021-10-21 20:18:40,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-21 20:18:40,813 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:40,813 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:40,858 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:41,029 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2021-10-21 20:18:41,030 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:41,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:41,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1568139623, now seen corresponding path program 1 times [2021-10-21 20:18:41,030 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:41,030 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [852285249] [2021-10-21 20:18:41,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:41,031 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:41,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:41,096 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2021-10-21 20:18:41,097 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:41,097 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [852285249] [2021-10-21 20:18:41,098 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [852285249] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:18:41,098 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:18:41,098 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:18:41,098 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293555806] [2021-10-21 20:18:41,100 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:18:41,100 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:41,101 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:18:41,101 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:18:41,101 INFO L87 Difference]: Start difference. First operand 2272 states and 2889 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:41,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:41,549 INFO L93 Difference]: Finished difference Result 4197 states and 5372 transitions. [2021-10-21 20:18:41,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 20:18:41,550 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-21 20:18:41,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:41,552 INFO L225 Difference]: With dead ends: 4197 [2021-10-21 20:18:41,552 INFO L226 Difference]: Without dead ends: 2061 [2021-10-21 20:18:41,554 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.4ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:18:41,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2061 states. [2021-10-21 20:18:41,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2061 to 2053. [2021-10-21 20:18:41,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2053 states, 2048 states have (on average 1.27197265625) internal successors, (2605), 2052 states have internal predecessors, (2605), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:41,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2053 states to 2053 states and 2605 transitions. [2021-10-21 20:18:41,959 INFO L78 Accepts]: Start accepts. Automaton has 2053 states and 2605 transitions. Word has length 144 [2021-10-21 20:18:41,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:41,959 INFO L470 AbstractCegarLoop]: Abstraction has 2053 states and 2605 transitions. [2021-10-21 20:18:41,960 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:41,960 INFO L276 IsEmpty]: Start isEmpty. Operand 2053 states and 2605 transitions. [2021-10-21 20:18:41,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-21 20:18:41,964 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:41,964 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:41,964 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-21 20:18:41,965 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:41,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:41,965 INFO L82 PathProgramCache]: Analyzing trace with hash -1816010656, now seen corresponding path program 1 times [2021-10-21 20:18:41,965 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:41,966 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373229350] [2021-10-21 20:18:41,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:41,966 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:42,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:42,111 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-21 20:18:42,111 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:42,113 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373229350] [2021-10-21 20:18:42,113 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373229350] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:18:42,113 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:18:42,114 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 20:18:42,114 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1290385944] [2021-10-21 20:18:42,114 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:18:42,115 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:42,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:18:42,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 20:18:42,116 INFO L87 Difference]: Start difference. First operand 2053 states and 2605 transitions. Second operand has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:43,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:43,669 INFO L93 Difference]: Finished difference Result 9022 states and 11736 transitions. [2021-10-21 20:18:43,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-21 20:18:43,670 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-21 20:18:43,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:43,676 INFO L225 Difference]: With dead ends: 9022 [2021-10-21 20:18:43,676 INFO L226 Difference]: Without dead ends: 7164 [2021-10-21 20:18:43,679 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 63.5ms TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2021-10-21 20:18:43,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7164 states. [2021-10-21 20:18:44,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7164 to 2406. [2021-10-21 20:18:44,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.2573927530195752) internal successors, (3019), 2405 states have internal predecessors, (3019), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:44,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3019 transitions. [2021-10-21 20:18:44,116 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3019 transitions. Word has length 144 [2021-10-21 20:18:44,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:44,117 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3019 transitions. [2021-10-21 20:18:44,117 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:44,117 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3019 transitions. [2021-10-21 20:18:44,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-21 20:18:44,121 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:44,122 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:44,122 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-10-21 20:18:44,122 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:44,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:44,123 INFO L82 PathProgramCache]: Analyzing trace with hash -922037262, now seen corresponding path program 1 times [2021-10-21 20:18:44,123 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:44,123 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1534584241] [2021-10-21 20:18:44,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:44,123 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:44,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:44,390 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:44,390 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:44,390 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1534584241] [2021-10-21 20:18:44,390 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1534584241] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:44,390 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1578270443] [2021-10-21 20:18:44,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:44,391 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:44,391 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:44,392 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:44,409 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-10-21 20:18:45,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:45,109 INFO L263 TraceCheckSpWp]: Trace formula consists of 812 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-21 20:18:45,111 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:46,400 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:46,401 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1578270443] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:46,401 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:18:46,401 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 9 [2021-10-21 20:18:46,401 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625638185] [2021-10-21 20:18:46,402 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-10-21 20:18:46,402 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:46,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-21 20:18:46,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2021-10-21 20:18:46,403 INFO L87 Difference]: Start difference. First operand 2406 states and 3019 transitions. Second operand has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:47,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:47,668 INFO L93 Difference]: Finished difference Result 5572 states and 7059 transitions. [2021-10-21 20:18:47,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-21 20:18:47,669 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-21 20:18:47,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:47,672 INFO L225 Difference]: With dead ends: 5572 [2021-10-21 20:18:47,672 INFO L226 Difference]: Without dead ends: 3361 [2021-10-21 20:18:47,675 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 139 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 214.2ms TimeCoverageRelationStatistics Valid=100, Invalid=206, Unknown=0, NotChecked=0, Total=306 [2021-10-21 20:18:47,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3361 states. [2021-10-21 20:18:48,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3361 to 2406. [2021-10-21 20:18:48,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.252811328613078) internal successors, (3008), 2405 states have internal predecessors, (3008), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:48,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3008 transitions. [2021-10-21 20:18:48,064 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3008 transitions. Word has length 145 [2021-10-21 20:18:48,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:48,065 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3008 transitions. [2021-10-21 20:18:48,065 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:48,065 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3008 transitions. [2021-10-21 20:18:48,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-21 20:18:48,070 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:48,071 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:48,134 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2021-10-21 20:18:48,297 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:48,298 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:48,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:48,298 INFO L82 PathProgramCache]: Analyzing trace with hash -1375736921, now seen corresponding path program 1 times [2021-10-21 20:18:48,299 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:48,299 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469982219] [2021-10-21 20:18:48,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:48,299 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:48,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:48,416 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:48,416 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:48,417 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469982219] [2021-10-21 20:18:48,417 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1469982219] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:48,417 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1422819937] [2021-10-21 20:18:48,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:48,417 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:48,418 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:48,419 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:48,425 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-21 20:18:49,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:49,074 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-21 20:18:49,077 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:49,543 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:49,543 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1422819937] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:49,543 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:18:49,543 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-21 20:18:49,543 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633087622] [2021-10-21 20:18:49,544 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-21 20:18:49,544 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:49,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-21 20:18:49,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-21 20:18:49,545 INFO L87 Difference]: Start difference. First operand 2406 states and 3008 transitions. Second operand has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:50,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:50,772 INFO L93 Difference]: Finished difference Result 8321 states and 10665 transitions. [2021-10-21 20:18:50,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-21 20:18:50,773 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-21 20:18:50,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:50,779 INFO L225 Difference]: With dead ends: 8321 [2021-10-21 20:18:50,779 INFO L226 Difference]: Without dead ends: 6110 [2021-10-21 20:18:50,782 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 82.3ms TimeCoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2021-10-21 20:18:50,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6110 states. [2021-10-21 20:18:51,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6110 to 4184. [2021-10-21 20:18:51,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2498205312275663) internal successors, (5223), 4183 states have internal predecessors, (5223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:51,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5223 transitions. [2021-10-21 20:18:51,567 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5223 transitions. Word has length 145 [2021-10-21 20:18:51,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:51,568 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5223 transitions. [2021-10-21 20:18:51,568 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:51,568 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5223 transitions. [2021-10-21 20:18:51,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-21 20:18:51,573 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:51,573 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:51,619 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:51,786 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40 [2021-10-21 20:18:51,786 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:51,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:51,786 INFO L82 PathProgramCache]: Analyzing trace with hash -415965278, now seen corresponding path program 1 times [2021-10-21 20:18:51,787 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:51,787 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631050962] [2021-10-21 20:18:51,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:51,787 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:51,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:52,045 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:52,045 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:52,045 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1631050962] [2021-10-21 20:18:52,045 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1631050962] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:52,045 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1597651925] [2021-10-21 20:18:52,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:52,045 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:52,046 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:52,047 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:52,069 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-21 20:18:52,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:52,873 INFO L263 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-21 20:18:52,875 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:53,295 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-21 20:18:53,295 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1597651925] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:18:53,295 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 20:18:53,295 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-21 20:18:53,295 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280810945] [2021-10-21 20:18:53,296 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:18:53,296 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:53,297 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:18:53,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-21 20:18:53,297 INFO L87 Difference]: Start difference. First operand 4184 states and 5223 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:54,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:54,561 INFO L93 Difference]: Finished difference Result 9281 states and 11744 transitions. [2021-10-21 20:18:54,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 20:18:54,562 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-21 20:18:54,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:54,567 INFO L225 Difference]: With dead ends: 9281 [2021-10-21 20:18:54,568 INFO L226 Difference]: Without dead ends: 5931 [2021-10-21 20:18:54,572 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 201.8ms TimeCoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2021-10-21 20:18:54,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5931 states. [2021-10-21 20:18:55,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5931 to 4184. [2021-10-21 20:18:55,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2335486958602537) internal successors, (5155), 4183 states have internal predecessors, (5155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:55,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5155 transitions. [2021-10-21 20:18:55,370 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5155 transitions. Word has length 145 [2021-10-21 20:18:55,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:18:55,370 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5155 transitions. [2021-10-21 20:18:55,370 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:55,370 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5155 transitions. [2021-10-21 20:18:55,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-21 20:18:55,373 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:18:55,374 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:18:55,402 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2021-10-21 20:18:55,574 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2021-10-21 20:18:55,574 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:18:55,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:18:55,575 INFO L82 PathProgramCache]: Analyzing trace with hash -601450378, now seen corresponding path program 1 times [2021-10-21 20:18:55,575 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:18:55,575 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [48769628] [2021-10-21 20:18:55,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:55,575 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:18:55,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:55,717 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:55,717 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:18:55,718 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [48769628] [2021-10-21 20:18:55,718 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [48769628] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:55,718 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [432176855] [2021-10-21 20:18:55,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:18:55,719 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:18:55,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:18:55,722 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:18:55,727 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-10-21 20:18:56,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:18:56,762 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-21 20:18:56,765 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:18:57,223 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:18:57,223 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [432176855] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:18:57,223 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 20:18:57,223 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 8 [2021-10-21 20:18:57,224 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985274594] [2021-10-21 20:18:57,224 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-21 20:18:57,224 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:18:57,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-21 20:18:57,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2021-10-21 20:18:57,225 INFO L87 Difference]: Start difference. First operand 4184 states and 5155 transitions. Second operand has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:18:59,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:18:59,973 INFO L93 Difference]: Finished difference Result 14982 states and 18477 transitions. [2021-10-21 20:18:59,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-10-21 20:18:59,974 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-21 20:18:59,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:18:59,987 INFO L225 Difference]: With dead ends: 14982 [2021-10-21 20:18:59,987 INFO L226 Difference]: Without dead ends: 11801 [2021-10-21 20:18:59,992 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 151.7ms TimeCoverageRelationStatistics Valid=129, Invalid=423, Unknown=0, NotChecked=0, Total=552 [2021-10-21 20:19:00,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11801 states. [2021-10-21 20:19:01,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11801 to 6811. [2021-10-21 20:19:01,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6811 states, 6806 states have (on average 1.237878342638848) internal successors, (8425), 6810 states have internal predecessors, (8425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:01,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6811 states to 6811 states and 8425 transitions. [2021-10-21 20:19:01,427 INFO L78 Accepts]: Start accepts. Automaton has 6811 states and 8425 transitions. Word has length 146 [2021-10-21 20:19:01,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:19:01,430 INFO L470 AbstractCegarLoop]: Abstraction has 6811 states and 8425 transitions. [2021-10-21 20:19:01,430 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:01,431 INFO L276 IsEmpty]: Start isEmpty. Operand 6811 states and 8425 transitions. [2021-10-21 20:19:01,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-21 20:19:01,439 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:19:01,439 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:19:01,469 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2021-10-21 20:19:01,646 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2021-10-21 20:19:01,646 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:19:01,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:19:01,646 INFO L82 PathProgramCache]: Analyzing trace with hash -1640034952, now seen corresponding path program 1 times [2021-10-21 20:19:01,646 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:19:01,646 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132278133] [2021-10-21 20:19:01,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:19:01,647 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:19:01,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:19:01,710 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-21 20:19:01,711 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:19:01,711 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132278133] [2021-10-21 20:19:01,711 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [132278133] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:19:01,711 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:19:01,712 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 20:19:01,712 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1887491895] [2021-10-21 20:19:01,712 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 20:19:01,712 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:19:01,713 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 20:19:01,713 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:19:01,713 INFO L87 Difference]: Start difference. First operand 6811 states and 8425 transitions. Second operand has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:02,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:19:02,860 INFO L93 Difference]: Finished difference Result 11214 states and 13923 transitions. [2021-10-21 20:19:02,861 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 20:19:02,861 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-21 20:19:02,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:19:02,867 INFO L225 Difference]: With dead ends: 11214 [2021-10-21 20:19:02,867 INFO L226 Difference]: Without dead ends: 4986 [2021-10-21 20:19:02,874 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.6ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 20:19:02,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4986 states. [2021-10-21 20:19:03,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4986 to 4960. [2021-10-21 20:19:03,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.239556004036327) internal successors, (6142), 4959 states have internal predecessors, (6142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:03,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6142 transitions. [2021-10-21 20:19:03,858 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6142 transitions. Word has length 146 [2021-10-21 20:19:03,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:19:03,858 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6142 transitions. [2021-10-21 20:19:03,858 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:03,858 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6142 transitions. [2021-10-21 20:19:03,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-10-21 20:19:03,862 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:19:03,862 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:19:03,862 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-10-21 20:19:03,862 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:19:03,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:19:03,863 INFO L82 PathProgramCache]: Analyzing trace with hash -1660310691, now seen corresponding path program 1 times [2021-10-21 20:19:03,863 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:19:03,863 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209488358] [2021-10-21 20:19:03,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:19:03,863 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:19:03,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:19:04,144 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 20:19:04,144 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:19:04,144 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209488358] [2021-10-21 20:19:04,144 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [209488358] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 20:19:04,145 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [335804671] [2021-10-21 20:19:04,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:19:04,145 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 20:19:04,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 20:19:04,150 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 20:19:04,165 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-10-21 20:19:05,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:19:05,241 INFO L263 TraceCheckSpWp]: Trace formula consists of 834 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-21 20:19:05,243 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 20:19:05,684 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-21 20:19:05,684 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [335804671] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:19:05,684 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 20:19:05,684 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-21 20:19:05,684 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782097040] [2021-10-21 20:19:05,685 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:19:05,685 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:19:05,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:19:05,685 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-21 20:19:05,686 INFO L87 Difference]: Start difference. First operand 4960 states and 6142 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:07,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:19:07,523 INFO L93 Difference]: Finished difference Result 12895 states and 16091 transitions. [2021-10-21 20:19:07,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 20:19:07,524 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-10-21 20:19:07,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:19:07,532 INFO L225 Difference]: With dead ends: 12895 [2021-10-21 20:19:07,532 INFO L226 Difference]: Without dead ends: 8622 [2021-10-21 20:19:07,537 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 169.4ms TimeCoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2021-10-21 20:19:07,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8622 states. [2021-10-21 20:19:08,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8622 to 4960. [2021-10-21 20:19:08,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.2391523713420787) internal successors, (6140), 4959 states have internal predecessors, (6140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:08,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6140 transitions. [2021-10-21 20:19:08,491 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6140 transitions. Word has length 149 [2021-10-21 20:19:08,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:19:08,492 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6140 transitions. [2021-10-21 20:19:08,492 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:08,492 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6140 transitions. [2021-10-21 20:19:08,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-10-21 20:19:08,497 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:19:08,497 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:19:08,536 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2021-10-21 20:19:08,713 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable44 [2021-10-21 20:19:08,714 INFO L402 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:19:08,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:19:08,714 INFO L82 PathProgramCache]: Analyzing trace with hash -2043778853, now seen corresponding path program 1 times [2021-10-21 20:19:08,714 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:19:08,714 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842487876] [2021-10-21 20:19:08,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:19:08,715 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:19:08,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 20:19:08,848 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-21 20:19:08,848 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 20:19:08,849 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842487876] [2021-10-21 20:19:08,849 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1842487876] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 20:19:08,849 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 20:19:08,849 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 20:19:08,849 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609388321] [2021-10-21 20:19:08,850 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 20:19:08,850 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 20:19:08,850 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 20:19:08,851 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 20:19:08,851 INFO L87 Difference]: Start difference. First operand 4960 states and 6140 transitions. Second operand has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:11,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 20:19:11,265 INFO L93 Difference]: Finished difference Result 12708 states and 15969 transitions. [2021-10-21 20:19:11,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 20:19:11,268 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 150 [2021-10-21 20:19:11,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 20:19:11,277 INFO L225 Difference]: With dead ends: 12708 [2021-10-21 20:19:11,278 INFO L226 Difference]: Without dead ends: 9846 [2021-10-21 20:19:11,282 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 77.4ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-21 20:19:11,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9846 states. [2021-10-21 20:19:12,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9846 to 5071. [2021-10-21 20:19:12,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5071 states, 5066 states have (on average 1.2376628503750493) internal successors, (6270), 5070 states have internal predecessors, (6270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:12,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5071 states to 5071 states and 6270 transitions. [2021-10-21 20:19:12,347 INFO L78 Accepts]: Start accepts. Automaton has 5071 states and 6270 transitions. Word has length 150 [2021-10-21 20:19:12,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 20:19:12,347 INFO L470 AbstractCegarLoop]: Abstraction has 5071 states and 6270 transitions. [2021-10-21 20:19:12,347 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 20:19:12,347 INFO L276 IsEmpty]: Start isEmpty. Operand 5071 states and 6270 transitions. [2021-10-21 20:19:12,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2021-10-21 20:19:12,351 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 20:19:12,351 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 20:19:12,351 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2021-10-21 20:19:12,351 INFO L402 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 20:19:12,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 20:19:12,352 INFO L82 PathProgramCache]: Analyzing trace with hash 1490980259, now seen corresponding path program 1 times [2021-10-21 20:19:12,352 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 20:19:12,352 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260113662] [2021-10-21 20:19:12,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 20:19:12,352 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 20:19:12,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:19:12,422 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 20:19:12,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 20:19:12,647 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 20:19:12,647 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-10-21 20:19:12,649 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,651 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,651 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,651 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,652 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,652 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,652 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,652 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,653 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,653 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,653 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,653 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,653 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,654 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,654 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,654 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,654 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,655 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,655 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,655 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,655 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,655 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,656 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 20:19:12,656 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2021-10-21 20:19:12,664 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-21 20:19:12,906 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.10 08:19:12 BoogieIcfgContainer [2021-10-21 20:19:12,907 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-21 20:19:12,908 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-21 20:19:12,908 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-21 20:19:12,908 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-21 20:19:12,909 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 08:17:43" (3/4) ... [2021-10-21 20:19:12,911 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-21 20:19:13,229 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/witness.graphml [2021-10-21 20:19:13,229 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-21 20:19:13,231 INFO L168 Benchmark]: Toolchain (without parser) took 91609.81 ms. Allocated memory was 98.6 MB in the beginning and 2.0 GB in the end (delta: 1.9 GB). Free memory was 64.9 MB in the beginning and 1.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 669.1 MB. Max. memory is 16.1 GB. [2021-10-21 20:19:13,231 INFO L168 Benchmark]: CDTParser took 0.29 ms. Allocated memory is still 98.6 MB. Free memory is still 50.8 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-21 20:19:13,232 INFO L168 Benchmark]: CACSL2BoogieTranslator took 573.62 ms. Allocated memory is still 98.6 MB. Free memory was 64.7 MB in the beginning and 67.4 MB in the end (delta: -2.7 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-21 20:19:13,232 INFO L168 Benchmark]: Boogie Procedure Inliner took 108.89 ms. Allocated memory is still 98.6 MB. Free memory was 67.4 MB in the beginning and 62.5 MB in the end (delta: 4.9 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-21 20:19:13,233 INFO L168 Benchmark]: Boogie Preprocessor took 102.70 ms. Allocated memory is still 98.6 MB. Free memory was 62.5 MB in the beginning and 58.3 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-21 20:19:13,233 INFO L168 Benchmark]: RCFGBuilder took 1509.33 ms. Allocated memory was 98.6 MB in the beginning and 123.7 MB in the end (delta: 25.2 MB). Free memory was 58.3 MB in the beginning and 73.7 MB in the end (delta: -15.3 MB). Peak memory consumption was 22.5 MB. Max. memory is 16.1 GB. [2021-10-21 20:19:13,234 INFO L168 Benchmark]: TraceAbstraction took 88980.25 ms. Allocated memory was 123.7 MB in the beginning and 2.0 GB in the end (delta: 1.9 GB). Free memory was 73.1 MB in the beginning and 1.4 GB in the end (delta: -1.3 GB). Peak memory consumption was 603.3 MB. Max. memory is 16.1 GB. [2021-10-21 20:19:13,234 INFO L168 Benchmark]: Witness Printer took 321.55 ms. Allocated memory is still 2.0 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 48.5 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. [2021-10-21 20:19:13,237 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29 ms. Allocated memory is still 98.6 MB. Free memory is still 50.8 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 573.62 ms. Allocated memory is still 98.6 MB. Free memory was 64.7 MB in the beginning and 67.4 MB in the end (delta: -2.7 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 108.89 ms. Allocated memory is still 98.6 MB. Free memory was 67.4 MB in the beginning and 62.5 MB in the end (delta: 4.9 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 102.70 ms. Allocated memory is still 98.6 MB. Free memory was 62.5 MB in the beginning and 58.3 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1509.33 ms. Allocated memory was 98.6 MB in the beginning and 123.7 MB in the end (delta: 25.2 MB). Free memory was 58.3 MB in the beginning and 73.7 MB in the end (delta: -15.3 MB). Peak memory consumption was 22.5 MB. Max. memory is 16.1 GB. * TraceAbstraction took 88980.25 ms. Allocated memory was 123.7 MB in the beginning and 2.0 GB in the end (delta: 1.9 GB). Free memory was 73.1 MB in the beginning and 1.4 GB in the end (delta: -1.3 GB). Peak memory consumption was 603.3 MB. Max. memory is 16.1 GB. * Witness Printer took 321.55 ms. Allocated memory is still 2.0 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 48.5 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] reach_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 297 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 88622.4ms, OverallIterations: 47, TraceHistogramMax: 2, EmptinessCheckTime: 179.2ms, AutomataDifference: 47447.6ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 54.9ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 22435 SDtfs, 49588 SDslu, 61678 SDs, 0 SdLazy, 11075 SolverSat, 716 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8434.0ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2737 GetRequests, 2039 SyntacticMatches, 9 SemanticMatches, 689 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31174 ImplicationChecksByTransitivity, 10935.0ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=6811occurred in iteration=43, InterpolantAutomatonStates: 664, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 14079.2ms AutomataMinimizationTime, 46 MinimizatonAttempts, 69882 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 888.1ms SsaConstructionTime, 3299.9ms SatisfiabilityAnalysisTime, 12947.3ms InterpolantComputationTime, 6454 NumberOfCodeBlocks, 6454 NumberOfCodeBlocksAsserted, 60 NumberOfCheckSat, 6244 ConstructedInterpolants, 0 QuantifiedInterpolants, 22714 SizeOfPredicates, 57 NumberOfNonLiveVariables, 10284 ConjunctsInSsa, 175 ConjunctsInUnsatCore, 59 InterpolantComputations, 38 PerfectInterpolantSequences, 919/1290 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-21 20:19:13,315 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fe1284c9-1849-42f6-a7b4-40d4a37c0333/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...