./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e943c265 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-e943c26 [2021-10-21 19:12:12,104 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-21 19:12:12,108 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-21 19:12:12,183 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-21 19:12:12,184 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-21 19:12:12,191 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-21 19:12:12,193 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-21 19:12:12,197 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-21 19:12:12,199 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-21 19:12:12,200 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-21 19:12:12,202 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-21 19:12:12,203 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-21 19:12:12,204 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-21 19:12:12,205 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-21 19:12:12,208 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-21 19:12:12,210 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-21 19:12:12,211 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-21 19:12:12,213 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-21 19:12:12,216 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-21 19:12:12,219 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-21 19:12:12,222 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-21 19:12:12,224 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-21 19:12:12,226 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-21 19:12:12,227 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-21 19:12:12,232 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-21 19:12:12,233 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-21 19:12:12,233 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-21 19:12:12,235 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-21 19:12:12,236 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-21 19:12:12,237 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-21 19:12:12,238 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-21 19:12:12,239 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-21 19:12:12,240 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-21 19:12:12,242 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-21 19:12:12,243 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-21 19:12:12,244 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-21 19:12:12,245 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-21 19:12:12,246 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-21 19:12:12,246 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-21 19:12:12,248 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-21 19:12:12,249 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-21 19:12:12,250 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-21 19:12:12,288 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-21 19:12:12,289 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-21 19:12:12,289 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-21 19:12:12,289 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-21 19:12:12,291 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-21 19:12:12,291 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-21 19:12:12,292 INFO L138 SettingsManager]: * Use SBE=true [2021-10-21 19:12:12,292 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-21 19:12:12,292 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-21 19:12:12,293 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-21 19:12:12,293 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-21 19:12:12,293 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-21 19:12:12,293 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-21 19:12:12,294 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-21 19:12:12,294 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-21 19:12:12,294 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-21 19:12:12,295 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-21 19:12:12,295 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-21 19:12:12,295 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-21 19:12:12,296 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-21 19:12:12,296 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-21 19:12:12,296 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-21 19:12:12,297 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-21 19:12:12,297 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-21 19:12:12,297 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-21 19:12:12,298 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-21 19:12:12,298 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-21 19:12:12,298 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-21 19:12:12,298 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-21 19:12:12,299 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-21 19:12:12,299 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-21 19:12:12,299 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-21 19:12:12,300 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f [2021-10-21 19:12:12,674 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-21 19:12:12,699 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-21 19:12:12,702 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-21 19:12:12,703 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-21 19:12:12,704 INFO L275 PluginConnector]: CDTParser initialized [2021-10-21 19:12:12,705 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-21 19:12:12,792 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/data/fc8398d86/8f216da7e9844717914eb696199d1e96/FLAG0195380f7 [2021-10-21 19:12:13,486 INFO L306 CDTParser]: Found 1 translation units. [2021-10-21 19:12:13,491 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-21 19:12:13,512 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/data/fc8398d86/8f216da7e9844717914eb696199d1e96/FLAG0195380f7 [2021-10-21 19:12:13,720 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/data/fc8398d86/8f216da7e9844717914eb696199d1e96 [2021-10-21 19:12:13,723 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-21 19:12:13,725 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-21 19:12:13,726 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-21 19:12:13,727 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-21 19:12:13,740 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-21 19:12:13,741 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 07:12:13" (1/1) ... [2021-10-21 19:12:13,745 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3652accd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:13, skipping insertion in model container [2021-10-21 19:12:13,746 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 07:12:13" (1/1) ... [2021-10-21 19:12:13,755 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-21 19:12:13,822 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-21 19:12:14,267 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2021-10-21 19:12:14,270 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 19:12:14,282 INFO L203 MainTranslator]: Completed pre-run [2021-10-21 19:12:14,397 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2021-10-21 19:12:14,398 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 19:12:14,418 INFO L208 MainTranslator]: Completed translation [2021-10-21 19:12:14,419 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14 WrapperNode [2021-10-21 19:12:14,419 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-21 19:12:14,420 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-21 19:12:14,421 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-21 19:12:14,421 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-21 19:12:14,432 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,463 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,561 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-21 19:12:14,562 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-21 19:12:14,562 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-21 19:12:14,562 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-21 19:12:14,572 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,572 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,580 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,581 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,614 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,641 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,662 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,670 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-21 19:12:14,671 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-21 19:12:14,672 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-21 19:12:14,672 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-21 19:12:14,682 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (1/1) ... [2021-10-21 19:12:14,692 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-21 19:12:14,706 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:12:14,730 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-21 19:12:14,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-21 19:12:14,788 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-21 19:12:14,789 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-21 19:12:14,789 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-21 19:12:14,789 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-21 19:12:16,173 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-21 19:12:16,174 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-21 19:12:16,177 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 07:12:16 BoogieIcfgContainer [2021-10-21 19:12:16,181 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-21 19:12:16,183 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-21 19:12:16,184 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-21 19:12:16,190 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-21 19:12:16,191 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.10 07:12:13" (1/3) ... [2021-10-21 19:12:16,192 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e25f589 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.10 07:12:16, skipping insertion in model container [2021-10-21 19:12:16,193 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:12:14" (2/3) ... [2021-10-21 19:12:16,194 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e25f589 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.10 07:12:16, skipping insertion in model container [2021-10-21 19:12:16,194 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 07:12:16" (3/3) ... [2021-10-21 19:12:16,196 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-21 19:12:16,211 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-21 19:12:16,211 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-21 19:12:16,270 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-21 19:12:16,278 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-21 19:12:16,278 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-21 19:12:16,312 INFO L276 IsEmpty]: Start isEmpty. Operand has 296 states, 272 states have (on average 1.7058823529411764) internal successors, (464), 295 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:16,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-21 19:12:16,326 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:16,327 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:16,328 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:16,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:16,356 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-21 19:12:16,370 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:16,370 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354415283] [2021-10-21 19:12:16,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:16,372 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:16,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:16,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:16,645 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:16,645 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354415283] [2021-10-21 19:12:16,646 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [354415283] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:16,646 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:16,647 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-21 19:12:16,650 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1432274632] [2021-10-21 19:12:16,657 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-21 19:12:16,658 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:16,681 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-21 19:12:16,682 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-21 19:12:16,687 INFO L87 Difference]: Start difference. First operand has 296 states, 272 states have (on average 1.7058823529411764) internal successors, (464), 295 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:16,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:16,771 INFO L93 Difference]: Finished difference Result 572 states and 896 transitions. [2021-10-21 19:12:16,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-21 19:12:16,777 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-21 19:12:16,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:16,794 INFO L225 Difference]: With dead ends: 572 [2021-10-21 19:12:16,794 INFO L226 Difference]: Without dead ends: 292 [2021-10-21 19:12:16,800 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-21 19:12:16,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2021-10-21 19:12:16,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 292. [2021-10-21 19:12:16,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 269 states have (on average 1.5910780669144982) internal successors, (428), 291 states have internal predecessors, (428), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:16,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 428 transitions. [2021-10-21 19:12:16,935 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 428 transitions. Word has length 33 [2021-10-21 19:12:16,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:16,936 INFO L470 AbstractCegarLoop]: Abstraction has 292 states and 428 transitions. [2021-10-21 19:12:16,936 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:16,936 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 428 transitions. [2021-10-21 19:12:16,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-21 19:12:16,942 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:16,942 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:16,943 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-21 19:12:16,943 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:16,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:16,949 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-21 19:12:16,950 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:16,950 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701068820] [2021-10-21 19:12:16,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:16,951 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:16,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:17,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:17,061 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:17,062 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701068820] [2021-10-21 19:12:17,062 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [701068820] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:17,063 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:17,063 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:17,063 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669151238] [2021-10-21 19:12:17,064 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:12:17,065 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:17,066 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:12:17,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:12:17,066 INFO L87 Difference]: Start difference. First operand 292 states and 428 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:17,185 INFO L93 Difference]: Finished difference Result 570 states and 830 transitions. [2021-10-21 19:12:17,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 19:12:17,186 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-21 19:12:17,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:17,190 INFO L225 Difference]: With dead ends: 570 [2021-10-21 19:12:17,190 INFO L226 Difference]: Without dead ends: 292 [2021-10-21 19:12:17,193 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 21.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:17,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2021-10-21 19:12:17,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 292. [2021-10-21 19:12:17,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 269 states have (on average 1.546468401486989) internal successors, (416), 291 states have internal predecessors, (416), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 416 transitions. [2021-10-21 19:12:17,215 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 416 transitions. Word has length 33 [2021-10-21 19:12:17,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:17,216 INFO L470 AbstractCegarLoop]: Abstraction has 292 states and 416 transitions. [2021-10-21 19:12:17,216 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,216 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 416 transitions. [2021-10-21 19:12:17,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-21 19:12:17,219 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:17,219 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:17,219 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-21 19:12:17,220 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:17,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:17,221 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-21 19:12:17,221 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:17,221 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608786656] [2021-10-21 19:12:17,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:17,222 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:17,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:17,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:17,449 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:17,449 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608786656] [2021-10-21 19:12:17,450 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1608786656] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:17,450 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:17,450 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:17,451 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [330230018] [2021-10-21 19:12:17,451 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:17,451 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:17,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:17,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:17,453 INFO L87 Difference]: Start difference. First operand 292 states and 416 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:17,507 INFO L93 Difference]: Finished difference Result 600 states and 864 transitions. [2021-10-21 19:12:17,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:17,507 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-21 19:12:17,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:17,516 INFO L225 Difference]: With dead ends: 600 [2021-10-21 19:12:17,519 INFO L226 Difference]: Without dead ends: 325 [2021-10-21 19:12:17,521 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.4ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:17,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2021-10-21 19:12:17,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 268. [2021-10-21 19:12:17,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 249 states have (on average 1.5261044176706828) internal successors, (380), 267 states have internal predecessors, (380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 380 transitions. [2021-10-21 19:12:17,555 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 380 transitions. Word has length 44 [2021-10-21 19:12:17,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:17,556 INFO L470 AbstractCegarLoop]: Abstraction has 268 states and 380 transitions. [2021-10-21 19:12:17,557 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,557 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 380 transitions. [2021-10-21 19:12:17,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-21 19:12:17,562 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:17,562 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:17,562 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-21 19:12:17,563 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:17,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:17,564 INFO L82 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-21 19:12:17,564 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:17,565 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173087205] [2021-10-21 19:12:17,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:17,566 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:17,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:17,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:17,741 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:17,741 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173087205] [2021-10-21 19:12:17,742 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1173087205] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:17,743 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:17,743 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:17,743 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520330082] [2021-10-21 19:12:17,744 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:17,745 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:17,745 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:17,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:17,746 INFO L87 Difference]: Start difference. First operand 268 states and 380 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:17,800 INFO L93 Difference]: Finished difference Result 747 states and 1071 transitions. [2021-10-21 19:12:17,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:17,801 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-21 19:12:17,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:17,806 INFO L225 Difference]: With dead ends: 747 [2021-10-21 19:12:17,807 INFO L226 Difference]: Without dead ends: 496 [2021-10-21 19:12:17,810 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.5ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:17,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states. [2021-10-21 19:12:17,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 303. [2021-10-21 19:12:17,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 303 states, 284 states have (on average 1.5211267605633803) internal successors, (432), 302 states have internal predecessors, (432), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 432 transitions. [2021-10-21 19:12:17,871 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 432 transitions. Word has length 53 [2021-10-21 19:12:17,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:17,874 INFO L470 AbstractCegarLoop]: Abstraction has 303 states and 432 transitions. [2021-10-21 19:12:17,874 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:17,874 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 432 transitions. [2021-10-21 19:12:17,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-21 19:12:17,882 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:17,882 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:17,882 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-21 19:12:17,883 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:17,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:17,885 INFO L82 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-21 19:12:17,887 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:17,887 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [595959436] [2021-10-21 19:12:17,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:17,889 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:17,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:18,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:18,030 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:18,031 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [595959436] [2021-10-21 19:12:18,031 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [595959436] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:18,031 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:18,032 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:18,032 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464399865] [2021-10-21 19:12:18,033 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:18,033 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:18,034 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:18,034 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:18,035 INFO L87 Difference]: Start difference. First operand 303 states and 432 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:18,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:18,096 INFO L93 Difference]: Finished difference Result 831 states and 1196 transitions. [2021-10-21 19:12:18,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:18,097 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-21 19:12:18,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:18,103 INFO L225 Difference]: With dead ends: 831 [2021-10-21 19:12:18,104 INFO L226 Difference]: Without dead ends: 545 [2021-10-21 19:12:18,105 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:18,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2021-10-21 19:12:18,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 328. [2021-10-21 19:12:18,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 328 states, 309 states have (on average 1.5210355987055015) internal successors, (470), 327 states have internal predecessors, (470), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:18,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 470 transitions. [2021-10-21 19:12:18,127 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 470 transitions. Word has length 54 [2021-10-21 19:12:18,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:18,129 INFO L470 AbstractCegarLoop]: Abstraction has 328 states and 470 transitions. [2021-10-21 19:12:18,130 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:18,130 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 470 transitions. [2021-10-21 19:12:18,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-21 19:12:18,134 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:18,135 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:18,135 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-21 19:12:18,136 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:18,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:18,137 INFO L82 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-21 19:12:18,137 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:18,138 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056582863] [2021-10-21 19:12:18,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:18,138 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:18,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:18,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:18,309 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:18,310 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056582863] [2021-10-21 19:12:18,310 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1056582863] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:18,310 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:18,311 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:18,312 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [273544013] [2021-10-21 19:12:18,315 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 19:12:18,319 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:18,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 19:12:18,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:18,320 INFO L87 Difference]: Start difference. First operand 328 states and 470 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:18,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:18,622 INFO L93 Difference]: Finished difference Result 1020 states and 1473 transitions. [2021-10-21 19:12:18,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 19:12:18,623 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-21 19:12:18,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:18,639 INFO L225 Difference]: With dead ends: 1020 [2021-10-21 19:12:18,640 INFO L226 Difference]: Without dead ends: 709 [2021-10-21 19:12:18,641 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 31.6ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-21 19:12:18,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 709 states. [2021-10-21 19:12:18,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 709 to 426. [2021-10-21 19:12:18,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 426 states, 407 states have (on average 1.4914004914004915) internal successors, (607), 425 states have internal predecessors, (607), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:18,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 607 transitions. [2021-10-21 19:12:18,679 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 607 transitions. Word has length 54 [2021-10-21 19:12:18,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:18,680 INFO L470 AbstractCegarLoop]: Abstraction has 426 states and 607 transitions. [2021-10-21 19:12:18,680 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:18,680 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 607 transitions. [2021-10-21 19:12:18,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-21 19:12:18,682 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:18,682 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:18,682 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-21 19:12:18,683 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:18,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:18,684 INFO L82 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-21 19:12:18,684 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:18,690 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759256852] [2021-10-21 19:12:18,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:18,690 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:18,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:18,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:18,808 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:18,808 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1759256852] [2021-10-21 19:12:18,808 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1759256852] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:18,809 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:18,809 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:18,809 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1232277405] [2021-10-21 19:12:18,810 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 19:12:18,810 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:18,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 19:12:18,811 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:18,812 INFO L87 Difference]: Start difference. First operand 426 states and 607 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:19,094 INFO L93 Difference]: Finished difference Result 1024 states and 1473 transitions. [2021-10-21 19:12:19,094 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 19:12:19,095 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-21 19:12:19,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:19,100 INFO L225 Difference]: With dead ends: 1024 [2021-10-21 19:12:19,101 INFO L226 Difference]: Without dead ends: 713 [2021-10-21 19:12:19,102 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 42.3ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-21 19:12:19,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2021-10-21 19:12:19,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 434. [2021-10-21 19:12:19,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 415 states have (on average 1.4819277108433735) internal successors, (615), 433 states have internal predecessors, (615), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 615 transitions. [2021-10-21 19:12:19,136 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 615 transitions. Word has length 55 [2021-10-21 19:12:19,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:19,137 INFO L470 AbstractCegarLoop]: Abstraction has 434 states and 615 transitions. [2021-10-21 19:12:19,138 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,138 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 615 transitions. [2021-10-21 19:12:19,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-21 19:12:19,139 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:19,139 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:19,139 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-21 19:12:19,140 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:19,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:19,141 INFO L82 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-21 19:12:19,141 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:19,141 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198393891] [2021-10-21 19:12:19,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:19,143 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:19,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:19,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:19,274 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:19,274 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198393891] [2021-10-21 19:12:19,274 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [198393891] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:19,275 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:19,275 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:19,275 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [15829096] [2021-10-21 19:12:19,276 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:12:19,276 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:19,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:12:19,281 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:12:19,281 INFO L87 Difference]: Start difference. First operand 434 states and 615 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:19,560 INFO L93 Difference]: Finished difference Result 1024 states and 1465 transitions. [2021-10-21 19:12:19,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:12:19,561 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-21 19:12:19,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:19,568 INFO L225 Difference]: With dead ends: 1024 [2021-10-21 19:12:19,568 INFO L226 Difference]: Without dead ends: 713 [2021-10-21 19:12:19,570 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 20.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:19,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2021-10-21 19:12:19,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 434. [2021-10-21 19:12:19,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 415 states have (on average 1.472289156626506) internal successors, (611), 433 states have internal predecessors, (611), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 611 transitions. [2021-10-21 19:12:19,609 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 611 transitions. Word has length 57 [2021-10-21 19:12:19,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:19,611 INFO L470 AbstractCegarLoop]: Abstraction has 434 states and 611 transitions. [2021-10-21 19:12:19,611 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,612 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 611 transitions. [2021-10-21 19:12:19,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-21 19:12:19,612 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:19,613 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:19,613 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-21 19:12:19,613 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:19,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:19,614 INFO L82 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-21 19:12:19,614 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:19,614 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [67577438] [2021-10-21 19:12:19,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:19,615 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:19,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:19,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:19,764 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:19,765 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [67577438] [2021-10-21 19:12:19,765 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [67577438] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:19,765 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:19,765 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:19,766 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430466372] [2021-10-21 19:12:19,766 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:19,766 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:19,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:19,773 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:19,774 INFO L87 Difference]: Start difference. First operand 434 states and 611 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:19,838 INFO L93 Difference]: Finished difference Result 872 states and 1252 transitions. [2021-10-21 19:12:19,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:19,839 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-21 19:12:19,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:19,844 INFO L225 Difference]: With dead ends: 872 [2021-10-21 19:12:19,844 INFO L226 Difference]: Without dead ends: 561 [2021-10-21 19:12:19,845 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:19,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2021-10-21 19:12:19,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 429. [2021-10-21 19:12:19,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 429 states, 411 states have (on average 1.467153284671533) internal successors, (603), 428 states have internal predecessors, (603), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 603 transitions. [2021-10-21 19:12:19,876 INFO L78 Accepts]: Start accepts. Automaton has 429 states and 603 transitions. Word has length 58 [2021-10-21 19:12:19,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:19,877 INFO L470 AbstractCegarLoop]: Abstraction has 429 states and 603 transitions. [2021-10-21 19:12:19,877 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:19,877 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 603 transitions. [2021-10-21 19:12:19,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-21 19:12:19,878 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:19,878 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:19,879 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-21 19:12:19,879 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:19,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:19,879 INFO L82 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-21 19:12:19,880 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:19,881 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950017866] [2021-10-21 19:12:19,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:19,882 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:19,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:19,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:19,993 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:19,993 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [950017866] [2021-10-21 19:12:19,993 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [950017866] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:19,994 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:19,994 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:19,994 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572546134] [2021-10-21 19:12:19,994 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:19,995 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:19,995 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:19,996 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:19,996 INFO L87 Difference]: Start difference. First operand 429 states and 603 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:20,082 INFO L93 Difference]: Finished difference Result 871 states and 1251 transitions. [2021-10-21 19:12:20,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:20,083 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-21 19:12:20,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:20,087 INFO L225 Difference]: With dead ends: 871 [2021-10-21 19:12:20,088 INFO L226 Difference]: Without dead ends: 565 [2021-10-21 19:12:20,088 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:20,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 565 states. [2021-10-21 19:12:20,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 565 to 409. [2021-10-21 19:12:20,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 395 states have (on average 1.4455696202531645) internal successors, (571), 408 states have internal predecessors, (571), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 571 transitions. [2021-10-21 19:12:20,123 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 571 transitions. Word has length 62 [2021-10-21 19:12:20,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:20,123 INFO L470 AbstractCegarLoop]: Abstraction has 409 states and 571 transitions. [2021-10-21 19:12:20,149 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,150 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 571 transitions. [2021-10-21 19:12:20,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-21 19:12:20,150 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:20,151 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:20,151 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-21 19:12:20,152 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:20,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:20,152 INFO L82 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-21 19:12:20,152 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:20,155 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251276551] [2021-10-21 19:12:20,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:20,155 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:20,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:20,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:20,242 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:20,242 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251276551] [2021-10-21 19:12:20,243 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [251276551] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:20,243 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:20,243 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:20,243 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1598351984] [2021-10-21 19:12:20,244 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:20,244 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:20,254 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:20,254 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:20,254 INFO L87 Difference]: Start difference. First operand 409 states and 571 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:20,325 INFO L93 Difference]: Finished difference Result 839 states and 1195 transitions. [2021-10-21 19:12:20,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:20,326 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-21 19:12:20,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:20,331 INFO L225 Difference]: With dead ends: 839 [2021-10-21 19:12:20,331 INFO L226 Difference]: Without dead ends: 553 [2021-10-21 19:12:20,332 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:20,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2021-10-21 19:12:20,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 397. [2021-10-21 19:12:20,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 397 states, 385 states have (on average 1.4363636363636363) internal successors, (553), 396 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 397 states to 397 states and 553 transitions. [2021-10-21 19:12:20,365 INFO L78 Accepts]: Start accepts. Automaton has 397 states and 553 transitions. Word has length 66 [2021-10-21 19:12:20,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:20,366 INFO L470 AbstractCegarLoop]: Abstraction has 397 states and 553 transitions. [2021-10-21 19:12:20,366 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,366 INFO L276 IsEmpty]: Start isEmpty. Operand 397 states and 553 transitions. [2021-10-21 19:12:20,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-21 19:12:20,374 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:20,374 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:20,374 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-21 19:12:20,374 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:20,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:20,375 INFO L82 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-21 19:12:20,375 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:20,375 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1829671152] [2021-10-21 19:12:20,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:20,376 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:20,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:20,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:20,478 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:20,479 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1829671152] [2021-10-21 19:12:20,479 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1829671152] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:20,479 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:20,479 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:20,479 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936887161] [2021-10-21 19:12:20,480 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:20,480 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:20,481 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:20,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:20,481 INFO L87 Difference]: Start difference. First operand 397 states and 553 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:20,576 INFO L93 Difference]: Finished difference Result 835 states and 1187 transitions. [2021-10-21 19:12:20,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:20,577 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-21 19:12:20,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:20,581 INFO L225 Difference]: With dead ends: 835 [2021-10-21 19:12:20,582 INFO L226 Difference]: Without dead ends: 561 [2021-10-21 19:12:20,583 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:20,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2021-10-21 19:12:20,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 377. [2021-10-21 19:12:20,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 377 states, 369 states have (on average 1.4119241192411924) internal successors, (521), 376 states have internal predecessors, (521), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 521 transitions. [2021-10-21 19:12:20,616 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 521 transitions. Word has length 67 [2021-10-21 19:12:20,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:20,616 INFO L470 AbstractCegarLoop]: Abstraction has 377 states and 521 transitions. [2021-10-21 19:12:20,617 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:20,617 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 521 transitions. [2021-10-21 19:12:20,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-21 19:12:20,618 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:20,618 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:20,619 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-21 19:12:20,619 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:20,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:20,620 INFO L82 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-21 19:12:20,620 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:20,620 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450381950] [2021-10-21 19:12:20,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:20,620 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:20,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:20,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:20,881 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:20,881 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450381950] [2021-10-21 19:12:20,881 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1450381950] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:20,882 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:20,882 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:12:20,882 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [547861700] [2021-10-21 19:12:20,883 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:12:20,883 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:20,884 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:12:20,884 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:12:20,884 INFO L87 Difference]: Start difference. First operand 377 states and 521 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:21,141 INFO L93 Difference]: Finished difference Result 1127 states and 1582 transitions. [2021-10-21 19:12:21,141 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 19:12:21,142 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-21 19:12:21,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:21,148 INFO L225 Difference]: With dead ends: 1127 [2021-10-21 19:12:21,149 INFO L226 Difference]: Without dead ends: 873 [2021-10-21 19:12:21,150 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 68.5ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-21 19:12:21,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2021-10-21 19:12:21,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 427. [2021-10-21 19:12:21,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 419 states have (on average 1.405727923627685) internal successors, (589), 426 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 589 transitions. [2021-10-21 19:12:21,197 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 589 transitions. Word has length 72 [2021-10-21 19:12:21,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:21,197 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 589 transitions. [2021-10-21 19:12:21,198 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,198 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 589 transitions. [2021-10-21 19:12:21,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-21 19:12:21,199 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:21,200 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:21,200 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-21 19:12:21,200 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:21,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:21,201 INFO L82 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-21 19:12:21,201 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:21,201 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220932069] [2021-10-21 19:12:21,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:21,201 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:21,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:21,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:21,290 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:21,291 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220932069] [2021-10-21 19:12:21,291 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220932069] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:21,291 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:21,291 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:21,291 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6455554] [2021-10-21 19:12:21,292 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:21,292 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:21,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:21,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:21,293 INFO L87 Difference]: Start difference. First operand 427 states and 589 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:21,370 INFO L93 Difference]: Finished difference Result 760 states and 1066 transitions. [2021-10-21 19:12:21,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:21,371 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-21 19:12:21,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:21,375 INFO L225 Difference]: With dead ends: 760 [2021-10-21 19:12:21,376 INFO L226 Difference]: Without dead ends: 506 [2021-10-21 19:12:21,377 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:21,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states. [2021-10-21 19:12:21,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 423. [2021-10-21 19:12:21,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 416 states have (on average 1.3990384615384615) internal successors, (582), 422 states have internal predecessors, (582), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 582 transitions. [2021-10-21 19:12:21,418 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 582 transitions. Word has length 73 [2021-10-21 19:12:21,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:21,418 INFO L470 AbstractCegarLoop]: Abstraction has 423 states and 582 transitions. [2021-10-21 19:12:21,419 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,419 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 582 transitions. [2021-10-21 19:12:21,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-21 19:12:21,420 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:21,420 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:21,420 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-21 19:12:21,421 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:21,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:21,421 INFO L82 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-21 19:12:21,421 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:21,422 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430222705] [2021-10-21 19:12:21,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:21,422 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:21,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:21,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:21,516 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:21,516 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430222705] [2021-10-21 19:12:21,517 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1430222705] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:21,517 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:21,517 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:21,517 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437954650] [2021-10-21 19:12:21,518 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:21,518 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:21,519 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:21,519 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:21,519 INFO L87 Difference]: Start difference. First operand 423 states and 582 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:21,622 INFO L93 Difference]: Finished difference Result 859 states and 1203 transitions. [2021-10-21 19:12:21,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:21,623 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-21 19:12:21,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:21,628 INFO L225 Difference]: With dead ends: 859 [2021-10-21 19:12:21,628 INFO L226 Difference]: Without dead ends: 592 [2021-10-21 19:12:21,629 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:21,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2021-10-21 19:12:21,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 407. [2021-10-21 19:12:21,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 407 states, 402 states have (on average 1.3830845771144278) internal successors, (556), 406 states have internal predecessors, (556), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 556 transitions. [2021-10-21 19:12:21,680 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 556 transitions. Word has length 73 [2021-10-21 19:12:21,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:21,680 INFO L470 AbstractCegarLoop]: Abstraction has 407 states and 556 transitions. [2021-10-21 19:12:21,680 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:21,681 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 556 transitions. [2021-10-21 19:12:21,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-21 19:12:21,682 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:21,682 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:21,682 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-21 19:12:21,683 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:21,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:21,683 INFO L82 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-21 19:12:21,683 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:21,684 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088138604] [2021-10-21 19:12:21,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:21,684 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:21,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:21,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:21,811 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:21,811 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088138604] [2021-10-21 19:12:21,811 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2088138604] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:21,811 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:21,811 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-21 19:12:21,812 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [188868961] [2021-10-21 19:12:21,812 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-21 19:12:21,812 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:21,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-21 19:12:21,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-21 19:12:21,813 INFO L87 Difference]: Start difference. First operand 407 states and 556 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:22,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:22,252 INFO L93 Difference]: Finished difference Result 1397 states and 1937 transitions. [2021-10-21 19:12:22,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 19:12:22,253 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-21 19:12:22,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:22,261 INFO L225 Difference]: With dead ends: 1397 [2021-10-21 19:12:22,262 INFO L226 Difference]: Without dead ends: 1141 [2021-10-21 19:12:22,263 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 99.5ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-21 19:12:22,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states. [2021-10-21 19:12:22,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 435. [2021-10-21 19:12:22,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 430 states have (on average 1.3674418604651162) internal successors, (588), 434 states have internal predecessors, (588), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:22,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 588 transitions. [2021-10-21 19:12:22,319 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 588 transitions. Word has length 76 [2021-10-21 19:12:22,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:22,320 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 588 transitions. [2021-10-21 19:12:22,320 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:22,320 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 588 transitions. [2021-10-21 19:12:22,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-21 19:12:22,321 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:22,322 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:22,322 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-21 19:12:22,322 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:22,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:22,323 INFO L82 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-21 19:12:22,323 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:22,323 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227904334] [2021-10-21 19:12:22,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:22,323 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:22,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:22,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:22,385 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:22,385 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227904334] [2021-10-21 19:12:22,385 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [227904334] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:22,386 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:22,386 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:22,386 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84253725] [2021-10-21 19:12:22,386 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:12:22,387 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:22,387 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:12:22,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:12:22,388 INFO L87 Difference]: Start difference. First operand 435 states and 588 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:22,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:22,562 INFO L93 Difference]: Finished difference Result 1111 states and 1515 transitions. [2021-10-21 19:12:22,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:12:22,563 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-21 19:12:22,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:22,569 INFO L225 Difference]: With dead ends: 1111 [2021-10-21 19:12:22,569 INFO L226 Difference]: Without dead ends: 849 [2021-10-21 19:12:22,571 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.7ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:22,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 849 states. [2021-10-21 19:12:22,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 849 to 656. [2021-10-21 19:12:22,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 656 states, 651 states have (on average 1.348694316436252) internal successors, (878), 655 states have internal predecessors, (878), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:22,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 656 states to 656 states and 878 transitions. [2021-10-21 19:12:22,643 INFO L78 Accepts]: Start accepts. Automaton has 656 states and 878 transitions. Word has length 76 [2021-10-21 19:12:22,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:22,643 INFO L470 AbstractCegarLoop]: Abstraction has 656 states and 878 transitions. [2021-10-21 19:12:22,644 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:22,644 INFO L276 IsEmpty]: Start isEmpty. Operand 656 states and 878 transitions. [2021-10-21 19:12:22,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-21 19:12:22,645 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:22,646 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:22,646 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-21 19:12:22,647 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:22,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:22,648 INFO L82 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-21 19:12:22,648 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:22,648 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795779436] [2021-10-21 19:12:22,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:22,649 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:22,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:22,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:22,744 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:22,745 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795779436] [2021-10-21 19:12:22,745 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1795779436] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:22,745 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:22,745 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:12:22,746 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1006334758] [2021-10-21 19:12:22,748 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:12:22,748 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:22,748 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:12:22,749 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:12:22,749 INFO L87 Difference]: Start difference. First operand 656 states and 878 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:22,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:22,989 INFO L93 Difference]: Finished difference Result 1019 states and 1388 transitions. [2021-10-21 19:12:22,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-21 19:12:22,990 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-21 19:12:22,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:22,997 INFO L225 Difference]: With dead ends: 1019 [2021-10-21 19:12:22,997 INFO L226 Difference]: Without dead ends: 1017 [2021-10-21 19:12:22,998 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 45.5ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-21 19:12:23,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1017 states. [2021-10-21 19:12:23,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1017 to 658. [2021-10-21 19:12:23,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 658 states, 653 states have (on average 1.3476263399693722) internal successors, (880), 657 states have internal predecessors, (880), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:23,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 658 states to 658 states and 880 transitions. [2021-10-21 19:12:23,077 INFO L78 Accepts]: Start accepts. Automaton has 658 states and 880 transitions. Word has length 77 [2021-10-21 19:12:23,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:23,078 INFO L470 AbstractCegarLoop]: Abstraction has 658 states and 880 transitions. [2021-10-21 19:12:23,078 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:23,078 INFO L276 IsEmpty]: Start isEmpty. Operand 658 states and 880 transitions. [2021-10-21 19:12:23,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-21 19:12:23,080 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:23,080 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:23,081 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-21 19:12:23,081 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:23,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:23,082 INFO L82 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-21 19:12:23,082 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:23,082 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [986461903] [2021-10-21 19:12:23,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:23,082 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:23,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:23,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:23,205 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:23,205 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [986461903] [2021-10-21 19:12:23,206 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [986461903] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:23,206 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:23,206 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:12:23,206 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375311872] [2021-10-21 19:12:23,207 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:12:23,207 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:23,208 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:12:23,208 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:12:23,208 INFO L87 Difference]: Start difference. First operand 658 states and 880 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:23,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:23,624 INFO L93 Difference]: Finished difference Result 1981 states and 2732 transitions. [2021-10-21 19:12:23,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 19:12:23,625 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-21 19:12:23,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:23,637 INFO L225 Difference]: With dead ends: 1981 [2021-10-21 19:12:23,637 INFO L226 Difference]: Without dead ends: 1602 [2021-10-21 19:12:23,639 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 63.9ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-21 19:12:23,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1602 states. [2021-10-21 19:12:23,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1602 to 646. [2021-10-21 19:12:23,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 646 states, 641 states have (on average 1.3510140405616224) internal successors, (866), 645 states have internal predecessors, (866), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:23,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 646 states to 646 states and 866 transitions. [2021-10-21 19:12:23,729 INFO L78 Accepts]: Start accepts. Automaton has 646 states and 866 transitions. Word has length 77 [2021-10-21 19:12:23,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:23,729 INFO L470 AbstractCegarLoop]: Abstraction has 646 states and 866 transitions. [2021-10-21 19:12:23,730 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:23,730 INFO L276 IsEmpty]: Start isEmpty. Operand 646 states and 866 transitions. [2021-10-21 19:12:23,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-21 19:12:23,731 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:23,732 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:23,732 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-21 19:12:23,732 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:23,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:23,733 INFO L82 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-21 19:12:23,733 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:23,733 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332775231] [2021-10-21 19:12:23,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:23,734 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:23,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:23,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:23,815 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:23,815 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332775231] [2021-10-21 19:12:23,816 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [332775231] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:23,816 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:23,816 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:12:23,816 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143406363] [2021-10-21 19:12:23,817 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:12:23,817 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:23,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:12:23,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:12:23,818 INFO L87 Difference]: Start difference. First operand 646 states and 866 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:24,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:24,125 INFO L93 Difference]: Finished difference Result 1537 states and 2160 transitions. [2021-10-21 19:12:24,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 19:12:24,126 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-21 19:12:24,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:24,134 INFO L225 Difference]: With dead ends: 1537 [2021-10-21 19:12:24,135 INFO L226 Difference]: Without dead ends: 1158 [2021-10-21 19:12:24,136 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 42.1ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-21 19:12:24,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1158 states. [2021-10-21 19:12:24,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1158 to 652. [2021-10-21 19:12:24,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 652 states, 647 states have (on average 1.3477588871715611) internal successors, (872), 651 states have internal predecessors, (872), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:24,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 872 transitions. [2021-10-21 19:12:24,226 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 872 transitions. Word has length 78 [2021-10-21 19:12:24,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:24,227 INFO L470 AbstractCegarLoop]: Abstraction has 652 states and 872 transitions. [2021-10-21 19:12:24,227 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:24,227 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 872 transitions. [2021-10-21 19:12:24,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-21 19:12:24,229 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:24,229 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:24,229 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-21 19:12:24,230 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:24,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:24,230 INFO L82 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-21 19:12:24,231 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:24,231 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193632978] [2021-10-21 19:12:24,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:24,231 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:24,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:24,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:24,295 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:24,295 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193632978] [2021-10-21 19:12:24,296 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [193632978] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:24,296 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:24,296 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:24,296 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136210653] [2021-10-21 19:12:24,297 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:12:24,297 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:24,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:12:24,298 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:12:24,298 INFO L87 Difference]: Start difference. First operand 652 states and 872 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:24,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:24,524 INFO L93 Difference]: Finished difference Result 1507 states and 2024 transitions. [2021-10-21 19:12:24,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:12:24,525 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-21 19:12:24,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:24,533 INFO L225 Difference]: With dead ends: 1507 [2021-10-21 19:12:24,533 INFO L226 Difference]: Without dead ends: 1104 [2021-10-21 19:12:24,534 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 10.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:24,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1104 states. [2021-10-21 19:12:24,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1104 to 850. [2021-10-21 19:12:24,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 850 states, 845 states have (on average 1.3396449704142013) internal successors, (1132), 849 states have internal predecessors, (1132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:24,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 850 states to 850 states and 1132 transitions. [2021-10-21 19:12:24,670 INFO L78 Accepts]: Start accepts. Automaton has 850 states and 1132 transitions. Word has length 78 [2021-10-21 19:12:24,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:24,671 INFO L470 AbstractCegarLoop]: Abstraction has 850 states and 1132 transitions. [2021-10-21 19:12:24,671 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:24,672 INFO L276 IsEmpty]: Start isEmpty. Operand 850 states and 1132 transitions. [2021-10-21 19:12:24,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-21 19:12:24,673 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:24,674 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:24,674 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-21 19:12:24,674 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:24,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:24,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-21 19:12:24,675 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:24,675 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397738631] [2021-10-21 19:12:24,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:24,676 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:24,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:24,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:24,790 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:24,790 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397738631] [2021-10-21 19:12:24,791 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [397738631] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:24,791 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:24,791 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:12:24,791 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258976802] [2021-10-21 19:12:24,792 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:12:24,792 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:24,793 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:12:24,793 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:12:24,793 INFO L87 Difference]: Start difference. First operand 850 states and 1132 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:25,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:25,464 INFO L93 Difference]: Finished difference Result 3240 states and 4364 transitions. [2021-10-21 19:12:25,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 19:12:25,465 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-21 19:12:25,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:25,483 INFO L225 Difference]: With dead ends: 3240 [2021-10-21 19:12:25,483 INFO L226 Difference]: Without dead ends: 2706 [2021-10-21 19:12:25,485 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 95.7ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-21 19:12:25,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2706 states. [2021-10-21 19:12:25,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2706 to 900. [2021-10-21 19:12:25,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 900 states, 895 states have (on average 1.336312849162011) internal successors, (1196), 899 states have internal predecessors, (1196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:25,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 900 states to 900 states and 1196 transitions. [2021-10-21 19:12:25,632 INFO L78 Accepts]: Start accepts. Automaton has 900 states and 1196 transitions. Word has length 78 [2021-10-21 19:12:25,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:25,633 INFO L470 AbstractCegarLoop]: Abstraction has 900 states and 1196 transitions. [2021-10-21 19:12:25,633 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:25,633 INFO L276 IsEmpty]: Start isEmpty. Operand 900 states and 1196 transitions. [2021-10-21 19:12:25,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-21 19:12:25,635 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:25,635 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:25,635 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-21 19:12:25,636 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:25,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:25,636 INFO L82 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-21 19:12:25,637 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:25,637 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448723870] [2021-10-21 19:12:25,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:25,637 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:25,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:25,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:25,716 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:25,716 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448723870] [2021-10-21 19:12:25,717 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448723870] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:25,717 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:25,717 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:25,717 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [237009489] [2021-10-21 19:12:25,718 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:12:25,718 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:25,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:12:25,719 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:12:25,719 INFO L87 Difference]: Start difference. First operand 900 states and 1196 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:26,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:26,025 INFO L93 Difference]: Finished difference Result 2315 states and 3085 transitions. [2021-10-21 19:12:26,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:12:26,026 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-21 19:12:26,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:26,038 INFO L225 Difference]: With dead ends: 2315 [2021-10-21 19:12:26,038 INFO L226 Difference]: Without dead ends: 1728 [2021-10-21 19:12:26,040 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:26,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1728 states. [2021-10-21 19:12:26,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1728 to 1255. [2021-10-21 19:12:26,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1255 states, 1250 states have (on average 1.3248) internal successors, (1656), 1254 states have internal predecessors, (1656), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:26,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1255 states to 1255 states and 1656 transitions. [2021-10-21 19:12:26,247 INFO L78 Accepts]: Start accepts. Automaton has 1255 states and 1656 transitions. Word has length 79 [2021-10-21 19:12:26,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:26,248 INFO L470 AbstractCegarLoop]: Abstraction has 1255 states and 1656 transitions. [2021-10-21 19:12:26,248 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:26,248 INFO L276 IsEmpty]: Start isEmpty. Operand 1255 states and 1656 transitions. [2021-10-21 19:12:26,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-21 19:12:26,250 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:26,251 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:26,251 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-21 19:12:26,251 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:26,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:26,252 INFO L82 PathProgramCache]: Analyzing trace with hash -676572605, now seen corresponding path program 1 times [2021-10-21 19:12:26,252 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:26,253 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315150576] [2021-10-21 19:12:26,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:26,253 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:26,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:26,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:26,320 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:26,320 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315150576] [2021-10-21 19:12:26,321 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [315150576] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:26,321 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:26,321 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:26,321 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1257355789] [2021-10-21 19:12:26,322 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:26,322 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:26,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:26,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:26,324 INFO L87 Difference]: Start difference. First operand 1255 states and 1656 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:26,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:26,722 INFO L93 Difference]: Finished difference Result 3061 states and 4041 transitions. [2021-10-21 19:12:26,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:26,722 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-21 19:12:26,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:26,736 INFO L225 Difference]: With dead ends: 3061 [2021-10-21 19:12:26,737 INFO L226 Difference]: Without dead ends: 2076 [2021-10-21 19:12:26,739 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:26,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2076 states. [2021-10-21 19:12:26,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2076 to 1257. [2021-10-21 19:12:26,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1257 states, 1252 states have (on average 1.3242811501597445) internal successors, (1658), 1256 states have internal predecessors, (1658), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:26,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1257 states to 1257 states and 1658 transitions. [2021-10-21 19:12:26,970 INFO L78 Accepts]: Start accepts. Automaton has 1257 states and 1658 transitions. Word has length 80 [2021-10-21 19:12:26,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:26,971 INFO L470 AbstractCegarLoop]: Abstraction has 1257 states and 1658 transitions. [2021-10-21 19:12:26,971 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:26,971 INFO L276 IsEmpty]: Start isEmpty. Operand 1257 states and 1658 transitions. [2021-10-21 19:12:26,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-21 19:12:26,973 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:26,973 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:26,974 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-21 19:12:26,974 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:26,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:26,975 INFO L82 PathProgramCache]: Analyzing trace with hash -659983772, now seen corresponding path program 1 times [2021-10-21 19:12:26,975 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:26,975 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976877509] [2021-10-21 19:12:26,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:26,976 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:27,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:27,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:27,049 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:27,049 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976877509] [2021-10-21 19:12:27,049 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1976877509] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:27,049 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:27,049 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:27,050 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [64969211] [2021-10-21 19:12:27,050 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:12:27,050 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:27,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:12:27,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:12:27,052 INFO L87 Difference]: Start difference. First operand 1257 states and 1658 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:27,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:27,311 INFO L93 Difference]: Finished difference Result 2597 states and 3427 transitions. [2021-10-21 19:12:27,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:12:27,311 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2021-10-21 19:12:27,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:27,320 INFO L225 Difference]: With dead ends: 2597 [2021-10-21 19:12:27,320 INFO L226 Difference]: Without dead ends: 1416 [2021-10-21 19:12:27,322 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 20.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:27,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1416 states. [2021-10-21 19:12:27,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1416 to 1054. [2021-10-21 19:12:27,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1054 states, 1049 states have (on average 1.321258341277407) internal successors, (1386), 1053 states have internal predecessors, (1386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:27,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1054 states to 1054 states and 1386 transitions. [2021-10-21 19:12:27,478 INFO L78 Accepts]: Start accepts. Automaton has 1054 states and 1386 transitions. Word has length 81 [2021-10-21 19:12:27,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:27,478 INFO L470 AbstractCegarLoop]: Abstraction has 1054 states and 1386 transitions. [2021-10-21 19:12:27,479 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:27,479 INFO L276 IsEmpty]: Start isEmpty. Operand 1054 states and 1386 transitions. [2021-10-21 19:12:27,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-21 19:12:27,481 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:27,481 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:27,481 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-21 19:12:27,482 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:27,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:27,482 INFO L82 PathProgramCache]: Analyzing trace with hash -63459148, now seen corresponding path program 1 times [2021-10-21 19:12:27,482 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:27,483 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347143176] [2021-10-21 19:12:27,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:27,483 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:27,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:27,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:27,527 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:27,527 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347143176] [2021-10-21 19:12:27,527 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1347143176] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:27,527 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:27,528 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:12:27,528 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879736456] [2021-10-21 19:12:27,528 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:12:27,528 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:27,529 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:12:27,529 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:27,529 INFO L87 Difference]: Start difference. First operand 1054 states and 1386 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:27,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:27,880 INFO L93 Difference]: Finished difference Result 2488 states and 3290 transitions. [2021-10-21 19:12:27,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:12:27,881 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-21 19:12:27,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:27,892 INFO L225 Difference]: With dead ends: 2488 [2021-10-21 19:12:27,892 INFO L226 Difference]: Without dead ends: 1583 [2021-10-21 19:12:27,894 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:12:27,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2021-10-21 19:12:28,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1060. [2021-10-21 19:12:28,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1060 states, 1055 states have (on average 1.3194312796208532) internal successors, (1392), 1059 states have internal predecessors, (1392), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:28,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1060 states to 1060 states and 1392 transitions. [2021-10-21 19:12:28,067 INFO L78 Accepts]: Start accepts. Automaton has 1060 states and 1392 transitions. Word has length 82 [2021-10-21 19:12:28,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:28,068 INFO L470 AbstractCegarLoop]: Abstraction has 1060 states and 1392 transitions. [2021-10-21 19:12:28,068 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:28,068 INFO L276 IsEmpty]: Start isEmpty. Operand 1060 states and 1392 transitions. [2021-10-21 19:12:28,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-21 19:12:28,069 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:28,070 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:28,070 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-21 19:12:28,070 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:28,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:28,071 INFO L82 PathProgramCache]: Analyzing trace with hash -753963456, now seen corresponding path program 1 times [2021-10-21 19:12:28,071 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:28,071 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611836676] [2021-10-21 19:12:28,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:28,072 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:28,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:28,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:28,147 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:28,147 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611836676] [2021-10-21 19:12:28,147 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [611836676] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:28,148 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:28,148 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:12:28,148 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902313145] [2021-10-21 19:12:28,149 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:12:28,149 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:28,149 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:12:28,150 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:12:28,150 INFO L87 Difference]: Start difference. First operand 1060 states and 1392 transitions. Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:28,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:28,449 INFO L93 Difference]: Finished difference Result 2437 states and 3211 transitions. [2021-10-21 19:12:28,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:12:28,449 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-21 19:12:28,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:28,460 INFO L225 Difference]: With dead ends: 2437 [2021-10-21 19:12:28,460 INFO L226 Difference]: Without dead ends: 1476 [2021-10-21 19:12:28,462 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 20.7ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:12:28,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1476 states. [2021-10-21 19:12:28,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1476 to 1000. [2021-10-21 19:12:28,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 995 states have (on average 1.3145728643216081) internal successors, (1308), 999 states have internal predecessors, (1308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:28,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1308 transitions. [2021-10-21 19:12:28,642 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1308 transitions. Word has length 82 [2021-10-21 19:12:28,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:28,642 INFO L470 AbstractCegarLoop]: Abstraction has 1000 states and 1308 transitions. [2021-10-21 19:12:28,642 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:28,643 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1308 transitions. [2021-10-21 19:12:28,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2021-10-21 19:12:28,646 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:28,646 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:28,647 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-21 19:12:28,647 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:28,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:28,648 INFO L82 PathProgramCache]: Analyzing trace with hash 196290815, now seen corresponding path program 1 times [2021-10-21 19:12:28,648 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:28,648 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847608767] [2021-10-21 19:12:28,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:28,649 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:28,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:28,856 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:28,856 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:28,857 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847608767] [2021-10-21 19:12:28,857 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1847608767] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:28,857 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1328830101] [2021-10-21 19:12:28,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:28,858 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:12:28,858 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:12:28,864 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:12:28,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-21 19:12:29,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:29,126 INFO L263 TraceCheckSpWp]: Trace formula consists of 712 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-21 19:12:29,149 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:12:29,829 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-21 19:12:29,829 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1328830101] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:29,829 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 19:12:29,830 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-21 19:12:29,830 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2038418214] [2021-10-21 19:12:29,831 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:12:29,831 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:29,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:12:29,832 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-21 19:12:29,832 INFO L87 Difference]: Start difference. First operand 1000 states and 1308 transitions. Second operand has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:30,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:30,440 INFO L93 Difference]: Finished difference Result 2594 states and 3522 transitions. [2021-10-21 19:12:30,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 19:12:30,441 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 127 [2021-10-21 19:12:30,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:30,452 INFO L225 Difference]: With dead ends: 2594 [2021-10-21 19:12:30,453 INFO L226 Difference]: Without dead ends: 1781 [2021-10-21 19:12:30,455 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 155.9ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-21 19:12:30,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2021-10-21 19:12:30,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1000. [2021-10-21 19:12:30,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 995 states have (on average 1.31356783919598) internal successors, (1307), 999 states have internal predecessors, (1307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:30,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1307 transitions. [2021-10-21 19:12:30,652 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1307 transitions. Word has length 127 [2021-10-21 19:12:30,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:30,653 INFO L470 AbstractCegarLoop]: Abstraction has 1000 states and 1307 transitions. [2021-10-21 19:12:30,653 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:30,653 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1307 transitions. [2021-10-21 19:12:30,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-21 19:12:30,657 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:30,657 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:30,704 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-21 19:12:30,871 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-21 19:12:30,872 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:30,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:30,872 INFO L82 PathProgramCache]: Analyzing trace with hash 537443172, now seen corresponding path program 1 times [2021-10-21 19:12:30,873 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:30,873 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756888650] [2021-10-21 19:12:30,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:30,873 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:30,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:31,064 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:31,064 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:31,064 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756888650] [2021-10-21 19:12:31,065 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1756888650] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:31,065 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1627577291] [2021-10-21 19:12:31,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:31,065 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:12:31,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:12:31,067 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:12:31,079 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-21 19:12:31,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:31,382 INFO L263 TraceCheckSpWp]: Trace formula consists of 726 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-21 19:12:31,390 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:12:32,053 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:32,053 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1627577291] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:32,053 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 19:12:32,054 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-21 19:12:32,054 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [689702838] [2021-10-21 19:12:32,055 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-21 19:12:32,055 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:32,055 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-21 19:12:32,056 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-21 19:12:32,056 INFO L87 Difference]: Start difference. First operand 1000 states and 1307 transitions. Second operand has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:45,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:45,832 INFO L93 Difference]: Finished difference Result 16786 states and 22448 transitions. [2021-10-21 19:12:45,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-21 19:12:45,833 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-21 19:12:45,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:45,879 INFO L225 Difference]: With dead ends: 16786 [2021-10-21 19:12:45,879 INFO L226 Difference]: Without dead ends: 15979 [2021-10-21 19:12:45,918 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 474 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28995 ImplicationChecksByTransitivity, 6844.0ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-21 19:12:45,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15979 states. [2021-10-21 19:12:46,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15979 to 2718. [2021-10-21 19:12:46,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2718 states, 2713 states have (on average 1.3110947290821968) internal successors, (3557), 2717 states have internal predecessors, (3557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:46,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2718 states to 2718 states and 3557 transitions. [2021-10-21 19:12:46,764 INFO L78 Accepts]: Start accepts. Automaton has 2718 states and 3557 transitions. Word has length 131 [2021-10-21 19:12:46,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:46,765 INFO L470 AbstractCegarLoop]: Abstraction has 2718 states and 3557 transitions. [2021-10-21 19:12:46,766 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:46,766 INFO L276 IsEmpty]: Start isEmpty. Operand 2718 states and 3557 transitions. [2021-10-21 19:12:46,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-21 19:12:46,773 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:46,774 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:46,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-21 19:12:46,999 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-21 19:12:47,000 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:47,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:47,001 INFO L82 PathProgramCache]: Analyzing trace with hash -57966914, now seen corresponding path program 1 times [2021-10-21 19:12:47,001 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:47,001 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118396054] [2021-10-21 19:12:47,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:47,002 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:47,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:47,251 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:47,252 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:47,252 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118396054] [2021-10-21 19:12:47,252 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1118396054] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:47,252 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [455501321] [2021-10-21 19:12:47,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:47,253 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:12:47,253 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:12:47,254 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:12:47,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-21 19:12:47,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:47,564 INFO L263 TraceCheckSpWp]: Trace formula consists of 778 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-21 19:12:47,571 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:12:48,065 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:48,065 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [455501321] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:48,066 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 19:12:48,066 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-21 19:12:48,066 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115703125] [2021-10-21 19:12:48,067 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-21 19:12:48,067 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:48,068 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-21 19:12:48,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-21 19:12:48,068 INFO L87 Difference]: Start difference. First operand 2718 states and 3557 transitions. Second operand has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:49,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:49,702 INFO L93 Difference]: Finished difference Result 9790 states and 13378 transitions. [2021-10-21 19:12:49,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-21 19:12:49,702 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-21 19:12:49,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:49,720 INFO L225 Difference]: With dead ends: 9790 [2021-10-21 19:12:49,721 INFO L226 Difference]: Without dead ends: 7299 [2021-10-21 19:12:49,726 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 142 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 183.8ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-21 19:12:49,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7299 states. [2021-10-21 19:12:50,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7299 to 2324. [2021-10-21 19:12:50,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2324 states, 2319 states have (on average 1.314359637774903) internal successors, (3048), 2323 states have internal predecessors, (3048), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:50,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 3048 transitions. [2021-10-21 19:12:50,175 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 3048 transitions. Word has length 132 [2021-10-21 19:12:50,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:50,176 INFO L470 AbstractCegarLoop]: Abstraction has 2324 states and 3048 transitions. [2021-10-21 19:12:50,176 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:50,176 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 3048 transitions. [2021-10-21 19:12:50,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-21 19:12:50,183 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:50,183 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:50,229 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-21 19:12:50,411 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:12:50,412 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:50,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:50,413 INFO L82 PathProgramCache]: Analyzing trace with hash -812401068, now seen corresponding path program 1 times [2021-10-21 19:12:50,413 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:50,413 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737478726] [2021-10-21 19:12:50,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:50,413 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:50,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:50,548 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-21 19:12:50,548 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:50,548 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737478726] [2021-10-21 19:12:50,549 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737478726] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:50,549 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:12:50,549 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-21 19:12:50,549 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203196040] [2021-10-21 19:12:50,550 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-21 19:12:50,550 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:50,551 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-21 19:12:50,551 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-21 19:12:50,551 INFO L87 Difference]: Start difference. First operand 2324 states and 3048 transitions. Second operand has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:52,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:52,824 INFO L93 Difference]: Finished difference Result 13266 states and 17764 transitions. [2021-10-21 19:12:52,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-21 19:12:52,825 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-21 19:12:52,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:52,851 INFO L225 Difference]: With dead ends: 13266 [2021-10-21 19:12:52,851 INFO L226 Difference]: Without dead ends: 11189 [2021-10-21 19:12:52,858 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 148.3ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-21 19:12:52,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11189 states. [2021-10-21 19:12:53,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11189 to 2744. [2021-10-21 19:12:53,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2744 states, 2739 states have (on average 1.2942679810149689) internal successors, (3545), 2743 states have internal predecessors, (3545), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:53,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2744 states to 2744 states and 3545 transitions. [2021-10-21 19:12:53,452 INFO L78 Accepts]: Start accepts. Automaton has 2744 states and 3545 transitions. Word has length 133 [2021-10-21 19:12:53,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:53,453 INFO L470 AbstractCegarLoop]: Abstraction has 2744 states and 3545 transitions. [2021-10-21 19:12:53,453 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:53,453 INFO L276 IsEmpty]: Start isEmpty. Operand 2744 states and 3545 transitions. [2021-10-21 19:12:53,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2021-10-21 19:12:53,460 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:53,460 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:53,461 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-21 19:12:53,461 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:53,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:53,462 INFO L82 PathProgramCache]: Analyzing trace with hash -1166749575, now seen corresponding path program 1 times [2021-10-21 19:12:53,462 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:53,462 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1910638646] [2021-10-21 19:12:53,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:53,463 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:53,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:53,622 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:53,623 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:53,623 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1910638646] [2021-10-21 19:12:53,623 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1910638646] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:53,623 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [240227739] [2021-10-21 19:12:53,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:53,624 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:12:53,624 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:12:53,625 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:12:53,631 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-21 19:12:53,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:53,965 INFO L263 TraceCheckSpWp]: Trace formula consists of 757 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-21 19:12:53,969 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:12:54,357 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-21 19:12:54,358 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [240227739] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:54,359 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 19:12:54,360 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5] total 11 [2021-10-21 19:12:54,361 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420356302] [2021-10-21 19:12:54,361 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-10-21 19:12:54,362 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:54,363 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-21 19:12:54,363 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2021-10-21 19:12:54,363 INFO L87 Difference]: Start difference. First operand 2744 states and 3545 transitions. Second operand has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:56,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:56,383 INFO L93 Difference]: Finished difference Result 5987 states and 7865 transitions. [2021-10-21 19:12:56,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-21 19:12:56,384 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 135 [2021-10-21 19:12:56,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:56,391 INFO L225 Difference]: With dead ends: 5987 [2021-10-21 19:12:56,391 INFO L226 Difference]: Without dead ends: 3338 [2021-10-21 19:12:56,396 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 523.7ms TimeCoverageRelationStatistics Valid=525, Invalid=1545, Unknown=0, NotChecked=0, Total=2070 [2021-10-21 19:12:56,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3338 states. [2021-10-21 19:12:56,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3338 to 1878. [2021-10-21 19:12:56,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2819006940736786) internal successors, (2401), 1877 states have internal predecessors, (2401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:56,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2401 transitions. [2021-10-21 19:12:56,779 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2401 transitions. Word has length 135 [2021-10-21 19:12:56,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:56,779 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2401 transitions. [2021-10-21 19:12:56,780 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:56,780 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2401 transitions. [2021-10-21 19:12:56,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2021-10-21 19:12:56,786 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:56,786 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:56,828 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-21 19:12:57,010 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2021-10-21 19:12:57,010 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:57,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:57,011 INFO L82 PathProgramCache]: Analyzing trace with hash -2040989094, now seen corresponding path program 1 times [2021-10-21 19:12:57,011 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:57,011 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201730203] [2021-10-21 19:12:57,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:57,011 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:57,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:57,256 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:57,257 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:57,257 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [201730203] [2021-10-21 19:12:57,257 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [201730203] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:57,258 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1420361932] [2021-10-21 19:12:57,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:57,258 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:12:57,258 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:12:57,259 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:12:57,278 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-21 19:12:57,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:57,782 INFO L263 TraceCheckSpWp]: Trace formula consists of 781 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-21 19:12:57,786 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:12:58,157 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-21 19:12:58,157 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1420361932] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:12:58,157 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 19:12:58,158 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-21 19:12:58,158 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1337457818] [2021-10-21 19:12:58,158 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:12:58,158 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:12:58,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:12:58,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-21 19:12:58,159 INFO L87 Difference]: Start difference. First operand 1878 states and 2401 transitions. Second operand has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:58,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:12:58,904 INFO L93 Difference]: Finished difference Result 5950 states and 7855 transitions. [2021-10-21 19:12:58,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 19:12:58,905 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 135 [2021-10-21 19:12:58,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:12:58,912 INFO L225 Difference]: With dead ends: 5950 [2021-10-21 19:12:58,913 INFO L226 Difference]: Without dead ends: 4227 [2021-10-21 19:12:58,916 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 157.2ms TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2021-10-21 19:12:58,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4227 states. [2021-10-21 19:12:59,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4227 to 1878. [2021-10-21 19:12:59,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2802989855846236) internal successors, (2398), 1877 states have internal predecessors, (2398), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:59,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2398 transitions. [2021-10-21 19:12:59,461 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2398 transitions. Word has length 135 [2021-10-21 19:12:59,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:12:59,462 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2398 transitions. [2021-10-21 19:12:59,462 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:12:59,462 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2398 transitions. [2021-10-21 19:12:59,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-21 19:12:59,468 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:12:59,469 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:12:59,512 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-21 19:12:59,683 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2021-10-21 19:12:59,684 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:12:59,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:12:59,684 INFO L82 PathProgramCache]: Analyzing trace with hash 722347797, now seen corresponding path program 1 times [2021-10-21 19:12:59,684 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:12:59,685 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918302730] [2021-10-21 19:12:59,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:59,685 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:12:59,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:12:59,931 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:12:59,931 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:12:59,932 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918302730] [2021-10-21 19:12:59,932 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [918302730] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:12:59,932 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1819645590] [2021-10-21 19:12:59,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:12:59,933 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:12:59,933 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:12:59,934 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:12:59,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-21 19:13:00,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:00,428 INFO L263 TraceCheckSpWp]: Trace formula consists of 794 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-21 19:13:00,433 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:13:00,948 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-21 19:13:00,949 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1819645590] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:00,949 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 19:13:00,949 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-21 19:13:00,950 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1933303659] [2021-10-21 19:13:00,951 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:13:00,951 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:00,955 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:13:00,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-21 19:13:00,955 INFO L87 Difference]: Start difference. First operand 1878 states and 2398 transitions. Second operand has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:01,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:01,782 INFO L93 Difference]: Finished difference Result 5394 states and 7030 transitions. [2021-10-21 19:13:01,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 19:13:01,782 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-21 19:13:01,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:01,789 INFO L225 Difference]: With dead ends: 5394 [2021-10-21 19:13:01,789 INFO L226 Difference]: Without dead ends: 3671 [2021-10-21 19:13:01,793 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 195.5ms TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2021-10-21 19:13:01,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3671 states. [2021-10-21 19:13:02,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3671 to 1878. [2021-10-21 19:13:02,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2786972770955687) internal successors, (2395), 1877 states have internal predecessors, (2395), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:02,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2395 transitions. [2021-10-21 19:13:02,235 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2395 transitions. Word has length 139 [2021-10-21 19:13:02,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:02,236 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2395 transitions. [2021-10-21 19:13:02,236 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:02,236 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2395 transitions. [2021-10-21 19:13:02,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-10-21 19:13:02,241 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:02,242 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:02,287 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-21 19:13:02,459 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-10-21 19:13:02,460 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:02,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:02,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1061111299, now seen corresponding path program 1 times [2021-10-21 19:13:02,461 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:02,461 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052057964] [2021-10-21 19:13:02,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:02,461 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:02,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:02,724 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:02,725 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:02,725 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052057964] [2021-10-21 19:13:02,725 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2052057964] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:02,725 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [237217718] [2021-10-21 19:13:02,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:02,726 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:13:02,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:13:02,727 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:13:02,747 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-21 19:13:03,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:03,208 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-21 19:13:03,211 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:13:04,542 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:04,543 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [237217718] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:04,543 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 19:13:04,543 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6] total 14 [2021-10-21 19:13:04,543 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677086036] [2021-10-21 19:13:04,544 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2021-10-21 19:13:04,544 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:04,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-10-21 19:13:04,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2021-10-21 19:13:04,544 INFO L87 Difference]: Start difference. First operand 1878 states and 2395 transitions. Second operand has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:07,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:07,702 INFO L93 Difference]: Finished difference Result 5843 states and 7527 transitions. [2021-10-21 19:13:07,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2021-10-21 19:13:07,703 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 142 [2021-10-21 19:13:07,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:07,708 INFO L225 Difference]: With dead ends: 5843 [2021-10-21 19:13:07,709 INFO L226 Difference]: Without dead ends: 4160 [2021-10-21 19:13:07,712 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1627 ImplicationChecksByTransitivity, 1422.3ms TimeCoverageRelationStatistics Valid=942, Invalid=4314, Unknown=0, NotChecked=0, Total=5256 [2021-10-21 19:13:07,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4160 states. [2021-10-21 19:13:08,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4160 to 2115. [2021-10-21 19:13:08,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2115 states, 2110 states have (on average 1.2691943127962084) internal successors, (2678), 2114 states have internal predecessors, (2678), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:08,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2115 states to 2115 states and 2678 transitions. [2021-10-21 19:13:08,138 INFO L78 Accepts]: Start accepts. Automaton has 2115 states and 2678 transitions. Word has length 142 [2021-10-21 19:13:08,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:08,139 INFO L470 AbstractCegarLoop]: Abstraction has 2115 states and 2678 transitions. [2021-10-21 19:13:08,139 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:08,139 INFO L276 IsEmpty]: Start isEmpty. Operand 2115 states and 2678 transitions. [2021-10-21 19:13:08,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-21 19:13:08,144 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:08,145 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:08,189 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2021-10-21 19:13:08,371 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2021-10-21 19:13:08,372 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:08,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:08,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1545838345, now seen corresponding path program 1 times [2021-10-21 19:13:08,372 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:08,373 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715203558] [2021-10-21 19:13:08,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:08,373 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:08,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:08,473 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-21 19:13:08,473 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:08,474 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [715203558] [2021-10-21 19:13:08,474 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [715203558] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:08,474 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:13:08,474 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:13:08,474 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1696217295] [2021-10-21 19:13:08,475 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 19:13:08,475 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:08,475 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 19:13:08,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:13:08,476 INFO L87 Difference]: Start difference. First operand 2115 states and 2678 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:08,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:08,849 INFO L93 Difference]: Finished difference Result 3968 states and 5065 transitions. [2021-10-21 19:13:08,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:13:08,849 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-21 19:13:08,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:08,852 INFO L225 Difference]: With dead ends: 3968 [2021-10-21 19:13:08,852 INFO L226 Difference]: Without dead ends: 1987 [2021-10-21 19:13:08,855 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 10.5ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:13:08,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1987 states. [2021-10-21 19:13:09,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1987 to 1987. [2021-10-21 19:13:09,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1987 states, 1982 states have (on average 1.2734611503531785) internal successors, (2524), 1986 states have internal predecessors, (2524), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:09,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 1987 states and 2524 transitions. [2021-10-21 19:13:09,209 INFO L78 Accepts]: Start accepts. Automaton has 1987 states and 2524 transitions. Word has length 143 [2021-10-21 19:13:09,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:09,209 INFO L470 AbstractCegarLoop]: Abstraction has 1987 states and 2524 transitions. [2021-10-21 19:13:09,210 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:09,210 INFO L276 IsEmpty]: Start isEmpty. Operand 1987 states and 2524 transitions. [2021-10-21 19:13:09,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-21 19:13:09,213 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:09,213 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:09,214 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-10-21 19:13:09,214 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:09,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:09,214 INFO L82 PathProgramCache]: Analyzing trace with hash 956328512, now seen corresponding path program 1 times [2021-10-21 19:13:09,215 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:09,215 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289027946] [2021-10-21 19:13:09,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:09,215 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:09,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:09,294 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-21 19:13:09,295 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:09,295 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289027946] [2021-10-21 19:13:09,295 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1289027946] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:09,295 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:13:09,295 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:13:09,296 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882765203] [2021-10-21 19:13:09,296 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:13:09,296 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:09,297 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:13:09,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:13:09,297 INFO L87 Difference]: Start difference. First operand 1987 states and 2524 transitions. Second operand has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:10,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:10,641 INFO L93 Difference]: Finished difference Result 8551 states and 11174 transitions. [2021-10-21 19:13:10,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-21 19:13:10,642 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-21 19:13:10,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:10,649 INFO L225 Difference]: With dead ends: 8551 [2021-10-21 19:13:10,650 INFO L226 Difference]: Without dead ends: 6759 [2021-10-21 19:13:10,653 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 54.3ms TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2021-10-21 19:13:10,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6759 states. [2021-10-21 19:13:11,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6759 to 2340. [2021-10-21 19:13:11,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2340 states, 2335 states have (on average 1.2582441113490364) internal successors, (2938), 2339 states have internal predecessors, (2938), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:11,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2340 states to 2340 states and 2938 transitions. [2021-10-21 19:13:11,289 INFO L78 Accepts]: Start accepts. Automaton has 2340 states and 2938 transitions. Word has length 143 [2021-10-21 19:13:11,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:11,290 INFO L470 AbstractCegarLoop]: Abstraction has 2340 states and 2938 transitions. [2021-10-21 19:13:11,290 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:11,290 INFO L276 IsEmpty]: Start isEmpty. Operand 2340 states and 2938 transitions. [2021-10-21 19:13:11,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-21 19:13:11,295 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:11,296 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:11,296 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-21 19:13:11,296 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:11,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:11,297 INFO L82 PathProgramCache]: Analyzing trace with hash 1126731789, now seen corresponding path program 1 times [2021-10-21 19:13:11,297 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:11,297 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280634267] [2021-10-21 19:13:11,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:11,298 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:11,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:11,519 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 32 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:11,520 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:11,520 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280634267] [2021-10-21 19:13:11,520 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1280634267] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:11,520 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [235741054] [2021-10-21 19:13:11,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:11,522 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:13:11,522 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:13:11,523 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:13:11,542 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-10-21 19:13:12,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:12,015 INFO L263 TraceCheckSpWp]: Trace formula consists of 809 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-21 19:13:12,019 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:13:12,502 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 34 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:12,503 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [235741054] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:12,503 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 19:13:12,503 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2021-10-21 19:13:12,503 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085069793] [2021-10-21 19:13:12,504 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2021-10-21 19:13:12,504 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:12,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-10-21 19:13:12,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2021-10-21 19:13:12,506 INFO L87 Difference]: Start difference. First operand 2340 states and 2938 transitions. Second operand has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:20,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:20,574 INFO L93 Difference]: Finished difference Result 15605 states and 19700 transitions. [2021-10-21 19:13:20,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 161 states. [2021-10-21 19:13:20,574 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-21 19:13:20,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:20,588 INFO L225 Difference]: With dead ends: 15605 [2021-10-21 19:13:20,588 INFO L226 Difference]: Without dead ends: 13460 [2021-10-21 19:13:20,598 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 173 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11702 ImplicationChecksByTransitivity, 3126.9ms TimeCoverageRelationStatistics Valid=3629, Invalid=26821, Unknown=0, NotChecked=0, Total=30450 [2021-10-21 19:13:20,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13460 states. [2021-10-21 19:13:21,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13460 to 4490. [2021-10-21 19:13:21,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4490 states, 4485 states have (on average 1.2550724637681159) internal successors, (5629), 4489 states have internal predecessors, (5629), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:21,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4490 states to 4490 states and 5629 transitions. [2021-10-21 19:13:21,751 INFO L78 Accepts]: Start accepts. Automaton has 4490 states and 5629 transitions. Word has length 144 [2021-10-21 19:13:21,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:21,752 INFO L470 AbstractCegarLoop]: Abstraction has 4490 states and 5629 transitions. [2021-10-21 19:13:21,752 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:21,753 INFO L276 IsEmpty]: Start isEmpty. Operand 4490 states and 5629 transitions. [2021-10-21 19:13:21,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-21 19:13:21,761 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:21,762 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:21,808 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2021-10-21 19:13:21,975 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2021-10-21 19:13:21,976 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:21,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:21,976 INFO L82 PathProgramCache]: Analyzing trace with hash -2053713263, now seen corresponding path program 1 times [2021-10-21 19:13:21,976 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:21,977 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390767435] [2021-10-21 19:13:21,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:21,977 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:22,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:22,040 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2021-10-21 19:13:22,040 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:22,042 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390767435] [2021-10-21 19:13:22,042 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [390767435] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:22,042 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:13:22,042 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:13:22,043 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146833028] [2021-10-21 19:13:22,043 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:13:22,043 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:22,044 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:13:22,044 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:13:22,044 INFO L87 Difference]: Start difference. First operand 4490 states and 5629 transitions. Second operand has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:22,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:22,775 INFO L93 Difference]: Finished difference Result 8234 states and 10375 transitions. [2021-10-21 19:13:22,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 19:13:22,775 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-21 19:13:22,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:22,781 INFO L225 Difference]: With dead ends: 8234 [2021-10-21 19:13:22,781 INFO L226 Difference]: Without dead ends: 3927 [2021-10-21 19:13:22,787 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.9ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:13:22,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3927 states. [2021-10-21 19:13:23,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3927 to 3911. [2021-10-21 19:13:23,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3911 states, 3906 states have (on average 1.2521761392729134) internal successors, (4891), 3910 states have internal predecessors, (4891), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:23,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3911 states to 3911 states and 4891 transitions. [2021-10-21 19:13:23,649 INFO L78 Accepts]: Start accepts. Automaton has 3911 states and 4891 transitions. Word has length 144 [2021-10-21 19:13:23,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:23,649 INFO L470 AbstractCegarLoop]: Abstraction has 3911 states and 4891 transitions. [2021-10-21 19:13:23,650 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:23,650 INFO L276 IsEmpty]: Start isEmpty. Operand 3911 states and 4891 transitions. [2021-10-21 19:13:23,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-21 19:13:23,658 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:23,658 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:23,658 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-10-21 19:13:23,659 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:23,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:23,659 INFO L82 PathProgramCache]: Analyzing trace with hash -1332568633, now seen corresponding path program 1 times [2021-10-21 19:13:23,659 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:23,660 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374272681] [2021-10-21 19:13:23,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:23,660 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:23,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:23,780 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:23,781 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:23,781 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374272681] [2021-10-21 19:13:23,781 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [374272681] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:23,781 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [885138572] [2021-10-21 19:13:23,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:23,782 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:13:23,782 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:13:23,783 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:13:23,807 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-10-21 19:13:24,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:24,409 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-21 19:13:24,411 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:13:24,786 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:24,786 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [885138572] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:24,786 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-21 19:13:24,786 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-21 19:13:24,788 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1059068924] [2021-10-21 19:13:24,793 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-21 19:13:24,793 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:24,793 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-21 19:13:24,793 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-21 19:13:24,794 INFO L87 Difference]: Start difference. First operand 3911 states and 4891 transitions. Second operand has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:27,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:27,072 INFO L93 Difference]: Finished difference Result 14859 states and 18978 transitions. [2021-10-21 19:13:27,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-21 19:13:27,072 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-21 19:13:27,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:27,083 INFO L225 Difference]: With dead ends: 14859 [2021-10-21 19:13:27,083 INFO L226 Difference]: Without dead ends: 11247 [2021-10-21 19:13:27,089 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 78.6ms TimeCoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2021-10-21 19:13:27,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11247 states. [2021-10-21 19:13:28,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11247 to 7251. [2021-10-21 19:13:28,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7251 states, 7246 states have (on average 1.250483025117306) internal successors, (9061), 7250 states have internal predecessors, (9061), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:28,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7251 states to 7251 states and 9061 transitions. [2021-10-21 19:13:28,352 INFO L78 Accepts]: Start accepts. Automaton has 7251 states and 9061 transitions. Word has length 144 [2021-10-21 19:13:28,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:28,353 INFO L470 AbstractCegarLoop]: Abstraction has 7251 states and 9061 transitions. [2021-10-21 19:13:28,353 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:28,354 INFO L276 IsEmpty]: Start isEmpty. Operand 7251 states and 9061 transitions. [2021-10-21 19:13:28,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-21 19:13:28,359 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:28,360 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:28,385 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2021-10-21 19:13:28,560 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2021-10-21 19:13:28,561 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:28,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:28,561 INFO L82 PathProgramCache]: Analyzing trace with hash -372796990, now seen corresponding path program 1 times [2021-10-21 19:13:28,561 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:28,562 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582202527] [2021-10-21 19:13:28,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:28,562 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:28,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:28,714 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 26 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:28,715 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:28,715 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1582202527] [2021-10-21 19:13:28,715 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1582202527] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:28,715 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1040499755] [2021-10-21 19:13:28,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:28,716 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:13:28,716 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:13:28,717 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:13:28,745 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-21 19:13:29,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:29,420 INFO L263 TraceCheckSpWp]: Trace formula consists of 817 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-21 19:13:29,424 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:13:29,849 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-21 19:13:29,850 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1040499755] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:29,850 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 19:13:29,850 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-21 19:13:29,850 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005041621] [2021-10-21 19:13:29,851 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:13:29,852 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:29,852 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:13:29,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-21 19:13:29,853 INFO L87 Difference]: Start difference. First operand 7251 states and 9061 transitions. Second operand has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:31,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:31,952 INFO L93 Difference]: Finished difference Result 16296 states and 20669 transitions. [2021-10-21 19:13:31,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 19:13:31,953 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-21 19:13:31,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:31,964 INFO L225 Difference]: With dead ends: 16296 [2021-10-21 19:13:31,964 INFO L226 Difference]: Without dead ends: 10692 [2021-10-21 19:13:31,970 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 138.0ms TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2021-10-21 19:13:31,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10692 states. [2021-10-21 19:13:33,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10692 to 7251. [2021-10-21 19:13:33,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7251 states, 7246 states have (on average 1.236820314656362) internal successors, (8962), 7250 states have internal predecessors, (8962), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:33,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7251 states to 7251 states and 8962 transitions. [2021-10-21 19:13:33,308 INFO L78 Accepts]: Start accepts. Automaton has 7251 states and 8962 transitions. Word has length 144 [2021-10-21 19:13:33,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:33,309 INFO L470 AbstractCegarLoop]: Abstraction has 7251 states and 8962 transitions. [2021-10-21 19:13:33,309 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:33,309 INFO L276 IsEmpty]: Start isEmpty. Operand 7251 states and 8962 transitions. [2021-10-21 19:13:33,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-21 19:13:33,316 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:33,317 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:33,346 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-10-21 19:13:33,527 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:13:33,528 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:33,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:33,528 INFO L82 PathProgramCache]: Analyzing trace with hash 729040484, now seen corresponding path program 1 times [2021-10-21 19:13:33,529 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:33,529 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873478680] [2021-10-21 19:13:33,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:33,529 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:33,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:33,588 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-21 19:13:33,589 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:33,589 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873478680] [2021-10-21 19:13:33,589 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1873478680] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:33,589 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:13:33,589 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:13:33,590 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584329497] [2021-10-21 19:13:33,590 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:13:33,590 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:33,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:13:33,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:13:33,591 INFO L87 Difference]: Start difference. First operand 7251 states and 8962 transitions. Second operand has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:34,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:34,820 INFO L93 Difference]: Finished difference Result 11820 states and 14654 transitions. [2021-10-21 19:13:34,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 19:13:34,821 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-21 19:13:34,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:34,826 INFO L225 Difference]: With dead ends: 11820 [2021-10-21 19:13:34,826 INFO L226 Difference]: Without dead ends: 5207 [2021-10-21 19:13:34,832 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.6ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:13:34,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5207 states. [2021-10-21 19:13:35,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5207 to 5179. [2021-10-21 19:13:35,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5179 states, 5174 states have (on average 1.2377270970235794) internal successors, (6404), 5178 states have internal predecessors, (6404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:35,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5179 states to 5179 states and 6404 transitions. [2021-10-21 19:13:35,797 INFO L78 Accepts]: Start accepts. Automaton has 5179 states and 6404 transitions. Word has length 145 [2021-10-21 19:13:35,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:35,797 INFO L470 AbstractCegarLoop]: Abstraction has 5179 states and 6404 transitions. [2021-10-21 19:13:35,797 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:35,798 INFO L276 IsEmpty]: Start isEmpty. Operand 5179 states and 6404 transitions. [2021-10-21 19:13:35,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2021-10-21 19:13:35,803 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:35,803 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:35,803 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2021-10-21 19:13:35,803 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:35,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:35,804 INFO L82 PathProgramCache]: Analyzing trace with hash -828579161, now seen corresponding path program 1 times [2021-10-21 19:13:35,804 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:35,804 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548263563] [2021-10-21 19:13:35,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:35,805 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:35,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:35,954 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 26 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:13:35,954 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:35,954 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1548263563] [2021-10-21 19:13:35,954 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1548263563] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-21 19:13:35,954 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [477257044] [2021-10-21 19:13:35,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:35,955 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:13:35,955 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:13:35,959 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-21 19:13:35,975 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-21 19:13:36,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:36,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 830 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-21 19:13:36,665 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-21 19:13:37,101 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-21 19:13:37,102 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [477257044] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:37,102 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-21 19:13:37,102 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-21 19:13:37,102 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594274212] [2021-10-21 19:13:37,103 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:13:37,103 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:37,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:13:37,103 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-21 19:13:37,104 INFO L87 Difference]: Start difference. First operand 5179 states and 6404 transitions. Second operand has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:38,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:38,874 INFO L93 Difference]: Finished difference Result 13279 states and 16533 transitions. [2021-10-21 19:13:38,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-21 19:13:38,875 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 148 [2021-10-21 19:13:38,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:38,884 INFO L225 Difference]: With dead ends: 13279 [2021-10-21 19:13:38,884 INFO L226 Difference]: Without dead ends: 8944 [2021-10-21 19:13:38,889 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 115.4ms TimeCoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2021-10-21 19:13:38,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8944 states. [2021-10-21 19:13:39,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8944 to 5179. [2021-10-21 19:13:39,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5179 states, 5174 states have (on average 1.2373405488983378) internal successors, (6402), 5178 states have internal predecessors, (6402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:39,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5179 states to 5179 states and 6402 transitions. [2021-10-21 19:13:39,877 INFO L78 Accepts]: Start accepts. Automaton has 5179 states and 6402 transitions. Word has length 148 [2021-10-21 19:13:39,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:39,877 INFO L470 AbstractCegarLoop]: Abstraction has 5179 states and 6402 transitions. [2021-10-21 19:13:39,878 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:39,878 INFO L276 IsEmpty]: Start isEmpty. Operand 5179 states and 6402 transitions. [2021-10-21 19:13:39,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-10-21 19:13:39,883 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:39,883 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:39,910 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2021-10-21 19:13:40,087 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-21 19:13:40,087 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:40,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:40,088 INFO L82 PathProgramCache]: Analyzing trace with hash -572580853, now seen corresponding path program 1 times [2021-10-21 19:13:40,088 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:40,088 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586406366] [2021-10-21 19:13:40,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:40,089 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:40,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:13:40,245 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-21 19:13:40,245 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:13:40,245 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586406366] [2021-10-21 19:13:40,246 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [586406366] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:13:40,246 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:13:40,246 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:13:40,246 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336999960] [2021-10-21 19:13:40,247 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:13:40,247 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:13:40,247 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:13:40,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:13:40,248 INFO L87 Difference]: Start difference. First operand 5179 states and 6402 transitions. Second operand has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:42,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:13:42,699 INFO L93 Difference]: Finished difference Result 13168 states and 16527 transitions. [2021-10-21 19:13:42,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-21 19:13:42,700 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-10-21 19:13:42,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:13:42,711 INFO L225 Difference]: With dead ends: 13168 [2021-10-21 19:13:42,711 INFO L226 Difference]: Without dead ends: 10225 [2021-10-21 19:13:42,715 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 82.4ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-21 19:13:42,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10225 states. [2021-10-21 19:13:43,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10225 to 5305. [2021-10-21 19:13:43,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5305 states, 5300 states have (on average 1.2356603773584907) internal successors, (6549), 5304 states have internal predecessors, (6549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:43,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5305 states to 5305 states and 6549 transitions. [2021-10-21 19:13:43,684 INFO L78 Accepts]: Start accepts. Automaton has 5305 states and 6549 transitions. Word has length 149 [2021-10-21 19:13:43,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:13:43,684 INFO L470 AbstractCegarLoop]: Abstraction has 5305 states and 6549 transitions. [2021-10-21 19:13:43,685 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:13:43,685 INFO L276 IsEmpty]: Start isEmpty. Operand 5305 states and 6549 transitions. [2021-10-21 19:13:43,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-10-21 19:13:43,689 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:13:43,689 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:13:43,689 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-10-21 19:13:43,690 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-21 19:13:43,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:13:43,690 INFO L82 PathProgramCache]: Analyzing trace with hash -146521997, now seen corresponding path program 1 times [2021-10-21 19:13:43,690 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:13:43,690 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014340414] [2021-10-21 19:13:43,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:13:43,691 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:13:43,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 19:13:43,784 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-21 19:13:43,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-21 19:13:43,970 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-21 19:13:43,970 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-10-21 19:13:43,971 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,973 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,974 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,974 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,974 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,974 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,975 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,975 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,975 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,975 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,975 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,976 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,976 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,976 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,976 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,976 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,977 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,977 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,977 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,977 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,977 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,978 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,978 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:13:43,978 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2021-10-21 19:13:43,991 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-21 19:13:44,261 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.10 07:13:44 BoogieIcfgContainer [2021-10-21 19:13:44,261 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-21 19:13:44,261 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-21 19:13:44,262 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-21 19:13:44,262 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-21 19:13:44,262 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 07:12:16" (3/4) ... [2021-10-21 19:13:44,269 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-21 19:13:44,558 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/witness.graphml [2021-10-21 19:13:44,558 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-21 19:13:44,560 INFO L168 Benchmark]: Toolchain (without parser) took 90834.19 ms. Allocated memory was 92.3 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 69.6 MB in the beginning and 1.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 883.4 MB. Max. memory is 16.1 GB. [2021-10-21 19:13:44,560 INFO L168 Benchmark]: CDTParser took 0.31 ms. Allocated memory is still 92.3 MB. Free memory is still 65.6 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-21 19:13:44,561 INFO L168 Benchmark]: CACSL2BoogieTranslator took 693.19 ms. Allocated memory is still 92.3 MB. Free memory was 69.4 MB in the beginning and 60.8 MB in the end (delta: 8.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-21 19:13:44,561 INFO L168 Benchmark]: Boogie Procedure Inliner took 140.77 ms. Allocated memory is still 92.3 MB. Free memory was 60.6 MB in the beginning and 55.8 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-21 19:13:44,561 INFO L168 Benchmark]: Boogie Preprocessor took 108.92 ms. Allocated memory is still 92.3 MB. Free memory was 55.8 MB in the beginning and 52.4 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-21 19:13:44,562 INFO L168 Benchmark]: RCFGBuilder took 1509.81 ms. Allocated memory was 92.3 MB in the beginning and 117.4 MB in the end (delta: 25.2 MB). Free memory was 52.4 MB in the beginning and 69.0 MB in the end (delta: -16.5 MB). Peak memory consumption was 29.0 MB. Max. memory is 16.1 GB. [2021-10-21 19:13:44,562 INFO L168 Benchmark]: TraceAbstraction took 88077.55 ms. Allocated memory was 117.4 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 68.4 MB in the beginning and 1.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 809.8 MB. Max. memory is 16.1 GB. [2021-10-21 19:13:44,563 INFO L168 Benchmark]: Witness Printer took 296.67 ms. Allocated memory is still 2.1 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 48.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. [2021-10-21 19:13:44,565 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.31 ms. Allocated memory is still 92.3 MB. Free memory is still 65.6 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 693.19 ms. Allocated memory is still 92.3 MB. Free memory was 69.4 MB in the beginning and 60.8 MB in the end (delta: 8.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 140.77 ms. Allocated memory is still 92.3 MB. Free memory was 60.6 MB in the beginning and 55.8 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 108.92 ms. Allocated memory is still 92.3 MB. Free memory was 55.8 MB in the beginning and 52.4 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1509.81 ms. Allocated memory was 92.3 MB in the beginning and 117.4 MB in the end (delta: 25.2 MB). Free memory was 52.4 MB in the beginning and 69.0 MB in the end (delta: -16.5 MB). Peak memory consumption was 29.0 MB. Max. memory is 16.1 GB. * TraceAbstraction took 88077.55 ms. Allocated memory was 117.4 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 68.4 MB in the beginning and 1.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 809.8 MB. Max. memory is 16.1 GB. * Witness Printer took 296.67 ms. Allocated memory is still 2.1 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 48.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 618]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L616] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L616] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L618] reach_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 296 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 87717.6ms, OverallIterations: 45, TraceHistogramMax: 2, EmptinessCheckTime: 186.2ms, AutomataDifference: 52159.8ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 22.4ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 21531 SDtfs, 49487 SDslu, 63295 SDs, 0 SdLazy, 12847 SolverSat, 794 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8893.0ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2582 GetRequests, 1775 SyntacticMatches, 3 SemanticMatches, 804 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43369 ImplicationChecksByTransitivity, 13880.0ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=7251occurred in iteration=40, InterpolantAutomatonStates: 791, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 14653.0ms AutomataMinimizationTime, 44 MinimizatonAttempts, 74747 StatesRemovedByMinimization, 41 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 734.7ms SsaConstructionTime, 2889.6ms SatisfiabilityAnalysisTime, 10154.3ms InterpolantComputationTime, 5847 NumberOfCodeBlocks, 5847 NumberOfCodeBlocksAsserted, 56 NumberOfCheckSat, 5642 ConstructedInterpolants, 0 QuantifiedInterpolants, 19808 SizeOfPredicates, 40 NumberOfNonLiveVariables, 8616 ConjunctsInSsa, 129 ConjunctsInUnsatCore, 55 InterpolantComputations, 38 PerfectInterpolantSequences, 792/1160 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-21 19:13:44,627 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_7aa9de1f-c10b-413d-ba32-c09cebd0755f/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...