./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/pc_sfifo_3.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e943c265 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/pc_sfifo_3.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bf5caed0975bcd13784481e6ed5c6e2683f42c4424e4d0ddd251aa22a6d5bd38 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-e943c26 [2021-10-21 19:47:45,128 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-21 19:47:45,130 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-21 19:47:45,192 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-21 19:47:45,193 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-21 19:47:45,198 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-21 19:47:45,200 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-21 19:47:45,205 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-21 19:47:45,208 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-21 19:47:45,217 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-21 19:47:45,218 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-21 19:47:45,220 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-21 19:47:45,220 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-21 19:47:45,221 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-21 19:47:45,223 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-21 19:47:45,225 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-21 19:47:45,226 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-21 19:47:45,227 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-21 19:47:45,229 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-21 19:47:45,232 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-21 19:47:45,234 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-21 19:47:45,236 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-21 19:47:45,237 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-21 19:47:45,238 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-21 19:47:45,243 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-21 19:47:45,243 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-21 19:47:45,244 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-21 19:47:45,245 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-21 19:47:45,246 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-21 19:47:45,247 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-21 19:47:45,248 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-21 19:47:45,249 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-21 19:47:45,250 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-21 19:47:45,251 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-21 19:47:45,252 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-21 19:47:45,252 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-21 19:47:45,253 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-21 19:47:45,254 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-21 19:47:45,254 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-21 19:47:45,258 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-21 19:47:45,260 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-21 19:47:45,261 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-21 19:47:45,311 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-21 19:47:45,311 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-21 19:47:45,312 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-21 19:47:45,312 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-21 19:47:45,320 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-21 19:47:45,320 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-21 19:47:45,321 INFO L138 SettingsManager]: * Use SBE=true [2021-10-21 19:47:45,321 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-21 19:47:45,321 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-21 19:47:45,321 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-21 19:47:45,322 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-21 19:47:45,323 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-21 19:47:45,323 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-21 19:47:45,323 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-21 19:47:45,323 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-21 19:47:45,323 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-21 19:47:45,324 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-21 19:47:45,324 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-21 19:47:45,324 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-21 19:47:45,324 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-21 19:47:45,324 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-21 19:47:45,325 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-21 19:47:45,325 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-21 19:47:45,325 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-21 19:47:45,325 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-21 19:47:45,325 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-21 19:47:45,326 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-21 19:47:45,326 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-21 19:47:45,326 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-21 19:47:45,328 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-21 19:47:45,328 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-21 19:47:45,328 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-21 19:47:45,328 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bf5caed0975bcd13784481e6ed5c6e2683f42c4424e4d0ddd251aa22a6d5bd38 [2021-10-21 19:47:45,585 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-21 19:47:45,609 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-21 19:47:45,612 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-21 19:47:45,613 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-21 19:47:45,614 INFO L275 PluginConnector]: CDTParser initialized [2021-10-21 19:47:45,615 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/../../sv-benchmarks/c/systemc/pc_sfifo_3.cil.c [2021-10-21 19:47:45,688 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/data/1245d231c/9e59b9df2be34c62b8e399c0fc146ee5/FLAGf0124ced3 [2021-10-21 19:47:46,290 INFO L306 CDTParser]: Found 1 translation units. [2021-10-21 19:47:46,293 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/sv-benchmarks/c/systemc/pc_sfifo_3.cil.c [2021-10-21 19:47:46,305 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/data/1245d231c/9e59b9df2be34c62b8e399c0fc146ee5/FLAGf0124ced3 [2021-10-21 19:47:46,615 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/data/1245d231c/9e59b9df2be34c62b8e399c0fc146ee5 [2021-10-21 19:47:46,618 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-21 19:47:46,619 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-21 19:47:46,624 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-21 19:47:46,624 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-21 19:47:46,627 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-21 19:47:46,628 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 07:47:46" (1/1) ... [2021-10-21 19:47:46,629 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6245acad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:46, skipping insertion in model container [2021-10-21 19:47:46,629 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.10 07:47:46" (1/1) ... [2021-10-21 19:47:46,637 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-21 19:47:46,671 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-21 19:47:46,845 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/sv-benchmarks/c/systemc/pc_sfifo_3.cil.c[335,348] [2021-10-21 19:47:46,917 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 19:47:46,928 INFO L203 MainTranslator]: Completed pre-run [2021-10-21 19:47:46,943 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/sv-benchmarks/c/systemc/pc_sfifo_3.cil.c[335,348] [2021-10-21 19:47:46,983 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-21 19:47:47,003 INFO L208 MainTranslator]: Completed translation [2021-10-21 19:47:47,003 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47 WrapperNode [2021-10-21 19:47:47,004 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-21 19:47:47,005 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-21 19:47:47,005 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-21 19:47:47,006 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-21 19:47:47,015 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,027 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,092 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-21 19:47:47,100 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-21 19:47:47,100 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-21 19:47:47,100 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-21 19:47:47,111 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,112 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,134 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,134 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,145 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,155 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,158 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,164 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-21 19:47:47,165 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-21 19:47:47,166 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-21 19:47:47,166 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-21 19:47:47,172 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (1/1) ... [2021-10-21 19:47:47,187 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-21 19:47:47,212 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/z3 [2021-10-21 19:47:47,233 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-21 19:47:47,236 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-21 19:47:47,289 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-21 19:47:47,290 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-21 19:47:47,290 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-21 19:47:47,290 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-21 19:47:47,805 INFO L758 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##104: assume 1 == ~q_free~0;~c_dr_st~0 := 2;~c_dr_pc~0 := 2;~a_t~0 := do_read_c_~a~0; [2021-10-21 19:47:47,806 INFO L758 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##105: assume !(1 == ~q_free~0); [2021-10-21 19:47:47,814 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-21 19:47:47,815 INFO L299 CfgBuilder]: Removed 70 assume(true) statements. [2021-10-21 19:47:47,821 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 07:47:47 BoogieIcfgContainer [2021-10-21 19:47:47,821 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-21 19:47:47,825 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-21 19:47:47,825 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-21 19:47:47,829 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-21 19:47:47,829 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.10 07:47:46" (1/3) ... [2021-10-21 19:47:47,830 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d88289d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.10 07:47:47, skipping insertion in model container [2021-10-21 19:47:47,830 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.10 07:47:47" (2/3) ... [2021-10-21 19:47:47,830 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d88289d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.10 07:47:47, skipping insertion in model container [2021-10-21 19:47:47,831 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 07:47:47" (3/3) ... [2021-10-21 19:47:47,832 INFO L111 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil.c [2021-10-21 19:47:47,837 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-21 19:47:47,837 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2021-10-21 19:47:47,885 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-21 19:47:47,891 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-21 19:47:47,891 INFO L340 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2021-10-21 19:47:47,910 INFO L276 IsEmpty]: Start isEmpty. Operand has 131 states, 128 states have (on average 1.6328125) internal successors, (209), 130 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:47,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2021-10-21 19:47:47,917 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:47,918 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:47,918 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:47,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:47,924 INFO L82 PathProgramCache]: Analyzing trace with hash -660120607, now seen corresponding path program 1 times [2021-10-21 19:47:47,932 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:47,933 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1483233366] [2021-10-21 19:47:47,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:47,934 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:48,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:48,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:47:48,109 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:48,109 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1483233366] [2021-10-21 19:47:48,110 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1483233366] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:48,110 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:48,110 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:47:48,111 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1017795139] [2021-10-21 19:47:48,116 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:47:48,116 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:48,128 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:47:48,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:48,132 INFO L87 Difference]: Start difference. First operand has 131 states, 128 states have (on average 1.6328125) internal successors, (209), 130 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:48,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:48,222 INFO L93 Difference]: Finished difference Result 377 states and 602 transitions. [2021-10-21 19:47:48,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:47:48,224 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2021-10-21 19:47:48,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:48,236 INFO L225 Difference]: With dead ends: 377 [2021-10-21 19:47:48,236 INFO L226 Difference]: Without dead ends: 248 [2021-10-21 19:47:48,239 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:48,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2021-10-21 19:47:48,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 244. [2021-10-21 19:47:48,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 242 states have (on average 1.537190082644628) internal successors, (372), 243 states have internal predecessors, (372), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:48,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 372 transitions. [2021-10-21 19:47:48,296 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 372 transitions. Word has length 39 [2021-10-21 19:47:48,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:48,296 INFO L470 AbstractCegarLoop]: Abstraction has 244 states and 372 transitions. [2021-10-21 19:47:48,296 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:48,297 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 372 transitions. [2021-10-21 19:47:48,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2021-10-21 19:47:48,299 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:48,299 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:48,300 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-21 19:47:48,300 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:48,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:48,301 INFO L82 PathProgramCache]: Analyzing trace with hash 1873516389, now seen corresponding path program 1 times [2021-10-21 19:47:48,301 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:48,301 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123919801] [2021-10-21 19:47:48,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:48,302 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:48,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:48,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:47:48,390 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:48,391 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123919801] [2021-10-21 19:47:48,391 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2123919801] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:48,391 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:48,391 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:48,392 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523299495] [2021-10-21 19:47:48,393 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 19:47:48,393 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:48,394 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 19:47:48,394 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:48,395 INFO L87 Difference]: Start difference. First operand 244 states and 372 transitions. Second operand has 5 states, 5 states have (on average 7.8) internal successors, (39), 4 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:48,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:48,747 INFO L93 Difference]: Finished difference Result 1043 states and 1573 transitions. [2021-10-21 19:47:48,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 19:47:48,748 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 4 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2021-10-21 19:47:48,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:48,760 INFO L225 Difference]: With dead ends: 1043 [2021-10-21 19:47:48,760 INFO L226 Difference]: Without dead ends: 803 [2021-10-21 19:47:48,767 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 37.4ms TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-21 19:47:48,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 803 states. [2021-10-21 19:47:48,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 803 to 775. [2021-10-21 19:47:48,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 775 states, 773 states have (on average 1.4941785252263906) internal successors, (1155), 774 states have internal predecessors, (1155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:48,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 775 states to 775 states and 1155 transitions. [2021-10-21 19:47:48,857 INFO L78 Accepts]: Start accepts. Automaton has 775 states and 1155 transitions. Word has length 39 [2021-10-21 19:47:48,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:48,858 INFO L470 AbstractCegarLoop]: Abstraction has 775 states and 1155 transitions. [2021-10-21 19:47:48,858 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 4 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:48,858 INFO L276 IsEmpty]: Start isEmpty. Operand 775 states and 1155 transitions. [2021-10-21 19:47:48,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2021-10-21 19:47:48,860 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:48,861 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:48,861 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-21 19:47:48,862 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:48,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:48,863 INFO L82 PathProgramCache]: Analyzing trace with hash 1793155390, now seen corresponding path program 1 times [2021-10-21 19:47:48,863 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:48,863 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342995414] [2021-10-21 19:47:48,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:48,864 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:48,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:48,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:47:48,997 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:48,998 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342995414] [2021-10-21 19:47:48,999 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1342995414] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:48,999 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:49,000 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-21 19:47:49,002 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680035443] [2021-10-21 19:47:49,003 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 19:47:49,003 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:49,009 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 19:47:49,009 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:49,010 INFO L87 Difference]: Start difference. First operand 775 states and 1155 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:49,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:49,175 INFO L93 Difference]: Finished difference Result 2611 states and 3903 transitions. [2021-10-21 19:47:49,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 19:47:49,176 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2021-10-21 19:47:49,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:49,193 INFO L225 Difference]: With dead ends: 2611 [2021-10-21 19:47:49,193 INFO L226 Difference]: Without dead ends: 1851 [2021-10-21 19:47:49,196 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 26.9ms TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-21 19:47:49,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1851 states. [2021-10-21 19:47:49,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1851 to 811. [2021-10-21 19:47:49,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 811 states, 809 states have (on average 1.4635352286773795) internal successors, (1184), 810 states have internal predecessors, (1184), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:49,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 811 states to 811 states and 1184 transitions. [2021-10-21 19:47:49,301 INFO L78 Accepts]: Start accepts. Automaton has 811 states and 1184 transitions. Word has length 40 [2021-10-21 19:47:49,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:49,302 INFO L470 AbstractCegarLoop]: Abstraction has 811 states and 1184 transitions. [2021-10-21 19:47:49,302 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:49,302 INFO L276 IsEmpty]: Start isEmpty. Operand 811 states and 1184 transitions. [2021-10-21 19:47:49,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2021-10-21 19:47:49,304 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:49,304 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:49,305 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-21 19:47:49,305 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:49,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:49,306 INFO L82 PathProgramCache]: Analyzing trace with hash 1855195004, now seen corresponding path program 1 times [2021-10-21 19:47:49,306 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:49,307 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552020483] [2021-10-21 19:47:49,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:49,307 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:49,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:49,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:47:49,398 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:49,398 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552020483] [2021-10-21 19:47:49,399 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552020483] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:49,399 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:49,399 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:49,399 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176995759] [2021-10-21 19:47:49,400 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 19:47:49,400 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:49,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 19:47:49,401 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:49,401 INFO L87 Difference]: Start difference. First operand 811 states and 1184 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:49,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:49,671 INFO L93 Difference]: Finished difference Result 2575 states and 3727 transitions. [2021-10-21 19:47:49,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 19:47:49,672 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2021-10-21 19:47:49,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:49,686 INFO L225 Difference]: With dead ends: 2575 [2021-10-21 19:47:49,686 INFO L226 Difference]: Without dead ends: 1781 [2021-10-21 19:47:49,690 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 28.1ms TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-21 19:47:49,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2021-10-21 19:47:49,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1722. [2021-10-21 19:47:49,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1722 states, 1720 states have (on average 1.4255813953488372) internal successors, (2452), 1721 states have internal predecessors, (2452), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:49,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1722 states to 1722 states and 2452 transitions. [2021-10-21 19:47:49,834 INFO L78 Accepts]: Start accepts. Automaton has 1722 states and 2452 transitions. Word has length 40 [2021-10-21 19:47:49,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:49,834 INFO L470 AbstractCegarLoop]: Abstraction has 1722 states and 2452 transitions. [2021-10-21 19:47:49,834 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:49,835 INFO L276 IsEmpty]: Start isEmpty. Operand 1722 states and 2452 transitions. [2021-10-21 19:47:49,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-21 19:47:49,837 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:49,837 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:49,837 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-21 19:47:49,838 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:49,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:49,838 INFO L82 PathProgramCache]: Analyzing trace with hash 1105087616, now seen corresponding path program 1 times [2021-10-21 19:47:49,839 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:49,839 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269086007] [2021-10-21 19:47:49,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:49,839 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:49,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:49,904 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2021-10-21 19:47:49,905 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:49,905 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1269086007] [2021-10-21 19:47:49,905 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1269086007] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:49,905 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:49,906 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-21 19:47:49,906 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606146219] [2021-10-21 19:47:49,906 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-21 19:47:49,907 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:49,907 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-21 19:47:49,908 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:49,908 INFO L87 Difference]: Start difference. First operand 1722 states and 2452 transitions. Second operand has 5 states, 5 states have (on average 8.8) internal successors, (44), 5 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:50,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:50,279 INFO L93 Difference]: Finished difference Result 5626 states and 8070 transitions. [2021-10-21 19:47:50,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-21 19:47:50,280 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.8) internal successors, (44), 5 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-21 19:47:50,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:50,309 INFO L225 Difference]: With dead ends: 5626 [2021-10-21 19:47:50,309 INFO L226 Difference]: Without dead ends: 3926 [2021-10-21 19:47:50,313 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 22.5ms TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-21 19:47:50,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3926 states. [2021-10-21 19:47:50,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3926 to 1830. [2021-10-21 19:47:50,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1830 states, 1828 states have (on average 1.3966083150984683) internal successors, (2553), 1829 states have internal predecessors, (2553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:50,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1830 states to 1830 states and 2553 transitions. [2021-10-21 19:47:50,497 INFO L78 Accepts]: Start accepts. Automaton has 1830 states and 2553 transitions. Word has length 53 [2021-10-21 19:47:50,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:50,498 INFO L470 AbstractCegarLoop]: Abstraction has 1830 states and 2553 transitions. [2021-10-21 19:47:50,498 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.8) internal successors, (44), 5 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:50,498 INFO L276 IsEmpty]: Start isEmpty. Operand 1830 states and 2553 transitions. [2021-10-21 19:47:50,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-21 19:47:50,499 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:50,500 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:50,500 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-21 19:47:50,500 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:50,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:50,501 INFO L82 PathProgramCache]: Analyzing trace with hash 1379847230, now seen corresponding path program 1 times [2021-10-21 19:47:50,501 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:50,501 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588213531] [2021-10-21 19:47:50,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:50,502 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:50,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:50,556 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2021-10-21 19:47:50,557 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:50,557 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588213531] [2021-10-21 19:47:50,557 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [588213531] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:50,558 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:50,558 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:50,558 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [713980666] [2021-10-21 19:47:50,559 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:47:50,559 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:50,559 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:47:50,560 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:47:50,560 INFO L87 Difference]: Start difference. First operand 1830 states and 2553 transitions. Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:50,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:50,908 INFO L93 Difference]: Finished difference Result 5113 states and 7076 transitions. [2021-10-21 19:47:50,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 19:47:50,908 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-21 19:47:50,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:50,931 INFO L225 Difference]: With dead ends: 5113 [2021-10-21 19:47:50,931 INFO L226 Difference]: Without dead ends: 3307 [2021-10-21 19:47:50,935 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 11.1ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:50,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3307 states. [2021-10-21 19:47:51,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3307 to 2257. [2021-10-21 19:47:51,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2257 states, 2255 states have (on average 1.3605321507760533) internal successors, (3068), 2256 states have internal predecessors, (3068), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:51,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2257 states to 2257 states and 3068 transitions. [2021-10-21 19:47:51,175 INFO L78 Accepts]: Start accepts. Automaton has 2257 states and 3068 transitions. Word has length 53 [2021-10-21 19:47:51,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:51,175 INFO L470 AbstractCegarLoop]: Abstraction has 2257 states and 3068 transitions. [2021-10-21 19:47:51,176 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:51,176 INFO L276 IsEmpty]: Start isEmpty. Operand 2257 states and 3068 transitions. [2021-10-21 19:47:51,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-21 19:47:51,177 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:51,177 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:51,178 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-21 19:47:51,178 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:51,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:51,178 INFO L82 PathProgramCache]: Analyzing trace with hash 1402479484, now seen corresponding path program 1 times [2021-10-21 19:47:51,179 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:51,179 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800209358] [2021-10-21 19:47:51,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:51,179 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:51,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:51,231 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-10-21 19:47:51,232 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:51,232 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800209358] [2021-10-21 19:47:51,232 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1800209358] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:51,232 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:51,233 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:47:51,233 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064229800] [2021-10-21 19:47:51,233 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:47:51,234 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:51,234 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:47:51,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:51,235 INFO L87 Difference]: Start difference. First operand 2257 states and 3068 transitions. Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:51,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:51,594 INFO L93 Difference]: Finished difference Result 6563 states and 8862 transitions. [2021-10-21 19:47:51,594 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:47:51,594 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-21 19:47:51,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:51,621 INFO L225 Difference]: With dead ends: 6563 [2021-10-21 19:47:51,622 INFO L226 Difference]: Without dead ends: 4346 [2021-10-21 19:47:51,626 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:51,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4346 states. [2021-10-21 19:47:51,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4346 to 4342. [2021-10-21 19:47:51,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4342 states, 4340 states have (on average 1.3253456221198157) internal successors, (5752), 4341 states have internal predecessors, (5752), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:52,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4342 states to 4342 states and 5752 transitions. [2021-10-21 19:47:52,013 INFO L78 Accepts]: Start accepts. Automaton has 4342 states and 5752 transitions. Word has length 53 [2021-10-21 19:47:52,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:52,014 INFO L470 AbstractCegarLoop]: Abstraction has 4342 states and 5752 transitions. [2021-10-21 19:47:52,014 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:52,014 INFO L276 IsEmpty]: Start isEmpty. Operand 4342 states and 5752 transitions. [2021-10-21 19:47:52,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-21 19:47:52,016 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:52,017 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:52,017 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-21 19:47:52,017 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:52,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:52,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1150705430, now seen corresponding path program 1 times [2021-10-21 19:47:52,019 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:52,019 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270188125] [2021-10-21 19:47:52,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:52,021 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:52,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:52,105 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:47:52,106 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:52,106 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270188125] [2021-10-21 19:47:52,106 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1270188125] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:52,106 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:52,107 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:52,107 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6036215] [2021-10-21 19:47:52,108 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:47:52,108 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:52,109 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:47:52,109 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:47:52,109 INFO L87 Difference]: Start difference. First operand 4342 states and 5752 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:52,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:52,751 INFO L93 Difference]: Finished difference Result 12792 states and 16918 transitions. [2021-10-21 19:47:52,751 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:47:52,752 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-21 19:47:52,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:52,807 INFO L225 Difference]: With dead ends: 12792 [2021-10-21 19:47:52,808 INFO L226 Difference]: Without dead ends: 8525 [2021-10-21 19:47:52,817 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 11.1ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:52,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8525 states. [2021-10-21 19:47:53,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8525 to 8521. [2021-10-21 19:47:53,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8521 states, 8519 states have (on average 1.3077826035919708) internal successors, (11141), 8520 states have internal predecessors, (11141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:53,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8521 states to 8521 states and 11141 transitions. [2021-10-21 19:47:53,548 INFO L78 Accepts]: Start accepts. Automaton has 8521 states and 11141 transitions. Word has length 55 [2021-10-21 19:47:53,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:53,549 INFO L470 AbstractCegarLoop]: Abstraction has 8521 states and 11141 transitions. [2021-10-21 19:47:53,549 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:53,550 INFO L276 IsEmpty]: Start isEmpty. Operand 8521 states and 11141 transitions. [2021-10-21 19:47:53,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-10-21 19:47:53,554 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:53,554 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:53,555 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-21 19:47:53,555 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:53,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:53,556 INFO L82 PathProgramCache]: Analyzing trace with hash 216468379, now seen corresponding path program 1 times [2021-10-21 19:47:53,556 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:53,556 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141167902] [2021-10-21 19:47:53,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:53,557 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:53,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:53,666 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:47:53,666 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:53,666 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141167902] [2021-10-21 19:47:53,667 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141167902] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:53,667 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:53,667 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:53,667 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002808846] [2021-10-21 19:47:53,668 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:47:53,668 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:53,669 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:47:53,669 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:47:53,669 INFO L87 Difference]: Start difference. First operand 8521 states and 11141 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:54,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:54,352 INFO L93 Difference]: Finished difference Result 16387 states and 21487 transitions. [2021-10-21 19:47:54,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:47:54,353 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2021-10-21 19:47:54,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:54,384 INFO L225 Difference]: With dead ends: 16387 [2021-10-21 19:47:54,385 INFO L226 Difference]: Without dead ends: 8336 [2021-10-21 19:47:54,398 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 10.7ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:54,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8336 states. [2021-10-21 19:47:54,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8336 to 8324. [2021-10-21 19:47:54,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8324 states, 8322 states have (on average 1.2904349915885605) internal successors, (10739), 8323 states have internal predecessors, (10739), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:54,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8324 states to 8324 states and 10739 transitions. [2021-10-21 19:47:54,913 INFO L78 Accepts]: Start accepts. Automaton has 8324 states and 10739 transitions. Word has length 61 [2021-10-21 19:47:54,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:54,914 INFO L470 AbstractCegarLoop]: Abstraction has 8324 states and 10739 transitions. [2021-10-21 19:47:54,914 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:54,914 INFO L276 IsEmpty]: Start isEmpty. Operand 8324 states and 10739 transitions. [2021-10-21 19:47:54,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2021-10-21 19:47:54,921 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:54,921 INFO L512 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:54,921 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-21 19:47:54,922 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:54,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:54,922 INFO L82 PathProgramCache]: Analyzing trace with hash 918521819, now seen corresponding path program 1 times [2021-10-21 19:47:54,922 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:54,923 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2059905141] [2021-10-21 19:47:54,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:54,923 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:54,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:54,980 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-10-21 19:47:54,981 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:54,981 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2059905141] [2021-10-21 19:47:54,981 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2059905141] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:54,981 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:54,981 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:47:54,982 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2047649769] [2021-10-21 19:47:54,982 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:47:54,982 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:54,983 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:47:54,983 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:47:54,983 INFO L87 Difference]: Start difference. First operand 8324 states and 10739 transitions. Second operand has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:55,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:55,546 INFO L93 Difference]: Finished difference Result 14098 states and 18169 transitions. [2021-10-21 19:47:55,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-10-21 19:47:55,547 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 96 [2021-10-21 19:47:55,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:55,565 INFO L225 Difference]: With dead ends: 14098 [2021-10-21 19:47:55,565 INFO L226 Difference]: Without dead ends: 5883 [2021-10-21 19:47:55,578 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 68.4ms TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2021-10-21 19:47:55,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5883 states. [2021-10-21 19:47:55,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5883 to 5191. [2021-10-21 19:47:55,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5191 states, 5189 states have (on average 1.2900366159182888) internal successors, (6694), 5190 states have internal predecessors, (6694), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:56,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5191 states to 5191 states and 6694 transitions. [2021-10-21 19:47:56,007 INFO L78 Accepts]: Start accepts. Automaton has 5191 states and 6694 transitions. Word has length 96 [2021-10-21 19:47:56,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:56,009 INFO L470 AbstractCegarLoop]: Abstraction has 5191 states and 6694 transitions. [2021-10-21 19:47:56,010 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.666666666666666) internal successors, (94), 6 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:56,010 INFO L276 IsEmpty]: Start isEmpty. Operand 5191 states and 6694 transitions. [2021-10-21 19:47:56,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2021-10-21 19:47:56,022 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:56,022 INFO L512 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:56,022 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-21 19:47:56,023 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:56,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:56,024 INFO L82 PathProgramCache]: Analyzing trace with hash 1430687950, now seen corresponding path program 1 times [2021-10-21 19:47:56,024 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:56,026 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [525282006] [2021-10-21 19:47:56,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:56,027 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:56,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:56,110 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-21 19:47:56,111 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:56,111 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [525282006] [2021-10-21 19:47:56,111 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [525282006] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:56,112 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:56,112 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:56,112 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380036249] [2021-10-21 19:47:56,113 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:47:56,113 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:56,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:47:56,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:47:56,115 INFO L87 Difference]: Start difference. First operand 5191 states and 6694 transitions. Second operand has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:56,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:56,642 INFO L93 Difference]: Finished difference Result 11504 states and 14819 transitions. [2021-10-21 19:47:56,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-21 19:47:56,643 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 99 [2021-10-21 19:47:56,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:56,668 INFO L225 Difference]: With dead ends: 11504 [2021-10-21 19:47:56,669 INFO L226 Difference]: Without dead ends: 6164 [2021-10-21 19:47:56,678 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.5ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:56,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6164 states. [2021-10-21 19:47:57,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6164 to 4506. [2021-10-21 19:47:57,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4506 states, 4504 states have (on average 1.2821936056838366) internal successors, (5775), 4505 states have internal predecessors, (5775), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:57,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4506 states to 4506 states and 5775 transitions. [2021-10-21 19:47:57,130 INFO L78 Accepts]: Start accepts. Automaton has 4506 states and 5775 transitions. Word has length 99 [2021-10-21 19:47:57,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:57,131 INFO L470 AbstractCegarLoop]: Abstraction has 4506 states and 5775 transitions. [2021-10-21 19:47:57,131 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:57,132 INFO L276 IsEmpty]: Start isEmpty. Operand 4506 states and 5775 transitions. [2021-10-21 19:47:57,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2021-10-21 19:47:57,136 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:57,136 INFO L512 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:57,137 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-21 19:47:57,137 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:57,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:57,138 INFO L82 PathProgramCache]: Analyzing trace with hash -661247030, now seen corresponding path program 1 times [2021-10-21 19:47:57,138 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:57,139 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337524978] [2021-10-21 19:47:57,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:57,139 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:57,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:57,190 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-21 19:47:57,190 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:57,191 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337524978] [2021-10-21 19:47:57,191 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [337524978] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:57,191 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:57,191 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:57,192 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724903220] [2021-10-21 19:47:57,192 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:47:57,193 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:57,193 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:47:57,194 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:47:57,194 INFO L87 Difference]: Start difference. First operand 4506 states and 5775 transitions. Second operand has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:57,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:57,696 INFO L93 Difference]: Finished difference Result 9550 states and 12213 transitions. [2021-10-21 19:47:57,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 19:47:57,697 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 99 [2021-10-21 19:47:57,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:57,711 INFO L225 Difference]: With dead ends: 9550 [2021-10-21 19:47:57,711 INFO L226 Difference]: Without dead ends: 5324 [2021-10-21 19:47:57,719 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 11.0ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:57,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5324 states. [2021-10-21 19:47:58,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5324 to 4502. [2021-10-21 19:47:58,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4502 states, 4500 states have (on average 1.2684444444444445) internal successors, (5708), 4501 states have internal predecessors, (5708), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:58,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4502 states to 4502 states and 5708 transitions. [2021-10-21 19:47:58,054 INFO L78 Accepts]: Start accepts. Automaton has 4502 states and 5708 transitions. Word has length 99 [2021-10-21 19:47:58,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:58,055 INFO L470 AbstractCegarLoop]: Abstraction has 4502 states and 5708 transitions. [2021-10-21 19:47:58,055 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:58,055 INFO L276 IsEmpty]: Start isEmpty. Operand 4502 states and 5708 transitions. [2021-10-21 19:47:58,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2021-10-21 19:47:58,059 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:58,059 INFO L512 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:58,059 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-21 19:47:58,059 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:58,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:58,060 INFO L82 PathProgramCache]: Analyzing trace with hash -1763595376, now seen corresponding path program 1 times [2021-10-21 19:47:58,060 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:58,061 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99976724] [2021-10-21 19:47:58,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:58,061 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:58,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:58,087 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-21 19:47:58,087 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:58,087 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [99976724] [2021-10-21 19:47:58,087 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [99976724] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:58,088 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:58,088 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:47:58,088 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476431084] [2021-10-21 19:47:58,089 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:47:58,089 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:58,089 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:47:58,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:58,090 INFO L87 Difference]: Start difference. First operand 4502 states and 5708 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:58,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:58,373 INFO L93 Difference]: Finished difference Result 8614 states and 10969 transitions. [2021-10-21 19:47:58,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:47:58,374 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 99 [2021-10-21 19:47:58,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:58,384 INFO L225 Difference]: With dead ends: 8614 [2021-10-21 19:47:58,384 INFO L226 Difference]: Without dead ends: 4315 [2021-10-21 19:47:58,391 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:58,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4315 states. [2021-10-21 19:47:58,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4315 to 4315. [2021-10-21 19:47:58,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4315 states, 4313 states have (on average 1.272432181776026) internal successors, (5488), 4314 states have internal predecessors, (5488), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:58,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4315 states to 4315 states and 5488 transitions. [2021-10-21 19:47:58,744 INFO L78 Accepts]: Start accepts. Automaton has 4315 states and 5488 transitions. Word has length 99 [2021-10-21 19:47:58,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:58,745 INFO L470 AbstractCegarLoop]: Abstraction has 4315 states and 5488 transitions. [2021-10-21 19:47:58,745 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:58,745 INFO L276 IsEmpty]: Start isEmpty. Operand 4315 states and 5488 transitions. [2021-10-21 19:47:58,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2021-10-21 19:47:58,747 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:58,748 INFO L512 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:58,748 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-21 19:47:58,748 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:58,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:58,749 INFO L82 PathProgramCache]: Analyzing trace with hash -1242360231, now seen corresponding path program 1 times [2021-10-21 19:47:58,749 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:58,749 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535392027] [2021-10-21 19:47:58,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:58,749 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:58,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:58,799 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-21 19:47:58,799 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:58,799 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535392027] [2021-10-21 19:47:58,800 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [535392027] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:58,800 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:58,800 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:47:58,800 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736880399] [2021-10-21 19:47:58,801 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:47:58,801 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:58,801 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:47:58,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:58,802 INFO L87 Difference]: Start difference. First operand 4315 states and 5488 transitions. Second operand has 3 states, 3 states have (on average 34.0) internal successors, (102), 3 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:59,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:59,072 INFO L93 Difference]: Finished difference Result 8241 states and 10504 transitions. [2021-10-21 19:47:59,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:47:59,072 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 34.0) internal successors, (102), 3 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 102 [2021-10-21 19:47:59,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:59,081 INFO L225 Difference]: With dead ends: 8241 [2021-10-21 19:47:59,081 INFO L226 Difference]: Without dead ends: 4019 [2021-10-21 19:47:59,087 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:47:59,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4019 states. [2021-10-21 19:47:59,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4019 to 3964. [2021-10-21 19:47:59,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3964 states, 3962 states have (on average 1.256688541140838) internal successors, (4979), 3963 states have internal predecessors, (4979), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:59,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3964 states to 3964 states and 4979 transitions. [2021-10-21 19:47:59,348 INFO L78 Accepts]: Start accepts. Automaton has 3964 states and 4979 transitions. Word has length 102 [2021-10-21 19:47:59,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:59,349 INFO L470 AbstractCegarLoop]: Abstraction has 3964 states and 4979 transitions. [2021-10-21 19:47:59,349 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 34.0) internal successors, (102), 3 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:59,349 INFO L276 IsEmpty]: Start isEmpty. Operand 3964 states and 4979 transitions. [2021-10-21 19:47:59,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2021-10-21 19:47:59,351 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:59,351 INFO L512 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:59,352 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-21 19:47:59,352 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:59,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:59,352 INFO L82 PathProgramCache]: Analyzing trace with hash -310429394, now seen corresponding path program 1 times [2021-10-21 19:47:59,353 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:59,353 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341715148] [2021-10-21 19:47:59,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:59,353 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:59,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:47:59,391 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-21 19:47:59,391 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:47:59,392 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341715148] [2021-10-21 19:47:59,392 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1341715148] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:47:59,392 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:47:59,392 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-21 19:47:59,392 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539188529] [2021-10-21 19:47:59,393 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-21 19:47:59,393 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:47:59,393 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-21 19:47:59,394 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-21 19:47:59,394 INFO L87 Difference]: Start difference. First operand 3964 states and 4979 transitions. Second operand has 4 states, 4 states have (on average 24.75) internal successors, (99), 4 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:59,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:47:59,709 INFO L93 Difference]: Finished difference Result 8837 states and 11043 transitions. [2021-10-21 19:47:59,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-21 19:47:59,710 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 24.75) internal successors, (99), 4 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 103 [2021-10-21 19:47:59,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:47:59,716 INFO L225 Difference]: With dead ends: 8837 [2021-10-21 19:47:59,717 INFO L226 Difference]: Without dead ends: 4968 [2021-10-21 19:47:59,722 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-21 19:47:59,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4968 states. [2021-10-21 19:47:59,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4968 to 3935. [2021-10-21 19:47:59,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3935 states, 3933 states have (on average 1.2346809051614545) internal successors, (4856), 3934 states have internal predecessors, (4856), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:59,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3935 states to 3935 states and 4856 transitions. [2021-10-21 19:47:59,979 INFO L78 Accepts]: Start accepts. Automaton has 3935 states and 4856 transitions. Word has length 103 [2021-10-21 19:47:59,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:47:59,979 INFO L470 AbstractCegarLoop]: Abstraction has 3935 states and 4856 transitions. [2021-10-21 19:47:59,979 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 24.75) internal successors, (99), 4 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:47:59,980 INFO L276 IsEmpty]: Start isEmpty. Operand 3935 states and 4856 transitions. [2021-10-21 19:47:59,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2021-10-21 19:47:59,982 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:47:59,983 INFO L512 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:47:59,983 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-21 19:47:59,983 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:47:59,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:47:59,984 INFO L82 PathProgramCache]: Analyzing trace with hash 291943753, now seen corresponding path program 1 times [2021-10-21 19:47:59,984 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:47:59,984 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823962249] [2021-10-21 19:47:59,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:47:59,985 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:47:59,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:48:00,034 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-21 19:48:00,034 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:48:00,035 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823962249] [2021-10-21 19:48:00,035 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [823962249] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:48:00,035 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:48:00,035 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-21 19:48:00,036 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181367100] [2021-10-21 19:48:00,036 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:48:00,036 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:48:00,037 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:48:00,037 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:00,037 INFO L87 Difference]: Start difference. First operand 3935 states and 4856 transitions. Second operand has 3 states, 3 states have (on average 38.333333333333336) internal successors, (115), 2 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:00,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:48:00,499 INFO L93 Difference]: Finished difference Result 9904 states and 12174 transitions. [2021-10-21 19:48:00,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:48:00,500 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 38.333333333333336) internal successors, (115), 2 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 119 [2021-10-21 19:48:00,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:48:00,513 INFO L225 Difference]: With dead ends: 9904 [2021-10-21 19:48:00,514 INFO L226 Difference]: Without dead ends: 6064 [2021-10-21 19:48:00,521 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:00,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6064 states. [2021-10-21 19:48:01,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6064 to 6060. [2021-10-21 19:48:01,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6060 states, 6058 states have (on average 1.2198745460548035) internal successors, (7390), 6059 states have internal predecessors, (7390), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:01,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6060 states to 6060 states and 7390 transitions. [2021-10-21 19:48:01,229 INFO L78 Accepts]: Start accepts. Automaton has 6060 states and 7390 transitions. Word has length 119 [2021-10-21 19:48:01,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:48:01,229 INFO L470 AbstractCegarLoop]: Abstraction has 6060 states and 7390 transitions. [2021-10-21 19:48:01,230 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 38.333333333333336) internal successors, (115), 2 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:01,230 INFO L276 IsEmpty]: Start isEmpty. Operand 6060 states and 7390 transitions. [2021-10-21 19:48:01,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2021-10-21 19:48:01,238 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:48:01,238 INFO L512 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:48:01,239 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-21 19:48:01,239 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:48:01,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:48:01,240 INFO L82 PathProgramCache]: Analyzing trace with hash -368834209, now seen corresponding path program 1 times [2021-10-21 19:48:01,240 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:48:01,240 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799200346] [2021-10-21 19:48:01,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:48:01,241 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:48:01,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:48:01,298 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2021-10-21 19:48:01,298 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:48:01,298 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799200346] [2021-10-21 19:48:01,299 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [799200346] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:48:01,299 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:48:01,299 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:48:01,299 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [603287426] [2021-10-21 19:48:01,300 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:48:01,301 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:48:01,302 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:48:01,302 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:01,302 INFO L87 Difference]: Start difference. First operand 6060 states and 7390 transitions. Second operand has 3 states, 3 states have (on average 45.0) internal successors, (135), 3 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:01,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:48:01,867 INFO L93 Difference]: Finished difference Result 12037 states and 14689 transitions. [2021-10-21 19:48:01,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:48:01,868 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 45.0) internal successors, (135), 3 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2021-10-21 19:48:01,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:48:01,882 INFO L225 Difference]: With dead ends: 12037 [2021-10-21 19:48:01,891 INFO L226 Difference]: Without dead ends: 6060 [2021-10-21 19:48:01,902 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:01,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6060 states. [2021-10-21 19:48:02,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6060 to 5836. [2021-10-21 19:48:02,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5836 states, 5834 states have (on average 1.207919094960576) internal successors, (7047), 5835 states have internal predecessors, (7047), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:02,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5836 states to 5836 states and 7047 transitions. [2021-10-21 19:48:02,418 INFO L78 Accepts]: Start accepts. Automaton has 5836 states and 7047 transitions. Word has length 179 [2021-10-21 19:48:02,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:48:02,419 INFO L470 AbstractCegarLoop]: Abstraction has 5836 states and 7047 transitions. [2021-10-21 19:48:02,419 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 45.0) internal successors, (135), 3 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:02,419 INFO L276 IsEmpty]: Start isEmpty. Operand 5836 states and 7047 transitions. [2021-10-21 19:48:02,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2021-10-21 19:48:02,426 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:48:02,426 INFO L512 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:48:02,427 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-21 19:48:02,427 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:48:02,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:48:02,428 INFO L82 PathProgramCache]: Analyzing trace with hash -1199487843, now seen corresponding path program 1 times [2021-10-21 19:48:02,428 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:48:02,428 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919240856] [2021-10-21 19:48:02,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:48:02,428 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:48:02,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:48:02,457 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2021-10-21 19:48:02,458 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:48:02,458 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919240856] [2021-10-21 19:48:02,458 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [919240856] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:48:02,458 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:48:02,459 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:48:02,459 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737326970] [2021-10-21 19:48:02,459 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:48:02,459 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:48:02,460 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:48:02,460 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:02,461 INFO L87 Difference]: Start difference. First operand 5836 states and 7047 transitions. Second operand has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:03,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:48:03,025 INFO L93 Difference]: Finished difference Result 11417 states and 13819 transitions. [2021-10-21 19:48:03,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:48:03,026 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2021-10-21 19:48:03,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:48:03,037 INFO L225 Difference]: With dead ends: 11417 [2021-10-21 19:48:03,037 INFO L226 Difference]: Without dead ends: 5644 [2021-10-21 19:48:03,046 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:03,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5644 states. [2021-10-21 19:48:03,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5644 to 5644. [2021-10-21 19:48:03,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5644 states, 5642 states have (on average 1.2121588089330024) internal successors, (6839), 5643 states have internal predecessors, (6839), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:03,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5644 states to 5644 states and 6839 transitions. [2021-10-21 19:48:03,423 INFO L78 Accepts]: Start accepts. Automaton has 5644 states and 6839 transitions. Word has length 179 [2021-10-21 19:48:03,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:48:03,424 INFO L470 AbstractCegarLoop]: Abstraction has 5644 states and 6839 transitions. [2021-10-21 19:48:03,424 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:03,424 INFO L276 IsEmpty]: Start isEmpty. Operand 5644 states and 6839 transitions. [2021-10-21 19:48:03,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2021-10-21 19:48:03,432 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:48:03,433 INFO L512 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:48:03,433 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-21 19:48:03,433 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:48:03,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:48:03,434 INFO L82 PathProgramCache]: Analyzing trace with hash 1582627211, now seen corresponding path program 1 times [2021-10-21 19:48:03,434 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:48:03,435 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727007912] [2021-10-21 19:48:03,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:48:03,435 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:48:03,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:48:03,498 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 70 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2021-10-21 19:48:03,498 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:48:03,499 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727007912] [2021-10-21 19:48:03,499 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [727007912] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:48:03,499 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:48:03,499 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-21 19:48:03,499 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140318222] [2021-10-21 19:48:03,501 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-21 19:48:03,501 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:48:03,502 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-21 19:48:03,502 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-21 19:48:03,502 INFO L87 Difference]: Start difference. First operand 5644 states and 6839 transitions. Second operand has 6 states, 6 states have (on average 26.833333333333332) internal successors, (161), 6 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:04,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:48:04,129 INFO L93 Difference]: Finished difference Result 12580 states and 15232 transitions. [2021-10-21 19:48:04,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-10-21 19:48:04,130 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 26.833333333333332) internal successors, (161), 6 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 183 [2021-10-21 19:48:04,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:48:04,143 INFO L225 Difference]: With dead ends: 12580 [2021-10-21 19:48:04,143 INFO L226 Difference]: Without dead ends: 6999 [2021-10-21 19:48:04,151 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 52.4ms TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-10-21 19:48:04,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6999 states. [2021-10-21 19:48:04,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6999 to 5392. [2021-10-21 19:48:04,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5392 states, 5390 states have (on average 1.2001855287569574) internal successors, (6469), 5391 states have internal predecessors, (6469), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:04,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5392 states to 5392 states and 6469 transitions. [2021-10-21 19:48:04,669 INFO L78 Accepts]: Start accepts. Automaton has 5392 states and 6469 transitions. Word has length 183 [2021-10-21 19:48:04,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:48:04,669 INFO L470 AbstractCegarLoop]: Abstraction has 5392 states and 6469 transitions. [2021-10-21 19:48:04,669 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 26.833333333333332) internal successors, (161), 6 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:04,670 INFO L276 IsEmpty]: Start isEmpty. Operand 5392 states and 6469 transitions. [2021-10-21 19:48:04,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2021-10-21 19:48:04,676 INFO L504 BasicCegarLoop]: Found error trace [2021-10-21 19:48:04,677 INFO L512 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-21 19:48:04,677 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-21 19:48:04,677 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-21 19:48:04,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-21 19:48:04,678 INFO L82 PathProgramCache]: Analyzing trace with hash 646872823, now seen corresponding path program 1 times [2021-10-21 19:48:04,678 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-21 19:48:04,678 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642203257] [2021-10-21 19:48:04,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-21 19:48:04,679 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-21 19:48:04,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-21 19:48:04,723 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 73 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2021-10-21 19:48:04,723 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-21 19:48:04,723 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642203257] [2021-10-21 19:48:04,724 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1642203257] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-21 19:48:04,724 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-21 19:48:04,724 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-21 19:48:04,724 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707793501] [2021-10-21 19:48:04,725 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-21 19:48:04,725 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-21 19:48:04,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-21 19:48:04,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:04,726 INFO L87 Difference]: Start difference. First operand 5392 states and 6469 transitions. Second operand has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:05,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-21 19:48:05,004 INFO L93 Difference]: Finished difference Result 7992 states and 9637 transitions. [2021-10-21 19:48:05,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-21 19:48:05,005 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 183 [2021-10-21 19:48:05,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-21 19:48:05,005 INFO L225 Difference]: With dead ends: 7992 [2021-10-21 19:48:05,005 INFO L226 Difference]: Without dead ends: 0 [2021-10-21 19:48:05,011 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-21 19:48:05,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2021-10-21 19:48:05,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2021-10-21 19:48:05,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:05,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2021-10-21 19:48:05,012 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 183 [2021-10-21 19:48:05,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-21 19:48:05,012 INFO L470 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2021-10-21 19:48:05,013 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-21 19:48:05,013 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2021-10-21 19:48:05,013 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2021-10-21 19:48:05,016 INFO L764 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:48:05,017 INFO L764 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-21 19:48:05,017 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-21 19:48:05,020 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2021-10-21 19:48:05,040 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:05,554 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:05,800 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:06,000 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:06,197 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:06,690 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:07,693 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:07,696 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,011 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,015 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,324 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,329 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,332 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,436 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,439 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,891 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:08,985 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:09,095 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:09,373 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:09,476 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:10,104 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:10,292 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:10,396 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:10,453 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:10,456 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:11,106 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:11,263 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:11,268 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:11,800 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:11,969 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,142 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,147 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,187 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,188 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,190 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,281 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,283 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,483 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,552 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,610 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,813 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,942 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:12,946 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout 10000 ms and remaining time -1 ms [2021-10-21 19:48:24,513 INFO L857 garLoopResultBuilder]: For program point L68-3(lines 68 77) no Hoare annotation was computed. [2021-10-21 19:48:24,513 INFO L857 garLoopResultBuilder]: For program point L68-5(lines 68 77) no Hoare annotation was computed. [2021-10-21 19:48:24,514 INFO L857 garLoopResultBuilder]: For program point ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION(line 11) no Hoare annotation was computed. [2021-10-21 19:48:24,514 INFO L853 garLoopResultBuilder]: At program point L465(lines 449 467) the Hoare annotation is: (let ((.cse11 (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (.cse13 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (.cse14 (not (= ULTIMATE.start_activate_threads_~tmp~1 0))) (.cse15 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse16 (= ~q_req_up~0 0)) (.cse17 (= ~q_read_ev~0 2)) (.cse0 (not (= ~q_write_ev~0 0))) (.cse1 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (not (= ~p_dw_pc~0 1))) (.cse12 (= ~t~0 0)) (.cse7 (= ~p_dw_i~0 1)) (.cse8 (not (= ~q_write_ev~0 1))) (.cse9 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse11 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse7 .cse8 .cse9 .cse10) (and .cse11 .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse2 .cse16 .cse6 .cse17 (not .cse5) .cse8) (and .cse15 .cse0 .cse2 .cse3 .cse5 .cse7 .cse8 .cse9 .cse10) (and .cse15 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse16 .cse6 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse17 .cse8 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse3 .cse4 .cse5 .cse6 .cse12 .cse7 .cse8 .cse9 .cse10))) [2021-10-21 19:48:24,515 INFO L857 garLoopResultBuilder]: For program point L69(lines 69 74) no Hoare annotation was computed. [2021-10-21 19:48:24,515 INFO L857 garLoopResultBuilder]: For program point L69-1(lines 69 74) no Hoare annotation was computed. [2021-10-21 19:48:24,515 INFO L857 garLoopResultBuilder]: For program point L69-2(lines 69 74) no Hoare annotation was computed. [2021-10-21 19:48:24,515 INFO L857 garLoopResultBuilder]: For program point L203(line 203) no Hoare annotation was computed. [2021-10-21 19:48:24,515 INFO L857 garLoopResultBuilder]: For program point L303-1(lines 302 315) no Hoare annotation was computed. [2021-10-21 19:48:24,516 INFO L853 garLoopResultBuilder]: At program point L270-1(lines 303 307) the Hoare annotation is: (let ((.cse3 (= ~p_dw_st~0 0)) (.cse1 (= ~q_write_ev~0 ~q_read_ev~0)) (.cse0 (= ~c_dr_st~0 0)) (.cse2 (= ~q_req_up~0 0)) (.cse4 (= ~q_read_ev~0 2)) (.cse5 (= ~q_req_up~0 ~p_dw_pc~0)) (.cse6 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse0 .cse1 (= 1 ~c_dr_i~0) .cse2 (= ~t~0 0) .cse3 .cse4 (= ~p_dw_i~0 1) .cse5 .cse6 (= ~q_read_ev~0 ~fast_clk_edge~0)) (and (not .cse3) .cse1 (not .cse0) .cse2 .cse4 .cse5 .cse6))) [2021-10-21 19:48:24,516 INFO L857 garLoopResultBuilder]: For program point L303-2(lines 303 307) no Hoare annotation was computed. [2021-10-21 19:48:24,516 INFO L857 garLoopResultBuilder]: For program point L303-4(lines 302 315) no Hoare annotation was computed. [2021-10-21 19:48:24,516 INFO L857 garLoopResultBuilder]: For program point L502(lines 502 511) no Hoare annotation was computed. [2021-10-21 19:48:24,516 INFO L853 garLoopResultBuilder]: At program point L502-1(lines 502 511) the Hoare annotation is: (let ((.cse0 (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (.cse5 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (.cse6 (not (= ULTIMATE.start_activate_threads_~tmp~1 0))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (= 1 ~c_dr_i~0)) (.cse3 (= ~c_dr_pc~0 1)) (.cse4 (= ~t~0 0)) (.cse7 (= ~p_dw_i~0 1)) (.cse9 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1))) (.cse12 (not (= ~p_dw_st~0 0))) (.cse11 (not (= ~c_dr_st~0 0))) (.cse13 (= ~q_req_up~0 0)) (.cse14 (not (= ~p_dw_pc~0 1))) (.cse15 (= ~q_read_ev~0 2)) (.cse8 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse0 .cse1 .cse11 .cse2 .cse3 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse12 .cse1 .cse2 .cse3 .cse4 .cse7 .cse8 .cse9 .cse10) (and .cse12 .cse1 .cse11 .cse13 .cse14 .cse15 (not .cse3) .cse8) (and .cse12 .cse1 .cse11 .cse2 .cse3 .cse7 .cse8 .cse9 .cse10) (and .cse1 .cse11 .cse2 .cse3 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse1 .cse2 .cse3 .cse14 .cse4 .cse7 .cse8 .cse9 .cse10) (and .cse12 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse11 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse13 .cse14 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse15 .cse8 (= ~c_dr_pc~0 ~q_req_up~0)))) [2021-10-21 19:48:24,517 INFO L857 garLoopResultBuilder]: For program point L403(line 403) no Hoare annotation was computed. [2021-10-21 19:48:24,517 INFO L857 garLoopResultBuilder]: For program point L141(lines 141 153) no Hoare annotation was computed. [2021-10-21 19:48:24,517 INFO L853 garLoopResultBuilder]: At program point L108(lines 86 110) the Hoare annotation is: (let ((.cse5 (= ~p_dw_st~0 0)) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse2 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse0 (= ~c_dr_st~0 0)) (.cse3 (= ~q_req_up~0 0)) (.cse4 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) (.cse6 (= ~q_read_ev~0 2)) (.cse7 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse8 (= ~q_req_up~0 ~p_dw_pc~0)) (.cse9 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse0 .cse1 (= ~q_write_ev~0 ~q_read_ev~0) .cse2 (= 1 ~c_dr_i~0) .cse3 .cse4 (= ~t~0 0) .cse5 .cse6 (= ~p_dw_i~0 1) .cse7 .cse8 .cse9 (= ~q_read_ev~0 ~fast_clk_edge~0)) (and (not .cse5) .cse1 .cse2 (not .cse0) .cse3 .cse4 .cse6 .cse7 .cse8 .cse9))) [2021-10-21 19:48:24,517 INFO L853 garLoopResultBuilder]: At program point L108-1(lines 86 110) the Hoare annotation is: (let ((.cse18 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse15 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse16 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse0 (not .cse16)) (.cse7 (not .cse15)) (.cse8 (not .cse18)) (.cse4 (= 1 ~c_dr_i~0)) (.cse9 (= ~p_dw_i~0 1)) (.cse10 (not (= ~q_write_ev~0 1))) (.cse11 (not (= ~slow_clk_edge~0 1))) (.cse12 (not (= ~fast_clk_edge~0 1))) (.cse13 (not (= ~p_dw_st~0 0))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse3 (not (= ~c_dr_st~0 0))) (.cse14 (= ~q_req_up~0 0)) (.cse6 (not (= ~p_dw_pc~0 1))) (.cse17 (= ~q_read_ev~0 2)) (.cse5 (= ~c_dr_pc~0 1))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12) (and .cse13 .cse1 .cse2 .cse3 .cse4 .cse14 .cse5 .cse9 .cse11 .cse12) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse14 .cse5 .cse6 .cse7 .cse8 .cse9 .cse11 .cse12) (and .cse13 .cse15 .cse2 .cse3 .cse14 .cse16 .cse6 .cse17 .cse18 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse13 .cse1 .cse2 .cse3 .cse4 .cse5 .cse9 .cse10 .cse11 .cse12) (and .cse13 .cse15 .cse1 .cse2 .cse3 .cse14 .cse16 .cse6 .cse17 (not .cse5) .cse18)))) [2021-10-21 19:48:24,518 INFO L853 garLoopResultBuilder]: At program point L108-2(lines 86 110) the Hoare annotation is: (let ((.cse18 (= ~p_dw_st~0 0)) (.cse15 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse9 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse12 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse11 (= ~q_req_up~0 0)) (.cse14 (= ~q_read_ev~0 2)) (.cse16 (not .cse12)) (.cse17 (not .cse9)) (.cse19 (not .cse15)) (.cse0 (not .cse18)) (.cse10 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse20 (not (= ~slow_clk_edge~0 1))) (.cse8 (not (= ~fast_clk_edge~0 1))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (= ~c_dr_pc~0 1)) (.cse13 (not (= ~p_dw_pc~0 1))) (.cse5 (= ~t~0 0)) (.cse6 (= ~p_dw_i~0 1)) (.cse7 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8) (and .cse0 .cse9 .cse1 .cse10 .cse2 .cse11 .cse12 .cse13 .cse14 (not .cse4) .cse15 .cse7) (and .cse0 .cse9 .cse10 .cse2 .cse11 .cse12 .cse13 .cse14 .cse15 .cse7 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse16 .cse1 .cse2 .cse3 .cse4 .cse5 .cse17 .cse18 .cse19 .cse6 .cse7) (and .cse16 .cse1 .cse10 .cse2 .cse3 .cse4 .cse17 .cse18 .cse19 .cse6 .cse7 .cse20) (and .cse1 .cse10 .cse2 .cse3 .cse4 .cse13 .cse6 .cse7 .cse20) (and .cse0 .cse1 .cse10 .cse2 .cse3 .cse4 .cse6 .cse7 .cse20 .cse8) (and .cse1 .cse2 .cse3 .cse4 .cse13 .cse5 .cse6 .cse7)))) [2021-10-21 19:48:24,518 INFO L853 garLoopResultBuilder]: At program point L109(lines 83 111) the Hoare annotation is: (let ((.cse6 (= ~p_dw_st~0 0)) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse2 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse0 (= ~c_dr_st~0 0)) (.cse3 (= ~q_req_up~0 0)) (.cse4 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) (.cse5 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse7 (= ~q_read_ev~0 2)) (.cse8 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse9 (= ~q_req_up~0 ~p_dw_pc~0)) (.cse10 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse0 .cse1 (= ~q_write_ev~0 ~q_read_ev~0) .cse2 (= 1 ~c_dr_i~0) .cse3 .cse4 (= ~t~0 0) .cse5 .cse6 .cse7 (= ~p_dw_i~0 1) .cse8 .cse9 .cse10 (= ~q_read_ev~0 ~fast_clk_edge~0)) (and (not .cse6) .cse1 .cse2 (not .cse0) .cse3 .cse4 .cse5 .cse7 .cse8 .cse9 .cse10))) [2021-10-21 19:48:24,518 INFO L853 garLoopResultBuilder]: At program point L109-1(lines 83 111) the Hoare annotation is: (let ((.cse16 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse12 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse13 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse0 (not (= ~p_dw_st~0 0))) (.cse15 (= ~q_read_ev~0 2)) (.cse11 (= ~q_req_up~0 0)) (.cse17 (not .cse13)) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse3 (not (= ~c_dr_st~0 0))) (.cse4 (= 1 ~c_dr_i~0)) (.cse5 (= ~c_dr_pc~0 1)) (.cse14 (not (= ~p_dw_pc~0 1))) (.cse18 (not .cse12)) (.cse6 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse19 (not .cse16)) (.cse7 (= ~p_dw_i~0 1)) (.cse8 (not (= ~q_write_ev~0 1))) (.cse9 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse11 .cse5 .cse6 .cse7 .cse9 .cse10) (and .cse0 .cse12 .cse1 .cse2 .cse3 .cse11 .cse13 .cse14 .cse6 .cse15 (not .cse5) .cse16) (and .cse0 .cse12 .cse2 .cse3 .cse11 .cse13 .cse14 .cse6 .cse15 .cse16 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse17 .cse1 .cse2 .cse3 .cse4 .cse11 .cse5 .cse14 .cse18 .cse6 .cse19 .cse7 .cse9 .cse10) (and .cse17 .cse1 .cse2 .cse3 .cse4 .cse5 .cse14 .cse18 .cse6 .cse19 .cse7 .cse8 .cse9 .cse10)))) [2021-10-21 19:48:24,519 INFO L853 garLoopResultBuilder]: At program point L109-2(lines 83 111) the Hoare annotation is: (let ((.cse14 (= ~p_dw_st~0 0)) (.cse21 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse16 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse18 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse8 (not (= ~fast_clk_edge~0 1))) (.cse5 (= ~t~0 0)) (.cse12 (not .cse18)) (.cse1 (not (= ~q_write_ev~0 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (= ~c_dr_pc~0 1)) (.cse13 (not .cse16)) (.cse15 (not .cse21)) (.cse6 (= ~p_dw_i~0 1)) (.cse11 (not (= ~slow_clk_edge~0 1))) (.cse0 (not .cse14)) (.cse9 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse2 (not (= ~c_dr_st~0 0))) (.cse17 (= ~q_req_up~0 0)) (.cse19 (not (= ~p_dw_pc~0 1))) (.cse10 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse20 (= ~q_read_ev~0 2)) (.cse7 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8) (and .cse0 .cse1 .cse9 .cse2 .cse3 .cse4 .cse10 .cse6 .cse7 .cse11 .cse8) (and .cse12 .cse1 .cse2 .cse3 .cse4 .cse5 .cse13 .cse14 .cse15 .cse6 .cse7) (and .cse0 .cse16 .cse1 .cse9 .cse2 .cse17 .cse18 .cse19 .cse10 .cse20 (not .cse4) .cse21 .cse7) (and .cse1 .cse9 .cse2 .cse3 .cse4 .cse19 .cse10 .cse6 .cse7 .cse11) (and .cse1 .cse2 .cse3 .cse4 .cse19 .cse5 .cse6 .cse7) (and .cse12 .cse1 .cse9 .cse2 .cse3 .cse4 .cse13 .cse10 .cse14 .cse15 .cse6 .cse7 .cse11) (and .cse0 .cse16 .cse9 .cse2 .cse17 .cse18 .cse19 .cse10 .cse20 .cse21 .cse7 (= ~c_dr_pc~0 ~q_req_up~0))))) [2021-10-21 19:48:24,519 INFO L857 garLoopResultBuilder]: For program point L407(lines 407 411) no Hoare annotation was computed. [2021-10-21 19:48:24,519 INFO L857 garLoopResultBuilder]: For program point L407-1(lines 402 442) no Hoare annotation was computed. [2021-10-21 19:48:24,519 INFO L857 garLoopResultBuilder]: For program point L341(lines 341 348) no Hoare annotation was computed. [2021-10-21 19:48:24,520 INFO L853 garLoopResultBuilder]: At program point L308-1(lines 299 316) the Hoare annotation is: (let ((.cse2 (= ~p_dw_st~0 0)) (.cse0 (= ~c_dr_st~0 0)) (.cse1 (= ~q_req_up~0 0)) (.cse3 (= ~q_read_ev~0 2)) (.cse4 (= ~q_req_up~0 ~p_dw_pc~0)) (.cse5 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse0 (= ~q_write_ev~0 ~q_read_ev~0) (= 1 ~c_dr_i~0) .cse1 (= ~t~0 0) .cse2 .cse3 (= ~p_dw_i~0 1) .cse4 .cse5 (= ~q_read_ev~0 ~fast_clk_edge~0)) (and (not .cse2) (not .cse0) .cse1 .cse3 .cse4 .cse5))) [2021-10-21 19:48:24,520 INFO L853 garLoopResultBuilder]: At program point L341-2(lines 337 352) the Hoare annotation is: (let ((.cse8 (= ~t~0 0)) (.cse12 (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse13 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse14 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse4 (= ~c_dr_pc~0 1)) (.cse15 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (.cse16 (not (= ULTIMATE.start_activate_threads_~tmp~1 0))) (.cse5 (= ~p_dw_i~0 1)) (.cse7 (not (= ~slow_clk_edge~0 1))) (.cse0 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse9 (= ~q_req_up~0 0)) (.cse10 (not (= ~p_dw_pc~0 1))) (.cse11 (= ~q_read_ev~0 2)) (.cse6 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse8 .cse5 .cse6) (and .cse0 .cse1 .cse2 .cse9 .cse10 .cse11 (not .cse4) .cse6) (and .cse12 .cse1 .cse13 .cse2 .cse3 .cse14 .cse4 .cse10 .cse8 .cse15 .cse16 .cse5 .cse6) (and .cse12 .cse1 .cse13 .cse2 .cse3 .cse14 .cse4 .cse10 .cse15 .cse16 .cse5 .cse6 .cse7) (and .cse0 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse9 .cse10 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse11 .cse6 (= ~c_dr_pc~0 ~q_req_up~0)))) [2021-10-21 19:48:24,520 INFO L853 garLoopResultBuilder]: At program point L308-3(lines 299 316) the Hoare annotation is: (let ((.cse4 (= ~q_req_up~0 0)) (.cse9 (not (= ~p_dw_pc~0 1))) (.cse10 (= ~q_read_ev~0 2)) (.cse0 (not (= ~p_dw_st~0 0))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (= ~p_dw_i~0 1)) (.cse11 (not (= ~q_write_ev~0 1))) (.cse7 (not (= ~slow_clk_edge~0 1))) (.cse8 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8) (and .cse0 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse4 .cse9 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse10 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse2 .cse4 .cse9 .cse10 (not .cse5) .cse11) (and .cse0 .cse1 .cse2 .cse3 .cse5 .cse6 .cse11 .cse7 .cse8))) [2021-10-21 19:48:24,520 INFO L857 garLoopResultBuilder]: For program point L11(line 11) no Hoare annotation was computed. [2021-10-21 19:48:24,520 INFO L857 garLoopResultBuilder]: For program point L11-1(line 11) no Hoare annotation was computed. [2021-10-21 19:48:24,521 INFO L857 garLoopResultBuilder]: For program point L210-1(lines 210 220) no Hoare annotation was computed. [2021-10-21 19:48:24,521 INFO L857 garLoopResultBuilder]: For program point L144(lines 144 152) no Hoare annotation was computed. [2021-10-21 19:48:24,521 INFO L853 garLoopResultBuilder]: At program point L12-1(lines 190 244) the Hoare annotation is: (let ((.cse17 (= ~p_dw_st~0 0))) (let ((.cse14 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse13 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) (.cse15 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse6 (= ~c_dr_pc~0 1)) (.cse0 (not .cse17)) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (not (= ~c_dr_st~0 0))) (.cse4 (= 1 ~c_dr_i~0)) (.cse5 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse16 (= ~q_req_up~0 0)) (.cse7 (= ~t~0 0)) (.cse19 (= ~p_dw_pc~0 1)) (.cse18 (= ~q_read_ev~0 2)) (.cse8 (not (= ULTIMATE.start_eval_~tmp___1~0 0))) (.cse9 (= ~p_dw_i~0 1)) (.cse10 (not (= ~q_write_ev~0 1))) (.cse11 (not (= ~slow_clk_edge~0 1))) (.cse12 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12) (and (not .cse13) .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 (not .cse14) (not .cse15) .cse8 .cse9 .cse10 .cse11 .cse12) (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse14 .cse2 (= ~q_write_ev~0 ~q_read_ev~0) .cse3 .cse4 .cse5 .cse16 .cse13 .cse7 .cse17 .cse18 .cse8 .cse9 .cse15 (= ~q_req_up~0 ~p_dw_pc~0) (= ~q_read_ev~0 ~fast_clk_edge~0)) (and .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 (not .cse19) .cse7 .cse8 .cse9 .cse10 .cse11 .cse12) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse16 .cse7 .cse19 .cse18 .cse8 .cse9 .cse10 .cse11 .cse12)))) [2021-10-21 19:48:24,521 INFO L853 garLoopResultBuilder]: At program point L145(lines 140 184) the Hoare annotation is: (let ((.cse0 (not (= ~p_dw_st~0 0))) (.cse1 (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (.cse2 (not (= ~q_write_ev~0 0))) (.cse3 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse4 (= 1 ~c_dr_i~0)) (.cse5 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse6 (= ~c_dr_pc~0 1)) (.cse7 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (.cse8 (= ~p_dw_pc~0 1)) (.cse9 (not (= ULTIMATE.start_activate_threads_~tmp~1 0))) (.cse10 (not (= ULTIMATE.start_eval_~tmp___1~0 0))) (.cse11 (= ~p_dw_i~0 1)) (.cse12 (not (= ~q_write_ev~0 1))) (.cse13 (not (= ~slow_clk_edge~0 1))) (.cse14 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 (not (= ~c_dr_st~0 0)) .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 (= ~t~0 0) .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14))) [2021-10-21 19:48:24,522 INFO L853 garLoopResultBuilder]: At program point L79(lines 57 81) the Hoare annotation is: (let ((.cse2 (= ~c_dr_st~0 0)) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse3 (= ~q_req_up~0 0)) (.cse0 (= ~p_dw_st~0 0)) (.cse4 (= ~q_read_ev~0 2)) (.cse5 (= ~q_req_up~0 ~p_dw_pc~0)) (.cse6 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and (not .cse0) .cse1 (not .cse2) .cse3 .cse4 .cse5 .cse6) (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse2 .cse1 (= ~q_write_ev~0 ~q_read_ev~0) (= 1 ~c_dr_i~0) .cse3 (= ~t~0 0) .cse0 .cse4 (= ~p_dw_i~0 1) .cse5 .cse6 (= ~q_read_ev~0 ~fast_clk_edge~0)))) [2021-10-21 19:48:24,522 INFO L853 garLoopResultBuilder]: At program point L79-1(lines 57 81) the Hoare annotation is: (let ((.cse11 (not (= ~p_dw_pc~0 1))) (.cse12 (= ~q_read_ev~0 2)) (.cse7 (not (= ~q_write_ev~0 1))) (.cse0 (not (= ~p_dw_st~0 0))) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse2 (not (= ~q_write_ev~0 0))) (.cse3 (not (= ~c_dr_st~0 0))) (.cse4 (= 1 ~c_dr_i~0)) (.cse10 (= ~q_req_up~0 0)) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (= ~p_dw_i~0 1)) (.cse8 (not (= ~slow_clk_edge~0 1))) (.cse9 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9) (and .cse0 .cse2 .cse3 .cse4 .cse10 .cse5 .cse11 .cse6 .cse8 .cse9) (and .cse0 .cse2 .cse3 .cse4 .cse5 .cse11 .cse6 .cse7 .cse8 .cse9) (and .cse0 .cse1 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse3 .cse10 .cse11 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse12 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse2 .cse3 .cse10 .cse11 .cse12 (not .cse5) .cse7) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse10 .cse5 .cse6 .cse8 .cse9))) [2021-10-21 19:48:24,522 INFO L853 garLoopResultBuilder]: At program point L79-2(lines 57 81) the Hoare annotation is: (let ((.cse14 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (let ((.cse8 (not (= ~fast_clk_edge~0 1))) (.cse10 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse11 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse13 (not (= ~slow_clk_edge~0 1))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (= ~c_dr_pc~0 1)) (.cse5 (= ~t~0 0)) (.cse12 (not .cse14)) (.cse6 (= ~p_dw_i~0 1)) (.cse0 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse15 (= ~q_req_up~0 0)) (.cse9 (not (= ~p_dw_pc~0 1))) (.cse16 (= ~q_read_ev~0 2)) (.cse7 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse9 .cse5 .cse6 .cse7) (and .cse1 .cse10 .cse2 .cse3 .cse11 .cse4 .cse9 .cse5 .cse6 .cse7) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse12 .cse6 .cse7 .cse13) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse6 .cse7 .cse13 .cse8) (and .cse4 (or (and .cse1 .cse10 .cse2 .cse3 .cse11 .cse9 .cse6 .cse7 .cse13) (and .cse0 .cse1 .cse2 .cse3 .cse9 .cse6 .cse7 .cse13))) (and .cse0 .cse14 .cse1 .cse2 .cse15 .cse9 .cse16 (not .cse4) .cse7) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse12 .cse6 .cse7) (and .cse0 .cse14 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 .cse15 .cse9 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse16 .cse7 (= ~c_dr_pc~0 ~q_req_up~0))))) [2021-10-21 19:48:24,523 INFO L853 garLoopResultBuilder]: At program point L443(lines 396 448) the Hoare annotation is: (let ((.cse1 (not (= ~q_write_ev~0 0))) (.cse6 (= ~c_dr_pc~0 1)) (.cse0 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse3 (= ~q_req_up~0 0)) (.cse4 (not (= ~p_dw_pc~0 1))) (.cse5 (= ~q_read_ev~0 2)) (.cse7 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 (not .cse6) .cse7) (and .cse0 .cse1 .cse2 (= 1 ~c_dr_i~0) .cse6 (= ~p_dw_i~0 1) .cse7 (not (= ~slow_clk_edge~0 1)) (not (= ~fast_clk_edge~0 1))) (and .cse0 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse3 .cse4 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse5 .cse7 (= ~c_dr_pc~0 ~q_req_up~0)))) [2021-10-21 19:48:24,523 INFO L853 garLoopResultBuilder]: At program point L80(lines 54 82) the Hoare annotation is: (let ((.cse2 (= ~c_dr_st~0 0)) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse3 (= ~q_req_up~0 0)) (.cse4 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) (.cse0 (= ~p_dw_st~0 0)) (.cse5 (= ~q_read_ev~0 2)) (.cse6 (= ~q_req_up~0 ~p_dw_pc~0)) (.cse7 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and (not .cse0) .cse1 (not .cse2) .cse3 .cse4 .cse5 .cse6 .cse7) (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse2 .cse1 (= ~q_write_ev~0 ~q_read_ev~0) (= 1 ~c_dr_i~0) .cse3 .cse4 (= ~t~0 0) .cse0 .cse5 (= ~p_dw_i~0 1) .cse6 .cse7 (= ~q_read_ev~0 ~fast_clk_edge~0)))) [2021-10-21 19:48:24,523 INFO L853 garLoopResultBuilder]: At program point L80-1(lines 54 82) the Hoare annotation is: (let ((.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse4 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse3 (= ~q_req_up~0 0)) (.cse6 (= ~q_read_ev~0 2)) (.cse0 (not (= ~p_dw_st~0 0))) (.cse13 (not .cse4)) (.cse7 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse8 (= 1 ~c_dr_i~0)) (.cse9 (= ~c_dr_pc~0 1)) (.cse5 (not (= ~p_dw_pc~0 1))) (.cse14 (not .cse1)) (.cse10 (= ~p_dw_i~0 1)) (.cse15 (not (= ~q_write_ev~0 1))) (.cse11 (not (= ~slow_clk_edge~0 1))) (.cse12 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 .cse3 .cse4 .cse5 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse6 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse7 .cse2 .cse8 .cse3 .cse9 .cse4 .cse10 .cse11 .cse12) (and .cse0 .cse13 .cse7 .cse2 .cse8 .cse3 .cse9 .cse5 .cse14 .cse10 .cse11 .cse12) (and .cse0 .cse1 .cse7 .cse2 .cse8 .cse9 .cse4 .cse10 .cse15 .cse11 .cse12) (and .cse0 .cse1 .cse7 .cse2 .cse3 .cse4 .cse5 .cse6 (not .cse9) .cse15) (and .cse0 .cse13 .cse7 .cse2 .cse8 .cse9 .cse5 .cse14 .cse10 .cse15 .cse11 .cse12)))) [2021-10-21 19:48:24,523 INFO L853 garLoopResultBuilder]: At program point L80-2(lines 54 82) the Hoare annotation is: (let ((.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse6 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse11 (not .cse6)) (.cse12 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse13 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse7 (= ~t~0 0)) (.cse15 (not .cse1)) (.cse4 (= 1 ~c_dr_i~0)) (.cse8 (= ~p_dw_i~0 1)) (.cse16 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1))) (.cse0 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~q_write_ev~0 0))) (.cse3 (not (= ~c_dr_st~0 0))) (.cse17 (= ~q_req_up~0 0)) (.cse14 (not (= ~p_dw_pc~0 1))) (.cse18 (= ~q_read_ev~0 2)) (.cse5 (= ~c_dr_pc~0 1)) (.cse9 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and (or (and .cse11 .cse2 .cse12 .cse3 .cse4 .cse13 .cse14 .cse15 .cse8 .cse9 .cse16) (and .cse0 .cse11 .cse2 .cse3 .cse4 .cse15 .cse8 .cse9 .cse16)) .cse5) (and .cse1 .cse2 .cse12 .cse3 .cse4 .cse13 .cse5 .cse6 .cse14 .cse7 .cse8 .cse9) (and .cse1 .cse2 .cse12 .cse3 .cse4 .cse13 .cse5 .cse6 .cse14 .cse8 .cse9 .cse16) (and .cse0 .cse1 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse3 .cse17 .cse6 .cse14 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse18 .cse9 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse14 .cse7 .cse8 .cse9) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse14 .cse8 .cse9 .cse16) (and (or (and .cse0 .cse11 .cse2 .cse3 .cse4 .cse7 .cse15 .cse8 .cse9) (and .cse11 .cse2 .cse12 .cse3 .cse4 .cse13 .cse14 .cse7 .cse15 .cse8 .cse9)) .cse5) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse8 .cse9 .cse16 .cse10) (and .cse0 .cse1 .cse2 .cse3 .cse17 .cse6 .cse14 .cse18 (not .cse5) .cse9)))) [2021-10-21 19:48:24,524 INFO L853 garLoopResultBuilder]: At program point L543(lines 527 545) the Hoare annotation is: (and (= ~slow_clk_edge~0 ~q_read_ev~0) (= ~c_dr_st~0 0) (= ~q_write_ev~0 ~q_read_ev~0) (= 1 ~c_dr_i~0) (= ~q_req_up~0 0) (= ~t~0 0) (= ~p_dw_st~0 0) (= ~q_read_ev~0 2) (= ~p_dw_i~0 1) (= ~q_req_up~0 ~p_dw_pc~0) (= ~c_dr_pc~0 ~q_req_up~0) (= ~q_read_ev~0 ~fast_clk_edge~0)) [2021-10-21 19:48:24,524 INFO L857 garLoopResultBuilder]: For program point L147(lines 147 151) no Hoare annotation was computed. [2021-10-21 19:48:24,524 INFO L853 garLoopResultBuilder]: At program point L412(lines 402 442) the Hoare annotation is: (let ((.cse13 (= ~p_dw_st~0 0)) (.cse31 (= ~p_dw_pc~0 1)) (.cse1 (= ~c_dr_st~0 0)) (.cse17 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse2 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse10 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse0 (= ~slow_clk_edge~0 ~q_read_ev~0)) (.cse4 (= ~q_write_ev~0 ~q_read_ev~0)) (.cse19 (= ~q_read_ev~0 ~fast_clk_edge~0)) (.cse26 (not .cse10)) (.cse27 (not .cse2)) (.cse28 (not .cse17)) (.cse5 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse30 (not .cse1)) (.cse8 (= ULTIMATE.start_activate_threads_~tmp___0~1 0)) (.cse9 (= ~q_req_up~0 0)) (.cse22 (not .cse31)) (.cse12 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse14 (= ~q_read_ev~0 2)) (.cse18 (= ~c_dr_pc~0 ~q_req_up~0)) (.cse29 (not .cse13)) (.cse20 (not (= ~q_write_ev~0 0))) (.cse3 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse6 (= 1 ~c_dr_i~0)) (.cse7 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse21 (= ~c_dr_pc~0 1)) (.cse11 (= ~t~0 0)) (.cse15 (not (= ULTIMATE.start_eval_~tmp___1~0 0))) (.cse16 (= ~p_dw_i~0 1)) (.cse23 (not (= ~q_write_ev~0 1))) (.cse24 (not (= ~slow_clk_edge~0 1))) (.cse25 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 .cse15 .cse16 .cse17 (= ~q_req_up~0 ~p_dw_pc~0) .cse18 .cse19) (and .cse20 .cse3 .cse6 .cse7 .cse21 .cse22 .cse11 .cse15 .cse16 .cse23 .cse24 .cse25) (and .cse26 .cse20 .cse3 .cse6 .cse7 .cse21 .cse11 .cse27 .cse28 .cse15 .cse16 .cse23 .cse24 .cse25) (and .cse29 .cse20 .cse30 .cse6 .cse21 .cse15 .cse16 .cse23 .cse24 .cse25) (and .cse0 .cse1 .cse29 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse11 .cse31 .cse12 .cse14 .cse15 .cse16 .cse18 .cse19) (and .cse20 .cse3 .cse30 .cse6 .cse7 .cse21 .cse22 .cse15 .cse16 .cse23 .cse24 .cse25) (and .cse26 .cse20 .cse3 .cse30 .cse6 .cse7 .cse21 .cse27 .cse28 .cse15 .cse16 .cse23 .cse24 .cse25) (and .cse29 .cse20 .cse30 .cse9 .cse22 .cse14 (not .cse21) .cse15 .cse23) (and .cse29 .cse5 .cse30 .cse8 .cse9 .cse22 .cse12 .cse14 .cse23 .cse18) (and .cse29 .cse20 .cse3 .cse6 .cse7 .cse21 .cse11 .cse15 .cse16 .cse23 .cse24 .cse25)))) [2021-10-21 19:48:24,524 INFO L857 garLoopResultBuilder]: For program point L379(lines 379 383) no Hoare annotation was computed. [2021-10-21 19:48:24,525 INFO L857 garLoopResultBuilder]: For program point L379-2(lines 379 383) no Hoare annotation was computed. [2021-10-21 19:48:24,525 INFO L857 garLoopResultBuilder]: For program point L379-3(lines 379 383) no Hoare annotation was computed. [2021-10-21 19:48:24,525 INFO L857 garLoopResultBuilder]: For program point L379-5(lines 379 383) no Hoare annotation was computed. [2021-10-21 19:48:24,525 INFO L857 garLoopResultBuilder]: For program point L379-6(lines 379 383) no Hoare annotation was computed. [2021-10-21 19:48:24,525 INFO L857 garLoopResultBuilder]: For program point L379-8(lines 379 383) no Hoare annotation was computed. [2021-10-21 19:48:24,525 INFO L857 garLoopResultBuilder]: For program point L283(lines 283 293) no Hoare annotation was computed. [2021-10-21 19:48:24,526 INFO L857 garLoopResultBuilder]: For program point L250(lines 250 256) no Hoare annotation was computed. [2021-10-21 19:48:24,526 INFO L857 garLoopResultBuilder]: For program point L283-1(lines 283 293) no Hoare annotation was computed. [2021-10-21 19:48:24,526 INFO L853 garLoopResultBuilder]: At program point L250-1(lines 265 269) the Hoare annotation is: (and (= ~slow_clk_edge~0 ~q_read_ev~0) (= ~c_dr_st~0 0) (= ~q_write_ev~0 ~q_read_ev~0) (= 1 ~c_dr_i~0) (= ~q_req_up~0 0) (= ~t~0 0) (= ~p_dw_st~0 0) (= ~q_read_ev~0 2) (= ~p_dw_i~0 1) (= ~q_req_up~0 ~p_dw_pc~0) (= ~c_dr_pc~0 ~q_req_up~0) (= ~q_read_ev~0 ~fast_clk_edge~0)) [2021-10-21 19:48:24,526 INFO L857 garLoopResultBuilder]: For program point L283-2(lines 283 293) no Hoare annotation was computed. [2021-10-21 19:48:24,526 INFO L857 garLoopResultBuilder]: For program point L250-2(lines 250 256) no Hoare annotation was computed. [2021-10-21 19:48:24,527 INFO L853 garLoopResultBuilder]: At program point L250-3(lines 246 260) the Hoare annotation is: (let ((.cse1 (not (= ~q_write_ev~0 0))) (.cse4 (not (= ~p_dw_pc~0 1))) (.cse5 (= ~q_read_ev~0 2)) (.cse0 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse8 (= 1 ~c_dr_i~0)) (.cse3 (= ~q_req_up~0 0)) (.cse6 (= ~c_dr_pc~0 1)) (.cse9 (= ~p_dw_i~0 1)) (.cse7 (not (= ~q_write_ev~0 1))) (.cse10 (not (= ~slow_clk_edge~0 1))) (.cse11 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 (not .cse6) .cse7) (and .cse0 .cse1 .cse2 .cse8 .cse6 .cse9 .cse7 .cse10 .cse11) (and .cse0 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse3 .cse4 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse5 .cse7 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse2 .cse8 .cse3 .cse6 .cse9 .cse7 .cse10 .cse11))) [2021-10-21 19:48:24,527 INFO L857 garLoopResultBuilder]: For program point L515(lines 515 519) no Hoare annotation was computed. [2021-10-21 19:48:24,527 INFO L857 garLoopResultBuilder]: For program point L416(lines 416 423) no Hoare annotation was computed. [2021-10-21 19:48:24,527 INFO L857 garLoopResultBuilder]: For program point ULTIMATE.startENTRY(line -1) no Hoare annotation was computed. [2021-10-21 19:48:24,527 INFO L853 garLoopResultBuilder]: At program point L483-1(lines 317 520) the Hoare annotation is: (let ((.cse0 (= ~c_dr_st~0 0)) (.cse9 (= ~p_dw_st~0 0)) (.cse12 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse6 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse23 (not .cse6)) (.cse24 (not .cse1)) (.cse25 (not .cse12)) (.cse26 (not .cse9)) (.cse2 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse16 (not .cse0)) (.cse4 (= ULTIMATE.start_activate_threads_~tmp___0~1 0)) (.cse5 (= ~q_req_up~0 0)) (.cse8 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse10 (= ~q_read_ev~0 2)) (.cse13 (= ~c_dr_pc~0 ~q_req_up~0)) (.cse14 (not (= ~q_write_ev~0 0))) (.cse15 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse17 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse18 (= ~c_dr_pc~0 1)) (.cse19 (not (= ~p_dw_pc~0 1))) (.cse7 (= ~t~0 0)) (.cse11 (= ~p_dw_i~0 1)) (.cse20 (not (= ~q_write_ev~0 1))) (.cse21 (not (= ~slow_clk_edge~0 1))) (.cse22 (not (= ~fast_clk_edge~0 1)))) (or (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse0 .cse1 (= ~q_write_ev~0 ~q_read_ev~0) .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 (= ~q_req_up~0 ~p_dw_pc~0) .cse13 (= ~q_read_ev~0 ~fast_clk_edge~0)) (and .cse14 .cse15 .cse16 .cse3 .cse17 .cse18 .cse19 .cse11 .cse20 .cse21 .cse22) (and .cse23 .cse14 .cse15 .cse3 .cse17 .cse18 .cse7 .cse24 .cse25 .cse11 .cse20 .cse21 .cse22) (and .cse26 .cse14 .cse15 .cse3 .cse17 .cse18 .cse7 .cse11 .cse20 .cse21 .cse22) (and .cse23 .cse14 .cse15 .cse16 .cse3 .cse17 .cse18 .cse24 .cse25 .cse11 .cse20 .cse21 .cse22) (and .cse26 .cse14 .cse16 .cse5 .cse19 .cse10 (not .cse18) .cse20) (and .cse26 .cse14 .cse16 .cse3 .cse18 .cse11 .cse20 .cse21 .cse22) (and .cse26 .cse2 .cse16 .cse4 .cse5 .cse19 .cse8 .cse10 .cse20 .cse13) (and .cse14 .cse15 .cse3 .cse17 .cse18 .cse19 .cse7 .cse11 .cse20 .cse21 .cse22)))) [2021-10-21 19:48:24,528 INFO L857 garLoopResultBuilder]: For program point L87(lines 87 96) no Hoare annotation was computed. [2021-10-21 19:48:24,528 INFO L857 garLoopResultBuilder]: For program point L87-2(lines 86 110) no Hoare annotation was computed. [2021-10-21 19:48:24,528 INFO L857 garLoopResultBuilder]: For program point L87-3(lines 87 96) no Hoare annotation was computed. [2021-10-21 19:48:24,528 INFO L857 garLoopResultBuilder]: For program point L87-5(lines 86 110) no Hoare annotation was computed. [2021-10-21 19:48:24,528 INFO L857 garLoopResultBuilder]: For program point L87-6(lines 87 96) no Hoare annotation was computed. [2021-10-21 19:48:24,528 INFO L857 garLoopResultBuilder]: For program point L87-8(lines 86 110) no Hoare annotation was computed. [2021-10-21 19:48:24,529 INFO L857 garLoopResultBuilder]: For program point L484(line 484) no Hoare annotation was computed. [2021-10-21 19:48:24,529 INFO L857 garLoopResultBuilder]: For program point L88(lines 88 93) no Hoare annotation was computed. [2021-10-21 19:48:24,529 INFO L857 garLoopResultBuilder]: For program point L88-1(lines 88 93) no Hoare annotation was computed. [2021-10-21 19:48:24,529 INFO L857 garLoopResultBuilder]: For program point L88-2(lines 88 93) no Hoare annotation was computed. [2021-10-21 19:48:24,529 INFO L857 garLoopResultBuilder]: For program point L287(lines 287 292) no Hoare annotation was computed. [2021-10-21 19:48:24,529 INFO L857 garLoopResultBuilder]: For program point L287-1(lines 287 292) no Hoare annotation was computed. [2021-10-21 19:48:24,530 INFO L857 garLoopResultBuilder]: For program point L287-2(lines 287 292) no Hoare annotation was computed. [2021-10-21 19:48:24,530 INFO L857 garLoopResultBuilder]: For program point L387(lines 387 391) no Hoare annotation was computed. [2021-10-21 19:48:24,530 INFO L853 garLoopResultBuilder]: At program point L387-2(lines 321 325) the Hoare annotation is: (let ((.cse7 (= ~p_dw_st~0 0)) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse2 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse0 (= ~c_dr_st~0 0)) (.cse3 (= ULTIMATE.start_activate_threads_~tmp___0~1 0)) (.cse4 (= ~q_req_up~0 0)) (.cse5 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) (.cse6 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse8 (= ~q_read_ev~0 2)) (.cse9 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse10 (= ~q_req_up~0 ~p_dw_pc~0)) (.cse11 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse0 .cse1 (= ~q_write_ev~0 ~q_read_ev~0) .cse2 (= 1 ~c_dr_i~0) .cse3 .cse4 .cse5 (= ~t~0 0) .cse6 .cse7 .cse8 (= ~p_dw_i~0 1) .cse9 .cse10 .cse11 (= ~q_read_ev~0 ~fast_clk_edge~0)) (and (not .cse7) .cse1 .cse2 (not .cse0) .cse3 .cse4 .cse5 .cse6 .cse8 .cse9 .cse10 .cse11))) [2021-10-21 19:48:24,530 INFO L857 garLoopResultBuilder]: For program point L321-1(lines 320 333) no Hoare annotation was computed. [2021-10-21 19:48:24,530 INFO L857 garLoopResultBuilder]: For program point L387-3(lines 387 391) no Hoare annotation was computed. [2021-10-21 19:48:24,531 INFO L853 garLoopResultBuilder]: At program point L387-5(lines 321 325) the Hoare annotation is: (let ((.cse17 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse14 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse15 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse9 (not .cse15)) (.cse11 (not .cse14)) (.cse12 (not .cse17)) (.cse4 (= ~q_req_up~0 0)) (.cse10 (not (= ~p_dw_pc~0 1))) (.cse16 (= ~q_read_ev~0 2)) (.cse0 (not (= ~p_dw_st~0 0))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (= ~p_dw_i~0 1)) (.cse13 (not (= ~q_write_ev~0 1))) (.cse7 (not (= ~slow_clk_edge~0 1))) (.cse8 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8) (and .cse9 .cse1 .cse2 .cse3 .cse5 .cse10 .cse11 .cse12 .cse6 .cse13 .cse7 .cse8) (and .cse9 .cse1 .cse2 .cse3 .cse4 .cse5 .cse10 .cse11 .cse12 .cse6 .cse7 .cse8) (and .cse0 .cse14 .cse1 .cse2 .cse4 .cse15 .cse10 .cse16 (not .cse5) .cse17) (and .cse0 .cse14 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse4 .cse15 .cse10 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse16 .cse17 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse2 .cse3 .cse5 .cse6 .cse13 .cse7 .cse8)))) [2021-10-21 19:48:24,531 INFO L857 garLoopResultBuilder]: For program point L321-3(lines 320 333) no Hoare annotation was computed. [2021-10-21 19:48:24,531 INFO L857 garLoopResultBuilder]: For program point L387-6(lines 387 391) no Hoare annotation was computed. [2021-10-21 19:48:24,531 INFO L853 garLoopResultBuilder]: At program point L156-1(lines 140 184) the Hoare annotation is: (let ((.cse0 (= ~c_dr_st~0 0)) (.cse1 (not (= ~p_dw_st~0 0))) (.cse8 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse9 (= ~c_dr_pc~0 1)) (.cse5 (= ~t~0 0)) (.cse6 (not (= ULTIMATE.start_eval_~tmp___1~0 0))) (.cse7 (= ~p_dw_i~0 1)) (.cse10 (not (= ~q_write_ev~0 1))) (.cse11 (not (= ~slow_clk_edge~0 1))) (.cse12 (not (= ~fast_clk_edge~0 1)))) (or (and (= ~slow_clk_edge~0 ~q_read_ev~0) .cse0 .cse1 .cse2 (= ~q_write_ev~0 ~q_read_ev~0) (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse3 .cse4 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) (= ~q_req_up~0 0) (not (= ~p_dw_pc~0 1)) .cse5 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) (= ~q_read_ev~0 2) .cse6 .cse7 (= ~c_dr_pc~0 ~q_req_up~0) (= ~q_read_ev~0 ~fast_clk_edge~0)) (and .cse1 .cse8 .cse2 (not .cse0) .cse3 .cse4 .cse9 .cse6 .cse7 .cse10 .cse11 .cse12) (and .cse1 .cse8 .cse2 .cse3 .cse4 .cse9 .cse5 .cse6 .cse7 .cse10 .cse11 .cse12))) [2021-10-21 19:48:24,532 INFO L853 garLoopResultBuilder]: At program point L387-8(lines 357 361) the Hoare annotation is: (let ((.cse14 (= ~p_dw_st~0 0)) (.cse7 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse1 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse4 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse9 (not .cse4)) (.cse18 (= ~t~0 0)) (.cse13 (not .cse1)) (.cse15 (not .cse7)) (.cse11 (= 1 ~c_dr_i~0)) (.cse16 (= ~p_dw_i~0 1)) (.cse17 (not (= ~slow_clk_edge~0 1))) (.cse19 (not (= ~fast_clk_edge~0 1))) (.cse0 (not .cse14)) (.cse10 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse3 (= ~q_req_up~0 0)) (.cse5 (not (= ~p_dw_pc~0 1))) (.cse6 (= ~q_read_ev~0 2)) (.cse12 (= ~c_dr_pc~0 1)) (.cse8 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse3 .cse4 .cse5 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse6 .cse7 .cse8 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse9 .cse10 .cse2 .cse11 .cse12 .cse13 .cse14 .cse15 .cse16 .cse8 .cse17) (and .cse10 .cse11 .cse12 .cse5 .cse18 .cse16 .cse8) (and .cse0 .cse10 .cse11 .cse12 .cse18 .cse16 .cse8 .cse19) (and .cse9 .cse10 .cse11 .cse12 .cse18 .cse13 .cse14 .cse15 .cse16 .cse8) (and .cse10 .cse2 .cse11 .cse12 .cse5 .cse16 .cse8 .cse17) (and .cse0 .cse10 .cse2 .cse11 .cse12 .cse16 .cse8 .cse17 .cse19) (and .cse0 .cse1 .cse10 .cse2 .cse3 .cse4 .cse5 .cse6 (not .cse12) .cse7 .cse8)))) [2021-10-21 19:48:24,532 INFO L857 garLoopResultBuilder]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2021-10-21 19:48:24,532 INFO L857 garLoopResultBuilder]: For program point L157(line 157) no Hoare annotation was computed. [2021-10-21 19:48:24,532 INFO L857 garLoopResultBuilder]: For program point L58(lines 58 67) no Hoare annotation was computed. [2021-10-21 19:48:24,532 INFO L857 garLoopResultBuilder]: For program point L58-2(lines 57 81) no Hoare annotation was computed. [2021-10-21 19:48:24,533 INFO L857 garLoopResultBuilder]: For program point L58-3(lines 58 67) no Hoare annotation was computed. [2021-10-21 19:48:24,533 INFO L857 garLoopResultBuilder]: For program point L58-5(lines 57 81) no Hoare annotation was computed. [2021-10-21 19:48:24,533 INFO L857 garLoopResultBuilder]: For program point L58-6(lines 58 67) no Hoare annotation was computed. [2021-10-21 19:48:24,533 INFO L857 garLoopResultBuilder]: For program point L58-8(lines 57 81) no Hoare annotation was computed. [2021-10-21 19:48:24,533 INFO L860 garLoopResultBuilder]: At program point L521(lines 468 526) the Hoare annotation is: true [2021-10-21 19:48:24,533 INFO L857 garLoopResultBuilder]: For program point L191(lines 191 199) no Hoare annotation was computed. [2021-10-21 19:48:24,534 INFO L857 garLoopResultBuilder]: For program point L59(lines 59 64) no Hoare annotation was computed. [2021-10-21 19:48:24,534 INFO L857 garLoopResultBuilder]: For program point L59-1(lines 59 64) no Hoare annotation was computed. [2021-10-21 19:48:24,534 INFO L857 garLoopResultBuilder]: For program point L59-2(lines 59 64) no Hoare annotation was computed. [2021-10-21 19:48:24,534 INFO L860 garLoopResultBuilder]: At program point L555(lines 546 557) the Hoare annotation is: true [2021-10-21 19:48:24,534 INFO L857 garLoopResultBuilder]: For program point L357-1(lines 356 369) no Hoare annotation was computed. [2021-10-21 19:48:24,534 INFO L857 garLoopResultBuilder]: For program point L457(lines 457 462) no Hoare annotation was computed. [2021-10-21 19:48:24,534 INFO L857 garLoopResultBuilder]: For program point L226(lines 226 238) no Hoare annotation was computed. [2021-10-21 19:48:24,535 INFO L857 garLoopResultBuilder]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2021-10-21 19:48:24,535 INFO L857 garLoopResultBuilder]: For program point L28(lines 28 32) no Hoare annotation was computed. [2021-10-21 19:48:24,535 INFO L857 garLoopResultBuilder]: For program point L28-2(lines 27 42) no Hoare annotation was computed. [2021-10-21 19:48:24,535 INFO L857 garLoopResultBuilder]: For program point L28-3(lines 28 32) no Hoare annotation was computed. [2021-10-21 19:48:24,535 INFO L857 garLoopResultBuilder]: For program point L28-5(lines 27 42) no Hoare annotation was computed. [2021-10-21 19:48:24,535 INFO L857 garLoopResultBuilder]: For program point L227(lines 227 233) no Hoare annotation was computed. [2021-10-21 19:48:24,536 INFO L853 garLoopResultBuilder]: At program point L326-3(lines 317 334) the Hoare annotation is: (let ((.cse0 (not (= ~q_write_ev~0 0))) (.cse2 (= 1 ~c_dr_i~0)) (.cse3 (= ~c_dr_pc~0 1)) (.cse5 (= ~p_dw_i~0 1)) (.cse7 (not (= ~slow_clk_edge~0 1))) (.cse8 (not (= ~fast_clk_edge~0 1))) (.cse9 (not (= ~p_dw_st~0 0))) (.cse1 (not (= ~c_dr_st~0 0))) (.cse10 (= ~q_req_up~0 0)) (.cse4 (not (= ~p_dw_pc~0 1))) (.cse11 (= ~q_read_ev~0 2)) (.cse6 (not (= ~q_write_ev~0 1)))) (or (and (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) .cse0 .cse1 .cse2 .cse3 .cse4 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (not (= ULTIMATE.start_activate_threads_~tmp~1 0)) .cse5 .cse6 .cse7 .cse8) (and .cse9 .cse0 .cse1 .cse10 .cse4 .cse11 (not .cse3) .cse6) (and .cse9 .cse0 .cse1 .cse2 .cse3 .cse5 .cse6 .cse7 .cse8) (and .cse9 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse1 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse10 .cse4 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse11 .cse6 (= ~c_dr_pc~0 ~q_req_up~0)))) [2021-10-21 19:48:24,536 INFO L857 garLoopResultBuilder]: For program point L194(lines 194 198) no Hoare annotation was computed. [2021-10-21 19:48:24,536 INFO L853 garLoopResultBuilder]: At program point L195(lines 190 244) the Hoare annotation is: false [2021-10-21 19:48:24,536 INFO L853 garLoopResultBuilder]: At program point L427(lines 402 442) the Hoare annotation is: (let ((.cse30 (= ~p_dw_pc~0 1)) (.cse1 (= ~c_dr_st~0 0)) (.cse11 (= ~p_dw_st~0 0)) (.cse14 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse2 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse8 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse0 (= ~slow_clk_edge~0 ~q_read_ev~0)) (.cse3 (= ~q_write_ev~0 ~q_read_ev~0)) (.cse16 (= ~q_read_ev~0 ~fast_clk_edge~0)) (.cse26 (not .cse8)) (.cse27 (not .cse2)) (.cse28 (not .cse14)) (.cse29 (not .cse11)) (.cse4 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse19 (not .cse1)) (.cse6 (= ULTIMATE.start_activate_threads_~tmp___0~1 0)) (.cse7 (= ~q_req_up~0 0)) (.cse10 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse12 (= ~q_read_ev~0 2)) (.cse15 (= ~c_dr_pc~0 ~q_req_up~0)) (.cse17 (not (= ~q_write_ev~0 0))) (.cse18 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse5 (= 1 ~c_dr_i~0)) (.cse20 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse21 (= ~c_dr_pc~0 1)) (.cse22 (not .cse30)) (.cse9 (= ~t~0 0)) (.cse13 (= ~p_dw_i~0 1)) (.cse23 (not (= ~q_write_ev~0 1))) (.cse24 (not (= ~slow_clk_edge~0 1))) (.cse25 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13 .cse14 (= ~q_req_up~0 ~p_dw_pc~0) .cse15 .cse16) (and .cse17 .cse18 .cse19 .cse5 .cse20 .cse21 .cse22 .cse13 .cse23 .cse24 .cse25) (and .cse26 .cse17 .cse18 .cse5 .cse20 .cse21 .cse9 .cse27 .cse28 .cse13 .cse23 .cse24 .cse25) (and .cse29 .cse17 .cse18 .cse5 .cse20 .cse21 .cse9 .cse13 .cse23 .cse24 .cse25) (and .cse0 .cse1 .cse29 .cse18 .cse3 .cse4 .cse5 .cse20 .cse6 .cse7 .cse9 .cse30 .cse10 .cse12 (not (= ULTIMATE.start_eval_~tmp___1~0 0)) .cse13 .cse15 .cse16) (and .cse26 .cse17 .cse18 .cse19 .cse5 .cse20 .cse21 .cse27 .cse28 .cse13 .cse23 .cse24 .cse25) (and .cse29 .cse17 .cse19 .cse7 .cse22 .cse12 (not .cse21) .cse23) (and .cse29 .cse17 .cse19 .cse5 .cse21 .cse13 .cse23 .cse24 .cse25) (and .cse29 .cse4 .cse19 .cse6 .cse7 .cse22 .cse10 .cse12 .cse23 .cse15) (and .cse17 .cse18 .cse5 .cse20 .cse21 .cse22 .cse9 .cse13 .cse23 .cse24 .cse25)))) [2021-10-21 19:48:24,537 INFO L853 garLoopResultBuilder]: At program point L295(lines 282 297) the Hoare annotation is: (let ((.cse20 (= ~p_dw_pc~0 1)) (.cse13 (= ~c_dr_st~0 0)) (.cse28 (= ~p_dw_st~0 0)) (.cse29 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse26 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse27 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse12 (= ~slow_clk_edge~0 ~q_read_ev~0)) (.cse15 (= ~q_write_ev~0 ~q_read_ev~0)) (.cse24 (= ~q_read_ev~0 ~fast_clk_edge~0)) (.cse0 (not .cse27)) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse4 (= 1 ~c_dr_i~0)) (.cse5 (= ~c_dr_pc~0 1)) (.cse19 (= ~t~0 0)) (.cse6 (not .cse26)) (.cse7 (not .cse29)) (.cse8 (= ~p_dw_i~0 1)) (.cse10 (not (= ~slow_clk_edge~0 1))) (.cse11 (not (= ~fast_clk_edge~0 1))) (.cse14 (not .cse28)) (.cse16 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse3 (not .cse13)) (.cse17 (= ULTIMATE.start_activate_threads_~tmp___0~1 0)) (.cse18 (= ~q_req_up~0 0)) (.cse25 (not .cse20)) (.cse21 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse22 (= ~q_read_ev~0 2)) (.cse9 (not (= ~q_write_ev~0 1))) (.cse23 (= ~c_dr_pc~0 ~q_req_up~0))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11) (and .cse12 .cse13 .cse14 .cse2 .cse15 .cse16 .cse4 .cse17 .cse18 .cse19 .cse20 .cse21 .cse22 (not (= ULTIMATE.start_eval_~tmp___1~0 0)) .cse8 .cse23 .cse24) (and .cse1 .cse2 .cse4 .cse5 .cse25 .cse19 .cse8 .cse9 .cse10 .cse11) (and .cse1 .cse2 .cse3 .cse4 .cse5 .cse25 .cse8 .cse9 .cse10 .cse11) (and .cse14 .cse1 .cse3 .cse18 .cse25 .cse22 (not .cse5) .cse9) (and .cse14 .cse1 .cse2 .cse4 .cse5 .cse19 .cse8 .cse9 .cse10 .cse11) (and .cse14 .cse1 .cse3 .cse4 .cse5 .cse8 .cse9 .cse10 .cse11) (and .cse12 .cse13 .cse26 .cse2 .cse15 .cse16 .cse4 .cse17 .cse18 .cse27 .cse19 .cse21 .cse28 .cse22 .cse8 .cse29 (= ~q_req_up~0 ~p_dw_pc~0) .cse23 .cse24) (and .cse0 .cse1 .cse2 .cse4 .cse5 .cse19 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11) (and .cse14 .cse16 .cse3 .cse17 .cse18 .cse25 .cse21 .cse22 .cse9 .cse23)))) [2021-10-21 19:48:24,537 INFO L853 garLoopResultBuilder]: At program point L295-1(lines 282 297) the Hoare annotation is: (let ((.cse1 (not (= ~q_write_ev~0 0))) (.cse8 (= 1 ~c_dr_i~0)) (.cse6 (= ~c_dr_pc~0 1)) (.cse9 (= ~p_dw_i~0 1)) (.cse10 (not (= ~slow_clk_edge~0 1))) (.cse11 (not (= ~fast_clk_edge~0 1))) (.cse0 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse3 (= ~q_req_up~0 0)) (.cse4 (not (= ~p_dw_pc~0 1))) (.cse5 (= ~q_read_ev~0 2)) (.cse7 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 (not .cse6) .cse7) (and (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) .cse1 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0)) .cse2 .cse8 .cse6 .cse4 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (not (= ULTIMATE.start_activate_threads_~tmp~1 0)) .cse9 .cse7 .cse10 .cse11) (and .cse0 .cse1 .cse2 .cse8 .cse6 .cse9 .cse7 .cse10 .cse11) (and .cse0 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse3 .cse4 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse5 .cse7 (= ~c_dr_pc~0 ~q_req_up~0)))) [2021-10-21 19:48:24,537 INFO L853 garLoopResultBuilder]: At program point L295-2(lines 282 297) the Hoare annotation is: (let ((.cse0 (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse4 (= 1 ~c_dr_i~0)) (.cse5 (= ~c_dr_pc~0 1)) (.cse13 (= ~t~0 0)) (.cse6 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (.cse7 (not (= ULTIMATE.start_activate_threads_~tmp~1 0))) (.cse8 (= ~p_dw_i~0 1)) (.cse10 (not (= ~slow_clk_edge~0 1))) (.cse11 (not (= ~fast_clk_edge~0 1))) (.cse14 (not (= ~p_dw_st~0 0))) (.cse3 (not (= ~c_dr_st~0 0))) (.cse15 (= ~q_req_up~0 0)) (.cse12 (not (= ~p_dw_pc~0 1))) (.cse16 (= ~q_read_ev~0 2)) (.cse9 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11) (and .cse1 .cse2 .cse4 .cse5 .cse12 .cse13 .cse8 .cse9 .cse10 .cse11) (and .cse1 .cse2 .cse3 .cse4 .cse5 .cse12 .cse8 .cse9 .cse10 .cse11) (and .cse14 .cse1 .cse3 .cse15 .cse12 .cse16 (not .cse5) .cse9) (and .cse14 .cse1 .cse2 .cse4 .cse5 .cse13 .cse8 .cse9 .cse10 .cse11) (and .cse14 .cse1 .cse3 .cse4 .cse5 .cse8 .cse9 .cse10 .cse11) (and .cse0 .cse1 .cse2 .cse4 .cse5 .cse13 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11) (and .cse14 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse3 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse15 .cse12 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse16 .cse9 (= ~c_dr_pc~0 ~q_req_up~0)))) [2021-10-21 19:48:24,538 INFO L853 garLoopResultBuilder]: At program point L163(lines 140 184) the Hoare annotation is: (let ((.cse0 (not (= ~p_dw_st~0 0))) (.cse1 (not (= ~q_write_ev~0 0))) (.cse2 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (not (= ULTIMATE.start_eval_~tmp___1~0 0))) (.cse7 (= ~p_dw_i~0 1)) (.cse8 (not (= ~q_write_ev~0 1))) (.cse9 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 (not (= ~c_dr_st~0 0)) .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 (= ~t~0 0) .cse6 .cse7 .cse8 .cse9 .cse10))) [2021-10-21 19:48:24,538 INFO L857 garLoopResultBuilder]: For program point L97-1(lines 97 106) no Hoare annotation was computed. [2021-10-21 19:48:24,538 INFO L857 garLoopResultBuilder]: For program point L97-3(lines 97 106) no Hoare annotation was computed. [2021-10-21 19:48:24,538 INFO L857 garLoopResultBuilder]: For program point L97-5(lines 97 106) no Hoare annotation was computed. [2021-10-21 19:48:24,539 INFO L853 garLoopResultBuilder]: At program point L296(lines 279 298) the Hoare annotation is: (let ((.cse22 (= ~p_dw_pc~0 1)) (.cse17 (= ~c_dr_st~0 0)) (.cse29 (= ~p_dw_st~0 0)) (.cse30 (= ULTIMATE.start_activate_threads_~tmp~1 0)) (.cse27 (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (.cse28 (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (let ((.cse11 (not .cse28)) (.cse13 (not .cse27)) (.cse14 (not .cse30)) (.cse16 (= ~slow_clk_edge~0 ~q_read_ev~0)) (.cse18 (= ~q_write_ev~0 ~q_read_ev~0)) (.cse26 (= ~q_read_ev~0 ~fast_clk_edge~0)) (.cse15 (not .cse29)) (.cse19 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0)) (.cse2 (not .cse17)) (.cse20 (= ULTIMATE.start_activate_threads_~tmp___0~1 0)) (.cse21 (= ~q_req_up~0 0)) (.cse23 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0)) (.cse24 (= ~q_read_ev~0 2)) (.cse25 (= ~c_dr_pc~0 ~q_req_up~0)) (.cse0 (not (= ~q_write_ev~0 0))) (.cse1 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (not .cse22)) (.cse12 (= ~t~0 0)) (.cse7 (= ~p_dw_i~0 1)) (.cse8 (not (= ~q_write_ev~0 1))) (.cse9 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse11 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse7 .cse8 .cse9 .cse10) (and .cse16 .cse17 .cse15 .cse1 .cse18 .cse19 .cse3 .cse4 .cse20 .cse21 .cse12 .cse22 .cse23 .cse24 (not (= ULTIMATE.start_eval_~tmp___1~0 0)) .cse7 .cse25 .cse26) (and .cse11 .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse2 .cse21 .cse6 .cse24 (not .cse5) .cse8) (and .cse15 .cse0 .cse2 .cse3 .cse5 .cse7 .cse8 .cse9 .cse10) (and .cse16 .cse17 .cse27 .cse1 .cse18 .cse19 .cse3 .cse4 .cse20 .cse21 .cse28 .cse12 .cse23 .cse29 .cse24 .cse7 .cse30 (= ~q_req_up~0 ~p_dw_pc~0) .cse25 .cse26) (and .cse15 .cse19 .cse2 .cse20 .cse21 .cse6 .cse23 .cse24 .cse8 .cse25) (and .cse0 .cse1 .cse3 .cse4 .cse5 .cse6 .cse12 .cse7 .cse8 .cse9 .cse10)))) [2021-10-21 19:48:24,539 INFO L853 garLoopResultBuilder]: At program point L296-1(lines 279 298) the Hoare annotation is: (let ((.cse1 (not (= ~q_write_ev~0 0))) (.cse8 (= 1 ~c_dr_i~0)) (.cse6 (= ~c_dr_pc~0 1)) (.cse9 (= ~p_dw_i~0 1)) (.cse10 (not (= ~slow_clk_edge~0 1))) (.cse11 (not (= ~fast_clk_edge~0 1))) (.cse0 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse3 (= ~q_req_up~0 0)) (.cse4 (not (= ~p_dw_pc~0 1))) (.cse5 (= ~q_read_ev~0 2)) (.cse7 (not (= ~q_write_ev~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 (not .cse6) .cse7) (and (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|)) .cse1 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0)) .cse2 .cse8 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0)) .cse6 .cse4 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0)) (not (= ULTIMATE.start_activate_threads_~tmp~1 0)) .cse9 .cse7 .cse10 .cse11) (and .cse0 .cse1 .cse2 .cse8 .cse6 .cse9 .cse7 .cse10 .cse11) (and .cse0 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse3 .cse4 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse5 .cse7 (= ~c_dr_pc~0 ~q_req_up~0)))) [2021-10-21 19:48:24,539 INFO L853 garLoopResultBuilder]: At program point L296-2(lines 279 298) the Hoare annotation is: (let ((.cse11 (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (.cse13 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (.cse14 (not (= ULTIMATE.start_activate_threads_~tmp~1 0))) (.cse15 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse16 (= ~q_req_up~0 0)) (.cse17 (= ~q_read_ev~0 2)) (.cse0 (not (= ~q_write_ev~0 0))) (.cse1 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (not (= ~p_dw_pc~0 1))) (.cse12 (= ~t~0 0)) (.cse7 (= ~p_dw_i~0 1)) (.cse8 (not (= ~q_write_ev~0 1))) (.cse9 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse11 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse7 .cse8 .cse9 .cse10) (and .cse11 .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse2 .cse16 .cse6 .cse17 (not .cse5) .cse8) (and .cse15 .cse0 .cse2 .cse3 .cse5 .cse7 .cse8 .cse9 .cse10) (and .cse15 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse16 .cse6 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse17 .cse8 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse3 .cse4 .cse5 .cse6 .cse12 .cse7 .cse8 .cse9 .cse10))) [2021-10-21 19:48:24,540 INFO L857 garLoopResultBuilder]: For program point L98(lines 98 103) no Hoare annotation was computed. [2021-10-21 19:48:24,540 INFO L857 garLoopResultBuilder]: For program point L98-1(lines 98 103) no Hoare annotation was computed. [2021-10-21 19:48:24,540 INFO L857 garLoopResultBuilder]: For program point L98-2(lines 98 103) no Hoare annotation was computed. [2021-10-21 19:48:24,540 INFO L857 garLoopResultBuilder]: For program point L-1(line -1) no Hoare annotation was computed. [2021-10-21 19:48:24,540 INFO L857 garLoopResultBuilder]: For program point ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION(line 11) no Hoare annotation was computed. [2021-10-21 19:48:24,540 INFO L857 garLoopResultBuilder]: For program point L33-1(lines 33 37) no Hoare annotation was computed. [2021-10-21 19:48:24,541 INFO L857 garLoopResultBuilder]: For program point L33-3(lines 33 37) no Hoare annotation was computed. [2021-10-21 19:48:24,541 INFO L857 garLoopResultBuilder]: For program point L265-1(lines 264 277) no Hoare annotation was computed. [2021-10-21 19:48:24,541 INFO L853 garLoopResultBuilder]: At program point L464(lines 453 466) the Hoare annotation is: (let ((.cse11 (not (= 0 |ULTIMATE.start_is_do_write_p_triggered_#res|))) (.cse13 (not (= ULTIMATE.start_is_do_write_p_triggered_~__retres1~0 0))) (.cse14 (not (= ULTIMATE.start_activate_threads_~tmp~1 0))) (.cse15 (not (= ~p_dw_st~0 0))) (.cse2 (not (= ~c_dr_st~0 0))) (.cse16 (= ~q_req_up~0 0)) (.cse17 (= ~q_read_ev~0 2)) (.cse0 (not (= ~q_write_ev~0 0))) (.cse1 (not (= ULTIMATE.start_exists_runnable_thread_~__retres1~2 0))) (.cse3 (= 1 ~c_dr_i~0)) (.cse4 (not (= |ULTIMATE.start_exists_runnable_thread_#res| 0))) (.cse5 (= ~c_dr_pc~0 1)) (.cse6 (not (= ~p_dw_pc~0 1))) (.cse12 (= ~t~0 0)) (.cse7 (= ~p_dw_i~0 1)) (.cse8 (not (= ~q_write_ev~0 1))) (.cse9 (not (= ~slow_clk_edge~0 1))) (.cse10 (not (= ~fast_clk_edge~0 1)))) (or (and .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10) (and .cse11 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse1 .cse3 .cse4 .cse5 .cse12 .cse7 .cse8 .cse9 .cse10) (and .cse11 .cse0 .cse1 .cse2 .cse3 .cse4 .cse5 .cse13 .cse14 .cse7 .cse8 .cse9 .cse10) (and .cse15 .cse0 .cse2 .cse16 .cse6 .cse17 (not .cse5) .cse8) (and .cse15 .cse0 .cse2 .cse3 .cse5 .cse7 .cse8 .cse9 .cse10) (and .cse15 (= ULTIMATE.start_is_do_read_c_triggered_~__retres1~1 0) .cse2 (= ULTIMATE.start_activate_threads_~tmp___0~1 0) .cse16 .cse6 (= |ULTIMATE.start_is_do_read_c_triggered_#res| 0) .cse17 .cse8 (= ~c_dr_pc~0 ~q_req_up~0)) (and .cse0 .cse1 .cse3 .cse4 .cse5 .cse6 .cse12 .cse7 .cse8 .cse9 .cse10))) [2021-10-21 19:48:24,541 INFO L857 garLoopResultBuilder]: For program point L431(lines 431 438) no Hoare annotation was computed. [2021-10-21 19:48:24,541 INFO L857 garLoopResultBuilder]: For program point L68-1(lines 68 77) no Hoare annotation was computed. [2021-10-21 19:48:24,546 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-21 19:48:24,666 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.10 07:48:24 BoogieIcfgContainer [2021-10-21 19:48:24,666 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-21 19:48:24,667 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-21 19:48:24,667 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-21 19:48:24,667 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-21 19:48:24,668 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 07:47:47" (3/4) ... [2021-10-21 19:48:24,671 INFO L137 WitnessPrinter]: Generating witness for correct program [2021-10-21 19:48:24,699 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 7 nodes and edges [2021-10-21 19:48:24,700 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 4 nodes and edges [2021-10-21 19:48:24,701 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2021-10-21 19:48:24,702 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2021-10-21 19:48:24,734 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && q_read_ev == 2) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) || (((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && 1 == c_dr_i) && q_req_up == 0) && 0 == \result) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) [2021-10-21 19:48:24,736 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && q_req_up == 0) && 0 == \result) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && q_read_ev == 2) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,737 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && \result == 0) && q_read_ev == 2) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,737 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && \result == 0) && q_read_ev == 2) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,737 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,738 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,738 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,739 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((!(p_dw_st == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,739 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && c_dr_pc == q_req_up)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,740 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,740 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,740 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(tmp___1 == 0)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,741 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && c_dr_pc == q_req_up)) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,741 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && c_dr_pc == q_req_up) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && 0 == \result) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,742 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && t == 0) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,742 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_pc == 1) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_pc == 1) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,742 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,742 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((((((slow_clk_edge == q_read_ev && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && q_req_up == 0) && 0 == \result) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && q_read_ev == fast_clk_edge)) || ((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,743 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && tmp == 0) && c_dr_pc == q_req_up)) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) [2021-10-21 19:48:24,743 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && \result == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && \result == 0) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0)) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && c_dr_pc == q_req_up)) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && \result == 0) && !(tmp == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && \result == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,747 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0)) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && c_dr_pc == q_req_up)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,747 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,747 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,747 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,750 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(q_write_ev == 0) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,750 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,751 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,751 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,752 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: (((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (c_dr_pc == 1 && (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))))) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,752 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) || ((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) && c_dr_pc == 1)) || (((((((((((__retres1 == 0 && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((((__retres1 == 0 && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && t == 0) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && !(p_dw_pc == 1)) && t == 0) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) && c_dr_pc == 1)) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) [2021-10-21 19:48:24,752 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,752 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) [2021-10-21 19:48:24,752 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) && !(q_write_ev == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && tmp == 0) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((!(q_write_ev == 0) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) [2021-10-21 19:48:24,753 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && \result == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) && !(q_write_ev == 1))) || (((((((((!(q_write_ev == 0) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && \result == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && \result == 0) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) [2021-10-21 19:48:24,753 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((!(q_write_ev == 0) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1))) || (((((((((!(0 == \result) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) && !(q_write_ev == 1)) [2021-10-21 19:48:24,819 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/witness.graphml [2021-10-21 19:48:24,820 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-21 19:48:24,822 INFO L168 Benchmark]: Toolchain (without parser) took 38201.11 ms. Allocated memory was 107.0 MB in the beginning and 1.4 GB in the end (delta: 1.3 GB). Free memory was 74.8 MB in the beginning and 1.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 50.4 MB. Max. memory is 16.1 GB. [2021-10-21 19:48:24,822 INFO L168 Benchmark]: CDTParser took 0.26 ms. Allocated memory is still 107.0 MB. Free memory is still 62.4 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-21 19:48:24,823 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.09 ms. Allocated memory was 107.0 MB in the beginning and 136.3 MB in the end (delta: 29.4 MB). Free memory was 74.4 MB in the beginning and 108.1 MB in the end (delta: -33.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-21 19:48:24,824 INFO L168 Benchmark]: Boogie Procedure Inliner took 87.56 ms. Allocated memory is still 136.3 MB. Free memory was 108.1 MB in the beginning and 105.5 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-21 19:48:24,824 INFO L168 Benchmark]: Boogie Preprocessor took 64.83 ms. Allocated memory is still 136.3 MB. Free memory was 105.5 MB in the beginning and 103.4 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-21 19:48:24,824 INFO L168 Benchmark]: RCFGBuilder took 656.12 ms. Allocated memory is still 136.3 MB. Free memory was 103.4 MB in the beginning and 83.5 MB in the end (delta: 19.9 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. [2021-10-21 19:48:24,825 INFO L168 Benchmark]: TraceAbstraction took 36841.30 ms. Allocated memory was 136.3 MB in the beginning and 1.4 GB in the end (delta: 1.3 GB). Free memory was 82.9 MB in the beginning and 1.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 875.5 MB. Max. memory is 16.1 GB. [2021-10-21 19:48:24,825 INFO L168 Benchmark]: Witness Printer took 152.75 ms. Allocated memory is still 1.4 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 9.4 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-21 19:48:24,832 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26 ms. Allocated memory is still 107.0 MB. Free memory is still 62.4 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 380.09 ms. Allocated memory was 107.0 MB in the beginning and 136.3 MB in the end (delta: 29.4 MB). Free memory was 74.4 MB in the beginning and 108.1 MB in the end (delta: -33.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 87.56 ms. Allocated memory is still 136.3 MB. Free memory was 108.1 MB in the beginning and 105.5 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 64.83 ms. Allocated memory is still 136.3 MB. Free memory was 105.5 MB in the beginning and 103.4 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 656.12 ms. Allocated memory is still 136.3 MB. Free memory was 103.4 MB in the beginning and 83.5 MB in the end (delta: 19.9 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. * TraceAbstraction took 36841.30 ms. Allocated memory was 136.3 MB in the beginning and 1.4 GB in the end (delta: 1.3 GB). Free memory was 82.9 MB in the beginning and 1.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 875.5 MB. Max. memory is 16.1 GB. * Witness Printer took 152.75 ms. Allocated memory is still 1.4 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 9.4 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 11]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - PositiveResult [Line: 11]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 131 locations, 2 error locations. Started 1 CEGAR loops. OverallTime: 36663.1ms, OverallIterations: 20, TraceHistogramMax: 5, EmptinessCheckTime: 91.1ms, AutomataDifference: 8801.4ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 19495.3ms, InitialAbstractionConstructionTime: 13.6ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 3890 SDtfs, 7211 SDslu, 5621 SDs, 0 SdLazy, 635 SolverSat, 218 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 698.0ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 123 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 316.6ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=8521occurred in iteration=8, InterpolantAutomatonStates: 97, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 6639.5ms AutomataMinimizationTime, 20 MinimizatonAttempts, 10392 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: 0.0ms HoareAnnotationTime, 43 LocationsWithAnnotation, 43 PreInvPairs, 1302 NumberOfFragments, 8914 HoareAnnotationTreeSize, 43 FomulaSimplifications, 1737934 FormulaSimplificationTreeSizeReduction, 7981.1ms HoareSimplificationTime, 43 FomulaSimplificationsInter, 71410 FormulaSimplificationTreeSizeReductionInter, 11465.7ms HoareSimplificationTimeInter, RefinementEngineStatistics: TRACE_CHECK: 92.7ms SsaConstructionTime, 282.3ms SatisfiabilityAnalysisTime, 908.4ms InterpolantComputationTime, 1874 NumberOfCodeBlocks, 1874 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 1854 ConstructedInterpolants, 0 QuantifiedInterpolants, 2917 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 675/675 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 2 specifications checked. All of them hold - InvariantResult [Line: 190]: Loop Invariant Derived loop invariant: (((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((((((slow_clk_edge == q_read_ev && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && q_req_up == 0) && 0 == \result) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && q_read_ev == fast_clk_edge)) || ((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 321]: Loop Invariant Derived loop invariant: ((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0)) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && c_dr_pc == q_req_up)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 57]: Loop Invariant Derived loop invariant: (((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (c_dr_pc == 1 && (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))))) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 279]: Loop Invariant Derived loop invariant: (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 279]: Loop Invariant Derived loop invariant: ((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 282]: Loop Invariant Derived loop invariant: (((((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 190]: Loop Invariant Derived loop invariant: 0 - InvariantResult [Line: 453]: Loop Invariant Derived loop invariant: ((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 54]: Loop Invariant Derived loop invariant: (((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && q_read_ev == 2) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) || (((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && 1 == c_dr_i) && q_req_up == 0) && 0 == \result) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) - InvariantResult [Line: 357]: Loop Invariant Derived loop invariant: ((((((((((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((!(q_write_ev == 0) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1))) || (((((((((!(0 == \result) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) && !(q_write_ev == 1)) - InvariantResult [Line: 83]: Loop Invariant Derived loop invariant: ((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && \result == 0) && q_read_ev == 2) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) - InvariantResult [Line: 303]: Loop Invariant Derived loop invariant: (((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && q_write_ev == q_read_ev) && 1 == c_dr_i) && q_req_up == 0) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || ((((((!(p_dw_st == 0) && q_write_ev == q_read_ev) && !(c_dr_st == 0)) && q_req_up == 0) && q_read_ev == 2) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) - InvariantResult [Line: 527]: Loop Invariant Derived loop invariant: ((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && q_write_ev == q_read_ev) && 1 == c_dr_i) && q_req_up == 0) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge - InvariantResult [Line: 57]: Loop Invariant Derived loop invariant: (((((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && c_dr_pc == q_req_up)) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 502]: Loop Invariant Derived loop invariant: ((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(q_write_ev == 0) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 54]: Loop Invariant Derived loop invariant: (((((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && c_dr_pc == q_req_up) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && 0 == \result) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 86]: Loop Invariant Derived loop invariant: ((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && tmp == 0) && c_dr_pc == q_req_up)) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) - InvariantResult [Line: 317]: Loop Invariant Derived loop invariant: ((((((((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 246]: Loop Invariant Derived loop invariant: (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((!(p_dw_st == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 279]: Loop Invariant Derived loop invariant: ((((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 140]: Loop Invariant Derived loop invariant: (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 54]: Loop Invariant Derived loop invariant: ((((((((((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) || ((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) && c_dr_pc == 1)) || (((((((((((__retres1 == 0 && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((((__retres1 == 0 && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && t == 0) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && !(p_dw_pc == 1)) && t == 0) && !(__retres1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) && c_dr_pc == 1)) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && 0 == \result) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) - InvariantResult [Line: 83]: Loop Invariant Derived loop invariant: ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && \result == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && \result == 0) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0)) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && c_dr_pc == q_req_up)) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && \result == 0) && !(tmp == 0)) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && \result == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 57]: Loop Invariant Derived loop invariant: ((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && q_read_ev == 2) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) || ((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && 1 == c_dr_i) && q_req_up == 0) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) - InvariantResult [Line: 299]: Loop Invariant Derived loop invariant: ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && q_req_up == 0) && c_dr_pc == 1) && p_dw_i == 1) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && c_dr_pc == q_req_up)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 402]: Loop Invariant Derived loop invariant: (((((((((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 86]: Loop Invariant Derived loop invariant: (((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && q_req_up == 0) && 0 == \result) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && q_read_ev == 2) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) - InvariantResult [Line: 402]: Loop Invariant Derived loop invariant: ((((((((((((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && t == 0) && p_dw_pc == 1) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge)) || (((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(tmp___1 == 0)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 86]: Loop Invariant Derived loop invariant: ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) && !(q_write_ev == 1))) || ((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && q_read_ev == 2) && tmp == 0) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || ((((((((!(q_write_ev == 0) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) - InvariantResult [Line: 468]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 83]: Loop Invariant Derived loop invariant: ((((((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(fast_clk_edge == 1)) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && \result == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((((!(p_dw_st == 0) && __retres1 == 0) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(c_dr_pc == 1)) && tmp == 0) && !(q_write_ev == 1))) || (((((((((!(q_write_ev == 0) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && \result == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((!(q_write_ev == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && __retres1 == 0) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && \result == 0) && p_dw_st == 0) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && q_req_up == 0) && 0 == \result) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && tmp == 0) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 140]: Loop Invariant Derived loop invariant: (((((((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && p_dw_pc == 1) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((((((((!(p_dw_st == 0) && !(0 == \result)) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && p_dw_pc == 1) && !(tmp == 0)) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 265]: Loop Invariant Derived loop invariant: ((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && q_write_ev == q_read_ev) && 1 == c_dr_i) && q_req_up == 0) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge - InvariantResult [Line: 546]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 396]: Loop Invariant Derived loop invariant: ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 299]: Loop Invariant Derived loop invariant: (((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && q_write_ev == q_read_ev) && 1 == c_dr_i) && q_req_up == 0) && t == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((!(p_dw_st == 0) && !(c_dr_st == 0)) && q_req_up == 0) && q_read_ev == 2) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) - InvariantResult [Line: 317]: Loop Invariant Derived loop invariant: (((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 449]: Loop Invariant Derived loop invariant: ((((((((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up)) || ((((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 337]: Loop Invariant Derived loop invariant: (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1))) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 282]: Loop Invariant Derived loop invariant: (((((((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(q_write_ev == 0) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1))) || (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && t == 0) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) - InvariantResult [Line: 140]: Loop Invariant Derived loop invariant: ((((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && !(p_dw_st == 0)) && !(__retres1 == 0)) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && !(\result == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && t == 0) && \result == 0) && q_read_ev == 2) && !(tmp___1 == 0)) && p_dw_i == 1) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(__retres1 == 0)) && 1 == c_dr_i) && !(\result == 0)) && c_dr_pc == 1) && t == 0) && !(tmp___1 == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1)) - InvariantResult [Line: 321]: Loop Invariant Derived loop invariant: (((((((((((((((((slow_clk_edge == q_read_ev && c_dr_st == 0) && __retres1 == 0) && q_write_ev == q_read_ev) && __retres1 == 0) && 1 == c_dr_i) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && t == 0) && \result == 0) && p_dw_st == 0) && q_read_ev == 2) && p_dw_i == 1) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) && q_read_ev == fast_clk_edge) || (((((((((((!(p_dw_st == 0) && __retres1 == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && 0 == \result) && \result == 0) && q_read_ev == 2) && tmp == 0) && q_req_up == p_dw_pc) && c_dr_pc == q_req_up) - InvariantResult [Line: 282]: Loop Invariant Derived loop invariant: (((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && q_req_up == 0) && !(p_dw_pc == 1)) && q_read_ev == 2) && !(c_dr_pc == 1)) && !(q_write_ev == 1)) || ((((((((((((!(0 == \result) && !(q_write_ev == 0)) && !(__retres1 == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && !(p_dw_pc == 1)) && !(__retres1 == 0)) && !(tmp == 0)) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || ((((((((!(p_dw_st == 0) && !(q_write_ev == 0)) && !(c_dr_st == 0)) && 1 == c_dr_i) && c_dr_pc == 1) && p_dw_i == 1) && !(q_write_ev == 1)) && !(slow_clk_edge == 1)) && !(fast_clk_edge == 1))) || (((((((((!(p_dw_st == 0) && __retres1 == 0) && !(c_dr_st == 0)) && tmp___0 == 0) && q_req_up == 0) && !(p_dw_pc == 1)) && \result == 0) && q_read_ev == 2) && !(q_write_ev == 1)) && c_dr_pc == q_req_up) RESULT: Ultimate proved your program to be correct! [2021-10-21 19:48:24,954 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e97c2877-6e6d-4e01-a147-a5324c5246b3/bin/uautomizer-j4sWxH34Be/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...