./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/bist_cell.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/bist_cell.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d91e51d094cab36c95ce71390b6f6e3b0860cf29ca1f23e180f46919f9e9f05c ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 09:57:30,725 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 09:57:30,727 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 09:57:30,760 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 09:57:30,760 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 09:57:30,762 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 09:57:30,764 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 09:57:30,766 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 09:57:30,769 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 09:57:30,770 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 09:57:30,771 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 09:57:30,773 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 09:57:30,773 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 09:57:30,775 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 09:57:30,776 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 09:57:30,778 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 09:57:30,779 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 09:57:30,780 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 09:57:30,783 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 09:57:30,785 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 09:57:30,787 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 09:57:30,790 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 09:57:30,791 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 09:57:30,792 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 09:57:30,796 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 09:57:30,797 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 09:57:30,797 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 09:57:30,799 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 09:57:30,799 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 09:57:30,801 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 09:57:30,801 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 09:57:30,802 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 09:57:30,803 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 09:57:30,804 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 09:57:30,805 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 09:57:30,806 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 09:57:30,807 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 09:57:30,807 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 09:57:30,808 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 09:57:30,809 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 09:57:30,810 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 09:57:30,814 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-10-28 09:57:30,859 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 09:57:30,860 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 09:57:30,860 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 09:57:30,860 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 09:57:30,862 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 09:57:30,863 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 09:57:30,863 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 09:57:30,863 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-28 09:57:30,863 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-28 09:57:30,863 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-28 09:57:30,864 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-28 09:57:30,864 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-28 09:57:30,864 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-28 09:57:30,864 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 09:57:30,864 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 09:57:30,865 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-28 09:57:30,865 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 09:57:30,865 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 09:57:30,865 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 09:57:30,865 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-28 09:57:30,866 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-28 09:57:30,866 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-28 09:57:30,866 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 09:57:30,866 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 09:57:30,866 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-28 09:57:30,867 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 09:57:30,867 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-28 09:57:30,867 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 09:57:30,867 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 09:57:30,868 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 09:57:30,868 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 09:57:30,868 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 09:57:30,869 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-28 09:57:30,869 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d91e51d094cab36c95ce71390b6f6e3b0860cf29ca1f23e180f46919f9e9f05c [2021-10-28 09:57:31,154 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 09:57:31,173 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 09:57:31,175 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 09:57:31,176 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 09:57:31,177 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 09:57:31,178 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/systemc/bist_cell.cil.c [2021-10-28 09:57:31,265 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/data/a58139fff/e3e6d73fbb844ee8b3b01f5ff8b2989b/FLAGf855f5d58 [2021-10-28 09:57:31,719 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 09:57:31,720 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/sv-benchmarks/c/systemc/bist_cell.cil.c [2021-10-28 09:57:31,728 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/data/a58139fff/e3e6d73fbb844ee8b3b01f5ff8b2989b/FLAGf855f5d58 [2021-10-28 09:57:32,062 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/data/a58139fff/e3e6d73fbb844ee8b3b01f5ff8b2989b [2021-10-28 09:57:32,064 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 09:57:32,066 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 09:57:32,082 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 09:57:32,082 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 09:57:32,086 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 09:57:32,086 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,087 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b7852db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32, skipping insertion in model container [2021-10-28 09:57:32,088 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,094 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 09:57:32,122 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 09:57:32,281 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/sv-benchmarks/c/systemc/bist_cell.cil.c[334,347] [2021-10-28 09:57:32,332 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:57:32,342 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 09:57:32,353 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/sv-benchmarks/c/systemc/bist_cell.cil.c[334,347] [2021-10-28 09:57:32,378 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:57:32,394 INFO L208 MainTranslator]: Completed translation [2021-10-28 09:57:32,394 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32 WrapperNode [2021-10-28 09:57:32,395 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 09:57:32,396 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 09:57:32,396 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 09:57:32,396 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 09:57:32,404 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,413 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,448 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 09:57:32,449 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 09:57:32,449 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 09:57:32,450 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 09:57:32,458 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,458 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,462 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,477 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,485 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,508 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,511 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,515 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 09:57:32,526 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 09:57:32,527 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 09:57:32,528 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 09:57:32,529 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (1/1) ... [2021-10-28 09:57:32,537 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:32,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:32,567 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:32,597 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-28 09:57:32,619 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 09:57:32,620 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 09:57:32,620 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 09:57:32,620 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 09:57:33,132 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 09:57:33,133 INFO L299 CfgBuilder]: Removed 64 assume(true) statements. [2021-10-28 09:57:33,135 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:57:33 BoogieIcfgContainer [2021-10-28 09:57:33,135 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 09:57:33,136 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-28 09:57:33,136 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-28 09:57:33,148 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-28 09:57:33,149 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:57:33,149 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.10 09:57:32" (1/3) ... [2021-10-28 09:57:33,150 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5c447bbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 09:57:33, skipping insertion in model container [2021-10-28 09:57:33,150 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:57:33,151 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:57:32" (2/3) ... [2021-10-28 09:57:33,151 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5c447bbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 09:57:33, skipping insertion in model container [2021-10-28 09:57:33,151 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:57:33,151 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:57:33" (3/3) ... [2021-10-28 09:57:33,153 INFO L389 chiAutomizerObserver]: Analyzing ICFG bist_cell.cil.c [2021-10-28 09:57:33,221 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-28 09:57:33,222 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-28 09:57:33,222 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-28 09:57:33,222 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-28 09:57:33,222 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-28 09:57:33,222 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-28 09:57:33,222 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-28 09:57:33,222 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-28 09:57:33,242 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 107 states, 106 states have (on average 1.6886792452830188) internal successors, (179), 106 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:33,268 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:33,268 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:33,268 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:33,277 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:33,277 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:33,277 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-28 09:57:33,278 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 107 states, 106 states have (on average 1.6886792452830188) internal successors, (179), 106 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:33,286 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:33,286 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:33,286 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:33,288 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:33,288 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:33,296 INFO L791 eck$LassoCheckResult]: Stem: 96#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 32#L-1true havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 46#L482true havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 83#L204true assume !(1 == ~b0_req_up~0); 45#L204-1true assume !(1 == ~b1_req_up~0); 77#L211true assume !(1 == ~d0_req_up~0); 33#L218true assume !(1 == ~d1_req_up~0); 28#L225true assume !(1 == ~z_req_up~0); 107#L232true assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 92#L247-1true assume !(0 == ~b0_ev~0); 97#L313-1true assume !(0 == ~b1_ev~0); 48#L318-1true assume !(0 == ~d0_ev~0); 73#L323-1true assume !(0 == ~d1_ev~0); 63#L328-1true assume !(0 == ~z_ev~0); 86#L333-1true havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 84#L99true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 20#L121true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 41#L122true activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 94#L382true assume !(0 != activate_threads_~tmp~1); 11#L382-2true assume !(1 == ~b0_ev~0); 17#L346-1true assume !(1 == ~b1_ev~0); 21#L351-1true assume !(1 == ~d0_ev~0); 22#L356-1true assume !(1 == ~d1_ev~0); 12#L361-1true assume !(1 == ~z_ev~0); 100#L424-1true [2021-10-28 09:57:33,297 INFO L793 eck$LassoCheckResult]: Loop: 100#L424-1true assume !false; 82#L425true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 47#L287true assume false; 99#L303true start_simulation_~kernel_st~0 := 2; 75#L204-2true assume !(1 == ~b0_req_up~0); 43#L204-3true assume !(1 == ~b1_req_up~0); 85#L211-1true assume !(1 == ~d0_req_up~0); 34#L218-1true assume !(1 == ~d1_req_up~0); 74#L225-1true assume !(1 == ~z_req_up~0); 79#L232-1true start_simulation_~kernel_st~0 := 3; 76#L313-2true assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 64#L313-4true assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 72#L318-3true assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 105#L323-3true assume !(0 == ~d1_ev~0); 101#L328-3true assume 0 == ~z_ev~0;~z_ev~0 := 1; 56#L333-3true havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 38#L99-1true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 80#L121-1true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 37#L122-1true activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 24#L382-3true assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 67#L382-5true assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 44#L346-3true assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 65#L351-3true assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 69#L356-3true assume !(1 == ~d1_ev~0); 5#L361-3true assume 1 == ~z_ev~0;~z_ev~0 := 2; 59#L366-3true havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 68#L260-1true assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 27#L267-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 54#L268-1true stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 53#L399true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 31#L406true stop_simulation_#res := stop_simulation_~__retres2~0; 9#L407true start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 15#L441true assume !(0 != start_simulation_~tmp~3); 100#L424-1true [2021-10-28 09:57:33,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:33,303 INFO L85 PathProgramCache]: Analyzing trace with hash 201072121, now seen corresponding path program 1 times [2021-10-28 09:57:33,312 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:33,313 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071037270] [2021-10-28 09:57:33,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:33,314 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:33,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:33,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:33,531 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:33,531 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2071037270] [2021-10-28 09:57:33,532 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2071037270] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:33,533 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:33,533 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:33,535 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254671000] [2021-10-28 09:57:33,543 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:33,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:33,546 INFO L85 PathProgramCache]: Analyzing trace with hash -503786151, now seen corresponding path program 1 times [2021-10-28 09:57:33,547 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:33,547 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885787567] [2021-10-28 09:57:33,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:33,548 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:33,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:33,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:33,601 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:33,601 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885787567] [2021-10-28 09:57:33,602 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1885787567] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:33,602 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:33,602 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:57:33,602 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2135171216] [2021-10-28 09:57:33,604 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:33,605 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:33,621 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:33,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:33,626 INFO L87 Difference]: Start difference. First operand has 107 states, 106 states have (on average 1.6886792452830188) internal successors, (179), 106 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:33,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:33,679 INFO L93 Difference]: Finished difference Result 107 states and 173 transitions. [2021-10-28 09:57:33,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:33,683 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 173 transitions. [2021-10-28 09:57:33,695 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:33,700 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 101 states and 167 transitions. [2021-10-28 09:57:33,701 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:33,702 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:33,703 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 167 transitions. [2021-10-28 09:57:33,704 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:33,704 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2021-10-28 09:57:33,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 167 transitions. [2021-10-28 09:57:33,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:33,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6534653465346534) internal successors, (167), 100 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:33,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 167 transitions. [2021-10-28 09:57:33,748 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2021-10-28 09:57:33,749 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2021-10-28 09:57:33,749 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-28 09:57:33,749 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 167 transitions. [2021-10-28 09:57:33,754 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:33,755 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:33,755 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:33,761 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:33,762 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:33,762 INFO L791 eck$LassoCheckResult]: Stem: 322#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 268#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 269#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 286#L204 assume 1 == ~b0_req_up~0; 312#L129 assume !(~b0_val~0 != ~b0_val_t~0); 232#L129-2 ~b0_req_up~0 := 0; 233#L204-1 assume !(1 == ~b1_req_up~0); 285#L211 assume !(1 == ~d0_req_up~0); 270#L218 assume !(1 == ~d1_req_up~0); 260#L225 assume !(1 == ~z_req_up~0); 261#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 318#L247-1 assume !(0 == ~b0_ev~0); 319#L313-1 assume !(0 == ~b1_ev~0); 289#L318-1 assume !(0 == ~d0_ev~0); 290#L323-1 assume !(0 == ~d1_ev~0); 299#L328-1 assume !(0 == ~z_ev~0); 300#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 313#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 241#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 248#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 280#L382 assume !(0 != activate_threads_~tmp~1); 236#L382-2 assume !(1 == ~b0_ev~0); 237#L346-1 assume !(1 == ~b1_ev~0); 244#L351-1 assume !(1 == ~d0_ev~0); 249#L356-1 assume !(1 == ~d1_ev~0); 238#L361-1 assume !(1 == ~z_ev~0); 239#L424-1 [2021-10-28 09:57:33,768 INFO L793 eck$LassoCheckResult]: Loop: 239#L424-1 assume !false; 311#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 287#L287 assume !false; 288#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 291#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 247#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 242#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 223#L282 assume !(0 != eval_~tmp___0~0); 225#L303 start_simulation_~kernel_st~0 := 2; 307#L204-2 assume !(1 == ~b0_req_up~0); 281#L204-3 assume !(1 == ~b1_req_up~0); 276#L211-1 assume !(1 == ~d0_req_up~0); 264#L218-1 assume !(1 == ~d1_req_up~0); 243#L225-1 assume !(1 == ~z_req_up~0); 305#L232-1 start_simulation_~kernel_st~0 := 3; 309#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 301#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 302#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 304#L323-3 assume !(0 == ~d1_ev~0); 323#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 295#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 278#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 273#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 277#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 250#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 251#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 283#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 284#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 303#L356-3 assume !(1 == ~d1_ev~0); 226#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 227#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 296#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 258#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 259#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 293#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 267#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 234#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 235#L441 assume !(0 != start_simulation_~tmp~3); 239#L424-1 [2021-10-28 09:57:33,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:33,769 INFO L85 PathProgramCache]: Analyzing trace with hash 987671025, now seen corresponding path program 1 times [2021-10-28 09:57:33,769 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:33,770 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146154909] [2021-10-28 09:57:33,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:33,770 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:33,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:33,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:33,860 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:33,861 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146154909] [2021-10-28 09:57:33,861 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2146154909] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:33,863 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:33,863 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:33,863 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916763746] [2021-10-28 09:57:33,865 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:33,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:33,868 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 1 times [2021-10-28 09:57:33,868 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:33,869 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51089814] [2021-10-28 09:57:33,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:33,871 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:33,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:33,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:33,947 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:33,954 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51089814] [2021-10-28 09:57:33,955 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [51089814] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:33,955 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:33,955 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:33,956 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479953806] [2021-10-28 09:57:33,957 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:33,957 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:33,958 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:33,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:33,959 INFO L87 Difference]: Start difference. First operand 101 states and 167 transitions. cyclomatic complexity: 67 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:33,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:33,994 INFO L93 Difference]: Finished difference Result 101 states and 166 transitions. [2021-10-28 09:57:33,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:33,995 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 166 transitions. [2021-10-28 09:57:33,997 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,001 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 166 transitions. [2021-10-28 09:57:34,001 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:34,001 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:34,001 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 166 transitions. [2021-10-28 09:57:34,003 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:34,004 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2021-10-28 09:57:34,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 166 transitions. [2021-10-28 09:57:34,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:34,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6435643564356435) internal successors, (166), 100 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 166 transitions. [2021-10-28 09:57:34,030 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2021-10-28 09:57:34,030 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2021-10-28 09:57:34,030 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-28 09:57:34,030 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 166 transitions. [2021-10-28 09:57:34,032 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,032 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:34,033 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:34,035 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,035 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,036 INFO L791 eck$LassoCheckResult]: Stem: 533#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 479#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 480#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 497#L204 assume 1 == ~b0_req_up~0; 523#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 443#L129-2 ~b0_req_up~0 := 0; 444#L204-1 assume !(1 == ~b1_req_up~0); 496#L211 assume !(1 == ~d0_req_up~0); 481#L218 assume !(1 == ~d1_req_up~0); 471#L225 assume !(1 == ~z_req_up~0); 472#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 529#L247-1 assume !(0 == ~b0_ev~0); 530#L313-1 assume !(0 == ~b1_ev~0); 500#L318-1 assume !(0 == ~d0_ev~0); 501#L323-1 assume !(0 == ~d1_ev~0); 510#L328-1 assume !(0 == ~z_ev~0); 511#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 524#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 452#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 459#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 491#L382 assume !(0 != activate_threads_~tmp~1); 447#L382-2 assume !(1 == ~b0_ev~0); 448#L346-1 assume !(1 == ~b1_ev~0); 455#L351-1 assume !(1 == ~d0_ev~0); 460#L356-1 assume !(1 == ~d1_ev~0); 449#L361-1 assume !(1 == ~z_ev~0); 450#L424-1 [2021-10-28 09:57:34,036 INFO L793 eck$LassoCheckResult]: Loop: 450#L424-1 assume !false; 522#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 498#L287 assume !false; 499#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 502#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 458#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 453#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 434#L282 assume !(0 != eval_~tmp___0~0); 436#L303 start_simulation_~kernel_st~0 := 2; 518#L204-2 assume !(1 == ~b0_req_up~0); 492#L204-3 assume !(1 == ~b1_req_up~0); 487#L211-1 assume !(1 == ~d0_req_up~0); 475#L218-1 assume !(1 == ~d1_req_up~0); 454#L225-1 assume !(1 == ~z_req_up~0); 516#L232-1 start_simulation_~kernel_st~0 := 3; 520#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 512#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 513#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 515#L323-3 assume !(0 == ~d1_ev~0); 534#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 506#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 489#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 484#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 488#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 461#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 462#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 494#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 495#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 514#L356-3 assume !(1 == ~d1_ev~0); 437#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 438#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 507#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 469#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 470#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 504#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 478#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 445#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 446#L441 assume !(0 != start_simulation_~tmp~3); 450#L424-1 [2021-10-28 09:57:34,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,037 INFO L85 PathProgramCache]: Analyzing trace with hash 768816307, now seen corresponding path program 1 times [2021-10-28 09:57:34,038 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,038 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1199626362] [2021-10-28 09:57:34,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,038 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,097 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,097 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1199626362] [2021-10-28 09:57:34,097 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1199626362] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,098 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,098 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:34,098 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310331118] [2021-10-28 09:57:34,098 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:34,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,099 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 2 times [2021-10-28 09:57:34,099 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,099 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339940658] [2021-10-28 09:57:34,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,100 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,161 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,162 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339940658] [2021-10-28 09:57:34,162 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1339940658] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,163 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,163 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:34,165 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985529060] [2021-10-28 09:57:34,166 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:34,166 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:34,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:34,166 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:34,167 INFO L87 Difference]: Start difference. First operand 101 states and 166 transitions. cyclomatic complexity: 66 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:34,208 INFO L93 Difference]: Finished difference Result 101 states and 165 transitions. [2021-10-28 09:57:34,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:34,209 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 165 transitions. [2021-10-28 09:57:34,210 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,212 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 165 transitions. [2021-10-28 09:57:34,213 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:34,213 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:34,215 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 165 transitions. [2021-10-28 09:57:34,215 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:34,216 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2021-10-28 09:57:34,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 165 transitions. [2021-10-28 09:57:34,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:34,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6336633663366336) internal successors, (165), 100 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 165 transitions. [2021-10-28 09:57:34,225 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2021-10-28 09:57:34,225 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2021-10-28 09:57:34,225 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-28 09:57:34,225 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 165 transitions. [2021-10-28 09:57:34,226 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,226 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:34,226 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:34,227 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,227 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,228 INFO L791 eck$LassoCheckResult]: Stem: 744#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 690#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 691#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 707#L204 assume 1 == ~b0_req_up~0; 734#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 654#L129-2 ~b0_req_up~0 := 0; 655#L204-1 assume 1 == ~b1_req_up~0; 652#L144 assume !(~b1_val~0 != ~b1_val_t~0); 653#L144-2 ~b1_req_up~0 := 0; 717#L211 assume !(1 == ~d0_req_up~0); 692#L218 assume !(1 == ~d1_req_up~0); 682#L225 assume !(1 == ~z_req_up~0); 683#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 740#L247-1 assume !(0 == ~b0_ev~0); 741#L313-1 assume !(0 == ~b1_ev~0); 710#L318-1 assume !(0 == ~d0_ev~0); 711#L323-1 assume !(0 == ~d1_ev~0); 721#L328-1 assume !(0 == ~z_ev~0); 722#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 735#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 663#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 670#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 702#L382 assume !(0 != activate_threads_~tmp~1); 658#L382-2 assume !(1 == ~b0_ev~0); 659#L346-1 assume !(1 == ~b1_ev~0); 666#L351-1 assume !(1 == ~d0_ev~0); 671#L356-1 assume !(1 == ~d1_ev~0); 660#L361-1 assume !(1 == ~z_ev~0); 661#L424-1 [2021-10-28 09:57:34,228 INFO L793 eck$LassoCheckResult]: Loop: 661#L424-1 assume !false; 733#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 708#L287 assume !false; 709#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 712#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 669#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 664#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 645#L282 assume !(0 != eval_~tmp___0~0); 647#L303 start_simulation_~kernel_st~0 := 2; 729#L204-2 assume !(1 == ~b0_req_up~0); 703#L204-3 assume !(1 == ~b1_req_up~0); 698#L211-1 assume !(1 == ~d0_req_up~0); 686#L218-1 assume !(1 == ~d1_req_up~0); 665#L225-1 assume !(1 == ~z_req_up~0); 727#L232-1 start_simulation_~kernel_st~0 := 3; 731#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 723#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 724#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 726#L323-3 assume !(0 == ~d1_ev~0); 745#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 716#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 700#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 695#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 699#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 672#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 673#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 705#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 706#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 725#L356-3 assume !(1 == ~d1_ev~0); 648#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 649#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 718#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 680#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 681#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 714#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 689#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 656#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 657#L441 assume !(0 != start_simulation_~tmp~3); 661#L424-1 [2021-10-28 09:57:34,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,228 INFO L85 PathProgramCache]: Analyzing trace with hash -1003190981, now seen corresponding path program 1 times [2021-10-28 09:57:34,229 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,229 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673632570] [2021-10-28 09:57:34,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,229 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,272 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,273 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [673632570] [2021-10-28 09:57:34,273 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [673632570] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,273 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,273 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:57:34,273 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [683404634] [2021-10-28 09:57:34,274 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:34,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,274 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 3 times [2021-10-28 09:57:34,274 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,275 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000502649] [2021-10-28 09:57:34,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,275 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,331 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,332 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000502649] [2021-10-28 09:57:34,332 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2000502649] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,332 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,332 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:34,332 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535067044] [2021-10-28 09:57:34,333 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:34,333 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:34,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:57:34,333 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:57:34,334 INFO L87 Difference]: Start difference. First operand 101 states and 165 transitions. cyclomatic complexity: 65 Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:34,384 INFO L93 Difference]: Finished difference Result 101 states and 164 transitions. [2021-10-28 09:57:34,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:57:34,388 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 164 transitions. [2021-10-28 09:57:34,390 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,391 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 164 transitions. [2021-10-28 09:57:34,391 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:34,391 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:34,391 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 164 transitions. [2021-10-28 09:57:34,392 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:34,392 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2021-10-28 09:57:34,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 164 transitions. [2021-10-28 09:57:34,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:34,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6237623762376239) internal successors, (164), 100 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 164 transitions. [2021-10-28 09:57:34,397 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2021-10-28 09:57:34,397 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2021-10-28 09:57:34,397 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-28 09:57:34,397 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 164 transitions. [2021-10-28 09:57:34,398 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,398 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:34,398 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:34,399 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,399 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,400 INFO L791 eck$LassoCheckResult]: Stem: 958#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 904#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 905#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 921#L204 assume 1 == ~b0_req_up~0; 951#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 868#L129-2 ~b0_req_up~0 := 0; 869#L204-1 assume 1 == ~b1_req_up~0; 866#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 867#L144-2 ~b1_req_up~0 := 0; 931#L211 assume !(1 == ~d0_req_up~0); 906#L218 assume !(1 == ~d1_req_up~0); 896#L225 assume !(1 == ~z_req_up~0); 897#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 954#L247-1 assume !(0 == ~b0_ev~0); 955#L313-1 assume !(0 == ~b1_ev~0); 924#L318-1 assume !(0 == ~d0_ev~0); 925#L323-1 assume !(0 == ~d1_ev~0); 935#L328-1 assume !(0 == ~z_ev~0); 936#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 948#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 877#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 884#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 916#L382 assume !(0 != activate_threads_~tmp~1); 872#L382-2 assume !(1 == ~b0_ev~0); 873#L346-1 assume !(1 == ~b1_ev~0); 880#L351-1 assume !(1 == ~d0_ev~0); 885#L356-1 assume !(1 == ~d1_ev~0); 874#L361-1 assume !(1 == ~z_ev~0); 875#L424-1 [2021-10-28 09:57:34,400 INFO L793 eck$LassoCheckResult]: Loop: 875#L424-1 assume !false; 947#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 922#L287 assume !false; 923#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 926#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 883#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 878#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 859#L282 assume !(0 != eval_~tmp___0~0); 861#L303 start_simulation_~kernel_st~0 := 2; 943#L204-2 assume !(1 == ~b0_req_up~0); 917#L204-3 assume !(1 == ~b1_req_up~0); 912#L211-1 assume !(1 == ~d0_req_up~0); 900#L218-1 assume !(1 == ~d1_req_up~0); 879#L225-1 assume !(1 == ~z_req_up~0); 941#L232-1 start_simulation_~kernel_st~0 := 3; 945#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 937#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 938#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 940#L323-3 assume !(0 == ~d1_ev~0); 959#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 930#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 914#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 909#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 913#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 886#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 887#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 919#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 920#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 939#L356-3 assume !(1 == ~d1_ev~0); 862#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 863#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 932#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 894#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 895#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 928#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 903#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 870#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 871#L441 assume !(0 != start_simulation_~tmp~3); 875#L424-1 [2021-10-28 09:57:34,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,400 INFO L85 PathProgramCache]: Analyzing trace with hash -1425892807, now seen corresponding path program 1 times [2021-10-28 09:57:34,400 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,401 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749876849] [2021-10-28 09:57:34,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,401 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,462 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,463 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [749876849] [2021-10-28 09:57:34,463 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [749876849] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,463 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,463 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:34,463 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535303880] [2021-10-28 09:57:34,464 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:34,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,464 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 4 times [2021-10-28 09:57:34,464 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,464 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541579724] [2021-10-28 09:57:34,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,465 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,514 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,515 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541579724] [2021-10-28 09:57:34,515 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [541579724] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,515 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,515 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:34,515 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092128887] [2021-10-28 09:57:34,516 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:34,516 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:34,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:34,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:34,518 INFO L87 Difference]: Start difference. First operand 101 states and 164 transitions. cyclomatic complexity: 64 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:34,530 INFO L93 Difference]: Finished difference Result 101 states and 163 transitions. [2021-10-28 09:57:34,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:34,531 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 163 transitions. [2021-10-28 09:57:34,532 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,534 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 163 transitions. [2021-10-28 09:57:34,534 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:34,534 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:34,535 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 163 transitions. [2021-10-28 09:57:34,537 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:34,537 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2021-10-28 09:57:34,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 163 transitions. [2021-10-28 09:57:34,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:34,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.613861386138614) internal successors, (163), 100 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 163 transitions. [2021-10-28 09:57:34,562 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2021-10-28 09:57:34,562 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2021-10-28 09:57:34,562 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-28 09:57:34,562 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 163 transitions. [2021-10-28 09:57:34,563 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,563 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:34,563 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:34,564 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,565 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,565 INFO L791 eck$LassoCheckResult]: Stem: 1169#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1115#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1116#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1132#L204 assume 1 == ~b0_req_up~0; 1160#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1079#L129-2 ~b0_req_up~0 := 0; 1080#L204-1 assume 1 == ~b1_req_up~0; 1077#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1078#L144-2 ~b1_req_up~0 := 0; 1142#L211 assume 1 == ~d0_req_up~0; 1144#L159 assume !(~d0_val~0 != ~d0_val_t~0); 1145#L159-2 ~d0_req_up~0 := 0; 1117#L218 assume !(1 == ~d1_req_up~0); 1109#L225 assume !(1 == ~z_req_up~0); 1110#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1165#L247-1 assume !(0 == ~b0_ev~0); 1166#L313-1 assume !(0 == ~b1_ev~0); 1135#L318-1 assume !(0 == ~d0_ev~0); 1136#L323-1 assume !(0 == ~d1_ev~0); 1146#L328-1 assume !(0 == ~z_ev~0); 1147#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1161#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1088#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1095#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1127#L382 assume !(0 != activate_threads_~tmp~1); 1083#L382-2 assume !(1 == ~b0_ev~0); 1084#L346-1 assume !(1 == ~b1_ev~0); 1091#L351-1 assume !(1 == ~d0_ev~0); 1096#L356-1 assume !(1 == ~d1_ev~0); 1085#L361-1 assume !(1 == ~z_ev~0); 1086#L424-1 [2021-10-28 09:57:34,566 INFO L793 eck$LassoCheckResult]: Loop: 1086#L424-1 assume !false; 1158#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1133#L287 assume !false; 1134#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1137#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1094#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1089#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1070#L282 assume !(0 != eval_~tmp___0~0); 1072#L303 start_simulation_~kernel_st~0 := 2; 1154#L204-2 assume !(1 == ~b0_req_up~0); 1128#L204-3 assume !(1 == ~b1_req_up~0); 1123#L211-1 assume !(1 == ~d0_req_up~0); 1108#L218-1 assume !(1 == ~d1_req_up~0); 1090#L225-1 assume !(1 == ~z_req_up~0); 1152#L232-1 start_simulation_~kernel_st~0 := 3; 1156#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1148#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1149#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1151#L323-3 assume !(0 == ~d1_ev~0); 1170#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1141#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1125#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1120#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1124#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1097#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1098#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1130#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1131#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1150#L356-3 assume !(1 == ~d1_ev~0); 1073#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1074#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1143#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1105#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1106#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1138#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1114#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 1081#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1082#L441 assume !(0 != start_simulation_~tmp~3); 1086#L424-1 [2021-10-28 09:57:34,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,566 INFO L85 PathProgramCache]: Analyzing trace with hash -665750479, now seen corresponding path program 1 times [2021-10-28 09:57:34,567 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,567 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038289958] [2021-10-28 09:57:34,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,567 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,635 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,635 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038289958] [2021-10-28 09:57:34,636 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2038289958] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,636 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,636 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:57:34,636 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210911007] [2021-10-28 09:57:34,636 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:34,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,637 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 5 times [2021-10-28 09:57:34,637 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,637 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915851749] [2021-10-28 09:57:34,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,637 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,666 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,666 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915851749] [2021-10-28 09:57:34,666 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [915851749] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,666 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,666 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:34,667 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862429724] [2021-10-28 09:57:34,667 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:34,667 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:34,668 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:57:34,668 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:57:34,668 INFO L87 Difference]: Start difference. First operand 101 states and 163 transitions. cyclomatic complexity: 63 Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 4 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:34,694 INFO L93 Difference]: Finished difference Result 101 states and 162 transitions. [2021-10-28 09:57:34,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:57:34,694 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 162 transitions. [2021-10-28 09:57:34,696 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,697 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 162 transitions. [2021-10-28 09:57:34,697 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:34,697 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:34,697 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 162 transitions. [2021-10-28 09:57:34,698 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:34,698 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2021-10-28 09:57:34,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 162 transitions. [2021-10-28 09:57:34,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:34,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.603960396039604) internal successors, (162), 100 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 162 transitions. [2021-10-28 09:57:34,702 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2021-10-28 09:57:34,702 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2021-10-28 09:57:34,703 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-28 09:57:34,703 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 162 transitions. [2021-10-28 09:57:34,703 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,704 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:34,704 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:34,704 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,704 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,705 INFO L791 eck$LassoCheckResult]: Stem: 1383#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1329#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1330#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1346#L204 assume 1 == ~b0_req_up~0; 1373#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1293#L129-2 ~b0_req_up~0 := 0; 1294#L204-1 assume 1 == ~b1_req_up~0; 1291#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1292#L144-2 ~b1_req_up~0 := 0; 1356#L211 assume 1 == ~d0_req_up~0; 1358#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1359#L159-2 ~d0_req_up~0 := 0; 1331#L218 assume !(1 == ~d1_req_up~0); 1321#L225 assume !(1 == ~z_req_up~0); 1322#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1379#L247-1 assume !(0 == ~b0_ev~0); 1380#L313-1 assume !(0 == ~b1_ev~0); 1349#L318-1 assume !(0 == ~d0_ev~0); 1350#L323-1 assume !(0 == ~d1_ev~0); 1360#L328-1 assume !(0 == ~z_ev~0); 1361#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1374#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1302#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1309#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1341#L382 assume !(0 != activate_threads_~tmp~1); 1297#L382-2 assume !(1 == ~b0_ev~0); 1298#L346-1 assume !(1 == ~b1_ev~0); 1305#L351-1 assume !(1 == ~d0_ev~0); 1310#L356-1 assume !(1 == ~d1_ev~0); 1299#L361-1 assume !(1 == ~z_ev~0); 1300#L424-1 [2021-10-28 09:57:34,705 INFO L793 eck$LassoCheckResult]: Loop: 1300#L424-1 assume !false; 1372#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1347#L287 assume !false; 1348#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1351#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1308#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1303#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1284#L282 assume !(0 != eval_~tmp___0~0); 1286#L303 start_simulation_~kernel_st~0 := 2; 1368#L204-2 assume !(1 == ~b0_req_up~0); 1342#L204-3 assume !(1 == ~b1_req_up~0); 1337#L211-1 assume !(1 == ~d0_req_up~0); 1325#L218-1 assume !(1 == ~d1_req_up~0); 1304#L225-1 assume !(1 == ~z_req_up~0); 1366#L232-1 start_simulation_~kernel_st~0 := 3; 1370#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1362#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1363#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1365#L323-3 assume !(0 == ~d1_ev~0); 1384#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1355#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1339#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1334#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1338#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1311#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1312#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1344#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1345#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1364#L356-3 assume !(1 == ~d1_ev~0); 1287#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1288#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1357#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1319#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1320#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1352#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1328#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 1295#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1296#L441 assume !(0 != start_simulation_~tmp~3); 1300#L424-1 [2021-10-28 09:57:34,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,705 INFO L85 PathProgramCache]: Analyzing trace with hash 151897971, now seen corresponding path program 1 times [2021-10-28 09:57:34,706 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,706 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272088553] [2021-10-28 09:57:34,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,706 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,728 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,728 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272088553] [2021-10-28 09:57:34,729 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1272088553] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,729 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,729 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:34,729 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431376224] [2021-10-28 09:57:34,729 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:34,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,730 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 6 times [2021-10-28 09:57:34,730 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,730 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1160239760] [2021-10-28 09:57:34,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,730 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,766 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,766 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1160239760] [2021-10-28 09:57:34,766 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1160239760] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,767 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,767 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:34,767 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063500455] [2021-10-28 09:57:34,767 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:34,767 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:34,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:34,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:34,768 INFO L87 Difference]: Start difference. First operand 101 states and 162 transitions. cyclomatic complexity: 62 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:34,777 INFO L93 Difference]: Finished difference Result 101 states and 161 transitions. [2021-10-28 09:57:34,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:34,780 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 161 transitions. [2021-10-28 09:57:34,781 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,782 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 161 transitions. [2021-10-28 09:57:34,782 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:34,782 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:34,782 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 161 transitions. [2021-10-28 09:57:34,783 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:34,783 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2021-10-28 09:57:34,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 161 transitions. [2021-10-28 09:57:34,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:34,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.5940594059405941) internal successors, (161), 100 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 161 transitions. [2021-10-28 09:57:34,787 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2021-10-28 09:57:34,787 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2021-10-28 09:57:34,787 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-28 09:57:34,788 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 161 transitions. [2021-10-28 09:57:34,788 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,788 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:34,789 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:34,789 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,789 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,790 INFO L791 eck$LassoCheckResult]: Stem: 1594#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1540#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1541#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1557#L204 assume 1 == ~b0_req_up~0; 1584#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1504#L129-2 ~b0_req_up~0 := 0; 1505#L204-1 assume 1 == ~b1_req_up~0; 1502#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1503#L144-2 ~b1_req_up~0 := 0; 1567#L211 assume 1 == ~d0_req_up~0; 1569#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1570#L159-2 ~d0_req_up~0 := 0; 1542#L218 assume 1 == ~d1_req_up~0; 1543#L174 assume !(~d1_val~0 != ~d1_val_t~0); 1588#L174-2 ~d1_req_up~0 := 0; 1532#L225 assume !(1 == ~z_req_up~0); 1533#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1590#L247-1 assume !(0 == ~b0_ev~0); 1591#L313-1 assume !(0 == ~b1_ev~0); 1560#L318-1 assume !(0 == ~d0_ev~0); 1561#L323-1 assume !(0 == ~d1_ev~0); 1571#L328-1 assume !(0 == ~z_ev~0); 1572#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1585#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1513#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1520#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1552#L382 assume !(0 != activate_threads_~tmp~1); 1508#L382-2 assume !(1 == ~b0_ev~0); 1509#L346-1 assume !(1 == ~b1_ev~0); 1516#L351-1 assume !(1 == ~d0_ev~0); 1521#L356-1 assume !(1 == ~d1_ev~0); 1510#L361-1 assume !(1 == ~z_ev~0); 1511#L424-1 [2021-10-28 09:57:34,790 INFO L793 eck$LassoCheckResult]: Loop: 1511#L424-1 assume !false; 1583#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1558#L287 assume !false; 1559#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1562#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1519#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1514#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1495#L282 assume !(0 != eval_~tmp___0~0); 1497#L303 start_simulation_~kernel_st~0 := 2; 1579#L204-2 assume !(1 == ~b0_req_up~0); 1553#L204-3 assume !(1 == ~b1_req_up~0); 1548#L211-1 assume !(1 == ~d0_req_up~0); 1536#L218-1 assume !(1 == ~d1_req_up~0); 1515#L225-1 assume !(1 == ~z_req_up~0); 1577#L232-1 start_simulation_~kernel_st~0 := 3; 1581#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1573#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1574#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1576#L323-3 assume !(0 == ~d1_ev~0); 1595#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1566#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1550#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1545#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1549#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1522#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1523#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1555#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1556#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1575#L356-3 assume !(1 == ~d1_ev~0); 1498#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1499#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1568#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1530#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1531#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1564#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1539#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 1506#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1507#L441 assume !(0 != start_simulation_~tmp~3); 1511#L424-1 [2021-10-28 09:57:34,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,790 INFO L85 PathProgramCache]: Analyzing trace with hash -650688005, now seen corresponding path program 1 times [2021-10-28 09:57:34,790 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,791 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [67864906] [2021-10-28 09:57:34,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,791 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,823 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,823 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [67864906] [2021-10-28 09:57:34,823 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [67864906] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,823 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,823 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:57:34,824 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [492089834] [2021-10-28 09:57:34,824 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:34,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,824 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 7 times [2021-10-28 09:57:34,824 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,825 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46179991] [2021-10-28 09:57:34,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,825 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,852 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,852 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46179991] [2021-10-28 09:57:34,852 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [46179991] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,853 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,853 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:34,853 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255431570] [2021-10-28 09:57:34,853 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:34,853 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:34,854 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:57:34,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:57:34,854 INFO L87 Difference]: Start difference. First operand 101 states and 161 transitions. cyclomatic complexity: 61 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:34,880 INFO L93 Difference]: Finished difference Result 101 states and 160 transitions. [2021-10-28 09:57:34,880 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:57:34,880 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 160 transitions. [2021-10-28 09:57:34,881 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,882 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 160 transitions. [2021-10-28 09:57:34,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:34,883 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:34,883 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 160 transitions. [2021-10-28 09:57:34,883 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:34,883 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2021-10-28 09:57:34,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 160 transitions. [2021-10-28 09:57:34,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:34,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.5841584158415842) internal successors, (160), 100 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:34,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 160 transitions. [2021-10-28 09:57:34,907 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2021-10-28 09:57:34,907 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2021-10-28 09:57:34,907 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-28 09:57:34,907 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 160 transitions. [2021-10-28 09:57:34,908 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:34,908 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:34,908 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:34,909 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,909 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:34,910 INFO L791 eck$LassoCheckResult]: Stem: 1808#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1754#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1755#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1771#L204 assume 1 == ~b0_req_up~0; 1798#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1718#L129-2 ~b0_req_up~0 := 0; 1719#L204-1 assume 1 == ~b1_req_up~0; 1716#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1717#L144-2 ~b1_req_up~0 := 0; 1781#L211 assume 1 == ~d0_req_up~0; 1783#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1784#L159-2 ~d0_req_up~0 := 0; 1756#L218 assume 1 == ~d1_req_up~0; 1757#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 1802#L174-2 ~d1_req_up~0 := 0; 1746#L225 assume !(1 == ~z_req_up~0); 1747#L232 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1804#L247-1 assume !(0 == ~b0_ev~0); 1805#L313-1 assume !(0 == ~b1_ev~0); 1774#L318-1 assume !(0 == ~d0_ev~0); 1775#L323-1 assume !(0 == ~d1_ev~0); 1785#L328-1 assume !(0 == ~z_ev~0); 1786#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1799#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1727#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1734#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1766#L382 assume !(0 != activate_threads_~tmp~1); 1722#L382-2 assume !(1 == ~b0_ev~0); 1723#L346-1 assume !(1 == ~b1_ev~0); 1730#L351-1 assume !(1 == ~d0_ev~0); 1735#L356-1 assume !(1 == ~d1_ev~0); 1724#L361-1 assume !(1 == ~z_ev~0); 1725#L424-1 [2021-10-28 09:57:34,910 INFO L793 eck$LassoCheckResult]: Loop: 1725#L424-1 assume !false; 1797#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1772#L287 assume !false; 1773#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1776#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1733#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1728#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1709#L282 assume !(0 != eval_~tmp___0~0); 1711#L303 start_simulation_~kernel_st~0 := 2; 1793#L204-2 assume !(1 == ~b0_req_up~0); 1767#L204-3 assume !(1 == ~b1_req_up~0); 1762#L211-1 assume !(1 == ~d0_req_up~0); 1750#L218-1 assume !(1 == ~d1_req_up~0); 1729#L225-1 assume !(1 == ~z_req_up~0); 1791#L232-1 start_simulation_~kernel_st~0 := 3; 1795#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1787#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1788#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1790#L323-3 assume !(0 == ~d1_ev~0); 1809#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1780#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1764#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1759#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1763#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1736#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1737#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1769#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1770#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1789#L356-3 assume !(1 == ~d1_ev~0); 1712#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1713#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1782#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1744#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1745#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1778#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1753#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 1720#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1721#L441 assume !(0 != start_simulation_~tmp~3); 1725#L424-1 [2021-10-28 09:57:34,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1038255737, now seen corresponding path program 1 times [2021-10-28 09:57:34,911 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,911 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684286012] [2021-10-28 09:57:34,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,911 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,956 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,956 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684286012] [2021-10-28 09:57:34,956 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [684286012] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,957 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,957 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:57:34,957 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [140365207] [2021-10-28 09:57:34,957 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:34,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:34,958 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 8 times [2021-10-28 09:57:34,958 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:34,958 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121276724] [2021-10-28 09:57:34,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:34,959 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:34,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:34,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:34,989 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:34,989 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121276724] [2021-10-28 09:57:34,989 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [121276724] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:34,989 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:34,989 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:34,990 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1573557961] [2021-10-28 09:57:34,990 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:34,990 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:34,990 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:57:34,991 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:57:34,991 INFO L87 Difference]: Start difference. First operand 101 states and 160 transitions. cyclomatic complexity: 60 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,013 INFO L93 Difference]: Finished difference Result 101 states and 159 transitions. [2021-10-28 09:57:35,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:57:35,014 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 159 transitions. [2021-10-28 09:57:35,021 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:35,022 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 159 transitions. [2021-10-28 09:57:35,022 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-10-28 09:57:35,022 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-10-28 09:57:35,022 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 159 transitions. [2021-10-28 09:57:35,023 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,023 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2021-10-28 09:57:35,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 159 transitions. [2021-10-28 09:57:35,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-10-28 09:57:35,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.5742574257425743) internal successors, (159), 100 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 159 transitions. [2021-10-28 09:57:35,026 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2021-10-28 09:57:35,026 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2021-10-28 09:57:35,027 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-28 09:57:35,027 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 159 transitions. [2021-10-28 09:57:35,028 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-10-28 09:57:35,028 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,028 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,029 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,029 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,029 INFO L791 eck$LassoCheckResult]: Stem: 2022#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1968#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1969#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1985#L204 assume 1 == ~b0_req_up~0; 2012#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1932#L129-2 ~b0_req_up~0 := 0; 1933#L204-1 assume 1 == ~b1_req_up~0; 1930#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1931#L144-2 ~b1_req_up~0 := 0; 1995#L211 assume 1 == ~d0_req_up~0; 1997#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1998#L159-2 ~d0_req_up~0 := 0; 1970#L218 assume 1 == ~d1_req_up~0; 1971#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2016#L174-2 ~d1_req_up~0 := 0; 1960#L225 assume !(1 == ~z_req_up~0); 1961#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2018#L247-1 assume !(0 == ~b0_ev~0); 2019#L313-1 assume !(0 == ~b1_ev~0); 1988#L318-1 assume !(0 == ~d0_ev~0); 1989#L323-1 assume !(0 == ~d1_ev~0); 1999#L328-1 assume !(0 == ~z_ev~0); 2000#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2013#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1941#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1948#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1980#L382 assume !(0 != activate_threads_~tmp~1); 1936#L382-2 assume !(1 == ~b0_ev~0); 1937#L346-1 assume !(1 == ~b1_ev~0); 1944#L351-1 assume !(1 == ~d0_ev~0); 1949#L356-1 assume !(1 == ~d1_ev~0); 1938#L361-1 assume !(1 == ~z_ev~0); 1939#L424-1 [2021-10-28 09:57:35,029 INFO L793 eck$LassoCheckResult]: Loop: 1939#L424-1 assume !false; 2011#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1986#L287 assume !false; 1987#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1990#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1947#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1942#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1923#L282 assume !(0 != eval_~tmp___0~0); 1925#L303 start_simulation_~kernel_st~0 := 2; 2007#L204-2 assume !(1 == ~b0_req_up~0); 1981#L204-3 assume !(1 == ~b1_req_up~0); 1976#L211-1 assume !(1 == ~d0_req_up~0); 1964#L218-1 assume !(1 == ~d1_req_up~0); 1943#L225-1 assume !(1 == ~z_req_up~0); 2005#L232-1 start_simulation_~kernel_st~0 := 3; 2009#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2001#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2002#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2004#L323-3 assume !(0 == ~d1_ev~0); 2023#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1994#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1978#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1973#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1977#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1950#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1951#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1983#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1984#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2003#L356-3 assume !(1 == ~d1_ev~0); 1926#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1927#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1996#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1958#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1959#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1992#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1967#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 1934#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1935#L441 assume !(0 != start_simulation_~tmp~3); 1939#L424-1 [2021-10-28 09:57:35,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,030 INFO L85 PathProgramCache]: Analyzing trace with hash 17187383, now seen corresponding path program 1 times [2021-10-28 09:57:35,030 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,030 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393823207] [2021-10-28 09:57:35,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,030 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,084 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,085 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393823207] [2021-10-28 09:57:35,085 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1393823207] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,085 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,085 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:35,085 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535484345] [2021-10-28 09:57:35,086 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:35,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,086 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 9 times [2021-10-28 09:57:35,086 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,086 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534462824] [2021-10-28 09:57:35,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,087 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,128 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,129 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534462824] [2021-10-28 09:57:35,135 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [534462824] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,135 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,135 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:35,136 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419616785] [2021-10-28 09:57:35,136 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:35,136 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:35,137 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:35,137 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:35,137 INFO L87 Difference]: Start difference. First operand 101 states and 159 transitions. cyclomatic complexity: 59 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,177 INFO L93 Difference]: Finished difference Result 116 states and 181 transitions. [2021-10-28 09:57:35,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:35,177 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 116 states and 181 transitions. [2021-10-28 09:57:35,178 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 79 [2021-10-28 09:57:35,180 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 116 states to 116 states and 181 transitions. [2021-10-28 09:57:35,180 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116 [2021-10-28 09:57:35,180 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116 [2021-10-28 09:57:35,180 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 181 transitions. [2021-10-28 09:57:35,180 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,181 INFO L681 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2021-10-28 09:57:35,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 181 transitions. [2021-10-28 09:57:35,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2021-10-28 09:57:35,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.5603448275862069) internal successors, (181), 115 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 181 transitions. [2021-10-28 09:57:35,185 INFO L704 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2021-10-28 09:57:35,185 INFO L587 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2021-10-28 09:57:35,185 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-10-28 09:57:35,185 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 181 transitions. [2021-10-28 09:57:35,186 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 79 [2021-10-28 09:57:35,186 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,186 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,187 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,187 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,190 INFO L791 eck$LassoCheckResult]: Stem: 2250#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2194#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2195#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2211#L204 assume 1 == ~b0_req_up~0; 2243#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2158#L129-2 ~b0_req_up~0 := 0; 2159#L204-1 assume 1 == ~b1_req_up~0; 2156#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2157#L144-2 ~b1_req_up~0 := 0; 2221#L211 assume 1 == ~d0_req_up~0; 2223#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2224#L159-2 ~d0_req_up~0 := 0; 2196#L218 assume 1 == ~d1_req_up~0; 2197#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2244#L174-2 ~d1_req_up~0 := 0; 2186#L225 assume !(1 == ~z_req_up~0); 2187#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2246#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2247#L313-1 assume !(0 == ~b1_ev~0); 2214#L318-1 assume !(0 == ~d0_ev~0); 2215#L323-1 assume !(0 == ~d1_ev~0); 2225#L328-1 assume !(0 == ~z_ev~0); 2226#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2240#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2167#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2174#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2206#L382 assume !(0 != activate_threads_~tmp~1); 2162#L382-2 assume !(1 == ~b0_ev~0); 2163#L346-1 assume !(1 == ~b1_ev~0); 2170#L351-1 assume !(1 == ~d0_ev~0); 2175#L356-1 assume !(1 == ~d1_ev~0); 2164#L361-1 assume !(1 == ~z_ev~0); 2165#L424-1 [2021-10-28 09:57:35,190 INFO L793 eck$LassoCheckResult]: Loop: 2165#L424-1 assume !false; 2239#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2212#L287 assume !false; 2213#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2216#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2173#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2168#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 2149#L282 assume !(0 != eval_~tmp___0~0); 2151#L303 start_simulation_~kernel_st~0 := 2; 2233#L204-2 assume !(1 == ~b0_req_up~0); 2235#L204-3 assume !(1 == ~b1_req_up~0); 2261#L211-1 assume !(1 == ~d0_req_up~0); 2258#L218-1 assume !(1 == ~d1_req_up~0); 2255#L225-1 assume !(1 == ~z_req_up~0); 2253#L232-1 start_simulation_~kernel_st~0 := 3; 2252#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2227#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2228#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2230#L323-3 assume !(0 == ~d1_ev~0); 2251#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2220#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2204#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2199#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2203#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2176#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2177#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2209#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2210#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2229#L356-3 assume !(1 == ~d1_ev~0); 2152#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2153#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2222#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2184#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2185#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 2218#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2193#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 2160#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2161#L441 assume !(0 != start_simulation_~tmp~3); 2165#L424-1 [2021-10-28 09:57:35,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,191 INFO L85 PathProgramCache]: Analyzing trace with hash 1297051061, now seen corresponding path program 1 times [2021-10-28 09:57:35,191 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,191 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328354794] [2021-10-28 09:57:35,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,191 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,218 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,218 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328354794] [2021-10-28 09:57:35,218 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1328354794] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,218 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,219 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:35,219 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914499618] [2021-10-28 09:57:35,219 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:35,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,220 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 10 times [2021-10-28 09:57:35,220 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,220 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296424844] [2021-10-28 09:57:35,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,220 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,255 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,255 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296424844] [2021-10-28 09:57:35,255 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1296424844] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,255 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,255 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:35,256 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [230717553] [2021-10-28 09:57:35,256 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:35,256 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:35,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:35,257 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:35,257 INFO L87 Difference]: Start difference. First operand 116 states and 181 transitions. cyclomatic complexity: 66 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,277 INFO L93 Difference]: Finished difference Result 141 states and 218 transitions. [2021-10-28 09:57:35,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:35,277 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 218 transitions. [2021-10-28 09:57:35,279 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2021-10-28 09:57:35,280 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 141 states and 218 transitions. [2021-10-28 09:57:35,280 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 141 [2021-10-28 09:57:35,281 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 141 [2021-10-28 09:57:35,281 INFO L73 IsDeterministic]: Start isDeterministic. Operand 141 states and 218 transitions. [2021-10-28 09:57:35,281 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,281 INFO L681 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2021-10-28 09:57:35,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states and 218 transitions. [2021-10-28 09:57:35,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2021-10-28 09:57:35,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 141 states have (on average 1.5460992907801419) internal successors, (218), 140 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 218 transitions. [2021-10-28 09:57:35,285 INFO L704 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2021-10-28 09:57:35,285 INFO L587 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2021-10-28 09:57:35,285 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-10-28 09:57:35,285 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 141 states and 218 transitions. [2021-10-28 09:57:35,286 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2021-10-28 09:57:35,286 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,286 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,288 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,288 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,289 INFO L791 eck$LassoCheckResult]: Stem: 2520#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2460#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2461#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2478#L204 assume 1 == ~b0_req_up~0; 2511#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2424#L129-2 ~b0_req_up~0 := 0; 2425#L204-1 assume 1 == ~b1_req_up~0; 2422#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2423#L144-2 ~b1_req_up~0 := 0; 2488#L211 assume 1 == ~d0_req_up~0; 2490#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2491#L159-2 ~d0_req_up~0 := 0; 2462#L218 assume 1 == ~d1_req_up~0; 2463#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2514#L174-2 ~d1_req_up~0 := 0; 2454#L225 assume !(1 == ~z_req_up~0); 2455#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2516#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2517#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2481#L318-1 assume !(0 == ~d0_ev~0); 2482#L323-1 assume !(0 == ~d1_ev~0); 2495#L328-1 assume !(0 == ~z_ev~0); 2496#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2512#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2433#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2440#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2472#L382 assume !(0 != activate_threads_~tmp~1); 2428#L382-2 assume !(1 == ~b0_ev~0); 2429#L346-1 assume !(1 == ~b1_ev~0); 2436#L351-1 assume !(1 == ~d0_ev~0); 2441#L356-1 assume !(1 == ~d1_ev~0); 2430#L361-1 assume !(1 == ~z_ev~0); 2431#L424-1 [2021-10-28 09:57:35,289 INFO L793 eck$LassoCheckResult]: Loop: 2431#L424-1 assume !false; 2509#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2479#L287 assume !false; 2480#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2483#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2439#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2434#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 2415#L282 assume !(0 != eval_~tmp___0~0); 2417#L303 start_simulation_~kernel_st~0 := 2; 2503#L204-2 assume !(1 == ~b0_req_up~0); 2505#L204-3 assume !(1 == ~b1_req_up~0); 2540#L211-1 assume !(1 == ~d0_req_up~0); 2534#L218-1 assume !(1 == ~d1_req_up~0); 2528#L225-1 assume !(1 == ~z_req_up~0); 2525#L232-1 start_simulation_~kernel_st~0 := 3; 2524#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2522#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2498#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2500#L323-3 assume !(0 == ~d1_ev~0); 2521#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2487#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2470#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2465#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2469#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2442#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2443#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2476#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2477#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2499#L356-3 assume !(1 == ~d1_ev~0); 2418#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2419#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2489#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2450#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2451#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 2485#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2459#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 2426#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2427#L441 assume !(0 != start_simulation_~tmp~3); 2431#L424-1 [2021-10-28 09:57:35,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,292 INFO L85 PathProgramCache]: Analyzing trace with hash -1986798985, now seen corresponding path program 1 times [2021-10-28 09:57:35,292 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,292 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371412202] [2021-10-28 09:57:35,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,292 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,327 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,327 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371412202] [2021-10-28 09:57:35,327 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1371412202] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,328 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,328 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:35,330 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468894188] [2021-10-28 09:57:35,330 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:35,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,331 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 11 times [2021-10-28 09:57:35,331 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,331 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846486528] [2021-10-28 09:57:35,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,331 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,372 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,372 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846486528] [2021-10-28 09:57:35,373 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846486528] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,373 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,373 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:35,373 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363258295] [2021-10-28 09:57:35,373 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:35,374 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:35,375 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:35,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:35,375 INFO L87 Difference]: Start difference. First operand 141 states and 218 transitions. cyclomatic complexity: 78 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,415 INFO L93 Difference]: Finished difference Result 180 states and 275 transitions. [2021-10-28 09:57:35,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:35,417 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 180 states and 275 transitions. [2021-10-28 09:57:35,418 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 143 [2021-10-28 09:57:35,420 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 180 states to 180 states and 275 transitions. [2021-10-28 09:57:35,420 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 180 [2021-10-28 09:57:35,421 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 180 [2021-10-28 09:57:35,421 INFO L73 IsDeterministic]: Start isDeterministic. Operand 180 states and 275 transitions. [2021-10-28 09:57:35,421 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,421 INFO L681 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2021-10-28 09:57:35,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states and 275 transitions. [2021-10-28 09:57:35,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2021-10-28 09:57:35,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 180 states have (on average 1.5277777777777777) internal successors, (275), 179 states have internal predecessors, (275), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 275 transitions. [2021-10-28 09:57:35,429 INFO L704 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2021-10-28 09:57:35,429 INFO L587 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2021-10-28 09:57:35,429 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-10-28 09:57:35,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 275 transitions. [2021-10-28 09:57:35,430 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 143 [2021-10-28 09:57:35,430 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,433 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,433 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,434 INFO L791 eck$LassoCheckResult]: Stem: 2854#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2790#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2791#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2808#L204 assume 1 == ~b0_req_up~0; 2840#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2754#L129-2 ~b0_req_up~0 := 0; 2755#L204-1 assume 1 == ~b1_req_up~0; 2752#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2753#L144-2 ~b1_req_up~0 := 0; 2818#L211 assume 1 == ~d0_req_up~0; 2820#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2821#L159-2 ~d0_req_up~0 := 0; 2792#L218 assume 1 == ~d1_req_up~0; 2793#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2847#L174-2 ~d1_req_up~0 := 0; 2782#L225 assume !(1 == ~z_req_up~0); 2783#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2849#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2850#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2811#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2812#L323-1 assume !(0 == ~d1_ev~0); 2823#L328-1 assume !(0 == ~z_ev~0); 2824#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2841#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2763#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2770#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2803#L382 assume !(0 != activate_threads_~tmp~1); 2758#L382-2 assume !(1 == ~b0_ev~0); 2759#L346-1 assume !(1 == ~b1_ev~0); 2766#L351-1 assume !(1 == ~d0_ev~0); 2771#L356-1 assume !(1 == ~d1_ev~0); 2760#L361-1 assume !(1 == ~z_ev~0); 2761#L424-1 [2021-10-28 09:57:35,434 INFO L793 eck$LassoCheckResult]: Loop: 2761#L424-1 assume !false; 2839#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2809#L287 assume !false; 2810#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2813#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2769#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2764#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 2745#L282 assume !(0 != eval_~tmp___0~0); 2747#L303 start_simulation_~kernel_st~0 := 2; 2832#L204-2 assume !(1 == ~b0_req_up~0); 2834#L204-3 assume !(1 == ~b1_req_up~0); 2879#L211-1 assume !(1 == ~d0_req_up~0); 2873#L218-1 assume !(1 == ~d1_req_up~0); 2867#L225-1 assume !(1 == ~z_req_up~0); 2864#L232-1 start_simulation_~kernel_st~0 := 3; 2861#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2859#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2857#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2828#L323-3 assume !(0 == ~d1_ev~0); 2855#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2817#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2801#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2796#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2800#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2772#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2773#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2806#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2807#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2827#L356-3 assume !(1 == ~d1_ev~0); 2748#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2749#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2819#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2780#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2781#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 2815#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2789#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 2756#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2757#L441 assume !(0 != start_simulation_~tmp~3); 2761#L424-1 [2021-10-28 09:57:35,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,434 INFO L85 PathProgramCache]: Analyzing trace with hash -1399992971, now seen corresponding path program 1 times [2021-10-28 09:57:35,435 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,435 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112599148] [2021-10-28 09:57:35,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,435 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,460 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,460 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112599148] [2021-10-28 09:57:35,460 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [112599148] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,460 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,461 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:35,463 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449241315] [2021-10-28 09:57:35,464 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:35,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,465 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 12 times [2021-10-28 09:57:35,465 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,468 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683608044] [2021-10-28 09:57:35,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,469 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,502 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,502 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683608044] [2021-10-28 09:57:35,502 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683608044] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,503 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,503 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:35,503 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1480405119] [2021-10-28 09:57:35,503 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:35,504 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:35,504 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:35,504 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:35,504 INFO L87 Difference]: Start difference. First operand 180 states and 275 transitions. cyclomatic complexity: 96 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,527 INFO L93 Difference]: Finished difference Result 235 states and 352 transitions. [2021-10-28 09:57:35,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:35,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 235 states and 352 transitions. [2021-10-28 09:57:35,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 198 [2021-10-28 09:57:35,532 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 235 states to 235 states and 352 transitions. [2021-10-28 09:57:35,532 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 235 [2021-10-28 09:57:35,532 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 235 [2021-10-28 09:57:35,532 INFO L73 IsDeterministic]: Start isDeterministic. Operand 235 states and 352 transitions. [2021-10-28 09:57:35,533 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,533 INFO L681 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2021-10-28 09:57:35,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states and 352 transitions. [2021-10-28 09:57:35,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2021-10-28 09:57:35,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 235 states, 235 states have (on average 1.4978723404255319) internal successors, (352), 234 states have internal predecessors, (352), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 352 transitions. [2021-10-28 09:57:35,541 INFO L704 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2021-10-28 09:57:35,542 INFO L587 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2021-10-28 09:57:35,542 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-10-28 09:57:35,542 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 235 states and 352 transitions. [2021-10-28 09:57:35,543 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 198 [2021-10-28 09:57:35,544 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,544 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,547 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,547 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,547 INFO L791 eck$LassoCheckResult]: Stem: 3281#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 3216#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 3217#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 3236#L204 assume 1 == ~b0_req_up~0; 3269#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 3179#L129-2 ~b0_req_up~0 := 0; 3180#L204-1 assume 1 == ~b1_req_up~0; 3177#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 3178#L144-2 ~b1_req_up~0 := 0; 3246#L211 assume 1 == ~d0_req_up~0; 3248#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 3249#L159-2 ~d0_req_up~0 := 0; 3218#L218 assume 1 == ~d1_req_up~0; 3219#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 3275#L174-2 ~d1_req_up~0 := 0; 3208#L225 assume !(1 == ~z_req_up~0); 3209#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 3277#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3278#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3239#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3240#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3251#L328-1 assume !(0 == ~z_ev~0); 3252#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3270#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3188#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3196#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 3230#L382 assume !(0 != activate_threads_~tmp~1); 3183#L382-2 assume !(1 == ~b0_ev~0); 3184#L346-1 assume !(1 == ~b1_ev~0); 3192#L351-1 assume !(1 == ~d0_ev~0); 3197#L356-1 assume !(1 == ~d1_ev~0); 3185#L361-1 assume !(1 == ~z_ev~0); 3186#L424-1 [2021-10-28 09:57:35,547 INFO L793 eck$LassoCheckResult]: Loop: 3186#L424-1 assume !false; 3268#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 3237#L287 assume !false; 3238#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3241#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3195#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3189#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 3169#L282 assume !(0 != eval_~tmp___0~0); 3171#L303 start_simulation_~kernel_st~0 := 2; 3260#L204-2 assume !(1 == ~b0_req_up~0); 3262#L204-3 assume !(1 == ~b1_req_up~0); 3309#L211-1 assume !(1 == ~d0_req_up~0); 3303#L218-1 assume !(1 == ~d1_req_up~0); 3297#L225-1 assume !(1 == ~z_req_up~0); 3294#L232-1 start_simulation_~kernel_st~0 := 3; 3291#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3287#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3285#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3283#L323-3 assume !(0 == ~d1_ev~0); 3282#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 3245#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3228#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3223#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3225#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 3198#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 3199#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 3234#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 3235#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 3255#L356-3 assume !(1 == ~d1_ev~0); 3172#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 3173#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3247#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3206#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3207#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 3242#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3215#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 3181#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 3182#L441 assume !(0 != start_simulation_~tmp~3); 3186#L424-1 [2021-10-28 09:57:35,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,548 INFO L85 PathProgramCache]: Analyzing trace with hash -1658158409, now seen corresponding path program 1 times [2021-10-28 09:57:35,548 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,548 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943111339] [2021-10-28 09:57:35,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,549 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,608 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,609 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943111339] [2021-10-28 09:57:35,609 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [943111339] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,609 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,609 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:57:35,609 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1686571554] [2021-10-28 09:57:35,610 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:35,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,610 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 13 times [2021-10-28 09:57:35,610 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,610 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851489810] [2021-10-28 09:57:35,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,611 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,641 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,641 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851489810] [2021-10-28 09:57:35,642 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [851489810] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,642 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,642 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:35,642 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466876786] [2021-10-28 09:57:35,642 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:35,642 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:35,645 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:57:35,645 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:57:35,645 INFO L87 Difference]: Start difference. First operand 235 states and 352 transitions. cyclomatic complexity: 118 Second operand has 6 states, 6 states have (on average 5.333333333333333) internal successors, (32), 6 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,710 INFO L93 Difference]: Finished difference Result 633 states and 958 transitions. [2021-10-28 09:57:35,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 09:57:35,710 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 633 states and 958 transitions. [2021-10-28 09:57:35,715 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 583 [2021-10-28 09:57:35,721 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 633 states to 633 states and 958 transitions. [2021-10-28 09:57:35,721 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 633 [2021-10-28 09:57:35,722 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 633 [2021-10-28 09:57:35,722 INFO L73 IsDeterministic]: Start isDeterministic. Operand 633 states and 958 transitions. [2021-10-28 09:57:35,723 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,723 INFO L681 BuchiCegarLoop]: Abstraction has 633 states and 958 transitions. [2021-10-28 09:57:35,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 633 states and 958 transitions. [2021-10-28 09:57:35,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 633 to 241. [2021-10-28 09:57:35,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 241 states, 241 states have (on average 1.4854771784232366) internal successors, (358), 240 states have internal predecessors, (358), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 358 transitions. [2021-10-28 09:57:35,731 INFO L704 BuchiCegarLoop]: Abstraction has 241 states and 358 transitions. [2021-10-28 09:57:35,731 INFO L587 BuchiCegarLoop]: Abstraction has 241 states and 358 transitions. [2021-10-28 09:57:35,731 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-10-28 09:57:35,731 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 241 states and 358 transitions. [2021-10-28 09:57:35,733 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 201 [2021-10-28 09:57:35,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,734 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,734 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,734 INFO L791 eck$LassoCheckResult]: Stem: 4168#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 4101#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 4102#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 4122#L204 assume 1 == ~b0_req_up~0; 4154#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4063#L129-2 ~b0_req_up~0 := 0; 4064#L204-1 assume 1 == ~b1_req_up~0; 4061#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 4062#L144-2 ~b1_req_up~0 := 0; 4132#L211 assume 1 == ~d0_req_up~0; 4134#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4135#L159-2 ~d0_req_up~0 := 0; 4103#L218 assume 1 == ~d1_req_up~0; 4104#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 4160#L174-2 ~d1_req_up~0 := 0; 4093#L225 assume !(1 == ~z_req_up~0); 4094#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4163#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4164#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4125#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4126#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4137#L328-1 assume !(0 == ~z_ev~0); 4138#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4155#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4072#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4293#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4166#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4067#L382-2 assume !(1 == ~b0_ev~0); 4068#L346-1 assume !(1 == ~b1_ev~0); 4077#L351-1 assume !(1 == ~d0_ev~0); 4082#L356-1 assume !(1 == ~d1_ev~0); 4069#L361-1 assume !(1 == ~z_ev~0); 4070#L424-1 [2021-10-28 09:57:35,734 INFO L793 eck$LassoCheckResult]: Loop: 4070#L424-1 assume !false; 4153#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 4123#L287 assume !false; 4124#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4127#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4080#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4074#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 4053#L282 assume !(0 != eval_~tmp___0~0); 4055#L303 start_simulation_~kernel_st~0 := 2; 4146#L204-2 assume !(1 == ~b0_req_up~0); 4148#L204-3 assume !(1 == ~b1_req_up~0); 4196#L211-1 assume !(1 == ~d0_req_up~0); 4190#L218-1 assume !(1 == ~d1_req_up~0); 4184#L225-1 assume !(1 == ~z_req_up~0); 4181#L232-1 start_simulation_~kernel_st~0 := 3; 4178#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4174#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4172#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4170#L323-3 assume !(0 == ~d1_ev~0); 4169#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 4131#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4114#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4108#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4152#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4083#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4084#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4120#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4121#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4141#L356-3 assume !(1 == ~d1_ev~0); 4056#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 4057#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4133#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4091#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4092#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 4129#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4100#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 4065#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 4066#L441 assume !(0 != start_simulation_~tmp~3); 4070#L424-1 [2021-10-28 09:57:35,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,736 INFO L85 PathProgramCache]: Analyzing trace with hash -1715416711, now seen corresponding path program 1 times [2021-10-28 09:57:35,736 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,736 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638047704] [2021-10-28 09:57:35,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,736 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,759 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,759 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638047704] [2021-10-28 09:57:35,759 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1638047704] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,759 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,760 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:35,760 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1583812720] [2021-10-28 09:57:35,760 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:35,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,760 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 14 times [2021-10-28 09:57:35,761 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,761 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945655222] [2021-10-28 09:57:35,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,761 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,796 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,796 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945655222] [2021-10-28 09:57:35,796 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1945655222] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,797 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,797 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:35,797 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [885293054] [2021-10-28 09:57:35,798 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:35,798 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:35,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:35,798 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:35,799 INFO L87 Difference]: Start difference. First operand 241 states and 358 transitions. cyclomatic complexity: 118 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,825 INFO L93 Difference]: Finished difference Result 256 states and 375 transitions. [2021-10-28 09:57:35,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:35,826 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 256 states and 375 transitions. [2021-10-28 09:57:35,828 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 222 [2021-10-28 09:57:35,830 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 256 states to 256 states and 375 transitions. [2021-10-28 09:57:35,831 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 256 [2021-10-28 09:57:35,831 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 256 [2021-10-28 09:57:35,831 INFO L73 IsDeterministic]: Start isDeterministic. Operand 256 states and 375 transitions. [2021-10-28 09:57:35,832 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,832 INFO L681 BuchiCegarLoop]: Abstraction has 256 states and 375 transitions. [2021-10-28 09:57:35,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states and 375 transitions. [2021-10-28 09:57:35,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 256. [2021-10-28 09:57:35,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 256 states, 256 states have (on average 1.46484375) internal successors, (375), 255 states have internal predecessors, (375), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 256 states and 375 transitions. [2021-10-28 09:57:35,838 INFO L704 BuchiCegarLoop]: Abstraction has 256 states and 375 transitions. [2021-10-28 09:57:35,838 INFO L587 BuchiCegarLoop]: Abstraction has 256 states and 375 transitions. [2021-10-28 09:57:35,838 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-10-28 09:57:35,838 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 256 states and 375 transitions. [2021-10-28 09:57:35,839 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 222 [2021-10-28 09:57:35,840 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,840 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,841 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,841 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,841 INFO L791 eck$LassoCheckResult]: Stem: 4673#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 4605#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 4606#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 4625#L204 assume 1 == ~b0_req_up~0; 4661#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4569#L129-2 ~b0_req_up~0 := 0; 4570#L204-1 assume 1 == ~b1_req_up~0; 4567#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 4568#L144-2 ~b1_req_up~0 := 0; 4636#L211 assume 1 == ~d0_req_up~0; 4638#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4639#L159-2 ~d0_req_up~0 := 0; 4607#L218 assume 1 == ~d1_req_up~0; 4608#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 4667#L174-2 ~d1_req_up~0 := 0; 4597#L225 assume !(1 == ~z_req_up~0); 4598#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4670#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4671#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4628#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4629#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4642#L328-1 assume !(0 == ~z_ev~0); 4643#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4662#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4584#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4585#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4619#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4573#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4574#L346-1 assume !(1 == ~b1_ev~0); 4580#L351-1 assume !(1 == ~d0_ev~0); 4586#L356-1 assume !(1 == ~d1_ev~0); 4575#L361-1 assume !(1 == ~z_ev~0); 4576#L424-1 [2021-10-28 09:57:35,841 INFO L793 eck$LassoCheckResult]: Loop: 4576#L424-1 assume !false; 4660#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 4626#L287 assume !false; 4627#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4630#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4583#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4577#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 4559#L282 assume !(0 != eval_~tmp___0~0); 4561#L303 start_simulation_~kernel_st~0 := 2; 4652#L204-2 assume !(1 == ~b0_req_up~0); 4620#L204-3 assume !(1 == ~b1_req_up~0); 4622#L211-1 assume !(1 == ~d0_req_up~0); 4756#L218-1 assume !(1 == ~d1_req_up~0); 4701#L225-1 assume !(1 == ~z_req_up~0); 4697#L232-1 start_simulation_~kernel_st~0 := 3; 4690#L313-2 assume !(0 == ~b0_ev~0); 4687#L313-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4684#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4681#L323-3 assume !(0 == ~d1_ev~0); 4674#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 4634#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4635#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4617#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4615#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4587#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4588#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4623#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4624#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4646#L356-3 assume !(1 == ~d1_ev~0); 4562#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 4563#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4637#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4595#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4596#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 4632#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4604#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 4571#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 4572#L441 assume !(0 != start_simulation_~tmp~3); 4576#L424-1 [2021-10-28 09:57:35,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,842 INFO L85 PathProgramCache]: Analyzing trace with hash -1717263753, now seen corresponding path program 1 times [2021-10-28 09:57:35,842 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,842 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810185706] [2021-10-28 09:57:35,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,842 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,870 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,870 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [810185706] [2021-10-28 09:57:35,872 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [810185706] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,872 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,872 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:35,872 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1101432832] [2021-10-28 09:57:35,872 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:35,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,873 INFO L85 PathProgramCache]: Analyzing trace with hash 763502474, now seen corresponding path program 1 times [2021-10-28 09:57:35,873 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,873 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183706867] [2021-10-28 09:57:35,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,874 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:35,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:35,905 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:35,905 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183706867] [2021-10-28 09:57:35,905 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [183706867] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:35,905 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:35,906 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:35,906 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185432885] [2021-10-28 09:57:35,906 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:35,906 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:35,907 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:35,907 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:35,907 INFO L87 Difference]: Start difference. First operand 256 states and 375 transitions. cyclomatic complexity: 120 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:35,932 INFO L93 Difference]: Finished difference Result 284 states and 412 transitions. [2021-10-28 09:57:35,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:35,932 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 284 states and 412 transitions. [2021-10-28 09:57:35,935 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 250 [2021-10-28 09:57:35,937 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 284 states to 284 states and 412 transitions. [2021-10-28 09:57:35,937 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 284 [2021-10-28 09:57:35,938 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 284 [2021-10-28 09:57:35,938 INFO L73 IsDeterministic]: Start isDeterministic. Operand 284 states and 412 transitions. [2021-10-28 09:57:35,938 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:35,939 INFO L681 BuchiCegarLoop]: Abstraction has 284 states and 412 transitions. [2021-10-28 09:57:35,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states and 412 transitions. [2021-10-28 09:57:35,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 284. [2021-10-28 09:57:35,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 284 states, 284 states have (on average 1.4507042253521127) internal successors, (412), 283 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:35,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 412 transitions. [2021-10-28 09:57:35,948 INFO L704 BuchiCegarLoop]: Abstraction has 284 states and 412 transitions. [2021-10-28 09:57:35,949 INFO L587 BuchiCegarLoop]: Abstraction has 284 states and 412 transitions. [2021-10-28 09:57:35,950 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-10-28 09:57:35,950 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 284 states and 412 transitions. [2021-10-28 09:57:35,951 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 250 [2021-10-28 09:57:35,952 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:35,952 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:35,958 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,958 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:35,958 INFO L791 eck$LassoCheckResult]: Stem: 5217#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 5153#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 5154#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 5174#L204 assume 1 == ~b0_req_up~0; 5206#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 5118#L129-2 ~b0_req_up~0 := 0; 5119#L204-1 assume 1 == ~b1_req_up~0; 5116#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 5117#L144-2 ~b1_req_up~0 := 0; 5184#L211 assume 1 == ~d0_req_up~0; 5186#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 5187#L159-2 ~d0_req_up~0 := 0; 5155#L218 assume 1 == ~d1_req_up~0; 5156#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 5211#L174-2 ~d1_req_up~0 := 0; 5145#L225 assume !(1 == ~z_req_up~0); 5146#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 5214#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 5215#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 5177#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5178#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 5189#L328-1 assume !(0 == ~z_ev~0); 5190#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5207#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5132#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5133#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5168#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5122#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5123#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5128#L351-1 assume !(1 == ~d0_ev~0); 5134#L356-1 assume !(1 == ~d1_ev~0); 5124#L361-1 assume !(1 == ~z_ev~0); 5125#L424-1 [2021-10-28 09:57:35,958 INFO L793 eck$LassoCheckResult]: Loop: 5125#L424-1 assume !false; 5205#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 5175#L287 assume !false; 5176#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5179#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5131#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5126#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 5108#L282 assume !(0 != eval_~tmp___0~0); 5110#L303 start_simulation_~kernel_st~0 := 2; 5198#L204-2 assume !(1 == ~b0_req_up~0); 5200#L204-3 assume !(1 == ~b1_req_up~0); 5252#L211-1 assume !(1 == ~d0_req_up~0); 5249#L218-1 assume !(1 == ~d1_req_up~0); 5245#L225-1 assume !(1 == ~z_req_up~0); 5240#L232-1 start_simulation_~kernel_st~0 := 3; 5237#L313-2 assume !(0 == ~b0_ev~0); 5233#L313-4 assume !(0 == ~b1_ev~0); 5230#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5225#L323-3 assume !(0 == ~d1_ev~0); 5224#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 5223#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5221#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5222#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5327#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5325#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5323#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5322#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5173#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5193#L356-3 assume !(1 == ~d1_ev~0); 5111#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 5112#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5185#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5143#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5144#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 5181#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5152#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 5120#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 5121#L441 assume !(0 != start_simulation_~tmp~3); 5125#L424-1 [2021-10-28 09:57:35,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:35,959 INFO L85 PathProgramCache]: Analyzing trace with hash -1717323335, now seen corresponding path program 1 times [2021-10-28 09:57:35,959 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:35,959 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207053917] [2021-10-28 09:57:35,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:35,960 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:35,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:36,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:36,005 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:36,005 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207053917] [2021-10-28 09:57:36,005 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1207053917] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:36,005 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:36,005 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:36,005 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013682051] [2021-10-28 09:57:36,006 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:36,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,006 INFO L85 PathProgramCache]: Analyzing trace with hash 982357192, now seen corresponding path program 1 times [2021-10-28 09:57:36,006 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,006 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966746215] [2021-10-28 09:57:36,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,007 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:36,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:36,045 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:36,045 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [966746215] [2021-10-28 09:57:36,045 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [966746215] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:36,045 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:36,045 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:36,046 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471027618] [2021-10-28 09:57:36,046 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:36,046 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:36,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:36,047 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:36,047 INFO L87 Difference]: Start difference. First operand 284 states and 412 transitions. cyclomatic complexity: 129 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:36,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:36,066 INFO L93 Difference]: Finished difference Result 326 states and 467 transitions. [2021-10-28 09:57:36,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:36,066 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 326 states and 467 transitions. [2021-10-28 09:57:36,069 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 292 [2021-10-28 09:57:36,071 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 326 states to 326 states and 467 transitions. [2021-10-28 09:57:36,072 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 326 [2021-10-28 09:57:36,072 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 326 [2021-10-28 09:57:36,072 INFO L73 IsDeterministic]: Start isDeterministic. Operand 326 states and 467 transitions. [2021-10-28 09:57:36,073 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:36,073 INFO L681 BuchiCegarLoop]: Abstraction has 326 states and 467 transitions. [2021-10-28 09:57:36,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states and 467 transitions. [2021-10-28 09:57:36,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 326. [2021-10-28 09:57:36,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 326 states, 326 states have (on average 1.4325153374233128) internal successors, (467), 325 states have internal predecessors, (467), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:36,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 467 transitions. [2021-10-28 09:57:36,080 INFO L704 BuchiCegarLoop]: Abstraction has 326 states and 467 transitions. [2021-10-28 09:57:36,080 INFO L587 BuchiCegarLoop]: Abstraction has 326 states and 467 transitions. [2021-10-28 09:57:36,080 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-10-28 09:57:36,080 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 326 states and 467 transitions. [2021-10-28 09:57:36,082 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 292 [2021-10-28 09:57:36,082 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:36,082 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:36,083 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:36,083 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:36,084 INFO L791 eck$LassoCheckResult]: Stem: 5837#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 5773#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 5774#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 5792#L204 assume 1 == ~b0_req_up~0; 5826#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 5737#L129-2 ~b0_req_up~0 := 0; 5738#L204-1 assume 1 == ~b1_req_up~0; 5735#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 5736#L144-2 ~b1_req_up~0 := 0; 5802#L211 assume 1 == ~d0_req_up~0; 5804#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 5805#L159-2 ~d0_req_up~0 := 0; 5775#L218 assume 1 == ~d1_req_up~0; 5776#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 5830#L174-2 ~d1_req_up~0 := 0; 5765#L225 assume !(1 == ~z_req_up~0); 5766#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 5834#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 5835#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 5795#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5796#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 5807#L328-1 assume !(0 == ~z_ev~0); 5808#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5827#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5752#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5753#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5786#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5741#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5742#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5748#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5754#L356-1 assume !(1 == ~d1_ev~0); 5743#L361-1 assume !(1 == ~z_ev~0); 5744#L424-1 [2021-10-28 09:57:36,084 INFO L793 eck$LassoCheckResult]: Loop: 5744#L424-1 assume !false; 5825#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 5793#L287 assume !false; 5794#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5797#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5751#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5745#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 5727#L282 assume !(0 != eval_~tmp___0~0); 5729#L303 start_simulation_~kernel_st~0 := 2; 5817#L204-2 assume !(1 == ~b0_req_up~0); 5819#L204-3 assume !(1 == ~b1_req_up~0); 5879#L211-1 assume !(1 == ~d0_req_up~0); 5875#L218-1 assume !(1 == ~d1_req_up~0); 5876#L225-1 assume !(1 == ~z_req_up~0); 5904#L232-1 start_simulation_~kernel_st~0 := 3; 5901#L313-2 assume !(0 == ~b0_ev~0); 5897#L313-4 assume !(0 == ~b1_ev~0); 5894#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5863#L323-3 assume !(0 == ~d1_ev~0); 5861#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 5858#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5855#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5856#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5953#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5951#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5918#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5913#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5791#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5811#L356-3 assume !(1 == ~d1_ev~0); 5730#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 5731#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5803#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5763#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5764#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 5798#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5772#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 5739#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 5740#L441 assume !(0 != start_simulation_~tmp~3); 5744#L424-1 [2021-10-28 09:57:36,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,084 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325257, now seen corresponding path program 1 times [2021-10-28 09:57:36,084 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,085 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732991969] [2021-10-28 09:57:36,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,085 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:36,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:36,110 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:36,111 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [732991969] [2021-10-28 09:57:36,111 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [732991969] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:36,111 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:36,111 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:36,111 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148008084] [2021-10-28 09:57:36,112 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:36,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,112 INFO L85 PathProgramCache]: Analyzing trace with hash 982357192, now seen corresponding path program 2 times [2021-10-28 09:57:36,112 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,112 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895565559] [2021-10-28 09:57:36,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,113 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:36,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:36,144 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:36,144 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895565559] [2021-10-28 09:57:36,144 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1895565559] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:36,144 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:36,144 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:36,145 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271226289] [2021-10-28 09:57:36,145 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:36,145 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:36,146 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:36,146 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:36,146 INFO L87 Difference]: Start difference. First operand 326 states and 467 transitions. cyclomatic complexity: 142 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:36,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:36,167 INFO L93 Difference]: Finished difference Result 393 states and 555 transitions. [2021-10-28 09:57:36,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:36,167 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 393 states and 555 transitions. [2021-10-28 09:57:36,170 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 359 [2021-10-28 09:57:36,174 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 393 states to 393 states and 555 transitions. [2021-10-28 09:57:36,174 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 393 [2021-10-28 09:57:36,174 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 393 [2021-10-28 09:57:36,175 INFO L73 IsDeterministic]: Start isDeterministic. Operand 393 states and 555 transitions. [2021-10-28 09:57:36,175 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:36,175 INFO L681 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2021-10-28 09:57:36,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states and 555 transitions. [2021-10-28 09:57:36,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2021-10-28 09:57:36,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 393 states have (on average 1.4122137404580153) internal successors, (555), 392 states have internal predecessors, (555), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:36,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 555 transitions. [2021-10-28 09:57:36,184 INFO L704 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2021-10-28 09:57:36,184 INFO L587 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2021-10-28 09:57:36,184 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-10-28 09:57:36,184 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 393 states and 555 transitions. [2021-10-28 09:57:36,186 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 359 [2021-10-28 09:57:36,186 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:36,186 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:36,187 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:36,187 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:36,188 INFO L791 eck$LassoCheckResult]: Stem: 6562#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 6500#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 6501#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 6519#L204 assume 1 == ~b0_req_up~0; 6551#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 6465#L129-2 ~b0_req_up~0 := 0; 6466#L204-1 assume 1 == ~b1_req_up~0; 6463#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 6464#L144-2 ~b1_req_up~0 := 0; 6529#L211 assume 1 == ~d0_req_up~0; 6531#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 6532#L159-2 ~d0_req_up~0 := 0; 6502#L218 assume 1 == ~d1_req_up~0; 6503#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 6556#L174-2 ~d1_req_up~0 := 0; 6494#L225 assume !(1 == ~z_req_up~0); 6495#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 6559#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 6560#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 6522#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 6523#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 6534#L328-1 assume !(0 == ~z_ev~0); 6535#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6552#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6479#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6480#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 6513#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6469#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6470#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6475#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6481#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6471#L361-1 assume !(1 == ~z_ev~0); 6472#L424-1 [2021-10-28 09:57:36,188 INFO L793 eck$LassoCheckResult]: Loop: 6472#L424-1 assume !false; 6548#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 6520#L287 assume !false; 6521#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6524#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6478#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6473#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 6455#L282 assume !(0 != eval_~tmp___0~0); 6457#L303 start_simulation_~kernel_st~0 := 2; 6542#L204-2 assume !(1 == ~b0_req_up~0); 6544#L204-3 assume !(1 == ~b1_req_up~0); 6617#L211-1 assume !(1 == ~d0_req_up~0); 6613#L218-1 assume !(1 == ~d1_req_up~0); 6609#L225-1 assume !(1 == ~z_req_up~0); 6606#L232-1 start_simulation_~kernel_st~0 := 3; 6604#L313-2 assume !(0 == ~b0_ev~0); 6601#L313-4 assume !(0 == ~b1_ev~0); 6598#L318-3 assume !(0 == ~d0_ev~0); 6596#L323-3 assume !(0 == ~d1_ev~0); 6594#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 6592#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6589#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6590#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6603#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 6600#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6573#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6570#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6568#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6566#L356-3 assume !(1 == ~d1_ev~0); 6458#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 6459#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6530#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6490#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6491#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 6525#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6499#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 6467#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 6468#L441 assume !(0 != start_simulation_~tmp~3); 6472#L424-1 [2021-10-28 09:57:36,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,189 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325319, now seen corresponding path program 1 times [2021-10-28 09:57:36,189 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,189 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301741685] [2021-10-28 09:57:36,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,189 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:36,200 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:36,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:36,246 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:36,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,248 INFO L85 PathProgramCache]: Analyzing trace with hash 1405059018, now seen corresponding path program 1 times [2021-10-28 09:57:36,248 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,248 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718500213] [2021-10-28 09:57:36,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,249 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:36,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:36,279 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:36,279 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718500213] [2021-10-28 09:57:36,279 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1718500213] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:36,279 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:36,279 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:57:36,280 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047973811] [2021-10-28 09:57:36,281 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:36,281 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:36,282 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:57:36,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:57:36,282 INFO L87 Difference]: Start difference. First operand 393 states and 555 transitions. cyclomatic complexity: 163 Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:36,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:36,341 INFO L93 Difference]: Finished difference Result 426 states and 602 transitions. [2021-10-28 09:57:36,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 09:57:36,341 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 602 transitions. [2021-10-28 09:57:36,345 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 392 [2021-10-28 09:57:36,348 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 426 states and 602 transitions. [2021-10-28 09:57:36,349 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 426 [2021-10-28 09:57:36,349 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 426 [2021-10-28 09:57:36,349 INFO L73 IsDeterministic]: Start isDeterministic. Operand 426 states and 602 transitions. [2021-10-28 09:57:36,350 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:57:36,350 INFO L681 BuchiCegarLoop]: Abstraction has 426 states and 602 transitions. [2021-10-28 09:57:36,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states and 602 transitions. [2021-10-28 09:57:36,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 396. [2021-10-28 09:57:36,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 396 states have (on average 1.4090909090909092) internal successors, (558), 395 states have internal predecessors, (558), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:36,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 558 transitions. [2021-10-28 09:57:36,359 INFO L704 BuchiCegarLoop]: Abstraction has 396 states and 558 transitions. [2021-10-28 09:57:36,359 INFO L587 BuchiCegarLoop]: Abstraction has 396 states and 558 transitions. [2021-10-28 09:57:36,360 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-10-28 09:57:36,360 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 396 states and 558 transitions. [2021-10-28 09:57:36,362 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 362 [2021-10-28 09:57:36,362 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:36,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:36,363 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:36,363 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:36,363 INFO L791 eck$LassoCheckResult]: Stem: 7405#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 7336#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 7337#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 7356#L204 assume 1 == ~b0_req_up~0; 7394#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 7299#L129-2 ~b0_req_up~0 := 0; 7300#L204-1 assume 1 == ~b1_req_up~0; 7297#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 7298#L144-2 ~b1_req_up~0 := 0; 7368#L211 assume 1 == ~d0_req_up~0; 7370#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 7371#L159-2 ~d0_req_up~0 := 0; 7338#L218 assume 1 == ~d1_req_up~0; 7339#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 7399#L174-2 ~d1_req_up~0 := 0; 7328#L225 assume !(1 == ~z_req_up~0); 7329#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 7402#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 7403#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 7359#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 7360#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 7373#L328-1 assume !(0 == ~z_ev~0); 7374#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7395#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7315#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7316#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 7350#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7303#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7304#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7310#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 7317#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 7305#L361-1 assume !(1 == ~z_ev~0); 7306#L424-1 [2021-10-28 09:57:36,364 INFO L793 eck$LassoCheckResult]: Loop: 7306#L424-1 assume !false; 7393#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 7357#L287 assume !false; 7358#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7361#L260 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 7313#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 7314#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 7412#L282 assume !(0 != eval_~tmp___0~0); 7408#L303 start_simulation_~kernel_st~0 := 2; 7384#L204-2 assume !(1 == ~b0_req_up~0); 7386#L204-3 assume !(1 == ~b1_req_up~0); 7510#L211-1 assume !(1 == ~d0_req_up~0); 7511#L218-1 assume !(1 == ~d1_req_up~0); 7473#L225-1 assume !(1 == ~z_req_up~0); 7470#L232-1 start_simulation_~kernel_st~0 := 3; 7467#L313-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 7463#L313-4 assume !(0 == ~b1_ev~0); 7459#L318-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 7460#L323-3 assume !(0 == ~d1_ev~0); 7532#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 7530#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7528#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7482#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7525#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 7522#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7437#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7432#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7413#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 7411#L356-3 assume !(1 == ~d1_ev~0); 7292#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 7293#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7369#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 7326#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 7327#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 7363#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 7335#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 7301#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 7302#L441 assume !(0 != start_simulation_~tmp~3); 7306#L424-1 [2021-10-28 09:57:36,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,364 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325319, now seen corresponding path program 2 times [2021-10-28 09:57:36,364 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,364 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903063310] [2021-10-28 09:57:36,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,365 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:36,373 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:36,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:36,401 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:36,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,402 INFO L85 PathProgramCache]: Analyzing trace with hash 543812228, now seen corresponding path program 1 times [2021-10-28 09:57:36,402 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,402 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500572146] [2021-10-28 09:57:36,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,402 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:36,408 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:36,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:36,423 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:36,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:36,424 INFO L85 PathProgramCache]: Analyzing trace with hash -877632900, now seen corresponding path program 1 times [2021-10-28 09:57:36,424 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:36,424 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491051132] [2021-10-28 09:57:36,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:36,425 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:36,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:36,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:36,458 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:36,458 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491051132] [2021-10-28 09:57:36,458 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [491051132] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:36,458 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:36,458 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:36,459 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [548292420] [2021-10-28 09:57:36,920 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 09:57:36,920 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 09:57:36,921 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 09:57:36,921 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 09:57:36,921 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-10-28 09:57:36,921 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:36,921 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 09:57:36,921 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 09:57:36,921 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration20_Loop [2021-10-28 09:57:36,922 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 09:57:36,922 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 09:57:36,938 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,945 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,948 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,949 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,953 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,957 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,960 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,962 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,964 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,966 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,968 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,970 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,977 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,979 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,982 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,984 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,989 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,995 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:36,999 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,002 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,004 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,006 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,008 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,229 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 09:57:37,229 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-10-28 09:57:37,232 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:37,232 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:37,233 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:37,246 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:37,246 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:37,263 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-10-28 09:57:37,288 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:37,289 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~d1_ev~0=-7} Honda state: {~d1_ev~0=-7} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:37,325 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:37,326 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:37,326 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:37,327 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:37,333 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-10-28 09:57:37,337 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:37,338 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:37,370 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:37,370 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_~__retres2~0=0} Honda state: {ULTIMATE.start_stop_simulation_~__retres2~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:37,404 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:37,404 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:37,404 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:37,418 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:37,423 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:37,423 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:37,433 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-10-28 09:57:37,442 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:37,442 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_#t~ret10=0} Honda state: {ULTIMATE.start_stop_simulation_#t~ret10=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:37,485 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:37,485 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:37,485 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:37,487 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:37,497 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-10-28 09:57:37,498 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:37,498 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:37,541 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:37,541 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:37,541 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:37,543 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:37,543 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-10-28 09:57:37,544 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-10-28 09:57:37,544 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:37,557 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-10-28 09:57:37,579 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:37,579 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 09:57:37,579 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 09:57:37,579 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 09:57:37,579 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 09:57:37,579 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 09:57:37,579 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:37,579 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 09:57:37,580 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 09:57:37,580 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration20_Loop [2021-10-28 09:57:37,580 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 09:57:37,580 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 09:57:37,583 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,593 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,600 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,607 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,609 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,616 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,622 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,627 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,630 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,638 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,640 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,643 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,646 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,649 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,652 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,655 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,661 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,668 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,671 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,677 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,683 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,685 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,688 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:37,952 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 09:57:37,956 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 09:57:37,958 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:37,958 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:37,959 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:37,965 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:37,975 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:37,975 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:37,975 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:37,975 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:37,975 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:37,978 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:37,978 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:37,980 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-10-28 09:57:37,990 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:38,029 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:38,030 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:38,030 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:38,031 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:38,033 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-10-28 09:57:38,034 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:38,043 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:38,043 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:38,043 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:38,043 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2021-10-28 09:57:38,043 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:38,045 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2021-10-28 09:57:38,045 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:38,065 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:38,101 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:38,102 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:38,102 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:38,103 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:38,109 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:38,118 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:38,118 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:38,118 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:38,118 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:38,119 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:38,120 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:38,120 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:38,122 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-10-28 09:57:38,137 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:38,169 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2021-10-28 09:57:38,169 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:38,169 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:38,171 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:38,177 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-10-28 09:57:38,178 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:38,187 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:38,187 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:38,187 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:38,187 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:38,187 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:38,188 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:38,189 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:38,190 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:38,209 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:38,210 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:38,210 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:38,216 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:38,217 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-10-28 09:57:38,219 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:38,226 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:38,226 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:38,226 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:38,226 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:38,226 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:38,228 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:38,228 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:38,243 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:38,267 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:38,267 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:38,267 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:38,268 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:38,269 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-10-28 09:57:38,270 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:38,277 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:38,277 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:38,277 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:38,277 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:38,277 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:38,278 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:38,278 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:38,295 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 09:57:38,299 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-10-28 09:57:38,299 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-10-28 09:57:38,300 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:38,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:38,301 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:38,302 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-10-28 09:57:38,302 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 09:57:38,302 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-10-28 09:57:38,302 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 09:57:38,303 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~b0_ev~0) = -1*~b0_ev~0 + 1 Supporting invariants [] [2021-10-28 09:57:38,325 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2021-10-28 09:57:38,327 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-10-28 09:57:38,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:38,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:38,420 INFO L263 TraceCheckSpWp]: Trace formula consists of 203 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 09:57:38,426 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:57:38,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:38,540 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 09:57:38,542 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:57:38,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:38,778 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2021-10-28 09:57:38,779 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 396 states and 558 transitions. cyclomatic complexity: 163 Second operand has 5 states, 5 states have (on average 14.0) internal successors, (70), 5 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:38,850 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 396 states and 558 transitions. cyclomatic complexity: 163. Second operand has 5 states, 5 states have (on average 14.0) internal successors, (70), 5 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 1350 states and 1928 transitions. Complement of second has 5 states. [2021-10-28 09:57:38,853 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 09:57:38,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 14.0) internal successors, (70), 5 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:38,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 252 transitions. [2021-10-28 09:57:38,857 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 252 transitions. Stem has 32 letters. Loop has 38 letters. [2021-10-28 09:57:38,859 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 09:57:38,859 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 252 transitions. Stem has 70 letters. Loop has 38 letters. [2021-10-28 09:57:38,863 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 09:57:38,863 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 252 transitions. Stem has 32 letters. Loop has 76 letters. [2021-10-28 09:57:38,865 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 09:57:38,866 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1350 states and 1928 transitions. [2021-10-28 09:57:38,880 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 937 [2021-10-28 09:57:38,892 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1350 states to 1278 states and 1828 transitions. [2021-10-28 09:57:38,892 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 972 [2021-10-28 09:57:38,893 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 977 [2021-10-28 09:57:38,893 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1278 states and 1828 transitions. [2021-10-28 09:57:38,895 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:38,895 INFO L681 BuchiCegarLoop]: Abstraction has 1278 states and 1828 transitions. [2021-10-28 09:57:38,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1278 states and 1828 transitions. [2021-10-28 09:57:38,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1278 to 911. [2021-10-28 09:57:38,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 911 states, 911 states have (on average 1.4281009879253568) internal successors, (1301), 910 states have internal predecessors, (1301), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:38,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 911 states to 911 states and 1301 transitions. [2021-10-28 09:57:38,918 INFO L704 BuchiCegarLoop]: Abstraction has 911 states and 1301 transitions. [2021-10-28 09:57:38,919 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:38,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:38,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:38,919 INFO L87 Difference]: Start difference. First operand 911 states and 1301 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:38,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:38,950 INFO L93 Difference]: Finished difference Result 969 states and 1379 transitions. [2021-10-28 09:57:38,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:38,951 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 969 states and 1379 transitions. [2021-10-28 09:57:38,960 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 613 [2021-10-28 09:57:38,969 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 969 states to 969 states and 1379 transitions. [2021-10-28 09:57:38,969 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 648 [2021-10-28 09:57:38,970 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 648 [2021-10-28 09:57:38,970 INFO L73 IsDeterministic]: Start isDeterministic. Operand 969 states and 1379 transitions. [2021-10-28 09:57:38,972 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:38,972 INFO L681 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2021-10-28 09:57:38,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states and 1379 transitions. [2021-10-28 09:57:39,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 969. [2021-10-28 09:57:39,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 969 states have (on average 1.4231166150670795) internal successors, (1379), 968 states have internal predecessors, (1379), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1379 transitions. [2021-10-28 09:57:39,035 INFO L704 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2021-10-28 09:57:39,035 INFO L587 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2021-10-28 09:57:39,036 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-10-28 09:57:39,036 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 969 states and 1379 transitions. [2021-10-28 09:57:39,041 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 613 [2021-10-28 09:57:39,050 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:39,050 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:39,051 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,052 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,052 INFO L791 eck$LassoCheckResult]: Stem: 11349#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 11226#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 11227#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 11260#L204 assume 1 == ~b0_req_up~0; 11332#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 11165#L129-2 ~b0_req_up~0 := 0; 11166#L204-1 assume 1 == ~b1_req_up~0; 11163#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 11164#L144-2 ~b1_req_up~0 := 0; 11278#L211 assume 1 == ~d0_req_up~0; 11283#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 11284#L159-2 ~d0_req_up~0 := 0; 11228#L218 assume 1 == ~d1_req_up~0; 11229#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 11337#L174-2 ~d1_req_up~0 := 0; 11217#L225 assume !(1 == ~z_req_up~0); 11218#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 11344#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 11345#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 11265#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 11266#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 11287#L328-1 assume !(0 == ~z_ev~0); 11288#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 11333#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 11190#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 11191#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 11249#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 11171#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 11172#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 11183#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 11192#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 11173#L361-1 assume 1 == ~z_ev~0;~z_ev~0 := 2; 11174#L424-1 [2021-10-28 09:57:39,052 INFO L793 eck$LassoCheckResult]: Loop: 11174#L424-1 assume !false; 11740#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 11734#L287 assume !false; 11739#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11738#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 11705#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11737#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 11736#L282 assume 0 != eval_~tmp___0~0; 11735#L282-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 11598#L291 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 11733#L44 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 11730#L44-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 11728#L53 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 11727#L65-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 11725#L71 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 11342#L83-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 11261#L287 assume !false; 11262#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11365#L260 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 11703#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11701#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 11383#L282 assume !(0 != eval_~tmp___0~0); 11354#L303 start_simulation_~kernel_st~0 := 2; 11355#L204-2 assume !(1 == ~b0_req_up~0); 11689#L204-3 assume !(1 == ~b1_req_up~0); 11686#L211-1 assume !(1 == ~d0_req_up~0); 11683#L218-1 assume !(1 == ~d1_req_up~0); 11677#L225-1 assume !(1 == ~z_req_up~0); 11674#L232-1 start_simulation_~kernel_st~0 := 3; 11671#L313-2 assume !(0 == ~b0_ev~0); 11667#L313-4 assume !(0 == ~b1_ev~0); 11663#L318-3 assume !(0 == ~d0_ev~0); 11659#L323-3 assume !(0 == ~d1_ev~0); 11657#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 11655#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 11652#L99-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 11653#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 11699#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 11639#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 11622#L382-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 11619#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 11616#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 11613#L356-3 assume !(1 == ~d1_ev~0); 11614#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 11753#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11747#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 11746#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11745#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 11744#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 11743#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 11742#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 11741#L441 assume !(0 != start_simulation_~tmp~3); 11174#L424-1 [2021-10-28 09:57:39,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,053 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325321, now seen corresponding path program 1 times [2021-10-28 09:57:39,053 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,053 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084134332] [2021-10-28 09:57:39,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,054 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:39,093 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:39,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:39,107 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:39,107 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084134332] [2021-10-28 09:57:39,107 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2084134332] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:39,107 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:39,107 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:57:39,108 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248596911] [2021-10-28 09:57:39,108 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:57:39,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,110 INFO L85 PathProgramCache]: Analyzing trace with hash -696899428, now seen corresponding path program 1 times [2021-10-28 09:57:39,110 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,110 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400765162] [2021-10-28 09:57:39,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,111 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:39,136 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:39,137 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:39,137 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400765162] [2021-10-28 09:57:39,137 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1400765162] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:39,137 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:39,137 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:39,138 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120588317] [2021-10-28 09:57:39,138 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:39,138 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:39,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:39,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:39,139 INFO L87 Difference]: Start difference. First operand 969 states and 1379 transitions. cyclomatic complexity: 413 Second operand has 3 states, 2 states have (on average 16.0) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:39,176 INFO L93 Difference]: Finished difference Result 1921 states and 2691 transitions. [2021-10-28 09:57:39,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:39,177 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1921 states and 2691 transitions. [2021-10-28 09:57:39,199 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1226 [2021-10-28 09:57:39,215 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1921 states to 1921 states and 2691 transitions. [2021-10-28 09:57:39,215 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1279 [2021-10-28 09:57:39,217 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1279 [2021-10-28 09:57:39,217 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1921 states and 2691 transitions. [2021-10-28 09:57:39,219 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:39,219 INFO L681 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2021-10-28 09:57:39,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1921 states and 2691 transitions. [2021-10-28 09:57:39,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1921 to 1921. [2021-10-28 09:57:39,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1921 states, 1921 states have (on average 1.400832899531494) internal successors, (2691), 1920 states have internal predecessors, (2691), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1921 states to 1921 states and 2691 transitions. [2021-10-28 09:57:39,262 INFO L704 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2021-10-28 09:57:39,262 INFO L587 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2021-10-28 09:57:39,262 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-10-28 09:57:39,262 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1921 states and 2691 transitions. [2021-10-28 09:57:39,274 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1226 [2021-10-28 09:57:39,274 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:39,275 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:39,276 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,276 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,276 INFO L791 eck$LassoCheckResult]: Stem: 14262#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 14124#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 14125#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 14159#L204 assume 1 == ~b0_req_up~0; 14243#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 14062#L129-2 ~b0_req_up~0 := 0; 14063#L204-1 assume 1 == ~b1_req_up~0; 14060#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 14061#L144-2 ~b1_req_up~0 := 0; 14181#L211 assume 1 == ~d0_req_up~0; 14188#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 14189#L159-2 ~d0_req_up~0 := 0; 14126#L218 assume 1 == ~d1_req_up~0; 14127#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 14249#L174-2 ~d1_req_up~0 := 0; 14115#L225 assume !(1 == ~z_req_up~0); 14116#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 14256#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 14257#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 14164#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 14165#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 14193#L328-1 assume !(0 == ~z_ev~0); 14194#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 14399#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 14398#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 14397#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 14396#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 14395#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 14394#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 14393#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 14392#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 14391#L361-1 assume !(1 == ~z_ev~0); 14389#L424-1 assume !false; 14390#L425 [2021-10-28 09:57:39,277 INFO L793 eck$LassoCheckResult]: Loop: 14390#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 15073#L287 assume !false; 15085#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 15083#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 14982#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 15080#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 15077#L282 assume 0 != eval_~tmp___0~0; 15076#L282-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 15044#L291 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 15071#L44 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 15066#L44-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 15062#L53 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 15053#L65-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 15048#L71 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 15042#L83-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 14988#L287 assume !false; 14984#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 14981#L260 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 14979#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 14976#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 14973#L282 assume !(0 != eval_~tmp___0~0); 14972#L303 start_simulation_~kernel_st~0 := 2; 14959#L204-2 assume !(1 == ~b0_req_up~0); 14955#L204-3 assume !(1 == ~b1_req_up~0); 14952#L211-1 assume !(1 == ~d0_req_up~0); 14941#L218-1 assume !(1 == ~d1_req_up~0); 14933#L225-1 assume !(1 == ~z_req_up~0); 14928#L232-1 start_simulation_~kernel_st~0 := 3; 14926#L313-2 assume !(0 == ~b0_ev~0); 14922#L313-4 assume !(0 == ~b1_ev~0); 14918#L318-3 assume !(0 == ~d0_ev~0); 14914#L323-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 14915#L328-3 assume !(0 == ~z_ev~0); 15576#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 15572#L99-1 assume !(1 == ~b0_ev~0); 15569#L103-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 14132#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 15797#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 15588#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 15587#L382-5 assume !(1 == ~b0_ev~0); 14879#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 14880#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 14859#L356-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 14854#L361-3 assume !(1 == ~z_ev~0); 14852#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 15106#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 15075#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 15103#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 15101#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 15098#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 15095#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 15092#L441 assume !(0 != start_simulation_~tmp~3); 15090#L424-1 assume !false; 14390#L425 [2021-10-28 09:57:39,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,277 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 1 times [2021-10-28 09:57:39,277 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,277 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501830644] [2021-10-28 09:57:39,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,278 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,288 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:39,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,308 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:39,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,309 INFO L85 PathProgramCache]: Analyzing trace with hash -819356584, now seen corresponding path program 1 times [2021-10-28 09:57:39,309 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,309 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747891388] [2021-10-28 09:57:39,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,310 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:39,327 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:39,327 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:39,329 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747891388] [2021-10-28 09:57:39,329 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1747891388] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:39,329 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:39,329 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:39,329 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439081373] [2021-10-28 09:57:39,330 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:39,330 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:39,330 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:39,331 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:39,331 INFO L87 Difference]: Start difference. First operand 1921 states and 2691 transitions. cyclomatic complexity: 773 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:39,374 INFO L93 Difference]: Finished difference Result 3753 states and 5233 transitions. [2021-10-28 09:57:39,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:39,374 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3753 states and 5233 transitions. [2021-10-28 09:57:39,409 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2428 [2021-10-28 09:57:39,443 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3753 states to 3753 states and 5233 transitions. [2021-10-28 09:57:39,443 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2481 [2021-10-28 09:57:39,446 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2481 [2021-10-28 09:57:39,447 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3753 states and 5233 transitions. [2021-10-28 09:57:39,450 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:39,450 INFO L681 BuchiCegarLoop]: Abstraction has 3753 states and 5233 transitions. [2021-10-28 09:57:39,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3753 states and 5233 transitions. [2021-10-28 09:57:39,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3753 to 1939. [2021-10-28 09:57:39,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1939 states, 1939 states have (on average 1.3971119133574008) internal successors, (2709), 1938 states have internal predecessors, (2709), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1939 states to 1939 states and 2709 transitions. [2021-10-28 09:57:39,506 INFO L704 BuchiCegarLoop]: Abstraction has 1939 states and 2709 transitions. [2021-10-28 09:57:39,506 INFO L587 BuchiCegarLoop]: Abstraction has 1939 states and 2709 transitions. [2021-10-28 09:57:39,506 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-10-28 09:57:39,507 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1939 states and 2709 transitions. [2021-10-28 09:57:39,519 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1238 [2021-10-28 09:57:39,519 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:39,519 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:39,520 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,520 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,521 INFO L791 eck$LassoCheckResult]: Stem: 19961#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 19807#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 19808#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 19841#L204 assume 1 == ~b0_req_up~0; 19936#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 19742#L129-2 ~b0_req_up~0 := 0; 19743#L204-1 assume 1 == ~b1_req_up~0; 19740#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 19741#L144-2 ~b1_req_up~0 := 0; 19870#L211 assume 1 == ~d0_req_up~0; 19881#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 19882#L159-2 ~d0_req_up~0 := 0; 19809#L218 assume 1 == ~d1_req_up~0; 19810#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 19945#L174-2 ~d1_req_up~0 := 0; 19797#L225 assume !(1 == ~z_req_up~0); 19798#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 19953#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 19954#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 19846#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 19847#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 19887#L328-1 assume !(0 == ~z_ev~0); 19888#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 19937#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 19938#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 19830#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 19831#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 19748#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 19749#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 19771#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 19772#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 19750#L361-1 assume !(1 == ~z_ev~0); 19751#L424-1 assume !false; 20248#L425 [2021-10-28 09:57:39,521 INFO L793 eck$LassoCheckResult]: Loop: 20248#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 20732#L287 assume !false; 20764#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 20761#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 20714#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 20755#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 20738#L282 assume 0 != eval_~tmp___0~0; 20734#L282-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 20719#L291 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 20731#L44 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 20729#L44-1 assume 0 != ~d0_val~0; 20727#L54 assume 0 != ~b1_val~0;method1_~s2~0 := 0; 20725#L53 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 20724#L65-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 20722#L71 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 20717#L83-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 20716#L287 assume !false; 20715#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 20713#L260 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 20537#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 20535#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 20536#L282 assume !(0 != eval_~tmp___0~0); 20695#L303 start_simulation_~kernel_st~0 := 2; 20688#L204-2 assume !(1 == ~b0_req_up~0); 20659#L204-3 assume !(1 == ~b1_req_up~0); 20655#L211-1 assume !(1 == ~d0_req_up~0); 20651#L218-1 assume !(1 == ~d1_req_up~0); 20648#L225-1 assume !(1 == ~z_req_up~0); 20649#L232-1 start_simulation_~kernel_st~0 := 3; 20856#L313-2 assume !(0 == ~b0_ev~0); 20853#L313-4 assume !(0 == ~b1_ev~0); 20850#L318-3 assume !(0 == ~d0_ev~0); 20847#L323-3 assume !(0 == ~d1_ev~0); 20844#L328-3 assume !(0 == ~z_ev~0); 20842#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 20840#L99-1 assume !(1 == ~b0_ev~0); 20837#L103-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 20838#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 21203#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 21201#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 21199#L382-5 assume !(1 == ~b0_ev~0); 20809#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 20801#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 20794#L356-3 assume !(1 == ~d1_ev~0); 20790#L361-3 assume !(1 == ~z_ev~0); 20788#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 20784#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 20782#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 20780#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 20778#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 20777#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 20775#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 20773#L441 assume !(0 != start_simulation_~tmp~3); 20771#L424-1 assume !false; 20248#L425 [2021-10-28 09:57:39,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,521 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 2 times [2021-10-28 09:57:39,522 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,522 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761930616] [2021-10-28 09:57:39,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,522 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,531 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:39,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,545 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:39,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,546 INFO L85 PathProgramCache]: Analyzing trace with hash -614486231, now seen corresponding path program 1 times [2021-10-28 09:57:39,546 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,546 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081795319] [2021-10-28 09:57:39,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,546 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:39,560 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:39,560 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:39,561 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081795319] [2021-10-28 09:57:39,561 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1081795319] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:39,561 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:39,561 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:39,561 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816343859] [2021-10-28 09:57:39,561 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:39,562 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:39,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:39,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:39,564 INFO L87 Difference]: Start difference. First operand 1939 states and 2709 transitions. cyclomatic complexity: 773 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:39,599 INFO L93 Difference]: Finished difference Result 3747 states and 5203 transitions. [2021-10-28 09:57:39,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:39,599 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3747 states and 5203 transitions. [2021-10-28 09:57:39,664 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2424 [2021-10-28 09:57:39,695 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3747 states to 3747 states and 5203 transitions. [2021-10-28 09:57:39,695 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2477 [2021-10-28 09:57:39,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2477 [2021-10-28 09:57:39,698 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3747 states and 5203 transitions. [2021-10-28 09:57:39,698 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:39,698 INFO L681 BuchiCegarLoop]: Abstraction has 3747 states and 5203 transitions. [2021-10-28 09:57:39,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3747 states and 5203 transitions. [2021-10-28 09:57:39,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3747 to 1939. [2021-10-28 09:57:39,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1939 states, 1939 states have (on average 1.3878287777204745) internal successors, (2691), 1938 states have internal predecessors, (2691), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1939 states to 1939 states and 2691 transitions. [2021-10-28 09:57:39,757 INFO L704 BuchiCegarLoop]: Abstraction has 1939 states and 2691 transitions. [2021-10-28 09:57:39,757 INFO L587 BuchiCegarLoop]: Abstraction has 1939 states and 2691 transitions. [2021-10-28 09:57:39,757 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-10-28 09:57:39,757 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1939 states and 2691 transitions. [2021-10-28 09:57:39,765 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1238 [2021-10-28 09:57:39,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:39,766 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:39,767 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,767 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,767 INFO L791 eck$LassoCheckResult]: Stem: 25653#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 25500#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 25501#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 25535#L204 assume 1 == ~b0_req_up~0; 25631#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 25434#L129-2 ~b0_req_up~0 := 0; 25435#L204-1 assume 1 == ~b1_req_up~0; 25432#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 25433#L144-2 ~b1_req_up~0 := 0; 25565#L211 assume 1 == ~d0_req_up~0; 25573#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 25574#L159-2 ~d0_req_up~0 := 0; 25502#L218 assume 1 == ~d1_req_up~0; 25503#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 25638#L174-2 ~d1_req_up~0 := 0; 25490#L225 assume !(1 == ~z_req_up~0); 25491#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 25646#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 25647#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 25540#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 25541#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 25577#L328-1 assume !(0 == ~z_ev~0); 25578#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 25634#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 25462#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 25463#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 25651#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 25652#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 25453#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 25454#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 25466#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 25467#L361-1 assume !(1 == ~z_ev~0); 25947#L424-1 assume !false; 25948#L425 [2021-10-28 09:57:39,768 INFO L793 eck$LassoCheckResult]: Loop: 25948#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 25587#L287 assume !false; 26782#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 25548#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 25549#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 26231#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 25418#L282 assume 0 != eval_~tmp___0~0; 25419#L282-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 25554#L291 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 25588#L44 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 25571#L44-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 25560#L53 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 25688#L65-2 assume 0 != method1_~s2~0; 25689#L72 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 25569#L71 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 25456#L83-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 26470#L287 assume !false; 26469#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 26467#L260 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 26465#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 26463#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 26459#L282 assume !(0 != eval_~tmp___0~0); 26457#L303 start_simulation_~kernel_st~0 := 2; 26453#L204-2 assume !(1 == ~b0_req_up~0); 26451#L204-3 assume !(1 == ~b1_req_up~0); 26452#L211-1 assume !(1 == ~d0_req_up~0); 26565#L218-1 assume !(1 == ~d1_req_up~0); 26561#L225-1 assume !(1 == ~z_req_up~0); 26562#L232-1 start_simulation_~kernel_st~0 := 3; 26858#L313-2 assume !(0 == ~b0_ev~0); 26855#L313-4 assume !(0 == ~b1_ev~0); 26852#L318-3 assume !(0 == ~d0_ev~0); 26849#L323-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 26850#L328-3 assume !(0 == ~z_ev~0); 26973#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 26971#L99-1 assume !(1 == ~b0_ev~0); 26969#L103-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 26904#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 26902#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 26900#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 26898#L382-5 assume !(1 == ~b0_ev~0); 26339#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 26261#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 26252#L356-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 26247#L361-3 assume !(1 == ~z_ev~0); 26248#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 26797#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 26625#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 26795#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 26794#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 26793#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 26791#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 26789#L441 assume !(0 != start_simulation_~tmp~3); 26786#L424-1 assume !false; 25948#L425 [2021-10-28 09:57:39,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,768 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 3 times [2021-10-28 09:57:39,769 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,769 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051076680] [2021-10-28 09:57:39,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,769 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,777 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:39,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,792 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:39,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,793 INFO L85 PathProgramCache]: Analyzing trace with hash 1567847802, now seen corresponding path program 1 times [2021-10-28 09:57:39,793 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,793 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095443043] [2021-10-28 09:57:39,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,793 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:39,810 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:39,810 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:39,810 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095443043] [2021-10-28 09:57:39,810 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2095443043] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:39,810 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:39,810 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:57:39,811 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795284154] [2021-10-28 09:57:39,811 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:57:39,811 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:39,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:57:39,812 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:57:39,812 INFO L87 Difference]: Start difference. First operand 1939 states and 2691 transitions. cyclomatic complexity: 755 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:39,848 INFO L93 Difference]: Finished difference Result 2427 states and 3367 transitions. [2021-10-28 09:57:39,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:57:39,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2427 states and 3367 transitions. [2021-10-28 09:57:39,863 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1588 [2021-10-28 09:57:39,884 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2427 states to 2427 states and 3367 transitions. [2021-10-28 09:57:39,884 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1641 [2021-10-28 09:57:39,886 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1641 [2021-10-28 09:57:39,886 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2427 states and 3367 transitions. [2021-10-28 09:57:39,887 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:39,887 INFO L681 BuchiCegarLoop]: Abstraction has 2427 states and 3367 transitions. [2021-10-28 09:57:39,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2427 states and 3367 transitions. [2021-10-28 09:57:39,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2427 to 2295. [2021-10-28 09:57:39,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2295 states, 2295 states have (on average 1.3886710239651416) internal successors, (3187), 2294 states have internal predecessors, (3187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:39,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2295 states to 2295 states and 3187 transitions. [2021-10-28 09:57:39,940 INFO L704 BuchiCegarLoop]: Abstraction has 2295 states and 3187 transitions. [2021-10-28 09:57:39,941 INFO L587 BuchiCegarLoop]: Abstraction has 2295 states and 3187 transitions. [2021-10-28 09:57:39,941 INFO L425 BuchiCegarLoop]: ======== Iteration 25============ [2021-10-28 09:57:39,941 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2295 states and 3187 transitions. [2021-10-28 09:57:39,951 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1500 [2021-10-28 09:57:39,951 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:39,951 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:39,953 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,953 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:39,953 INFO L791 eck$LassoCheckResult]: Stem: 30018#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 29873#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 29874#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 29908#L204 assume 1 == ~b0_req_up~0; 29994#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 29806#L129-2 ~b0_req_up~0 := 0; 29807#L204-1 assume 1 == ~b1_req_up~0; 29804#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 29805#L144-2 ~b1_req_up~0 := 0; 29938#L211 assume 1 == ~d0_req_up~0; 29942#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 29943#L159-2 ~d0_req_up~0 := 0; 29875#L218 assume 1 == ~d1_req_up~0; 29876#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 30002#L174-2 ~d1_req_up~0 := 0; 29863#L225 assume !(1 == ~z_req_up~0); 29864#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 30010#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 30011#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 29913#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 29914#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 29947#L328-1 assume !(0 == ~z_ev~0); 29948#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 29997#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 29835#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 29836#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 30016#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 30017#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 29827#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 29828#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 29839#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 29840#L361-1 assume !(1 == ~z_ev~0); 30671#L424-1 assume !false; 29988#L425 [2021-10-28 09:57:39,954 INFO L793 eck$LassoCheckResult]: Loop: 29988#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 29909#L287 assume !false; 29910#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 29921#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 29833#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 29820#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 29790#L282 assume 0 != eval_~tmp___0~0; 29791#L282-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 29926#L291 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 29849#L44 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 29850#L44-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 29845#L53 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 29846#L65-2 assume 0 != method1_~s2~0; 29915#L72 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 29916#L71 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 29830#L83-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 31080#L287 assume !false; 31078#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 31075#L260 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 31073#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 31071#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 31067#L282 assume !(0 != eval_~tmp___0~0); 31065#L303 start_simulation_~kernel_st~0 := 2; 31061#L204-2 assume !(1 == ~b0_req_up~0); 31062#L204-3 assume !(1 == ~b1_req_up~0); 31536#L211-1 assume !(1 == ~d0_req_up~0); 31516#L218-1 assume !(1 == ~d1_req_up~0); 31510#L225-1 assume 1 == ~z_req_up~0; 31221#L189-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 31504#L189-5 ~z_req_up~0 := 0; 31533#L232-1 start_simulation_~kernel_st~0 := 3; 31532#L313-2 assume !(0 == ~b0_ev~0); 31529#L313-4 assume !(0 == ~b1_ev~0); 31527#L318-3 assume !(0 == ~d0_ev~0); 31525#L323-3 assume !(0 == ~d1_ev~0); 31521#L328-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 31514#L333-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 31508#L99-1 assume !(1 == ~b0_ev~0); 31500#L103-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 31501#L121-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 31804#L122-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 31799#L382-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 31795#L382-5 assume !(1 == ~b0_ev~0); 31781#L346-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 30684#L351-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 30678#L356-3 assume !(1 == ~d1_ev~0); 29962#L361-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 29795#L366-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 31953#L260-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 31128#L267-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 29928#L268-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 29923#L399 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 29870#L406 stop_simulation_#res := stop_simulation_~__retres2~0; 29808#L407 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 29809#L441 assume !(0 != start_simulation_~tmp~3); 29817#L424-1 assume !false; 29988#L425 [2021-10-28 09:57:39,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,954 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 4 times [2021-10-28 09:57:39,954 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,954 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989914085] [2021-10-28 09:57:39,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,955 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,964 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:39,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,976 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:39,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:39,977 INFO L85 PathProgramCache]: Analyzing trace with hash -1083306892, now seen corresponding path program 1 times [2021-10-28 09:57:39,977 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:39,977 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86909399] [2021-10-28 09:57:39,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:39,977 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:39,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:39,989 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:39,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:40,002 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:40,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:40,003 INFO L85 PathProgramCache]: Analyzing trace with hash 19493203, now seen corresponding path program 1 times [2021-10-28 09:57:40,003 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:40,003 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379501206] [2021-10-28 09:57:40,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:40,004 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:40,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:40,047 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:57:40,047 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:57:40,047 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379501206] [2021-10-28 09:57:40,047 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1379501206] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:57:40,047 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:57:40,047 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:57:40,048 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964488836] [2021-10-28 09:57:40,655 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 09:57:40,655 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 09:57:40,656 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 09:57:40,656 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 09:57:40,656 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-10-28 09:57:40,656 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:40,656 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 09:57:40,656 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 09:57:40,656 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration25_Loop [2021-10-28 09:57:40,656 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 09:57:40,657 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 09:57:40,660 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,663 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,668 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,670 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,675 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,678 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,682 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,687 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,689 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,692 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,698 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,701 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,709 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,712 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,714 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,717 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,719 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,722 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,731 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,733 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,737 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,740 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,742 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,747 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,751 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,754 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,755 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:40,758 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,043 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 09:57:41,043 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-10-28 09:57:41,044 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,044 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,045 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,054 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:41,054 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2021-10-28 09:57:41,078 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:41,078 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_start_simulation_#t~ret11=0} Honda state: {ULTIMATE.start_start_simulation_#t~ret11=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:41,117 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,117 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,118 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,119 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,124 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:41,124 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,140 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2021-10-28 09:57:41,146 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:41,146 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~b0_ev~0=-1} Honda state: {~b0_ev~0=-1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:41,185 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,185 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,186 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,189 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2021-10-28 09:57:41,189 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:41,189 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,214 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:41,214 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_activate_threads_#t~ret9=0} Honda state: {ULTIMATE.start_activate_threads_#t~ret9=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:41,250 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,250 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,250 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,254 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,261 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:41,262 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,279 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2021-10-28 09:57:41,282 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:41,282 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_~__retres2~0=0, ULTIMATE.start_stop_simulation_#res=0, ULTIMATE.start_start_simulation_~tmp~3=0} Honda state: {ULTIMATE.start_stop_simulation_~__retres2~0=0, ULTIMATE.start_stop_simulation_#res=0, ULTIMATE.start_start_simulation_~tmp~3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:41,307 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,307 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,307 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,308 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,315 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:41,315 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,324 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2021-10-28 09:57:41,327 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:41,327 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_~tmp___0~0=0} Honda state: {ULTIMATE.start_eval_~tmp___0~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:41,347 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,347 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,348 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,348 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,350 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2021-10-28 09:57:41,351 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:41,351 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,359 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 09:57:41,360 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~z_req_up~0=0} Honda state: {~z_req_up~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 09:57:41,380 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,380 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,381 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,381 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,386 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 09:57:41,386 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,386 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2021-10-28 09:57:41,420 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,420 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,421 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,421 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,430 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2021-10-28 09:57:41,431 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-10-28 09:57:41,431 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 09:57:41,457 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-10-28 09:57:41,494 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:41,494 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 09:57:41,494 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 09:57:41,495 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 09:57:41,495 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 09:57:41,495 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 09:57:41,495 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,495 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 09:57:41,495 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 09:57:41,495 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration25_Loop [2021-10-28 09:57:41,495 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 09:57:41,495 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 09:57:41,497 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,501 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,505 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,507 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,509 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,511 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,517 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,521 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,555 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,558 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,564 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,567 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,575 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,578 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,580 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,583 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,585 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,588 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,590 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,593 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,597 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,599 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,604 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,606 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,610 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,613 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,619 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,631 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 09:57:41,929 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 09:57:41,929 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 09:57:41,930 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:41,930 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:41,938 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:41,940 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:41,950 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:41,950 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:41,950 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:41,951 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:41,951 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:41,951 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:41,951 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:41,953 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2021-10-28 09:57:41,965 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:42,005 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:42,005 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:42,006 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:42,007 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:42,010 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:42,019 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:42,019 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:42,019 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:42,019 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2021-10-28 09:57:42,019 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:42,021 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2021-10-28 09:57:42,021 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:42,023 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2021-10-28 09:57:42,033 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:42,064 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2021-10-28 09:57:42,064 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:42,064 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:42,065 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:42,067 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:42,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2021-10-28 09:57:42,074 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:42,074 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:42,074 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:42,074 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:42,074 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:42,075 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:42,075 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:42,089 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:42,108 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:42,109 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:42,109 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:42,110 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:42,111 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2021-10-28 09:57:42,112 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:42,119 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:42,119 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:42,119 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:42,119 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:42,119 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:42,120 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:42,120 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:42,129 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:42,150 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:42,150 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:42,150 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:42,151 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:42,151 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2021-10-28 09:57:42,152 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:42,159 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:42,159 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:42,159 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:42,159 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:42,160 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:42,160 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:42,160 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:42,165 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:42,185 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2021-10-28 09:57:42,185 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:42,186 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:42,186 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:42,187 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2021-10-28 09:57:42,188 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:42,206 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:42,206 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:42,206 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:42,207 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:42,207 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:42,208 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:42,208 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:42,225 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 09:57:42,258 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:42,259 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:42,259 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:42,260 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:42,268 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 09:57:42,268 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2021-10-28 09:57:42,276 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 09:57:42,276 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 09:57:42,276 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 09:57:42,276 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 09:57:42,276 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 09:57:42,277 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 09:57:42,277 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 09:57:42,285 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 09:57:42,287 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-10-28 09:57:42,287 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-10-28 09:57:42,287 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:57:42,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:57:42,288 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:57:42,289 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2021-10-28 09:57:42,290 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 09:57:42,290 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-10-28 09:57:42,290 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 09:57:42,290 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~b1_ev~0) = -2*~b1_ev~0 + 3 Supporting invariants [] [2021-10-28 09:57:42,313 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:42,313 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-10-28 09:57:42,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:42,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:42,374 INFO L263 TraceCheckSpWp]: Trace formula consists of 204 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 09:57:42,386 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:57:42,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:57:42,505 INFO L263 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 09:57:42,507 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:57:42,914 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-28 09:57:42,915 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2021-10-28 09:57:42,915 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 2295 states and 3187 transitions. cyclomatic complexity: 895 Second operand has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:42,985 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 2295 states and 3187 transitions. cyclomatic complexity: 895. Second operand has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 5962 states and 8267 transitions. Complement of second has 7 states. [2021-10-28 09:57:42,985 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-10-28 09:57:42,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:42,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2021-10-28 09:57:42,986 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 154 transitions. Stem has 33 letters. Loop has 56 letters. [2021-10-28 09:57:42,987 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 09:57:42,987 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 154 transitions. Stem has 89 letters. Loop has 56 letters. [2021-10-28 09:57:42,989 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 09:57:42,989 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 154 transitions. Stem has 33 letters. Loop has 112 letters. [2021-10-28 09:57:42,990 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 09:57:42,990 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5962 states and 8267 transitions. [2021-10-28 09:57:43,023 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2428 [2021-10-28 09:57:43,068 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5962 states to 5570 states and 7767 transitions. [2021-10-28 09:57:43,069 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2505 [2021-10-28 09:57:43,071 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2520 [2021-10-28 09:57:43,072 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5570 states and 7767 transitions. [2021-10-28 09:57:43,075 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:43,075 INFO L681 BuchiCegarLoop]: Abstraction has 5570 states and 7767 transitions. [2021-10-28 09:57:43,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5570 states and 7767 transitions. [2021-10-28 09:57:43,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5570 to 5539. [2021-10-28 09:57:43,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5539 states, 5539 states have (on average 1.393753385087561) internal successors, (7720), 5538 states have internal predecessors, (7720), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:43,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5539 states to 5539 states and 7720 transitions. [2021-10-28 09:57:43,229 INFO L704 BuchiCegarLoop]: Abstraction has 5539 states and 7720 transitions. [2021-10-28 09:57:43,229 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:57:43,230 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:57:43,230 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:57:43,230 INFO L87 Difference]: Start difference. First operand 5539 states and 7720 transitions. Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:43,271 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2021-10-28 09:57:43,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:57:43,291 INFO L93 Difference]: Finished difference Result 8355 states and 11527 transitions. [2021-10-28 09:57:43,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:57:43,292 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8355 states and 11527 transitions. [2021-10-28 09:57:43,342 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 4288 [2021-10-28 09:57:43,394 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8355 states to 8355 states and 11527 transitions. [2021-10-28 09:57:43,394 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4365 [2021-10-28 09:57:43,400 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4365 [2021-10-28 09:57:43,400 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8355 states and 11527 transitions. [2021-10-28 09:57:43,404 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 09:57:43,404 INFO L681 BuchiCegarLoop]: Abstraction has 8355 states and 11527 transitions. [2021-10-28 09:57:43,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8355 states and 11527 transitions. [2021-10-28 09:57:43,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8355 to 8355. [2021-10-28 09:57:43,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8355 states, 8355 states have (on average 1.3796529024536206) internal successors, (11527), 8354 states have internal predecessors, (11527), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:57:43,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8355 states to 8355 states and 11527 transitions. [2021-10-28 09:57:43,586 INFO L704 BuchiCegarLoop]: Abstraction has 8355 states and 11527 transitions. [2021-10-28 09:57:43,586 INFO L587 BuchiCegarLoop]: Abstraction has 8355 states and 11527 transitions. [2021-10-28 09:57:43,586 INFO L425 BuchiCegarLoop]: ======== Iteration 26============ [2021-10-28 09:57:43,587 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8355 states and 11527 transitions. [2021-10-28 09:57:43,621 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 4288 [2021-10-28 09:57:43,621 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:57:43,621 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:57:43,622 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:43,622 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:57:43,622 INFO L791 eck$LassoCheckResult]: Stem: 52470#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 52314#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 52315#L482 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 52349#L204 assume 1 == ~b0_req_up~0; 52444#L129 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 52252#L129-2 ~b0_req_up~0 := 0; 52253#L204-1 assume 1 == ~b1_req_up~0; 52250#L144 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 52251#L144-2 ~b1_req_up~0 := 0; 52379#L211 assume 1 == ~d0_req_up~0; 52386#L159 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 52387#L159-2 ~d0_req_up~0 := 0; 52316#L218 assume 1 == ~d1_req_up~0; 52317#L174 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 52453#L174-2 ~d1_req_up~0 := 0; 52304#L225 assume !(1 == ~z_req_up~0); 52305#L232 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 52461#L247-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 52462#L313-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 52354#L318-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 52355#L323-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 52394#L328-1 assume !(0 == ~z_ev~0); 52395#L333-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 52445#L99 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 52446#L121 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 52337#L122 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 52338#L382 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 52258#L382-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 52259#L346-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 52280#L351-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 52281#L356-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 52260#L361-1 assume !(1 == ~z_ev~0); 52261#L424-1 assume !false; 53924#L425 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 53945#L287 [2021-10-28 09:57:43,622 INFO L793 eck$LassoCheckResult]: Loop: 53945#L287 assume !false; 59675#L278 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 59674#L260 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 59010#L267 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 59643#L268 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 59639#L282 assume 0 != eval_~tmp___0~0; 52368#L282-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 52369#L291 assume !(0 != eval_~tmp~0); 53945#L287 [2021-10-28 09:57:43,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:43,623 INFO L85 PathProgramCache]: Analyzing trace with hash -1082183973, now seen corresponding path program 1 times [2021-10-28 09:57:43,623 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:43,623 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112103459] [2021-10-28 09:57:43,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:43,624 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:43,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:43,634 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:43,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:43,648 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:43,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:43,649 INFO L85 PathProgramCache]: Analyzing trace with hash 1768213899, now seen corresponding path program 1 times [2021-10-28 09:57:43,649 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:43,649 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618581130] [2021-10-28 09:57:43,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:43,649 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:43,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:43,654 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:43,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:43,657 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:43,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:57:43,657 INFO L85 PathProgramCache]: Analyzing trace with hash -937655707, now seen corresponding path program 1 times [2021-10-28 09:57:43,658 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:57:43,658 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550653785] [2021-10-28 09:57:43,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:57:43,658 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:57:43,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:43,767 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:57:43,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:57:43,784 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:57:45,167 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.10 09:57:45 BoogieIcfgContainer [2021-10-28 09:57:45,167 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-10-28 09:57:45,168 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 09:57:45,168 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 09:57:45,168 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 09:57:45,168 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:57:33" (3/4) ... [2021-10-28 09:57:45,171 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-10-28 09:57:45,217 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 09:57:45,217 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 09:57:45,219 INFO L168 Benchmark]: Toolchain (without parser) took 13152.27 ms. Allocated memory was 86.0 MB in the beginning and 237.0 MB in the end (delta: 151.0 MB). Free memory was 51.3 MB in the beginning and 116.7 MB in the end (delta: -65.4 MB). Peak memory consumption was 86.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:57:45,219 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 86.0 MB. Free memory was 55.5 MB in the beginning and 55.5 MB in the end (delta: 25.2 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:57:45,220 INFO L168 Benchmark]: CACSL2BoogieTranslator took 313.09 ms. Allocated memory was 86.0 MB in the beginning and 104.9 MB in the end (delta: 18.9 MB). Free memory was 51.1 MB in the beginning and 79.4 MB in the end (delta: -28.3 MB). Peak memory consumption was 7.6 MB. Max. memory is 16.1 GB. [2021-10-28 09:57:45,220 INFO L168 Benchmark]: Boogie Procedure Inliner took 52.68 ms. Allocated memory is still 104.9 MB. Free memory was 79.4 MB in the beginning and 76.9 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:57:45,220 INFO L168 Benchmark]: Boogie Preprocessor took 76.17 ms. Allocated memory is still 104.9 MB. Free memory was 76.9 MB in the beginning and 75.0 MB in the end (delta: 1.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:57:45,221 INFO L168 Benchmark]: RCFGBuilder took 609.03 ms. Allocated memory is still 104.9 MB. Free memory was 75.0 MB in the beginning and 57.6 MB in the end (delta: 17.5 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. [2021-10-28 09:57:45,221 INFO L168 Benchmark]: BuchiAutomizer took 12031.22 ms. Allocated memory was 104.9 MB in the beginning and 237.0 MB in the end (delta: 132.1 MB). Free memory was 57.3 MB in the beginning and 119.9 MB in the end (delta: -62.6 MB). Peak memory consumption was 141.4 MB. Max. memory is 16.1 GB. [2021-10-28 09:57:45,222 INFO L168 Benchmark]: Witness Printer took 49.83 ms. Allocated memory is still 237.0 MB. Free memory was 119.9 MB in the beginning and 116.7 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:57:45,224 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 86.0 MB. Free memory was 55.5 MB in the beginning and 55.5 MB in the end (delta: 25.2 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 313.09 ms. Allocated memory was 86.0 MB in the beginning and 104.9 MB in the end (delta: 18.9 MB). Free memory was 51.1 MB in the beginning and 79.4 MB in the end (delta: -28.3 MB). Peak memory consumption was 7.6 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 52.68 ms. Allocated memory is still 104.9 MB. Free memory was 79.4 MB in the beginning and 76.9 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 76.17 ms. Allocated memory is still 104.9 MB. Free memory was 76.9 MB in the beginning and 75.0 MB in the end (delta: 1.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 609.03 ms. Allocated memory is still 104.9 MB. Free memory was 75.0 MB in the beginning and 57.6 MB in the end (delta: 17.5 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 12031.22 ms. Allocated memory was 104.9 MB in the beginning and 237.0 MB in the end (delta: 132.1 MB). Free memory was 57.3 MB in the beginning and 119.9 MB in the end (delta: -62.6 MB). Peak memory consumption was 141.4 MB. Max. memory is 16.1 GB. * Witness Printer took 49.83 ms. Allocated memory is still 237.0 MB. Free memory was 119.9 MB in the beginning and 116.7 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 27 terminating modules (25 trivial, 2 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -1 * b0_ev + 1 and consists of 3 locations. One deterministic module has affine ranking function 3 + -2 * b1_ev and consists of 4 locations. 25 modules have a trivial ranking function, the largest among these consists of 6 locations. The remainder module has 8355 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 11.9s and 26 iterations. TraceHistogramMax:2. Analysis of lassos took 8.0s. Construction of modules took 0.4s. Büchi inclusion checks took 1.7s. Highest rank in rank-based complementation 3. Minimization of det autom 19. Minimization of nondet autom 8. Automata minimization 0.8s AutomataMinimizationTime, 27 MinimizatonAttempts, 4574 StatesRemovedByMinimization, 7 NontrivialMinimizations. Non-live state removal took 0.5s Buchi closure took 0.0s. Biggest automaton had 8355 states and ocurred in iteration 25. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 6/6 HoareTripleCheckerStatistics: 4477 SDtfs, 1815 SDslu, 5084 SDs, 0 SdLazy, 379 SolverSat, 88 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time LassoAnalysisResults: nont1 unkn0 SFLI4 SFLT0 conc0 concLT2 SILN0 SILU0 SILI19 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital107 mio100 ax100 hnf100 lsp10 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq204 hnf89 smp100 dnf181 smp78 tf106 neg93 sie113 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 35ms VariablesStem: 0 VariablesLoop: 1 DisjunctsStem: 1 DisjunctsLoop: 2 SupportingInvariants: 0 MotzkinApplications: 4 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 9 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 2 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.4s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 277]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=19734} State at position 1 is {org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@619a9106=0, b1_val_t=1, NULL=19737, NULL=0, \result=0, d0_val=1, NULL=19734, __retres1=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@267aaf12=0, z_val=0, tmp=0, b0_val_t=1, kernel_st=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5168b540=0, d1_ev=2, comp_m1_i=0, b1_val=1, d1_req_up=0, tmp___0=1, NULL=19735, z_val_t=0, b1_req_up=0, __retres1=1, d0_ev=2, NULL=0, NULL=0, NULL=0, z_ev=2, tmp=0, b1_ev=2, NULL=19736, comp_m1_st=0, b0_req_up=0, z_req_up=0, \result=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@319a7b8a=0, d1_val=1, b0_ev=2, NULL=0, tmp=1, d0_val_t=1, d1_val_t=1, b0_val=1, __retres1=0, d0_req_up=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 277]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L16] int b0_val ; [L17] int b0_val_t ; [L18] int b0_ev ; [L19] int b0_req_up ; [L20] int b1_val ; [L21] int b1_val_t ; [L22] int b1_ev ; [L23] int b1_req_up ; [L24] int d0_val ; [L25] int d0_val_t ; [L26] int d0_ev ; [L27] int d0_req_up ; [L28] int d1_val ; [L29] int d1_val_t ; [L30] int d1_ev ; [L31] int d1_req_up ; [L32] int z_val ; [L33] int z_val_t ; [L34] int z_ev ; [L35] int z_req_up ; [L36] int comp_m1_st ; [L37] int comp_m1_i ; [L486] int __retres1 ; [L457] b0_val = 0 [L458] b0_ev = 2 [L459] b0_req_up = 0 [L460] b1_val = 0 [L461] b1_ev = 2 [L462] b1_req_up = 0 [L463] d0_val = 0 [L464] d0_ev = 2 [L465] d0_req_up = 0 [L466] d1_val = 0 [L467] d1_ev = 2 [L468] d1_req_up = 0 [L469] z_val = 0 [L470] z_ev = 2 [L471] z_req_up = 0 [L472] b0_val_t = 1 [L473] b0_req_up = 1 [L474] b1_val_t = 1 [L475] b1_req_up = 1 [L476] d0_val_t = 1 [L477] d0_req_up = 1 [L478] d1_val_t = 1 [L479] d1_req_up = 1 [L480] comp_m1_i = 0 [L411] int kernel_st ; [L412] int tmp ; [L416] kernel_st = 0 [L204] COND TRUE (int )b0_req_up == 1 [L129] COND TRUE (int )b0_val != (int )b0_val_t [L130] b0_val = b0_val_t [L131] b0_ev = 0 [L135] b0_req_up = 0 [L211] COND TRUE (int )b1_req_up == 1 [L144] COND TRUE (int )b1_val != (int )b1_val_t [L145] b1_val = b1_val_t [L146] b1_ev = 0 [L150] b1_req_up = 0 [L218] COND TRUE (int )d0_req_up == 1 [L159] COND TRUE (int )d0_val != (int )d0_val_t [L160] d0_val = d0_val_t [L161] d0_ev = 0 [L165] d0_req_up = 0 [L225] COND TRUE (int )d1_req_up == 1 [L174] COND TRUE (int )d1_val != (int )d1_val_t [L175] d1_val = d1_val_t [L176] d1_ev = 0 [L180] d1_req_up = 0 [L232] COND FALSE !((int )z_req_up == 1) [L247] COND FALSE !((int )comp_m1_i == 1) [L250] comp_m1_st = 2 [L313] COND TRUE (int )b0_ev == 0 [L314] b0_ev = 1 [L318] COND TRUE (int )b1_ev == 0 [L319] b1_ev = 1 [L323] COND TRUE (int )d0_ev == 0 [L324] d0_ev = 1 [L328] COND TRUE (int )d1_ev == 0 [L329] d1_ev = 1 [L333] COND FALSE !((int )z_ev == 0) [L376] int tmp ; [L96] int __retres1 ; [L99] COND TRUE (int )b0_ev == 1 [L100] __retres1 = 1 [L122] return (__retres1); [L380] tmp = is_method1_triggered() [L382] COND TRUE \read(tmp) [L383] comp_m1_st = 0 [L346] COND TRUE (int )b0_ev == 1 [L347] b0_ev = 2 [L351] COND TRUE (int )b1_ev == 1 [L352] b1_ev = 2 [L356] COND TRUE (int )d0_ev == 1 [L357] d0_ev = 2 [L361] COND TRUE (int )d1_ev == 1 [L362] d1_ev = 2 [L366] COND FALSE !((int )z_ev == 1) [L424] COND TRUE 1 [L427] kernel_st = 1 [L272] int tmp ; [L273] int tmp___0 ; Loop: [L277] COND TRUE 1 [L257] int __retres1 ; [L260] COND TRUE (int )comp_m1_st == 0 [L261] __retres1 = 1 [L268] return (__retres1); [L280] tmp___0 = exists_runnable_thread() [L282] COND TRUE \read(tmp___0) [L287] COND TRUE (int )comp_m1_st == 0 [L289] tmp = __VERIFIER_nondet_int() [L291] COND FALSE !(\read(tmp)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-10-28 09:57:45,287 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_261454ec-a3f5-4ad2-a163-156981a3190b/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...