./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/config using search string *Termination*64bit*_Bitvector*.epf No suitable settings file found using Termination*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: ArithmeticException: integer overflow --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 09:40:14,700 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 09:40:14,703 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 09:40:14,738 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 09:40:14,738 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 09:40:14,740 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 09:40:14,742 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 09:40:14,744 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 09:40:14,746 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 09:40:14,747 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 09:40:14,748 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 09:40:14,749 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 09:40:14,750 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 09:40:14,751 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 09:40:14,752 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 09:40:14,754 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 09:40:14,755 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 09:40:14,756 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 09:40:14,758 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 09:40:14,760 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 09:40:14,762 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 09:40:14,768 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 09:40:14,770 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 09:40:14,772 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 09:40:14,776 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 09:40:14,783 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 09:40:14,783 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 09:40:14,785 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 09:40:14,786 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 09:40:14,787 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 09:40:14,789 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 09:40:14,790 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 09:40:14,791 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 09:40:14,793 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 09:40:14,794 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 09:40:14,795 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 09:40:14,796 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 09:40:14,796 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 09:40:14,797 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 09:40:14,797 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 09:40:14,798 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 09:40:14,799 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-10-28 09:40:14,845 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 09:40:14,845 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 09:40:14,846 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 09:40:14,846 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 09:40:14,848 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 09:40:14,848 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 09:40:14,848 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 09:40:14,848 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-28 09:40:14,849 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-28 09:40:14,849 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-28 09:40:14,850 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-28 09:40:14,850 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-28 09:40:14,850 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-28 09:40:14,851 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 09:40:14,851 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-28 09:40:14,851 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 09:40:14,851 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 09:40:14,851 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-28 09:40:14,852 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-28 09:40:14,852 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-28 09:40:14,852 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 09:40:14,852 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-28 09:40:14,853 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 09:40:14,853 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-28 09:40:14,853 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 09:40:14,853 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 09:40:14,855 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 09:40:14,855 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 09:40:14,855 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 09:40:14,856 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-28 09:40:14,857 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 [2021-10-28 09:40:15,151 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 09:40:15,177 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 09:40:15,180 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 09:40:15,181 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 09:40:15,182 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 09:40:15,183 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2021-10-28 09:40:15,269 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/data/af6c319d1/0fb9b5c24418458686b42be2747bb8d5/FLAG3c86965f8 [2021-10-28 09:40:15,742 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 09:40:15,747 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2021-10-28 09:40:15,771 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/data/af6c319d1/0fb9b5c24418458686b42be2747bb8d5/FLAG3c86965f8 [2021-10-28 09:40:16,100 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/data/af6c319d1/0fb9b5c24418458686b42be2747bb8d5 [2021-10-28 09:40:16,103 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 09:40:16,105 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 09:40:16,126 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 09:40:16,126 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 09:40:16,130 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 09:40:16,131 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:40:16" (1/1) ... [2021-10-28 09:40:16,134 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2340f6a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:16, skipping insertion in model container [2021-10-28 09:40:16,134 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:40:16" (1/1) ... [2021-10-28 09:40:16,141 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 09:40:16,242 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 09:40:16,874 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:40:16,900 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 09:40:16,979 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:40:17,009 INFO L208 MainTranslator]: Completed translation [2021-10-28 09:40:17,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17 WrapperNode [2021-10-28 09:40:17,010 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 09:40:17,012 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 09:40:17,012 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 09:40:17,012 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 09:40:17,021 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,044 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,067 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 09:40:17,068 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 09:40:17,068 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 09:40:17,069 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 09:40:17,077 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,077 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,080 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,080 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,085 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,088 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,090 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,092 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 09:40:17,093 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 09:40:17,093 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 09:40:17,093 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 09:40:17,094 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (1/1) ... [2021-10-28 09:40:17,108 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:40:17,120 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:17,139 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:40:17,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-28 09:40:17,191 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-10-28 09:40:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-10-28 09:40:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 09:40:17,192 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-10-28 09:40:17,193 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 09:40:17,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 09:40:17,459 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 09:40:17,459 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2021-10-28 09:40:17,461 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:40:17 BoogieIcfgContainer [2021-10-28 09:40:17,461 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 09:40:17,462 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-28 09:40:17,462 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-28 09:40:17,465 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-28 09:40:17,466 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:40:17,466 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.10 09:40:16" (1/3) ... [2021-10-28 09:40:17,467 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@74026e59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 09:40:17, skipping insertion in model container [2021-10-28 09:40:17,468 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:40:17,468 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:40:17" (2/3) ... [2021-10-28 09:40:17,468 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@74026e59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 09:40:17, skipping insertion in model container [2021-10-28 09:40:17,468 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:40:17,469 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:40:17" (3/3) ... [2021-10-28 09:40:17,470 INFO L389 chiAutomizerObserver]: Analyzing ICFG java_Nested-alloca.i [2021-10-28 09:40:17,554 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-28 09:40:17,554 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-28 09:40:17,555 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-28 09:40:17,555 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-28 09:40:17,555 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-28 09:40:17,555 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-28 09:40:17,555 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-28 09:40:17,555 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-28 09:40:17,571 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:17,591 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-28 09:40:17,591 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:17,591 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:17,596 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:17,597 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-10-28 09:40:17,597 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-28 09:40:17,597 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:17,599 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-28 09:40:17,599 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:17,599 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:17,599 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:17,600 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-10-28 09:40:17,606 INFO L791 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 10#L-1true havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 6#L552-4true [2021-10-28 09:40:17,607 INFO L793 eck$LassoCheckResult]: Loop: 6#L552-4true call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 13#L552-1true assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 12#L553-4true assume !true; 5#L552-3true call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 6#L552-4true [2021-10-28 09:40:17,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:17,613 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-10-28 09:40:17,622 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:17,622 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231789037] [2021-10-28 09:40:17,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:17,624 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:17,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:17,790 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:17,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:17,833 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:17,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:17,837 INFO L85 PathProgramCache]: Analyzing trace with hash 1113608, now seen corresponding path program 1 times [2021-10-28 09:40:17,837 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:17,838 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296891805] [2021-10-28 09:40:17,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:17,838 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:17,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:17,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:17,888 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:17,888 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296891805] [2021-10-28 09:40:17,889 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [296891805] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:40:17,889 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:40:17,889 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:40:17,890 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516981227] [2021-10-28 09:40:17,896 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:17,897 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:17,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 09:40:17,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 09:40:17,918 INFO L87 Difference]: Start difference. First operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:17,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:17,956 INFO L93 Difference]: Finished difference Result 12 states and 13 transitions. [2021-10-28 09:40:17,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 09:40:17,958 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 13 transitions. [2021-10-28 09:40:17,960 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-28 09:40:17,963 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 8 states and 9 transitions. [2021-10-28 09:40:17,964 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2021-10-28 09:40:17,990 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2021-10-28 09:40:17,990 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 9 transitions. [2021-10-28 09:40:17,992 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:17,992 INFO L681 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-10-28 09:40:18,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 9 transitions. [2021-10-28 09:40:18,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2021-10-28 09:40:18,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:18,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2021-10-28 09:40:18,036 INFO L704 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-10-28 09:40:18,036 INFO L587 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-10-28 09:40:18,036 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-28 09:40:18,036 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2021-10-28 09:40:18,038 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-28 09:40:18,038 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:18,038 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:18,038 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:18,039 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-10-28 09:40:18,039 INFO L791 eck$LassoCheckResult]: Stem: 32#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 33#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 35#L552-4 [2021-10-28 09:40:18,039 INFO L793 eck$LassoCheckResult]: Loop: 35#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 36#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 38#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 39#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 34#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 35#L552-4 [2021-10-28 09:40:18,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:18,040 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2021-10-28 09:40:18,040 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:18,041 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720670362] [2021-10-28 09:40:18,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:18,042 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:18,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:18,096 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:18,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:18,138 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:18,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:18,140 INFO L85 PathProgramCache]: Analyzing trace with hash 34512977, now seen corresponding path program 1 times [2021-10-28 09:40:18,141 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:18,141 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1419998893] [2021-10-28 09:40:18,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:18,142 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:18,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:18,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:18,187 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:18,187 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1419998893] [2021-10-28 09:40:18,188 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1419998893] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:40:18,188 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:40:18,188 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:40:18,188 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884964635] [2021-10-28 09:40:18,189 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:18,189 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:18,189 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:40:18,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:40:18,190 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:18,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:18,225 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2021-10-28 09:40:18,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:40:18,226 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2021-10-28 09:40:18,227 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2021-10-28 09:40:18,227 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2021-10-28 09:40:18,227 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2021-10-28 09:40:18,228 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2021-10-28 09:40:18,228 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2021-10-28 09:40:18,228 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:18,228 INFO L681 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-10-28 09:40:18,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2021-10-28 09:40:18,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2021-10-28 09:40:18,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:18,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2021-10-28 09:40:18,230 INFO L704 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-10-28 09:40:18,231 INFO L587 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-10-28 09:40:18,231 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-28 09:40:18,231 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2021-10-28 09:40:18,232 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2021-10-28 09:40:18,232 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:18,232 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:18,232 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:18,232 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1] [2021-10-28 09:40:18,233 INFO L791 eck$LassoCheckResult]: Stem: 61#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 62#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 60#L552-4 [2021-10-28 09:40:18,233 INFO L793 eck$LassoCheckResult]: Loop: 60#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 63#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 67#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 66#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 64#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 65#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 68#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 59#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 60#L552-4 [2021-10-28 09:40:18,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:18,234 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2021-10-28 09:40:18,234 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:18,235 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803241667] [2021-10-28 09:40:18,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:18,235 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:18,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:18,251 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:18,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:18,269 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:18,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:18,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1680656940, now seen corresponding path program 1 times [2021-10-28 09:40:18,270 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:18,270 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427923413] [2021-10-28 09:40:18,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:18,271 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:18,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:18,390 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:18,391 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:18,391 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427923413] [2021-10-28 09:40:18,391 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1427923413] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:18,392 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1690053342] [2021-10-28 09:40:18,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:18,394 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:40:18,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:18,400 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:40:18,421 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 09:40:18,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:18,476 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 5 conjunts are in the unsatisfiable core [2021-10-28 09:40:18,478 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:40:18,537 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-28 09:40:18,646 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:18,647 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-28 09:40:18,792 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:18,793 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:18,795 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:18,887 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:18,888 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 22 [2021-10-28 09:40:18,929 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:18,930 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 22 [2021-10-28 09:40:18,983 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-10-28 09:40:19,010 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-10-28 09:40:19,028 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:19,028 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1690053342] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:19,029 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:40:19,029 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 10 [2021-10-28 09:40:19,029 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437239607] [2021-10-28 09:40:19,029 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:19,030 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:19,030 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-28 09:40:19,031 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:40:19,031 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:19,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:19,124 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2021-10-28 09:40:19,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:40:19,124 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 18 transitions. [2021-10-28 09:40:19,125 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 15 [2021-10-28 09:40:19,126 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 17 states and 18 transitions. [2021-10-28 09:40:19,126 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-10-28 09:40:19,126 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-10-28 09:40:19,127 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 18 transitions. [2021-10-28 09:40:19,127 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:19,127 INFO L681 BuchiCegarLoop]: Abstraction has 17 states and 18 transitions. [2021-10-28 09:40:19,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 18 transitions. [2021-10-28 09:40:19,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2021-10-28 09:40:19,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:19,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2021-10-28 09:40:19,129 INFO L704 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-10-28 09:40:19,129 INFO L587 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-10-28 09:40:19,129 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-28 09:40:19,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2021-10-28 09:40:19,130 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 14 [2021-10-28 09:40:19,130 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:19,130 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:19,135 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:19,135 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [4, 3, 3, 1, 1, 1, 1] [2021-10-28 09:40:19,136 INFO L791 eck$LassoCheckResult]: Stem: 124#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 125#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 127#L552-4 [2021-10-28 09:40:19,136 INFO L793 eck$LassoCheckResult]: Loop: 127#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 128#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 133#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 139#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 129#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 130#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 131#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 132#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 138#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 137#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 135#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 136#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 134#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 126#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 127#L552-4 [2021-10-28 09:40:19,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:19,138 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2021-10-28 09:40:19,138 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:19,138 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450198769] [2021-10-28 09:40:19,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:19,139 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:19,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:19,175 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:19,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:19,200 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:19,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:19,204 INFO L85 PathProgramCache]: Analyzing trace with hash 1818601484, now seen corresponding path program 2 times [2021-10-28 09:40:19,205 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:19,206 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871105469] [2021-10-28 09:40:19,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:19,206 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:19,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:19,647 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:19,650 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:19,654 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871105469] [2021-10-28 09:40:19,655 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [871105469] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:19,655 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [387167778] [2021-10-28 09:40:19,655 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 09:40:19,656 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:40:19,657 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:19,660 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:40:19,682 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 09:40:19,740 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 09:40:19,740 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 09:40:19,742 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 09:40:19,745 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:40:19,757 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-28 09:40:19,850 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:19,850 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-28 09:40:19,912 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:19,913 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:19,915 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:19,966 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:19,967 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:20,080 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:20,081 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:20,269 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:20,269 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:20,351 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:20,352 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-10-28 09:40:20,393 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:20,511 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-10-28 09:40:20,526 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:20,527 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-28 09:40:20,633 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:20,634 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:20,778 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:20,778 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:20,832 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:20,833 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:20,926 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:20,938 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:20,939 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:20,993 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-10-28 09:40:21,021 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-10-28 09:40:21,030 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:21,030 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [387167778] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:21,030 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:40:21,031 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 18 [2021-10-28 09:40:21,031 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145059861] [2021-10-28 09:40:21,031 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:21,031 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:21,032 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-28 09:40:21,033 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2021-10-28 09:40:21,033 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 2 Second operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:21,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:21,294 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2021-10-28 09:40:21,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-28 09:40:21,295 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 21 transitions. [2021-10-28 09:40:21,295 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 18 [2021-10-28 09:40:21,296 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 21 transitions. [2021-10-28 09:40:21,296 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 09:40:21,296 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 09:40:21,296 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 21 transitions. [2021-10-28 09:40:21,297 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:21,297 INFO L681 BuchiCegarLoop]: Abstraction has 20 states and 21 transitions. [2021-10-28 09:40:21,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 21 transitions. [2021-10-28 09:40:21,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2021-10-28 09:40:21,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 18 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:21,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2021-10-28 09:40:21,299 INFO L704 BuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2021-10-28 09:40:21,300 INFO L587 BuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2021-10-28 09:40:21,300 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-28 09:40:21,300 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 20 transitions. [2021-10-28 09:40:21,301 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2021-10-28 09:40:21,301 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:21,301 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:21,301 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:21,302 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [5, 4, 4, 1, 1, 1, 1] [2021-10-28 09:40:21,302 INFO L791 eck$LassoCheckResult]: Stem: 230#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 231#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 229#L552-4 [2021-10-28 09:40:21,302 INFO L793 eck$LassoCheckResult]: Loop: 229#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 232#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 237#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 246#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 233#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 234#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 235#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 236#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 245#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 244#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 243#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 242#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 241#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 239#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 240#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 238#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 228#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 229#L552-4 [2021-10-28 09:40:21,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:21,303 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2021-10-28 09:40:21,303 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:21,303 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359179229] [2021-10-28 09:40:21,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:21,303 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:21,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:21,313 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:21,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:21,323 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:21,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:21,324 INFO L85 PathProgramCache]: Analyzing trace with hash 1241080977, now seen corresponding path program 3 times [2021-10-28 09:40:21,324 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:21,324 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313499409] [2021-10-28 09:40:21,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:21,325 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:21,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:21,791 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:21,792 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:21,792 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313499409] [2021-10-28 09:40:21,792 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [313499409] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:21,792 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2011154976] [2021-10-28 09:40:21,792 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 09:40:21,792 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:40:21,793 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:21,844 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:40:21,863 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 09:40:21,963 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2021-10-28 09:40:21,963 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 09:40:21,965 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 11 conjunts are in the unsatisfiable core [2021-10-28 09:40:21,966 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:40:21,973 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-28 09:40:22,028 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:22,028 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-28 09:40:22,064 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:22,065 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:22,109 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:22,109 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-28 09:40:22,198 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:22,198 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:22,339 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:22,339 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:22,367 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:22,485 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:22,503 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:22,504 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:22,654 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:22,655 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:22,814 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:22,815 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:22,836 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:22,898 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:22,898 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:23,015 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:23,016 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:23,184 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:23,185 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:23,220 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:23,402 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:23,403 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:23,413 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:23,474 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-10-28 09:40:23,506 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-10-28 09:40:23,516 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:23,517 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2011154976] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:23,517 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:40:23,517 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12] total 23 [2021-10-28 09:40:23,517 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264067348] [2021-10-28 09:40:23,518 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:23,518 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:23,518 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-10-28 09:40:23,519 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=371, Unknown=0, NotChecked=0, Total=506 [2021-10-28 09:40:23,519 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. cyclomatic complexity: 2 Second operand has 23 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:23,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:23,888 INFO L93 Difference]: Finished difference Result 23 states and 24 transitions. [2021-10-28 09:40:23,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-10-28 09:40:23,888 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 24 transitions. [2021-10-28 09:40:23,889 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 21 [2021-10-28 09:40:23,890 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 24 transitions. [2021-10-28 09:40:23,890 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2021-10-28 09:40:23,891 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2021-10-28 09:40:23,891 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 24 transitions. [2021-10-28 09:40:23,891 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:23,891 INFO L681 BuchiCegarLoop]: Abstraction has 23 states and 24 transitions. [2021-10-28 09:40:23,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 24 transitions. [2021-10-28 09:40:23,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2021-10-28 09:40:23,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.0454545454545454) internal successors, (23), 21 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:23,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2021-10-28 09:40:23,894 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 23 transitions. [2021-10-28 09:40:23,894 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 23 transitions. [2021-10-28 09:40:23,894 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-28 09:40:23,894 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 23 transitions. [2021-10-28 09:40:23,894 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2021-10-28 09:40:23,895 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:23,895 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:23,895 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:23,895 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [6, 5, 5, 1, 1, 1, 1] [2021-10-28 09:40:23,895 INFO L791 eck$LassoCheckResult]: Stem: 356#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 357#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 355#L552-4 [2021-10-28 09:40:23,895 INFO L793 eck$LassoCheckResult]: Loop: 355#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 358#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 363#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 375#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 359#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 360#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 361#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 362#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 374#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 373#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 372#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 371#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 370#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 369#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 368#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 367#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 365#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 366#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 364#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 354#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 355#L552-4 [2021-10-28 09:40:23,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:23,896 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2021-10-28 09:40:23,896 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:23,896 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713425509] [2021-10-28 09:40:23,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:23,896 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:23,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:23,905 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:23,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:23,914 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:23,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:23,915 INFO L85 PathProgramCache]: Analyzing trace with hash 1966644716, now seen corresponding path program 4 times [2021-10-28 09:40:23,915 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:23,915 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001035542] [2021-10-28 09:40:23,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:23,915 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:23,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:23,940 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:23,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:23,968 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:23,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:23,968 INFO L85 PathProgramCache]: Analyzing trace with hash -872207186, now seen corresponding path program 1 times [2021-10-28 09:40:23,968 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:23,969 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125777612] [2021-10-28 09:40:23,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:23,969 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:23,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:24,206 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:24,206 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:24,206 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1125777612] [2021-10-28 09:40:24,206 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1125777612] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:24,206 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1260870449] [2021-10-28 09:40:24,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:24,207 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:40:24,207 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:24,210 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:40:24,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 09:40:24,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:24,334 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 21 conjunts are in the unsatisfiable core [2021-10-28 09:40:24,336 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:40:24,346 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2021-10-28 09:40:24,361 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-28 09:40:24,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-28 09:40:24,385 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-28 09:40:24,409 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:24,440 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-28 09:40:24,443 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-28 09:40:24,456 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:24,505 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-28 09:40:24,507 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-28 09:40:24,519 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:24,553 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-10-28 09:40:24,555 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-10-28 09:40:24,569 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:24,630 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-28 09:40:24,630 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 118 treesize of output 66 [2021-10-28 09:40:24,657 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:24,677 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:24,693 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-28 09:40:24,699 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:24,699 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1260870449] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:24,700 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:40:24,700 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 24 [2021-10-28 09:40:24,703 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479497770] [2021-10-28 09:40:35,450 WARN L207 SmtUtils]: Spent 10.74 s on a formula simplification. DAG size of input: 169 DAG size of output: 158 [2021-10-28 09:40:37,071 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:37,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2021-10-28 09:40:37,072 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=397, Unknown=0, NotChecked=0, Total=552 [2021-10-28 09:40:37,073 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. cyclomatic complexity: 2 Second operand has 24 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:37,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:37,288 INFO L93 Difference]: Finished difference Result 26 states and 27 transitions. [2021-10-28 09:40:37,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-28 09:40:37,289 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 27 transitions. [2021-10-28 09:40:37,290 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 24 [2021-10-28 09:40:37,290 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 27 transitions. [2021-10-28 09:40:37,291 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 26 [2021-10-28 09:40:37,291 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2021-10-28 09:40:37,291 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 27 transitions. [2021-10-28 09:40:37,291 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:37,291 INFO L681 BuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2021-10-28 09:40:37,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 27 transitions. [2021-10-28 09:40:37,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2021-10-28 09:40:37,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.04) internal successors, (26), 24 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:37,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2021-10-28 09:40:37,296 INFO L704 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-10-28 09:40:37,296 INFO L587 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-10-28 09:40:37,296 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-28 09:40:37,297 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 26 transitions. [2021-10-28 09:40:37,297 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 23 [2021-10-28 09:40:37,297 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:37,297 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:37,298 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:37,298 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [7, 6, 6, 1, 1, 1, 1] [2021-10-28 09:40:37,298 INFO L791 eck$LassoCheckResult]: Stem: 506#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 507#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 509#L552-4 [2021-10-28 09:40:37,299 INFO L793 eck$LassoCheckResult]: Loop: 509#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 510#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 515#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 530#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 511#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 512#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 513#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 514#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 529#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 528#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 527#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 526#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 525#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 524#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 523#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 522#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 521#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 520#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 519#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 517#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 518#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 516#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 508#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 509#L552-4 [2021-10-28 09:40:37,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:37,299 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2021-10-28 09:40:37,299 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:37,300 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080907658] [2021-10-28 09:40:37,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:37,300 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:37,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:37,321 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:37,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:37,328 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:37,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:37,329 INFO L85 PathProgramCache]: Analyzing trace with hash 665592497, now seen corresponding path program 5 times [2021-10-28 09:40:37,329 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:37,329 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277583297] [2021-10-28 09:40:37,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:37,329 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:37,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:38,224 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:38,224 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:38,225 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277583297] [2021-10-28 09:40:38,225 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [277583297] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:38,225 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1292144398] [2021-10-28 09:40:38,225 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 09:40:38,225 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:40:38,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:38,226 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:40:38,227 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 09:40:38,435 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2021-10-28 09:40:38,435 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 09:40:38,436 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 17 conjunts are in the unsatisfiable core [2021-10-28 09:40:38,438 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:40:38,443 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-28 09:40:38,494 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:38,494 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-28 09:40:38,555 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:38,556 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 17 [2021-10-28 09:40:38,635 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2021-10-28 09:40:38,650 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2021-10-28 09:40:38,784 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:38,784 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:38,939 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:38,939 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:38,972 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:39,039 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:39,040 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:39,176 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:39,177 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:39,338 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:39,339 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:39,391 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:39,392 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:39,492 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:39,530 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:39,530 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:39,674 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:39,675 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:39,830 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:39,831 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:39,857 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:39,991 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:40,040 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:40,040 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:40,173 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:40,173 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:40,326 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:40,327 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:40,368 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:40,479 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:40,480 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 39 [2021-10-28 09:40:40,491 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 39 [2021-10-28 09:40:40,636 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:40,636 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:40,826 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-28 09:40:40,826 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-10-28 09:40:40,844 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-28 09:40:40,858 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:40,858 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:40,897 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:40,931 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-28 09:40:40,936 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:40,937 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1292144398] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:40,937 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:40:40,937 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 17] total 34 [2021-10-28 09:40:40,937 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1557611208] [2021-10-28 09:40:40,938 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:40,938 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:40,938 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2021-10-28 09:40:40,939 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=1005, Unknown=0, NotChecked=0, Total=1122 [2021-10-28 09:40:40,939 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. cyclomatic complexity: 2 Second operand has 34 states, 34 states have (on average 1.2352941176470589) internal successors, (42), 34 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:41,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:41,666 INFO L93 Difference]: Finished difference Result 29 states and 30 transitions. [2021-10-28 09:40:41,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-10-28 09:40:41,666 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 30 transitions. [2021-10-28 09:40:41,667 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 27 [2021-10-28 09:40:41,667 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 30 transitions. [2021-10-28 09:40:41,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2021-10-28 09:40:41,668 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2021-10-28 09:40:41,668 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 30 transitions. [2021-10-28 09:40:41,668 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:41,668 INFO L681 BuchiCegarLoop]: Abstraction has 29 states and 30 transitions. [2021-10-28 09:40:41,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 30 transitions. [2021-10-28 09:40:41,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2021-10-28 09:40:41,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:41,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2021-10-28 09:40:41,671 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-10-28 09:40:41,671 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-10-28 09:40:41,671 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-28 09:40:41,671 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2021-10-28 09:40:41,676 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 26 [2021-10-28 09:40:41,676 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:41,676 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:41,677 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:41,677 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [8, 7, 7, 1, 1, 1, 1] [2021-10-28 09:40:41,677 INFO L791 eck$LassoCheckResult]: Stem: 679#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 680#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 678#L552-4 [2021-10-28 09:40:41,677 INFO L793 eck$LassoCheckResult]: Loop: 678#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 681#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 686#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 704#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 682#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 683#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 684#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 685#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 703#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 702#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 701#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 700#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 699#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 698#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 697#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 696#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 695#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 694#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 693#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 692#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 691#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 690#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 688#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 689#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 687#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 677#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 678#L552-4 [2021-10-28 09:40:41,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:41,677 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2021-10-28 09:40:41,678 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:41,678 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637201471] [2021-10-28 09:40:41,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:41,678 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:41,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:41,692 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:41,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:41,714 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:41,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:41,715 INFO L85 PathProgramCache]: Analyzing trace with hash -1196184628, now seen corresponding path program 6 times [2021-10-28 09:40:41,715 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:41,715 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770844077] [2021-10-28 09:40:41,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:41,716 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:41,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:42,844 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:42,844 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:42,844 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770844077] [2021-10-28 09:40:42,844 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1770844077] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:42,845 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1120669736] [2021-10-28 09:40:42,845 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 09:40:42,845 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:40:42,845 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:42,847 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:40:42,848 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-28 09:40:43,183 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2021-10-28 09:40:43,184 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 09:40:43,185 INFO L263 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-28 09:40:43,188 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:40:43,201 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-28 09:40:43,257 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:43,258 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-28 09:40:43,276 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:43,315 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:43,316 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:43,334 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-28 09:40:43,426 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:43,426 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:43,575 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:43,576 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:43,591 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:43,655 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:43,655 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:43,690 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-28 09:40:43,805 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:43,806 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:43,943 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:43,943 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:43,968 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:44,083 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:44,083 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-28 09:40:44,091 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-10-28 09:40:44,232 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:44,232 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:44,392 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:44,393 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:44,421 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:44,461 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-28 09:40:44,509 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:44,525 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:44,525 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:44,656 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:44,657 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:44,801 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:44,801 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:44,832 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:44,941 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:44,954 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:44,954 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:45,057 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:45,057 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:45,200 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:45,200 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:45,225 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:45,362 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:45,362 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:45,376 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:45,490 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:45,490 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:45,639 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-28 09:40:45,640 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-10-28 09:40:45,713 INFO L354 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2021-10-28 09:40:45,714 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 31 [2021-10-28 09:40:45,754 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:45,789 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-28 09:40:45,794 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:45,794 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1120669736] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:45,795 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:40:45,795 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 19] total 39 [2021-10-28 09:40:45,795 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812537127] [2021-10-28 09:40:45,795 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:45,796 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:45,796 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2021-10-28 09:40:45,797 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1348, Unknown=0, NotChecked=0, Total=1482 [2021-10-28 09:40:45,797 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 2 Second operand has 39 states, 39 states have (on average 1.2307692307692308) internal successors, (48), 39 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:46,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:46,497 INFO L93 Difference]: Finished difference Result 32 states and 33 transitions. [2021-10-28 09:40:46,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-10-28 09:40:46,497 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 33 transitions. [2021-10-28 09:40:46,498 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 30 [2021-10-28 09:40:46,499 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 33 transitions. [2021-10-28 09:40:46,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2021-10-28 09:40:46,499 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2021-10-28 09:40:46,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 33 transitions. [2021-10-28 09:40:46,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:46,499 INFO L681 BuchiCegarLoop]: Abstraction has 32 states and 33 transitions. [2021-10-28 09:40:46,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 33 transitions. [2021-10-28 09:40:46,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2021-10-28 09:40:46,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.032258064516129) internal successors, (32), 30 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:46,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 32 transitions. [2021-10-28 09:40:46,502 INFO L704 BuchiCegarLoop]: Abstraction has 31 states and 32 transitions. [2021-10-28 09:40:46,502 INFO L587 BuchiCegarLoop]: Abstraction has 31 states and 32 transitions. [2021-10-28 09:40:46,502 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-28 09:40:46,502 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 32 transitions. [2021-10-28 09:40:46,503 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 29 [2021-10-28 09:40:46,503 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:46,503 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:46,504 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:46,504 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [9, 8, 8, 1, 1, 1, 1] [2021-10-28 09:40:46,504 INFO L791 eck$LassoCheckResult]: Stem: 876#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 877#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 875#L552-4 [2021-10-28 09:40:46,505 INFO L793 eck$LassoCheckResult]: Loop: 875#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 878#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 883#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 904#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 879#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 880#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 881#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 882#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 903#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 902#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 901#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 900#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 899#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 898#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 897#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 896#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 895#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 894#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 893#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 892#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 891#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 890#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 889#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 888#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 887#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 885#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 886#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 884#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 874#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 875#L552-4 [2021-10-28 09:40:46,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:46,505 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2021-10-28 09:40:46,505 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:46,506 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748174758] [2021-10-28 09:40:46,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:46,506 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:46,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:46,514 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:46,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:46,524 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:46,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:46,524 INFO L85 PathProgramCache]: Analyzing trace with hash -190854959, now seen corresponding path program 7 times [2021-10-28 09:40:46,524 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:46,525 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052256995] [2021-10-28 09:40:46,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:46,525 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:46,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:47,654 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:47,655 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:40:47,655 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052256995] [2021-10-28 09:40:47,655 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1052256995] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:47,655 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1355052294] [2021-10-28 09:40:47,655 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 09:40:47,655 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:40:47,656 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:40:47,673 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:40:47,674 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-28 09:40:47,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:40:47,871 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 21 conjunts are in the unsatisfiable core [2021-10-28 09:40:47,873 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:40:47,878 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-10-28 09:40:47,927 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:47,927 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-10-28 09:40:47,951 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-28 09:40:47,974 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:47,975 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 9 [2021-10-28 09:40:48,035 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2021-10-28 09:40:48,191 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:48,191 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:48,359 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:48,359 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:48,402 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:48,403 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:48,403 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-10-28 09:40:48,427 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:48,457 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:48,458 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-10-28 09:40:48,589 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:48,589 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:48,724 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:48,725 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:48,802 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:48,891 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 39 [2021-10-28 09:40:48,921 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:48,921 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 39 [2021-10-28 09:40:49,064 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:49,065 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-10-28 09:40:49,226 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:49,227 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:49,281 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-10-28 09:40:49,362 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:49,363 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:49,370 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:49,514 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:49,514 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:49,670 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-10-28 09:40:49,670 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-10-28 09:40:49,711 INFO L173 IndexEqualityManager]: detected equality via solver [2021-10-28 09:40:49,712 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-10-28 09:40:49,763 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-10-28 09:40:49,824 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-10-28 09:40:49,824 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-10-28 09:40:49,834 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-10-28 09:40:49,949 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-10-28 09:40:49,950 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-10-28 09:40:50,141 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-28 09:40:50,142 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 62 [2021-10-28 09:40:50,159 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:50,160 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 7 [2021-10-28 09:40:50,232 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:50,311 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-28 09:40:50,311 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 62 [2021-10-28 09:40:50,325 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-10-28 09:40:50,337 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-10-28 09:40:50,337 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-10-28 09:40:50,383 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:50,466 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-10-28 09:40:50,466 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-10-28 09:40:50,522 INFO L354 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2021-10-28 09:40:50,523 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 31 [2021-10-28 09:40:50,568 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-10-28 09:40:50,610 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-10-28 09:40:50,616 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:40:50,616 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1355052294] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:40:50,616 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:40:50,616 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21] total 44 [2021-10-28 09:40:50,617 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1662240530] [2021-10-28 09:40:50,617 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:40:50,617 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:40:50,618 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-10-28 09:40:50,619 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=1722, Unknown=0, NotChecked=0, Total=1892 [2021-10-28 09:40:50,619 INFO L87 Difference]: Start difference. First operand 31 states and 32 transitions. cyclomatic complexity: 2 Second operand has 44 states, 44 states have (on average 1.2272727272727273) internal successors, (54), 44 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:51,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:40:51,434 INFO L93 Difference]: Finished difference Result 35 states and 36 transitions. [2021-10-28 09:40:51,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2021-10-28 09:40:51,435 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 36 transitions. [2021-10-28 09:40:51,435 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 33 [2021-10-28 09:40:51,436 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 36 transitions. [2021-10-28 09:40:51,436 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2021-10-28 09:40:51,436 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2021-10-28 09:40:51,436 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 36 transitions. [2021-10-28 09:40:51,437 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:40:51,437 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 36 transitions. [2021-10-28 09:40:51,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 36 transitions. [2021-10-28 09:40:51,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2021-10-28 09:40:51,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.0294117647058822) internal successors, (35), 33 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:40:51,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 35 transitions. [2021-10-28 09:40:51,440 INFO L704 BuchiCegarLoop]: Abstraction has 34 states and 35 transitions. [2021-10-28 09:40:51,440 INFO L587 BuchiCegarLoop]: Abstraction has 34 states and 35 transitions. [2021-10-28 09:40:51,440 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-28 09:40:51,440 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 35 transitions. [2021-10-28 09:40:51,441 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 32 [2021-10-28 09:40:51,441 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:40:51,441 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:40:51,442 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 09:40:51,442 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [10, 9, 9, 1, 1, 1, 1] [2021-10-28 09:40:51,442 INFO L791 eck$LassoCheckResult]: Stem: 1087#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1088#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 1090#L552-4 [2021-10-28 09:40:51,442 INFO L793 eck$LassoCheckResult]: Loop: 1090#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 1091#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 1096#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1120#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1092#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1093#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1094#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1095#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1119#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1118#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1117#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1116#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1115#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1114#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1113#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1112#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1111#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1110#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1109#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1108#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1107#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1106#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1105#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1104#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1103#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1102#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1101#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1100#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1098#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1099#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1097#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 1089#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 1090#L552-4 [2021-10-28 09:40:51,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:51,443 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2021-10-28 09:40:51,443 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:51,443 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865176887] [2021-10-28 09:40:51,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:51,443 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:51,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:51,453 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:51,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:51,459 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:51,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:51,460 INFO L85 PathProgramCache]: Analyzing trace with hash 778359212, now seen corresponding path program 8 times [2021-10-28 09:40:51,460 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:51,460 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748684091] [2021-10-28 09:40:51,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:51,460 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:51,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:51,496 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:51,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:51,535 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:40:51,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:40:51,536 INFO L85 PathProgramCache]: Analyzing trace with hash 320163182, now seen corresponding path program 2 times [2021-10-28 09:40:51,536 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:40:51,536 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481099220] [2021-10-28 09:40:51,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:40:51,536 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:40:51,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:51,573 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:40:51,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:40:51,628 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:42:00,496 WARN L207 SmtUtils]: Spent 1.15 m on a formula simplification. DAG size of input: 257 DAG size of output: 247 [2021-10-28 09:42:11,087 WARN L207 SmtUtils]: Spent 6.67 s on a formula simplification that was a NOOP. DAG size: 137 [2021-10-28 09:42:11,448 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 09:42:11,449 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 09:42:11,449 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 09:42:11,449 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 09:42:11,449 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 09:42:11,449 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:42:11,449 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 09:42:11,450 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 09:42:11,450 INFO L133 ssoRankerPreferences]: Filename of dumped script: java_Nested-alloca.i_Iteration10_Lasso [2021-10-28 09:42:11,450 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 09:42:11,450 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 09:42:11,457 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer has thrown an exception: java.lang.ArithmeticException: integer overflow at java.base/java.lang.Math.toIntExact(Math.java:1071) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis$PreprocessingBenchmark.(LassoAnalysis.java:551) at de.uni_freiburg.informatik.ultimate.lassoranker.variables.LassoBuilder.preprocess(LassoBuilder.java:255) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.preprocess(LassoAnalysis.java:280) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.(LassoAnalysis.java:229) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.synthesize(LassoCheck.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkLassoTermination(LassoCheck.java:953) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.(LassoCheck.java:862) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.(LassoCheck.java:252) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiCegarLoop.iterate(BuchiCegarLoop.java:457) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:143) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:398) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-10-28 09:42:11,460 INFO L168 Benchmark]: Toolchain (without parser) took 115355.01 ms. Allocated memory was 102.8 MB in the beginning and 188.7 MB in the end (delta: 86.0 MB). Free memory was 66.4 MB in the beginning and 117.4 MB in the end (delta: -51.0 MB). Peak memory consumption was 116.7 MB. Max. memory is 16.1 GB. [2021-10-28 09:42:11,460 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 102.8 MB. Free memory is still 83.4 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:42:11,460 INFO L168 Benchmark]: CACSL2BoogieTranslator took 884.79 ms. Allocated memory is still 102.8 MB. Free memory was 66.2 MB in the beginning and 73.9 MB in the end (delta: -7.7 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-28 09:42:11,460 INFO L168 Benchmark]: Boogie Procedure Inliner took 55.83 ms. Allocated memory is still 102.8 MB. Free memory was 73.4 MB in the beginning and 72.1 MB in the end (delta: 1.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:42:11,461 INFO L168 Benchmark]: Boogie Preprocessor took 23.78 ms. Allocated memory is still 102.8 MB. Free memory was 72.1 MB in the beginning and 70.8 MB in the end (delta: 1.3 MB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:42:11,461 INFO L168 Benchmark]: RCFGBuilder took 368.33 ms. Allocated memory is still 102.8 MB. Free memory was 70.8 MB in the beginning and 60.4 MB in the end (delta: 10.4 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-28 09:42:11,461 INFO L168 Benchmark]: BuchiAutomizer took 113997.23 ms. Allocated memory was 102.8 MB in the beginning and 188.7 MB in the end (delta: 86.0 MB). Free memory was 60.4 MB in the beginning and 117.4 MB in the end (delta: -57.0 MB). Peak memory consumption was 112.5 MB. Max. memory is 16.1 GB. [2021-10-28 09:42:11,463 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 102.8 MB. Free memory is still 83.4 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 884.79 ms. Allocated memory is still 102.8 MB. Free memory was 66.2 MB in the beginning and 73.9 MB in the end (delta: -7.7 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 55.83 ms. Allocated memory is still 102.8 MB. Free memory was 73.4 MB in the beginning and 72.1 MB in the end (delta: 1.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 23.78 ms. Allocated memory is still 102.8 MB. Free memory was 72.1 MB in the beginning and 70.8 MB in the end (delta: 1.3 MB). There was no memory consumed. Max. memory is 16.1 GB. * RCFGBuilder took 368.33 ms. Allocated memory is still 102.8 MB. Free memory was 70.8 MB in the beginning and 60.4 MB in the end (delta: 10.4 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 113997.23 ms. Allocated memory was 102.8 MB in the beginning and 188.7 MB in the end (delta: 86.0 MB). Free memory was 60.4 MB in the beginning and 117.4 MB in the end (delta: -57.0 MB). Peak memory consumption was 112.5 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: ArithmeticException: integer overflow de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: ArithmeticException: integer overflow: java.base/java.lang.Math.toIntExact(Math.java:1071) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2021-10-28 09:42:11,494 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2021-10-28 09:42:11,697 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-28 09:42:11,915 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-28 09:42:12,131 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-28 09:42:12,331 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-28 09:42:12,531 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-28 09:42:12,730 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 09:42:12,934 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c15680c-9c74-4948-8efd-21eb6f6da9c3/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...