./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/kundu.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/kundu.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 378b8f0f2a24531d7e66c2ece0662e71ca92e564cc9e08b387f666b51f447f92 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 08:43:30,408 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 08:43:30,410 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 08:43:30,468 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 08:43:30,469 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 08:43:30,474 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 08:43:30,477 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 08:43:30,483 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 08:43:30,486 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 08:43:30,497 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 08:43:30,499 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 08:43:30,501 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 08:43:30,502 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 08:43:30,506 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 08:43:30,510 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 08:43:30,516 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 08:43:30,519 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 08:43:30,520 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 08:43:30,523 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 08:43:30,535 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 08:43:30,539 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 08:43:30,541 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 08:43:30,545 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 08:43:30,547 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 08:43:30,558 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 08:43:30,559 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 08:43:30,559 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 08:43:30,562 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 08:43:30,563 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 08:43:30,565 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 08:43:30,567 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 08:43:30,568 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 08:43:30,571 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 08:43:30,571 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 08:43:30,573 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 08:43:30,573 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 08:43:30,573 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 08:43:30,574 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 08:43:30,574 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 08:43:30,575 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 08:43:30,575 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 08:43:30,576 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-10-28 08:43:30,613 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 08:43:30,615 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 08:43:30,616 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 08:43:30,616 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 08:43:30,618 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 08:43:30,618 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 08:43:30,619 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 08:43:30,619 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-28 08:43:30,619 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-28 08:43:30,619 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-28 08:43:30,621 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-28 08:43:30,621 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-28 08:43:30,621 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-28 08:43:30,622 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 08:43:30,622 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 08:43:30,622 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-28 08:43:30,622 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 08:43:30,623 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 08:43:30,623 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 08:43:30,623 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-28 08:43:30,623 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-28 08:43:30,624 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-28 08:43:30,624 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 08:43:30,624 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 08:43:30,624 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-28 08:43:30,625 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 08:43:30,625 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-28 08:43:30,625 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 08:43:30,625 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 08:43:30,626 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 08:43:30,626 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 08:43:30,626 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 08:43:30,628 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-28 08:43:30,629 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 378b8f0f2a24531d7e66c2ece0662e71ca92e564cc9e08b387f666b51f447f92 [2021-10-28 08:43:30,983 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 08:43:31,014 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 08:43:31,019 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 08:43:31,021 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 08:43:31,023 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 08:43:31,024 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/systemc/kundu.cil.c [2021-10-28 08:43:31,120 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/data/67f1a3135/14d7c306cf1542b5ab3637c0df5f98e1/FLAGbb2c94fc8 [2021-10-28 08:43:31,773 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 08:43:31,774 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/sv-benchmarks/c/systemc/kundu.cil.c [2021-10-28 08:43:31,787 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/data/67f1a3135/14d7c306cf1542b5ab3637c0df5f98e1/FLAGbb2c94fc8 [2021-10-28 08:43:32,084 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/data/67f1a3135/14d7c306cf1542b5ab3637c0df5f98e1 [2021-10-28 08:43:32,087 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 08:43:32,089 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 08:43:32,092 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 08:43:32,092 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 08:43:32,097 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 08:43:32,098 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,100 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5b5a5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32, skipping insertion in model container [2021-10-28 08:43:32,100 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,110 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 08:43:32,153 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 08:43:32,387 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/sv-benchmarks/c/systemc/kundu.cil.c[330,343] [2021-10-28 08:43:32,460 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:43:32,471 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 08:43:32,486 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/sv-benchmarks/c/systemc/kundu.cil.c[330,343] [2021-10-28 08:43:32,524 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:43:32,543 INFO L208 MainTranslator]: Completed translation [2021-10-28 08:43:32,543 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32 WrapperNode [2021-10-28 08:43:32,544 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 08:43:32,545 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 08:43:32,545 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 08:43:32,546 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 08:43:32,554 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,565 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,601 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 08:43:32,602 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 08:43:32,602 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 08:43:32,603 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 08:43:32,611 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,612 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,616 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,616 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,626 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,635 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,638 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,644 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 08:43:32,645 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 08:43:32,645 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 08:43:32,645 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 08:43:32,646 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (1/1) ... [2021-10-28 08:43:32,654 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:43:32,668 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:43:32,708 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:43:32,712 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-28 08:43:32,749 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 08:43:32,750 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 08:43:32,750 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 08:43:32,750 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 08:43:33,451 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 08:43:33,451 INFO L299 CfgBuilder]: Removed 95 assume(true) statements. [2021-10-28 08:43:33,454 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:43:33 BoogieIcfgContainer [2021-10-28 08:43:33,454 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 08:43:33,455 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-28 08:43:33,455 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-28 08:43:33,459 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-28 08:43:33,460 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 08:43:33,460 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.10 08:43:32" (1/3) ... [2021-10-28 08:43:33,462 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7dea386b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 08:43:33, skipping insertion in model container [2021-10-28 08:43:33,462 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 08:43:33,462 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:43:32" (2/3) ... [2021-10-28 08:43:33,463 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7dea386b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 08:43:33, skipping insertion in model container [2021-10-28 08:43:33,463 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 08:43:33,463 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:43:33" (3/3) ... [2021-10-28 08:43:33,465 INFO L389 chiAutomizerObserver]: Analyzing ICFG kundu.cil.c [2021-10-28 08:43:33,511 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-28 08:43:33,511 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-28 08:43:33,512 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-28 08:43:33,512 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-28 08:43:33,512 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-28 08:43:33,512 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-28 08:43:33,513 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-28 08:43:33,513 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-28 08:43:33,534 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 177 states, 176 states have (on average 1.5454545454545454) internal successors, (272), 176 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:33,566 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 144 [2021-10-28 08:43:33,566 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:33,566 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:33,576 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:33,576 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:33,576 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-28 08:43:33,577 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 177 states, 176 states have (on average 1.5454545454545454) internal successors, (272), 176 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:33,588 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 144 [2021-10-28 08:43:33,589 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:33,589 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:33,591 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:33,591 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:33,600 INFO L791 eck$LassoCheckResult]: Stem: 165#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 54#L-1true havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 80#L605true havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 169#L290true assume !(1 == ~P_1_i~0);~P_1_st~0 := 2; 46#L297-1true assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 25#L302-1true assume !(1 == ~C_1_i~0);~C_1_st~0 := 2; 34#L307-1true havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 88#L110true assume !(1 == ~P_1_pc~0); 56#L110-2true is_P_1_triggered_~__retres1~0 := 0; 37#L121true is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 67#L122true activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 144#L483true assume !(0 != activate_threads_~tmp~1); 8#L483-2true havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 41#L178true assume 1 == ~P_2_pc~0; 168#L179true assume 1 == ~P_2_ev~0;is_P_2_triggered_~__retres1~1 := 1; 119#L189true is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 82#L190true activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 7#L491true assume !(0 != activate_threads_~tmp___0~1); 163#L491-2true havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 84#L260true assume 1 == ~C_1_pc~0; 177#L261true assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 17#L281true is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 6#L282true activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 62#L499true assume !(0 != activate_threads_~tmp___1~1); 121#L553-1true [2021-10-28 08:43:33,601 INFO L793 eck$LassoCheckResult]: Loop: 121#L553-1true assume !false; 178#L554true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 18#L389true assume !true; 108#L405true start_simulation_~kernel_st~0 := 2; 164#L290-1true start_simulation_~kernel_st~0 := 3; 21#L416true havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 31#L110-6true assume !(1 == ~P_1_pc~0); 136#L110-8true is_P_1_triggered_~__retres1~0 := 0; 13#L121-2true is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 153#L122-2true activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 71#L483-6true assume !(0 != activate_threads_~tmp~1); 77#L483-8true havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 102#L178-6true assume !(1 == ~P_2_pc~0); 112#L178-8true is_P_2_triggered_~__retres1~1 := 0; 65#L189-2true is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 156#L190-2true activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 139#L491-6true assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 36#L491-8true havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 146#L260-6true assume 1 == ~C_1_pc~0; 69#L261-2true assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 101#L281-2true is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 93#L282-2true activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 45#L499-6true assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 39#L499-8true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 35#L320-1true assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 175#L337-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 133#L338-1true start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 151#L572true assume !(0 == start_simulation_~tmp~3); 111#L572-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 105#L320-2true assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 167#L337-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 96#L338-2true stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 129#L527true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 118#L534true stop_simulation_#res := stop_simulation_~__retres2~0; 116#L535true start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 100#L585true assume !(0 != start_simulation_~tmp___0~2); 121#L553-1true [2021-10-28 08:43:33,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:33,608 INFO L85 PathProgramCache]: Analyzing trace with hash -1148319283, now seen corresponding path program 1 times [2021-10-28 08:43:33,618 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:33,618 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30966908] [2021-10-28 08:43:33,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:33,620 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:33,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:33,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:33,853 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:33,853 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30966908] [2021-10-28 08:43:33,854 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [30966908] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:33,854 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:33,855 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:43:33,857 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320365488] [2021-10-28 08:43:33,862 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:43:33,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:33,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1277806323, now seen corresponding path program 1 times [2021-10-28 08:43:33,864 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:33,864 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873512540] [2021-10-28 08:43:33,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:33,865 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:33,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:33,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:33,885 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:33,885 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873512540] [2021-10-28 08:43:33,885 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [873512540] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:33,886 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:33,886 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 08:43:33,886 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [533967712] [2021-10-28 08:43:33,888 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:33,889 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:33,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:43:33,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:43:33,907 INFO L87 Difference]: Start difference. First operand has 177 states, 176 states have (on average 1.5454545454545454) internal successors, (272), 176 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:33,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:33,942 INFO L93 Difference]: Finished difference Result 176 states and 259 transitions. [2021-10-28 08:43:33,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:43:33,944 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 176 states and 259 transitions. [2021-10-28 08:43:33,952 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 139 [2021-10-28 08:43:33,959 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 176 states to 168 states and 251 transitions. [2021-10-28 08:43:33,961 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 168 [2021-10-28 08:43:33,962 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 168 [2021-10-28 08:43:33,963 INFO L73 IsDeterministic]: Start isDeterministic. Operand 168 states and 251 transitions. [2021-10-28 08:43:33,967 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:33,967 INFO L681 BuchiCegarLoop]: Abstraction has 168 states and 251 transitions. [2021-10-28 08:43:33,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states and 251 transitions. [2021-10-28 08:43:34,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2021-10-28 08:43:34,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 168 states, 168 states have (on average 1.494047619047619) internal successors, (251), 167 states have internal predecessors, (251), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:34,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 251 transitions. [2021-10-28 08:43:34,009 INFO L704 BuchiCegarLoop]: Abstraction has 168 states and 251 transitions. [2021-10-28 08:43:34,009 INFO L587 BuchiCegarLoop]: Abstraction has 168 states and 251 transitions. [2021-10-28 08:43:34,009 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-28 08:43:34,009 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 168 states and 251 transitions. [2021-10-28 08:43:34,013 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 139 [2021-10-28 08:43:34,013 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:34,013 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:34,015 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:34,015 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:34,016 INFO L791 eck$LassoCheckResult]: Stem: 529#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 454#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 455#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 491#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 441#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 406#L302-1 assume !(1 == ~C_1_i~0);~C_1_st~0 := 2; 407#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 429#L110 assume !(1 == ~P_1_pc~0); 410#L110-2 is_P_1_triggered_~__retres1~0 := 0; 409#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 432#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 475#L483 assume !(0 != activate_threads_~tmp~1); 372#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 373#L178 assume 1 == ~P_2_pc~0; 437#L179 assume 1 == ~P_2_ev~0;is_P_2_triggered_~__retres1~1 := 1; 386#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 493#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 370#L491 assume !(0 != activate_threads_~tmp___0~1); 371#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 495#L260 assume 1 == ~C_1_pc~0; 497#L261 assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 391#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 368#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 369#L499 assume !(0 != activate_threads_~tmp___1~1); 467#L553-1 [2021-10-28 08:43:34,016 INFO L793 eck$LassoCheckResult]: Loop: 467#L553-1 assume !false; 520#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 392#L389 assume !false; 393#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 515#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 395#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 480#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 481#L354 assume !(0 != eval_~tmp___2~0); 486#L405 start_simulation_~kernel_st~0 := 2; 514#L290-1 start_simulation_~kernel_st~0 := 3; 400#L416 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 401#L110-6 assume !(1 == ~P_1_pc~0); 421#L110-8 is_P_1_triggered_~__retres1~0 := 0; 383#L121-2 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 384#L122-2 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 476#L483-6 assume !(0 != activate_threads_~tmp~1); 477#L483-8 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 485#L178-6 assume 1 == ~P_2_pc~0; 413#L179-2 assume 1 == ~P_2_ev~0;is_P_2_triggered_~__retres1~1 := 1; 414#L189-2 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 470#L190-2 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 526#L491-6 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 430#L491-8 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 431#L260-6 assume 1 == ~C_1_pc~0; 472#L261-2 assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 473#L281-2 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 502#L282-2 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 440#L499-6 assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 435#L499-8 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 426#L320-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 427#L337-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 522#L338-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 523#L572 assume !(0 == start_simulation_~tmp~3); 501#L572-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 512#L320-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 363#L337-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 505#L338-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 506#L527 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 519#L534 stop_simulation_#res := stop_simulation_~__retres2~0; 518#L535 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 509#L585 assume !(0 != start_simulation_~tmp___0~2); 467#L553-1 [2021-10-28 08:43:34,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:34,017 INFO L85 PathProgramCache]: Analyzing trace with hash -1571021109, now seen corresponding path program 1 times [2021-10-28 08:43:34,017 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:34,017 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085640904] [2021-10-28 08:43:34,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:34,018 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:34,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:34,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:34,097 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:34,097 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085640904] [2021-10-28 08:43:34,097 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2085640904] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:34,097 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:34,098 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:43:34,098 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70189537] [2021-10-28 08:43:34,098 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:43:34,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:34,099 INFO L85 PathProgramCache]: Analyzing trace with hash -1460288632, now seen corresponding path program 1 times [2021-10-28 08:43:34,099 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:34,100 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [721435969] [2021-10-28 08:43:34,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:34,100 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:34,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:34,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:34,161 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:34,162 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [721435969] [2021-10-28 08:43:34,162 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [721435969] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:34,162 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:34,163 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:43:34,163 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206461103] [2021-10-28 08:43:34,163 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:34,164 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:34,164 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:43:34,164 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:43:34,165 INFO L87 Difference]: Start difference. First operand 168 states and 251 transitions. cyclomatic complexity: 84 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:34,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:34,186 INFO L93 Difference]: Finished difference Result 168 states and 250 transitions. [2021-10-28 08:43:34,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:43:34,187 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 168 states and 250 transitions. [2021-10-28 08:43:34,191 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 139 [2021-10-28 08:43:34,193 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 168 states to 168 states and 250 transitions. [2021-10-28 08:43:34,194 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 168 [2021-10-28 08:43:34,194 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 168 [2021-10-28 08:43:34,195 INFO L73 IsDeterministic]: Start isDeterministic. Operand 168 states and 250 transitions. [2021-10-28 08:43:34,196 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:34,196 INFO L681 BuchiCegarLoop]: Abstraction has 168 states and 250 transitions. [2021-10-28 08:43:34,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states and 250 transitions. [2021-10-28 08:43:34,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2021-10-28 08:43:34,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 168 states, 168 states have (on average 1.4880952380952381) internal successors, (250), 167 states have internal predecessors, (250), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:34,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 250 transitions. [2021-10-28 08:43:34,208 INFO L704 BuchiCegarLoop]: Abstraction has 168 states and 250 transitions. [2021-10-28 08:43:34,209 INFO L587 BuchiCegarLoop]: Abstraction has 168 states and 250 transitions. [2021-10-28 08:43:34,209 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-28 08:43:34,209 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 168 states and 250 transitions. [2021-10-28 08:43:34,211 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 139 [2021-10-28 08:43:34,211 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:34,211 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:34,213 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:34,214 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:34,214 INFO L791 eck$LassoCheckResult]: Stem: 874#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 799#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 800#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 836#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 786#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 751#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 752#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 771#L110 assume !(1 == ~P_1_pc~0); 755#L110-2 is_P_1_triggered_~__retres1~0 := 0; 754#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 777#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 817#L483 assume !(0 != activate_threads_~tmp~1); 717#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 718#L178 assume 1 == ~P_2_pc~0; 782#L179 assume 1 == ~P_2_ev~0;is_P_2_triggered_~__retres1~1 := 1; 731#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 838#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 715#L491 assume !(0 != activate_threads_~tmp___0~1); 716#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 840#L260 assume 1 == ~C_1_pc~0; 842#L261 assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 736#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 713#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 714#L499 assume !(0 != activate_threads_~tmp___1~1); 812#L553-1 [2021-10-28 08:43:34,214 INFO L793 eck$LassoCheckResult]: Loop: 812#L553-1 assume !false; 865#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 737#L389 assume !false; 738#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 860#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 740#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 825#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 826#L354 assume !(0 != eval_~tmp___2~0); 830#L405 start_simulation_~kernel_st~0 := 2; 859#L290-1 start_simulation_~kernel_st~0 := 3; 744#L416 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 745#L110-6 assume !(1 == ~P_1_pc~0); 766#L110-8 is_P_1_triggered_~__retres1~0 := 0; 728#L121-2 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 729#L122-2 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 821#L483-6 assume !(0 != activate_threads_~tmp~1); 822#L483-8 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 831#L178-6 assume 1 == ~P_2_pc~0; 760#L179-2 assume 1 == ~P_2_ev~0;is_P_2_triggered_~__retres1~1 := 1; 761#L189-2 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 815#L190-2 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 871#L491-6 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 775#L491-8 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 776#L260-6 assume 1 == ~C_1_pc~0; 818#L261-2 assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 819#L281-2 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 847#L282-2 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 785#L499-6 assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 780#L499-8 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 772#L320-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 773#L337-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 867#L338-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 868#L572 assume !(0 == start_simulation_~tmp~3); 846#L572-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 857#L320-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 708#L337-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 850#L338-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 851#L527 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 864#L534 stop_simulation_#res := stop_simulation_~__retres2~0; 863#L535 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 854#L585 assume !(0 != start_simulation_~tmp___0~2); 812#L553-1 [2021-10-28 08:43:34,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:34,215 INFO L85 PathProgramCache]: Analyzing trace with hash 117922633, now seen corresponding path program 1 times [2021-10-28 08:43:34,215 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:34,216 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460674441] [2021-10-28 08:43:34,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:34,216 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:34,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:34,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:34,301 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:34,302 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460674441] [2021-10-28 08:43:34,302 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [460674441] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:34,302 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:34,303 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:43:34,303 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024197834] [2021-10-28 08:43:34,303 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:43:34,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:34,305 INFO L85 PathProgramCache]: Analyzing trace with hash -1460288632, now seen corresponding path program 2 times [2021-10-28 08:43:34,306 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:34,306 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32915510] [2021-10-28 08:43:34,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:34,307 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:34,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:34,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:34,398 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:34,399 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [32915510] [2021-10-28 08:43:34,400 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [32915510] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:34,400 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:34,400 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:43:34,401 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580366118] [2021-10-28 08:43:34,402 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:34,402 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:34,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:43:34,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:43:34,404 INFO L87 Difference]: Start difference. First operand 168 states and 250 transitions. cyclomatic complexity: 83 Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 4 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:34,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:34,576 INFO L93 Difference]: Finished difference Result 435 states and 632 transitions. [2021-10-28 08:43:34,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:43:34,577 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 435 states and 632 transitions. [2021-10-28 08:43:34,585 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 377 [2021-10-28 08:43:34,596 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 435 states to 435 states and 632 transitions. [2021-10-28 08:43:34,596 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 435 [2021-10-28 08:43:34,599 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 435 [2021-10-28 08:43:34,599 INFO L73 IsDeterministic]: Start isDeterministic. Operand 435 states and 632 transitions. [2021-10-28 08:43:34,609 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:34,610 INFO L681 BuchiCegarLoop]: Abstraction has 435 states and 632 transitions. [2021-10-28 08:43:34,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 435 states and 632 transitions. [2021-10-28 08:43:34,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 435 to 395. [2021-10-28 08:43:34,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 395 states have (on average 1.4632911392405064) internal successors, (578), 394 states have internal predecessors, (578), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:34,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 578 transitions. [2021-10-28 08:43:34,651 INFO L704 BuchiCegarLoop]: Abstraction has 395 states and 578 transitions. [2021-10-28 08:43:34,651 INFO L587 BuchiCegarLoop]: Abstraction has 395 states and 578 transitions. [2021-10-28 08:43:34,651 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-28 08:43:34,651 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 395 states and 578 transitions. [2021-10-28 08:43:34,660 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 362 [2021-10-28 08:43:34,660 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:34,660 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:34,667 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:34,667 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:34,668 INFO L791 eck$LassoCheckResult]: Stem: 1508#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 1416#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 1417#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 1457#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 1402#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 1368#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 1369#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 1388#L110 assume !(1 == ~P_1_pc~0); 1420#L110-2 is_P_1_triggered_~__retres1~0 := 0; 1391#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 1392#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1440#L483 assume !(0 != activate_threads_~tmp~1); 1332#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 1333#L178 assume !(1 == ~P_2_pc~0); 1347#L178-2 is_P_2_triggered_~__retres1~1 := 0; 1348#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 1459#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 1330#L491 assume !(0 != activate_threads_~tmp___0~1); 1331#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 1461#L260 assume 1 == ~C_1_pc~0; 1463#L261 assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 1353#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 1328#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 1329#L499 assume !(0 != activate_threads_~tmp___1~1); 1430#L553-1 [2021-10-28 08:43:34,668 INFO L793 eck$LassoCheckResult]: Loop: 1430#L553-1 assume !false; 1651#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 1602#L389 assume !false; 1601#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1596#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 1593#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1587#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 1580#L354 assume !(0 != eval_~tmp___2~0); 1581#L405 start_simulation_~kernel_st~0 := 2; 1702#L290-1 start_simulation_~kernel_st~0 := 3; 1700#L416 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 1698#L110-6 assume !(1 == ~P_1_pc~0); 1696#L110-8 is_P_1_triggered_~__retres1~0 := 0; 1695#L121-2 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 1690#L122-2 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1441#L483-6 assume !(0 != activate_threads_~tmp~1); 1442#L483-8 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 1452#L178-6 assume !(1 == ~P_2_pc~0); 1668#L178-8 is_P_2_triggered_~__retres1~1 := 0; 1667#L189-2 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 1666#L190-2 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 1665#L491-6 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 1389#L491-8 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 1390#L260-6 assume 1 == ~C_1_pc~0; 1436#L261-2 assume 1 == ~e~0;is_C_1_triggered_~__retres1~2 := 1; 1437#L281-2 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 1468#L282-2 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 1400#L499-6 assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 1401#L499-8 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1385#L320-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 1386#L337-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1493#L338-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 1494#L572 assume !(0 == start_simulation_~tmp~3); 1502#L572-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1675#L320-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 1673#L337-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1672#L338-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 1671#L527 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1669#L534 stop_simulation_#res := stop_simulation_~__retres2~0; 1663#L535 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 1660#L585 assume !(0 != start_simulation_~tmp___0~2); 1430#L553-1 [2021-10-28 08:43:34,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:34,669 INFO L85 PathProgramCache]: Analyzing trace with hash -754916022, now seen corresponding path program 1 times [2021-10-28 08:43:34,670 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:34,670 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742593239] [2021-10-28 08:43:34,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:34,671 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:34,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:34,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:34,771 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:34,771 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742593239] [2021-10-28 08:43:34,772 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [742593239] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:34,772 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:34,772 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:43:34,772 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1140196365] [2021-10-28 08:43:34,773 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:43:34,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:34,773 INFO L85 PathProgramCache]: Analyzing trace with hash 1244283687, now seen corresponding path program 1 times [2021-10-28 08:43:34,774 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:34,774 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621372422] [2021-10-28 08:43:34,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:34,774 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:34,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:34,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:34,828 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:34,829 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621372422] [2021-10-28 08:43:34,829 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1621372422] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:34,829 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:34,829 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:43:34,830 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333069297] [2021-10-28 08:43:34,830 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:34,830 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:34,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:43:34,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:43:34,831 INFO L87 Difference]: Start difference. First operand 395 states and 578 transitions. cyclomatic complexity: 185 Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 4 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:34,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:34,987 INFO L93 Difference]: Finished difference Result 1091 states and 1558 transitions. [2021-10-28 08:43:34,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:43:34,988 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1091 states and 1558 transitions. [2021-10-28 08:43:35,003 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1015 [2021-10-28 08:43:35,017 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1091 states to 1091 states and 1558 transitions. [2021-10-28 08:43:35,018 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1091 [2021-10-28 08:43:35,020 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1091 [2021-10-28 08:43:35,020 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1091 states and 1558 transitions. [2021-10-28 08:43:35,023 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:35,023 INFO L681 BuchiCegarLoop]: Abstraction has 1091 states and 1558 transitions. [2021-10-28 08:43:35,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1091 states and 1558 transitions. [2021-10-28 08:43:35,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1091 to 1032. [2021-10-28 08:43:35,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1032 states, 1032 states have (on average 1.439922480620155) internal successors, (1486), 1031 states have internal predecessors, (1486), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:35,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1032 states to 1032 states and 1486 transitions. [2021-10-28 08:43:35,064 INFO L704 BuchiCegarLoop]: Abstraction has 1032 states and 1486 transitions. [2021-10-28 08:43:35,064 INFO L587 BuchiCegarLoop]: Abstraction has 1032 states and 1486 transitions. [2021-10-28 08:43:35,064 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-28 08:43:35,064 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1032 states and 1486 transitions. [2021-10-28 08:43:35,074 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 994 [2021-10-28 08:43:35,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:35,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:35,075 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:35,075 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:35,075 INFO L791 eck$LassoCheckResult]: Stem: 3024#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 2913#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 2914#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 2953#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 2901#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 2867#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 2868#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 2886#L110 assume !(1 == ~P_1_pc~0); 2918#L110-2 is_P_1_triggered_~__retres1~0 := 0; 2889#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 2890#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2936#L483 assume !(0 != activate_threads_~tmp~1); 2831#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 2832#L178 assume !(1 == ~P_2_pc~0); 2845#L178-2 is_P_2_triggered_~__retres1~1 := 0; 2846#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 2955#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 2829#L491 assume !(0 != activate_threads_~tmp___0~1); 2830#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 2959#L260 assume !(1 == ~C_1_pc~0); 2960#L260-2 assume 2 == ~C_1_pc~0; 2904#L271 assume 1 == ~C_1_ev~0;is_C_1_triggered_~__retres1~2 := 1; 2851#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 2827#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 2828#L499 assume !(0 != activate_threads_~tmp___1~1); 2928#L553-1 [2021-10-28 08:43:35,076 INFO L793 eck$LassoCheckResult]: Loop: 2928#L553-1 assume !false; 3605#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 3510#L389 assume !false; 3595#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 3592#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 3589#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3587#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 3581#L354 assume !(0 != eval_~tmp___2~0); 2985#L405 start_simulation_~kernel_st~0 := 2; 2986#L290-1 start_simulation_~kernel_st~0 := 3; 2862#L416 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 2863#L110-6 assume !(1 == ~P_1_pc~0); 2879#L110-8 is_P_1_triggered_~__retres1~0 := 0; 2843#L121-2 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 2844#L122-2 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3016#L483-6 assume !(0 != activate_threads_~tmp~1); 3827#L483-8 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 3791#L178-6 assume !(1 == ~P_2_pc~0); 3733#L178-8 is_P_2_triggered_~__retres1~1 := 0; 3732#L189-2 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 3731#L190-2 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 3730#L491-6 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 3729#L491-8 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 3728#L260-6 assume !(1 == ~C_1_pc~0); 3725#L260-8 assume !(2 == ~C_1_pc~0); 3722#L270-5 is_C_1_triggered_~__retres1~2 := 0; 3720#L281-2 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 3718#L282-2 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 3716#L499-6 assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 3714#L499-8 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 3710#L320-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 3708#L337-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3706#L338-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 3703#L572 assume !(0 == start_simulation_~tmp~3); 3699#L572-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 3668#L320-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 3661#L337-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3653#L338-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 3647#L527 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3642#L534 stop_simulation_#res := stop_simulation_~__retres2~0; 3617#L535 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 3611#L585 assume !(0 != start_simulation_~tmp___0~2); 2928#L553-1 [2021-10-28 08:43:35,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:35,077 INFO L85 PathProgramCache]: Analyzing trace with hash -1720008278, now seen corresponding path program 1 times [2021-10-28 08:43:35,077 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:35,077 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564352364] [2021-10-28 08:43:35,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:35,078 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:35,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:35,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:35,127 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:35,127 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564352364] [2021-10-28 08:43:35,128 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564352364] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:35,128 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:35,128 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:43:35,129 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [714411736] [2021-10-28 08:43:35,130 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:43:35,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:35,132 INFO L85 PathProgramCache]: Analyzing trace with hash -661509382, now seen corresponding path program 1 times [2021-10-28 08:43:35,132 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:35,133 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941216446] [2021-10-28 08:43:35,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:35,133 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:35,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:35,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:35,202 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:35,202 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941216446] [2021-10-28 08:43:35,203 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1941216446] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:35,203 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:35,203 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:43:35,203 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679277821] [2021-10-28 08:43:35,204 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:35,204 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:35,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:43:35,205 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:43:35,205 INFO L87 Difference]: Start difference. First operand 1032 states and 1486 transitions. cyclomatic complexity: 458 Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:35,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:35,263 INFO L93 Difference]: Finished difference Result 1366 states and 1936 transitions. [2021-10-28 08:43:35,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:43:35,263 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1366 states and 1936 transitions. [2021-10-28 08:43:35,279 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1323 [2021-10-28 08:43:35,295 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1366 states to 1366 states and 1936 transitions. [2021-10-28 08:43:35,295 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1366 [2021-10-28 08:43:35,299 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1366 [2021-10-28 08:43:35,299 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1366 states and 1936 transitions. [2021-10-28 08:43:35,302 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:35,302 INFO L681 BuchiCegarLoop]: Abstraction has 1366 states and 1936 transitions. [2021-10-28 08:43:35,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1366 states and 1936 transitions. [2021-10-28 08:43:35,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1366 to 1342. [2021-10-28 08:43:35,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1342 states, 1342 states have (on average 1.42026825633383) internal successors, (1906), 1341 states have internal predecessors, (1906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:35,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1342 states to 1342 states and 1906 transitions. [2021-10-28 08:43:35,338 INFO L704 BuchiCegarLoop]: Abstraction has 1342 states and 1906 transitions. [2021-10-28 08:43:35,338 INFO L587 BuchiCegarLoop]: Abstraction has 1342 states and 1906 transitions. [2021-10-28 08:43:35,338 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-28 08:43:35,339 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1342 states and 1906 transitions. [2021-10-28 08:43:35,349 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1299 [2021-10-28 08:43:35,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:35,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:35,350 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:35,350 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:35,351 INFO L791 eck$LassoCheckResult]: Stem: 5430#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 5316#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 5317#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 5357#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 5306#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 5272#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 5273#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 5291#L110 assume !(1 == ~P_1_pc~0); 5321#L110-2 is_P_1_triggered_~__retres1~0 := 0; 5294#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 5295#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5340#L483 assume !(0 != activate_threads_~tmp~1); 5238#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 5239#L178 assume !(1 == ~P_2_pc~0); 5251#L178-2 is_P_2_triggered_~__retres1~1 := 0; 5252#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 5359#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 5236#L491 assume !(0 != activate_threads_~tmp___0~1); 5237#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 5363#L260 assume !(1 == ~C_1_pc~0); 5364#L260-2 assume !(2 == ~C_1_pc~0); 5256#L270-1 is_C_1_triggered_~__retres1~2 := 0; 5257#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 5234#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 5235#L499 assume !(0 != activate_threads_~tmp___1~1); 5331#L553-1 [2021-10-28 08:43:35,351 INFO L793 eck$LassoCheckResult]: Loop: 5331#L553-1 assume !false; 6382#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 6379#L389 assume !false; 6378#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 6372#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 6369#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 6367#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 6364#L354 assume !(0 != eval_~tmp___2~0); 6365#L405 start_simulation_~kernel_st~0 := 2; 6495#L290-1 start_simulation_~kernel_st~0 := 3; 6492#L416 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 6489#L110-6 assume !(1 == ~P_1_pc~0); 6466#L110-8 is_P_1_triggered_~__retres1~0 := 0; 6465#L121-2 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 6464#L122-2 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 6462#L483-6 assume !(0 != activate_threads_~tmp~1); 6460#L483-8 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 6458#L178-6 assume !(1 == ~P_2_pc~0); 6456#L178-8 is_P_2_triggered_~__retres1~1 := 0; 6454#L189-2 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 6452#L190-2 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 6450#L491-6 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 6448#L491-8 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 6446#L260-6 assume !(1 == ~C_1_pc~0); 6444#L260-8 assume !(2 == ~C_1_pc~0); 6442#L270-5 is_C_1_triggered_~__retres1~2 := 0; 6440#L281-2 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 6438#L282-2 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 6436#L499-6 assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 6434#L499-8 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 6428#L320-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 6426#L337-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 6424#L338-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 6420#L572 assume !(0 == start_simulation_~tmp~3); 6414#L572-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 6407#L320-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 6404#L337-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 6402#L338-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 6400#L527 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6398#L534 stop_simulation_#res := stop_simulation_~__retres2~0; 6396#L535 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 6394#L585 assume !(0 != start_simulation_~tmp___0~2); 5331#L553-1 [2021-10-28 08:43:35,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:35,352 INFO L85 PathProgramCache]: Analyzing trace with hash -1713364885, now seen corresponding path program 1 times [2021-10-28 08:43:35,352 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:35,352 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900493133] [2021-10-28 08:43:35,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:35,352 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:35,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:35,380 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:35,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:35,447 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:35,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:35,448 INFO L85 PathProgramCache]: Analyzing trace with hash -661509382, now seen corresponding path program 2 times [2021-10-28 08:43:35,449 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:35,449 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64143003] [2021-10-28 08:43:35,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:35,449 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:35,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:35,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:35,515 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:35,515 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64143003] [2021-10-28 08:43:35,515 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64143003] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:35,515 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:35,516 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:43:35,516 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54445767] [2021-10-28 08:43:35,516 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:35,517 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:35,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:43:35,518 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:43:35,518 INFO L87 Difference]: Start difference. First operand 1342 states and 1906 transitions. cyclomatic complexity: 568 Second operand has 5 states, 5 states have (on average 8.4) internal successors, (42), 5 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:35,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:35,618 INFO L93 Difference]: Finished difference Result 2379 states and 3348 transitions. [2021-10-28 08:43:35,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:43:35,619 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2379 states and 3348 transitions. [2021-10-28 08:43:35,646 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2318 [2021-10-28 08:43:35,671 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2379 states to 2379 states and 3348 transitions. [2021-10-28 08:43:35,671 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2379 [2021-10-28 08:43:35,675 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2379 [2021-10-28 08:43:35,675 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2379 states and 3348 transitions. [2021-10-28 08:43:35,680 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:35,680 INFO L681 BuchiCegarLoop]: Abstraction has 2379 states and 3348 transitions. [2021-10-28 08:43:35,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2379 states and 3348 transitions. [2021-10-28 08:43:35,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2379 to 1378. [2021-10-28 08:43:35,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1378 states, 1378 states have (on average 1.409288824383164) internal successors, (1942), 1377 states have internal predecessors, (1942), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:35,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1378 states to 1378 states and 1942 transitions. [2021-10-28 08:43:35,727 INFO L704 BuchiCegarLoop]: Abstraction has 1378 states and 1942 transitions. [2021-10-28 08:43:35,727 INFO L587 BuchiCegarLoop]: Abstraction has 1378 states and 1942 transitions. [2021-10-28 08:43:35,728 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-28 08:43:35,728 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1378 states and 1942 transitions. [2021-10-28 08:43:35,739 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1335 [2021-10-28 08:43:35,739 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:35,739 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:35,740 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:35,740 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:35,740 INFO L791 eck$LassoCheckResult]: Stem: 9188#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 9055#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 9056#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 9095#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 9045#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 9009#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 9010#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 9029#L110 assume !(1 == ~P_1_pc~0); 9060#L110-2 is_P_1_triggered_~__retres1~0 := 0; 9032#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 9033#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 9076#L483 assume !(0 != activate_threads_~tmp~1); 8975#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 8976#L178 assume !(1 == ~P_2_pc~0); 8988#L178-2 is_P_2_triggered_~__retres1~1 := 0; 8989#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 9097#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 8973#L491 assume !(0 != activate_threads_~tmp___0~1); 8974#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 9100#L260 assume !(1 == ~C_1_pc~0); 9101#L260-2 assume !(2 == ~C_1_pc~0); 8993#L270-1 is_C_1_triggered_~__retres1~2 := 0; 8994#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 8971#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 8972#L499 assume !(0 != activate_threads_~tmp___1~1); 9070#L553-1 [2021-10-28 08:43:35,741 INFO L793 eck$LassoCheckResult]: Loop: 9070#L553-1 assume !false; 10309#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 10216#L389 assume !false; 10274#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 9138#L320 assume !(0 == ~P_1_st~0); 8997#L324 assume !(0 == ~P_2_st~0); 8999#L328 assume !(0 == ~C_1_st~0);exists_runnable_thread_~__retres1~3 := 0; 9168#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10040#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 10041#L354 assume !(0 != eval_~tmp___2~0); 9133#L405 start_simulation_~kernel_st~0 := 2; 9134#L290-1 start_simulation_~kernel_st~0 := 3; 9005#L416 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 9006#L110-6 assume !(1 == ~P_1_pc~0); 9164#L110-8 is_P_1_triggered_~__retres1~0 := 0; 9165#L121-2 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 9178#L122-2 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 9179#L483-6 assume !(0 != activate_threads_~tmp~1); 9089#L483-8 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 9090#L178-6 assume !(1 == ~P_2_pc~0); 9140#L178-8 is_P_2_triggered_~__retres1~1 := 0; 9141#L189-2 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 9182#L190-2 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 9183#L491-6 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 9030#L491-8 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 9031#L260-6 assume !(1 == ~C_1_pc~0); 9048#L260-8 assume !(2 == ~C_1_pc~0); 9049#L270-5 is_C_1_triggered_~__retres1~2 := 0; 9122#L281-2 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 9123#L282-2 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 9043#L499-6 assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 9044#L499-8 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 9026#L320-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 9027#L337-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 9154#L338-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 9155#L572 assume !(0 == start_simulation_~tmp~3); 9106#L572-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 9139#L320-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 10315#L337-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10314#L338-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 10313#L527 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 10312#L534 stop_simulation_#res := stop_simulation_~__retres2~0; 10311#L535 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 10310#L585 assume !(0 != start_simulation_~tmp___0~2); 9070#L553-1 [2021-10-28 08:43:35,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:35,741 INFO L85 PathProgramCache]: Analyzing trace with hash -1713364885, now seen corresponding path program 2 times [2021-10-28 08:43:35,742 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:35,742 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742909237] [2021-10-28 08:43:35,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:35,742 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:35,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:35,753 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:35,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:35,773 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:35,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:35,774 INFO L85 PathProgramCache]: Analyzing trace with hash -1255144909, now seen corresponding path program 1 times [2021-10-28 08:43:35,774 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:35,774 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529932577] [2021-10-28 08:43:35,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:35,775 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:35,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:35,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:35,803 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:35,804 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529932577] [2021-10-28 08:43:35,804 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [529932577] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:35,804 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:35,804 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:43:35,805 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835806789] [2021-10-28 08:43:35,805 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:35,805 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:35,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:43:35,806 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:43:35,806 INFO L87 Difference]: Start difference. First operand 1378 states and 1942 transitions. cyclomatic complexity: 568 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:35,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:35,860 INFO L93 Difference]: Finished difference Result 2437 states and 3357 transitions. [2021-10-28 08:43:35,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:43:35,861 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2437 states and 3357 transitions. [2021-10-28 08:43:35,886 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2376 [2021-10-28 08:43:35,910 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2437 states to 2437 states and 3357 transitions. [2021-10-28 08:43:35,910 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2437 [2021-10-28 08:43:35,913 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2437 [2021-10-28 08:43:35,914 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2437 states and 3357 transitions. [2021-10-28 08:43:35,918 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:35,919 INFO L681 BuchiCegarLoop]: Abstraction has 2437 states and 3357 transitions. [2021-10-28 08:43:35,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2437 states and 3357 transitions. [2021-10-28 08:43:35,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2437 to 2437. [2021-10-28 08:43:35,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2437 states, 2437 states have (on average 1.377513336068937) internal successors, (3357), 2436 states have internal predecessors, (3357), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:36,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2437 states to 2437 states and 3357 transitions. [2021-10-28 08:43:36,013 INFO L704 BuchiCegarLoop]: Abstraction has 2437 states and 3357 transitions. [2021-10-28 08:43:36,013 INFO L587 BuchiCegarLoop]: Abstraction has 2437 states and 3357 transitions. [2021-10-28 08:43:36,013 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-28 08:43:36,014 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2437 states and 3357 transitions. [2021-10-28 08:43:36,032 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2376 [2021-10-28 08:43:36,032 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:36,032 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:36,033 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:36,033 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:36,033 INFO L791 eck$LassoCheckResult]: Stem: 13013#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 12876#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 12877#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 12921#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 12865#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 12832#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 12833#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 12848#L110 assume !(1 == ~P_1_pc~0); 12881#L110-2 is_P_1_triggered_~__retres1~0 := 0; 12853#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 12854#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 12899#L483 assume !(0 != activate_threads_~tmp~1); 12796#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 12797#L178 assume !(1 == ~P_2_pc~0); 12809#L178-2 is_P_2_triggered_~__retres1~1 := 0; 12810#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 12923#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 12794#L491 assume !(0 != activate_threads_~tmp___0~1); 12795#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 12927#L260 assume !(1 == ~C_1_pc~0); 12928#L260-2 assume !(2 == ~C_1_pc~0); 12814#L270-1 is_C_1_triggered_~__retres1~2 := 0; 12815#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 12792#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 12793#L499 assume !(0 != activate_threads_~tmp___1~1); 12890#L553-1 [2021-10-28 08:43:36,034 INFO L793 eck$LassoCheckResult]: Loop: 12890#L553-1 assume !false; 14741#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 13927#L389 assume !false; 14733#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 14727#L320 assume !(0 == ~P_1_st~0); 14728#L324 assume !(0 == ~P_2_st~0); 14871#L328 assume !(0 == ~C_1_st~0);exists_runnable_thread_~__retres1~3 := 0; 14869#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 14867#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 14865#L354 assume !(0 != eval_~tmp___2~0); 14863#L405 start_simulation_~kernel_st~0 := 2; 14861#L290-1 start_simulation_~kernel_st~0 := 3; 14859#L416 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 14857#L110-6 assume !(1 == ~P_1_pc~0); 14855#L110-8 is_P_1_triggered_~__retres1~0 := 0; 14853#L121-2 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 14851#L122-2 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 14848#L483-6 assume 0 != activate_threads_~tmp~1;~P_1_st~0 := 0; 14846#L483-8 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 14845#L178-6 assume !(1 == ~P_2_pc~0); 14844#L178-8 is_P_2_triggered_~__retres1~1 := 0; 14843#L189-2 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 14842#L190-2 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 14841#L491-6 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 14840#L491-8 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 14839#L260-6 assume !(1 == ~C_1_pc~0); 14838#L260-8 assume !(2 == ~C_1_pc~0); 14833#L270-5 is_C_1_triggered_~__retres1~2 := 0; 14831#L281-2 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 14829#L282-2 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 14827#L499-6 assume 0 != activate_threads_~tmp___1~1;~C_1_st~0 := 0; 14826#L499-8 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 14823#L320-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 14821#L337-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 14820#L338-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 14760#L572 assume !(0 == start_simulation_~tmp~3); 14759#L572-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 14757#L320-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 14756#L337-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 14755#L338-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 14754#L527 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 14752#L534 stop_simulation_#res := stop_simulation_~__retres2~0; 14750#L535 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~2 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 14747#L585 assume !(0 != start_simulation_~tmp___0~2); 12890#L553-1 [2021-10-28 08:43:36,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:36,035 INFO L85 PathProgramCache]: Analyzing trace with hash -1713364885, now seen corresponding path program 3 times [2021-10-28 08:43:36,035 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:36,035 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1287084005] [2021-10-28 08:43:36,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:36,036 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:36,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:36,046 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:36,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:36,064 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:36,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:36,065 INFO L85 PathProgramCache]: Analyzing trace with hash 1116594353, now seen corresponding path program 1 times [2021-10-28 08:43:36,065 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:36,065 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866996076] [2021-10-28 08:43:36,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:36,066 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:36,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:36,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:36,134 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:36,135 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866996076] [2021-10-28 08:43:36,135 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1866996076] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:36,135 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:36,135 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:43:36,136 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1907114139] [2021-10-28 08:43:36,136 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 08:43:36,136 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:36,137 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:43:36,137 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:43:36,137 INFO L87 Difference]: Start difference. First operand 2437 states and 3357 transitions. cyclomatic complexity: 924 Second operand has 5 states, 5 states have (on average 8.8) internal successors, (44), 5 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:36,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:36,273 INFO L93 Difference]: Finished difference Result 3970 states and 5494 transitions. [2021-10-28 08:43:36,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:43:36,273 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3970 states and 5494 transitions. [2021-10-28 08:43:36,315 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 3883 [2021-10-28 08:43:36,354 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3970 states to 3970 states and 5494 transitions. [2021-10-28 08:43:36,354 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3970 [2021-10-28 08:43:36,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3970 [2021-10-28 08:43:36,361 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3970 states and 5494 transitions. [2021-10-28 08:43:36,369 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:36,369 INFO L681 BuchiCegarLoop]: Abstraction has 3970 states and 5494 transitions. [2021-10-28 08:43:36,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3970 states and 5494 transitions. [2021-10-28 08:43:36,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3970 to 2217. [2021-10-28 08:43:36,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2217 states, 2217 states have (on average 1.365809652683807) internal successors, (3028), 2216 states have internal predecessors, (3028), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:36,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2217 states to 2217 states and 3028 transitions. [2021-10-28 08:43:36,451 INFO L704 BuchiCegarLoop]: Abstraction has 2217 states and 3028 transitions. [2021-10-28 08:43:36,452 INFO L587 BuchiCegarLoop]: Abstraction has 2217 states and 3028 transitions. [2021-10-28 08:43:36,452 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-28 08:43:36,457 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2217 states and 3028 transitions. [2021-10-28 08:43:36,468 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 2130 [2021-10-28 08:43:36,469 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:36,469 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:36,470 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:36,470 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:36,471 INFO L791 eck$LassoCheckResult]: Stem: 19406#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 19293#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 19294#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 19332#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 19283#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 19250#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 19251#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 19268#L110 assume !(1 == ~P_1_pc~0); 19298#L110-2 is_P_1_triggered_~__retres1~0 := 0; 19271#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 19272#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 19317#L483 assume !(0 != activate_threads_~tmp~1); 19216#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 19217#L178 assume !(1 == ~P_2_pc~0); 19229#L178-2 is_P_2_triggered_~__retres1~1 := 0; 19230#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 19334#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 19214#L491 assume !(0 != activate_threads_~tmp___0~1); 19215#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 19337#L260 assume !(1 == ~C_1_pc~0); 19338#L260-2 assume !(2 == ~C_1_pc~0); 19234#L270-1 is_C_1_triggered_~__retres1~2 := 0; 19235#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 19212#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 19213#L499 assume !(0 != activate_threads_~tmp___1~1); 19307#L553-1 assume !false; 19770#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 19768#L389 [2021-10-28 08:43:36,471 INFO L793 eck$LassoCheckResult]: Loop: 19768#L389 assume !false; 19769#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 19763#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 19764#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 19754#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 19755#L354 assume 0 != eval_~tmp___2~0; 19665#L354-1 assume 0 == ~P_1_st~0;eval_~tmp~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 19666#L363 assume !(0 != eval_~tmp~0); 19642#L359 assume !(0 == ~P_2_st~0); 19643#L374 assume !(0 == ~C_1_st~0); 19768#L389 [2021-10-28 08:43:36,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:36,472 INFO L85 PathProgramCache]: Analyzing trace with hash -1571176403, now seen corresponding path program 1 times [2021-10-28 08:43:36,472 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:36,476 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179330769] [2021-10-28 08:43:36,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:36,476 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:36,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:36,492 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:36,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:36,531 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:36,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:36,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1012946901, now seen corresponding path program 1 times [2021-10-28 08:43:36,541 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:36,541 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18301112] [2021-10-28 08:43:36,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:36,542 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:36,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:36,588 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:36,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:36,593 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:36,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:36,594 INFO L85 PathProgramCache]: Analyzing trace with hash -1596403455, now seen corresponding path program 1 times [2021-10-28 08:43:36,594 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:36,594 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064080515] [2021-10-28 08:43:36,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:36,595 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:36,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:36,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:36,630 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:36,631 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064080515] [2021-10-28 08:43:36,631 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2064080515] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:36,631 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:36,631 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:43:36,632 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405872233] [2021-10-28 08:43:36,759 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:36,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:43:36,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:43:36,760 INFO L87 Difference]: Start difference. First operand 2217 states and 3028 transitions. cyclomatic complexity: 818 Second operand has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:36,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:36,832 INFO L93 Difference]: Finished difference Result 3686 states and 4965 transitions. [2021-10-28 08:43:36,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:43:36,833 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3686 states and 4965 transitions. [2021-10-28 08:43:36,860 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 3553 [2021-10-28 08:43:36,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3686 states to 3686 states and 4965 transitions. [2021-10-28 08:43:36,905 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3686 [2021-10-28 08:43:36,912 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3686 [2021-10-28 08:43:36,912 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3686 states and 4965 transitions. [2021-10-28 08:43:36,919 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:36,919 INFO L681 BuchiCegarLoop]: Abstraction has 3686 states and 4965 transitions. [2021-10-28 08:43:36,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3686 states and 4965 transitions. [2021-10-28 08:43:36,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3686 to 3610. [2021-10-28 08:43:37,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3610 states, 3610 states have (on average 1.3493074792243767) internal successors, (4871), 3609 states have internal predecessors, (4871), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:37,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3610 states to 3610 states and 4871 transitions. [2021-10-28 08:43:37,020 INFO L704 BuchiCegarLoop]: Abstraction has 3610 states and 4871 transitions. [2021-10-28 08:43:37,020 INFO L587 BuchiCegarLoop]: Abstraction has 3610 states and 4871 transitions. [2021-10-28 08:43:37,021 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-28 08:43:37,021 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3610 states and 4871 transitions. [2021-10-28 08:43:37,038 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 3477 [2021-10-28 08:43:37,038 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:37,038 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:37,041 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:37,042 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:37,042 INFO L791 eck$LassoCheckResult]: Stem: 25333#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 25202#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 25203#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 25241#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 25191#L297-1 assume !(1 == ~P_2_i~0);~P_2_st~0 := 2; 25192#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 27774#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 27773#L110 assume !(1 == ~P_1_pc~0); 27772#L110-2 is_P_1_triggered_~__retres1~0 := 0; 27771#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 27770#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 27769#L483 assume !(0 != activate_threads_~tmp~1); 27768#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 27767#L178 assume !(1 == ~P_2_pc~0); 27766#L178-2 is_P_2_triggered_~__retres1~1 := 0; 27765#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 27764#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 27763#L491 assume 0 != activate_threads_~tmp___0~1;~P_2_st~0 := 0; 25125#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 25245#L260 assume !(1 == ~C_1_pc~0); 25246#L260-2 assume !(2 == ~C_1_pc~0); 25144#L270-1 is_C_1_triggered_~__retres1~2 := 0; 25145#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 25122#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 25123#L499 assume !(0 != activate_threads_~tmp___1~1); 25216#L553-1 assume !false; 27724#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 27717#L389 [2021-10-28 08:43:37,042 INFO L793 eck$LassoCheckResult]: Loop: 27717#L389 assume !false; 27714#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 27688#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 27641#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 27634#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 27607#L354 assume 0 != eval_~tmp___2~0; 27589#L354-1 assume 0 == ~P_1_st~0;eval_~tmp~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 27576#L363 assume !(0 != eval_~tmp~0); 26436#L359 assume 0 == ~P_2_st~0;eval_~tmp___0~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 26437#L378 assume !(0 != eval_~tmp___0~0); 27274#L374 assume !(0 == ~C_1_st~0); 27717#L389 [2021-10-28 08:43:37,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:37,043 INFO L85 PathProgramCache]: Analyzing trace with hash 1311379569, now seen corresponding path program 1 times [2021-10-28 08:43:37,043 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:37,043 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961336447] [2021-10-28 08:43:37,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:37,043 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:37,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:37,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:37,091 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:37,091 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961336447] [2021-10-28 08:43:37,091 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961336447] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:37,092 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:37,092 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:43:37,092 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1688793852] [2021-10-28 08:43:37,092 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:43:37,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:37,093 INFO L85 PathProgramCache]: Analyzing trace with hash 1336445219, now seen corresponding path program 1 times [2021-10-28 08:43:37,093 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:37,093 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330022048] [2021-10-28 08:43:37,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:37,094 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:37,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:37,098 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:37,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:37,110 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:37,286 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:37,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:43:37,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:43:37,288 INFO L87 Difference]: Start difference. First operand 3610 states and 4871 transitions. cyclomatic complexity: 1268 Second operand has 3 states, 3 states have (on average 9.0) internal successors, (27), 3 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:37,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:37,323 INFO L93 Difference]: Finished difference Result 3588 states and 4846 transitions. [2021-10-28 08:43:37,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:43:37,324 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3588 states and 4846 transitions. [2021-10-28 08:43:37,353 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 3477 [2021-10-28 08:43:37,389 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3588 states to 3588 states and 4846 transitions. [2021-10-28 08:43:37,389 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3588 [2021-10-28 08:43:37,394 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3588 [2021-10-28 08:43:37,395 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3588 states and 4846 transitions. [2021-10-28 08:43:37,402 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:37,403 INFO L681 BuchiCegarLoop]: Abstraction has 3588 states and 4846 transitions. [2021-10-28 08:43:37,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3588 states and 4846 transitions. [2021-10-28 08:43:37,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3588 to 3588. [2021-10-28 08:43:37,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3588 states, 3588 states have (on average 1.350613154960981) internal successors, (4846), 3587 states have internal predecessors, (4846), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:37,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3588 states to 3588 states and 4846 transitions. [2021-10-28 08:43:37,500 INFO L704 BuchiCegarLoop]: Abstraction has 3588 states and 4846 transitions. [2021-10-28 08:43:37,500 INFO L587 BuchiCegarLoop]: Abstraction has 3588 states and 4846 transitions. [2021-10-28 08:43:37,500 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-10-28 08:43:37,500 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3588 states and 4846 transitions. [2021-10-28 08:43:37,519 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 3477 [2021-10-28 08:43:37,520 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:37,520 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:37,521 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:37,521 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:37,521 INFO L791 eck$LassoCheckResult]: Stem: 32539#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 32409#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 32410#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 32450#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 32398#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 32364#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 32365#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 32381#L110 assume !(1 == ~P_1_pc~0); 32414#L110-2 is_P_1_triggered_~__retres1~0 := 0; 32386#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 32387#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 32429#L483 assume !(0 != activate_threads_~tmp~1); 32330#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 32331#L178 assume !(1 == ~P_2_pc~0); 32343#L178-2 is_P_2_triggered_~__retres1~1 := 0; 32344#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 32452#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 32328#L491 assume !(0 != activate_threads_~tmp___0~1); 32329#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 32454#L260 assume !(1 == ~C_1_pc~0); 32455#L260-2 assume !(2 == ~C_1_pc~0); 32348#L270-1 is_C_1_triggered_~__retres1~2 := 0; 32349#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 32326#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 32327#L499 assume !(0 != activate_threads_~tmp___1~1); 32423#L553-1 assume !false; 34704#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 33333#L389 [2021-10-28 08:43:37,521 INFO L793 eck$LassoCheckResult]: Loop: 33333#L389 assume !false; 34696#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 34583#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 34582#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 34581#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 34580#L354 assume 0 != eval_~tmp___2~0; 34367#L354-1 assume 0 == ~P_1_st~0;eval_~tmp~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 34365#L363 assume !(0 != eval_~tmp~0); 33340#L359 assume 0 == ~P_2_st~0;eval_~tmp___0~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 33341#L378 assume !(0 != eval_~tmp___0~0); 33335#L374 assume !(0 == ~C_1_st~0); 33333#L389 [2021-10-28 08:43:37,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:37,522 INFO L85 PathProgramCache]: Analyzing trace with hash -1571176403, now seen corresponding path program 2 times [2021-10-28 08:43:37,522 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:37,523 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049109848] [2021-10-28 08:43:37,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:37,523 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:37,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:37,533 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:37,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:37,549 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:37,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:37,550 INFO L85 PathProgramCache]: Analyzing trace with hash 1336445219, now seen corresponding path program 2 times [2021-10-28 08:43:37,550 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:37,550 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711437708] [2021-10-28 08:43:37,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:37,551 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:37,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:37,555 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:37,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:37,560 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:37,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:37,561 INFO L85 PathProgramCache]: Analyzing trace with hash 2050962807, now seen corresponding path program 1 times [2021-10-28 08:43:37,561 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:37,561 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941594316] [2021-10-28 08:43:37,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:37,562 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:37,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:43:37,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:43:37,590 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:43:37,591 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941594316] [2021-10-28 08:43:37,591 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941594316] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:43:37,591 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:43:37,591 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 08:43:37,591 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841995973] [2021-10-28 08:43:37,676 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:43:37,677 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:43:37,677 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:43:37,678 INFO L87 Difference]: Start difference. First operand 3588 states and 4846 transitions. cyclomatic complexity: 1265 Second operand has 3 states, 2 states have (on average 19.0) internal successors, (38), 3 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:37,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:43:37,743 INFO L93 Difference]: Finished difference Result 6270 states and 8396 transitions. [2021-10-28 08:43:37,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:43:37,743 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6270 states and 8396 transitions. [2021-10-28 08:43:37,805 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 6075 [2021-10-28 08:43:37,841 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6270 states to 6270 states and 8396 transitions. [2021-10-28 08:43:37,842 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6270 [2021-10-28 08:43:37,848 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6270 [2021-10-28 08:43:37,848 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6270 states and 8396 transitions. [2021-10-28 08:43:37,858 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:43:37,858 INFO L681 BuchiCegarLoop]: Abstraction has 6270 states and 8396 transitions. [2021-10-28 08:43:37,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6270 states and 8396 transitions. [2021-10-28 08:43:37,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6270 to 6270. [2021-10-28 08:43:37,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6270 states, 6270 states have (on average 1.3390749601275918) internal successors, (8396), 6269 states have internal predecessors, (8396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:43:37,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6270 states to 6270 states and 8396 transitions. [2021-10-28 08:43:37,982 INFO L704 BuchiCegarLoop]: Abstraction has 6270 states and 8396 transitions. [2021-10-28 08:43:37,982 INFO L587 BuchiCegarLoop]: Abstraction has 6270 states and 8396 transitions. [2021-10-28 08:43:37,982 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-10-28 08:43:37,982 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 6270 states and 8396 transitions. [2021-10-28 08:43:38,007 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 6075 [2021-10-28 08:43:38,007 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:43:38,007 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:43:38,008 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:38,008 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:43:38,008 INFO L791 eck$LassoCheckResult]: Stem: 42399#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(12);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~max_loop~0 := 0;~clk~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~P_2_pc~0 := 0;~P_2_st~0 := 0;~P_2_i~0 := 0;~P_2_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 42275#L-1 havoc main_#res;havoc main_~count~0, main_~__retres2~1;havoc main_~count~0;havoc main_~__retres2~1;~num~0 := 0;~i~0 := 0;~clk~0 := 0;~max_loop~0 := 8;~timer~0 := 0;~P_1_pc~0 := 0;~P_2_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0 := 0;~P_1_i~0 := 1;~P_2_i~0 := 1;~C_1_i~0 := 1; 42276#L605 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~2;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~2;start_simulation_~kernel_st~0 := 0; 42314#L290 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 42265#L297-1 assume 1 == ~P_2_i~0;~P_2_st~0 := 0; 42231#L302-1 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 42232#L307-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_#t~ret14, activate_threads_~tmp~1, activate_threads_~tmp___0~1, activate_threads_~tmp___1~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc activate_threads_~tmp___1~1;havoc is_P_1_triggered_#res;havoc is_P_1_triggered_~__retres1~0;havoc is_P_1_triggered_~__retres1~0; 42247#L110 assume !(1 == ~P_1_pc~0); 42280#L110-2 is_P_1_triggered_~__retres1~0 := 0; 42252#L121 is_P_1_triggered_#res := is_P_1_triggered_~__retres1~0; 42253#L122 activate_threads_#t~ret12 := is_P_1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 42294#L483 assume !(0 != activate_threads_~tmp~1); 42196#L483-2 havoc is_P_2_triggered_#res;havoc is_P_2_triggered_~__retres1~1;havoc is_P_2_triggered_~__retres1~1; 42197#L178 assume !(1 == ~P_2_pc~0); 42209#L178-2 is_P_2_triggered_~__retres1~1 := 0; 42210#L189 is_P_2_triggered_#res := is_P_2_triggered_~__retres1~1; 42316#L190 activate_threads_#t~ret13 := is_P_2_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 42194#L491 assume !(0 != activate_threads_~tmp___0~1); 42195#L491-2 havoc is_C_1_triggered_#res;havoc is_C_1_triggered_~__retres1~2;havoc is_C_1_triggered_~__retres1~2; 42318#L260 assume !(1 == ~C_1_pc~0); 42319#L260-2 assume !(2 == ~C_1_pc~0); 42214#L270-1 is_C_1_triggered_~__retres1~2 := 0; 42215#L281 is_C_1_triggered_#res := is_C_1_triggered_~__retres1~2; 42192#L282 activate_threads_#t~ret14 := is_C_1_triggered_#res;activate_threads_~tmp___1~1 := activate_threads_#t~ret14;havoc activate_threads_#t~ret14; 42193#L499 assume !(0 != activate_threads_~tmp___1~1); 42289#L553-1 assume !false; 43205#L554 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret8, eval_#t~nondet9, eval_#t~nondet10, eval_#t~nondet11, eval_~tmp~0, eval_~tmp___0~0, eval_~tmp___1~0, eval_~tmp___2~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0;havoc eval_~tmp___1~0;havoc eval_~tmp___2~0; 43198#L389 [2021-10-28 08:43:38,008 INFO L793 eck$LassoCheckResult]: Loop: 43198#L389 assume !false; 43191#L350 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 43176#L320 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~3 := 1; 43177#L337 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 43254#L338 eval_#t~ret8 := exists_runnable_thread_#res;eval_~tmp___2~0 := eval_#t~ret8;havoc eval_#t~ret8; 43255#L354 assume 0 != eval_~tmp___2~0; 43140#L354-1 assume 0 == ~P_1_st~0;eval_~tmp~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 43131#L363 assume !(0 != eval_~tmp~0); 43130#L359 assume 0 == ~P_2_st~0;eval_~tmp___0~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 43128#L378 assume !(0 != eval_~tmp___0~0); 43129#L374 assume 0 == ~C_1_st~0;eval_~tmp___1~0 := eval_#t~nondet11;havoc eval_#t~nondet11; 43206#L393 assume !(0 != eval_~tmp___1~0); 43198#L389 [2021-10-28 08:43:38,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:38,009 INFO L85 PathProgramCache]: Analyzing trace with hash -1571176403, now seen corresponding path program 3 times [2021-10-28 08:43:38,009 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:38,009 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456910938] [2021-10-28 08:43:38,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:38,010 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:38,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:38,017 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:38,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:38,030 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:38,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:38,031 INFO L85 PathProgramCache]: Analyzing trace with hash -1519873096, now seen corresponding path program 1 times [2021-10-28 08:43:38,032 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:38,032 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037641908] [2021-10-28 08:43:38,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:38,032 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:38,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:38,036 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:38,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:38,041 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:38,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:43:38,041 INFO L85 PathProgramCache]: Analyzing trace with hash -844664348, now seen corresponding path program 1 times [2021-10-28 08:43:38,042 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:43:38,042 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858721222] [2021-10-28 08:43:38,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:43:38,042 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:43:38,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:38,051 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:43:38,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:43:38,067 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:43:39,546 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.10 08:43:39 BoogieIcfgContainer [2021-10-28 08:43:39,546 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-10-28 08:43:39,546 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 08:43:39,547 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 08:43:39,547 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 08:43:39,547 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:43:33" (3/4) ... [2021-10-28 08:43:39,550 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-10-28 08:43:39,613 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 08:43:39,613 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 08:43:39,615 INFO L168 Benchmark]: Toolchain (without parser) took 7524.85 ms. Allocated memory was 127.9 MB in the beginning and 216.0 MB in the end (delta: 88.1 MB). Free memory was 96.3 MB in the beginning and 91.0 MB in the end (delta: 5.3 MB). Peak memory consumption was 94.1 MB. Max. memory is 16.1 GB. [2021-10-28 08:43:39,615 INFO L168 Benchmark]: CDTParser took 0.32 ms. Allocated memory is still 83.9 MB. Free memory is still 44.0 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 08:43:39,616 INFO L168 Benchmark]: CACSL2BoogieTranslator took 452.66 ms. Allocated memory is still 127.9 MB. Free memory was 96.0 MB in the beginning and 101.0 MB in the end (delta: -5.0 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-28 08:43:39,616 INFO L168 Benchmark]: Boogie Procedure Inliner took 56.39 ms. Allocated memory is still 127.9 MB. Free memory was 101.0 MB in the beginning and 98.0 MB in the end (delta: 3.0 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 08:43:39,617 INFO L168 Benchmark]: Boogie Preprocessor took 41.69 ms. Allocated memory is still 127.9 MB. Free memory was 98.0 MB in the beginning and 95.9 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 08:43:39,617 INFO L168 Benchmark]: RCFGBuilder took 809.75 ms. Allocated memory is still 127.9 MB. Free memory was 95.9 MB in the beginning and 74.3 MB in the end (delta: 21.6 MB). Peak memory consumption was 21.0 MB. Max. memory is 16.1 GB. [2021-10-28 08:43:39,617 INFO L168 Benchmark]: BuchiAutomizer took 6090.81 ms. Allocated memory was 127.9 MB in the beginning and 216.0 MB in the end (delta: 88.1 MB). Free memory was 73.8 MB in the beginning and 94.2 MB in the end (delta: -20.4 MB). Peak memory consumption was 113.8 MB. Max. memory is 16.1 GB. [2021-10-28 08:43:39,618 INFO L168 Benchmark]: Witness Printer took 66.93 ms. Allocated memory is still 216.0 MB. Free memory was 94.2 MB in the beginning and 91.0 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 08:43:39,620 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32 ms. Allocated memory is still 83.9 MB. Free memory is still 44.0 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 452.66 ms. Allocated memory is still 127.9 MB. Free memory was 96.0 MB in the beginning and 101.0 MB in the end (delta: -5.0 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 56.39 ms. Allocated memory is still 127.9 MB. Free memory was 101.0 MB in the beginning and 98.0 MB in the end (delta: 3.0 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 41.69 ms. Allocated memory is still 127.9 MB. Free memory was 98.0 MB in the beginning and 95.9 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 809.75 ms. Allocated memory is still 127.9 MB. Free memory was 95.9 MB in the beginning and 74.3 MB in the end (delta: 21.6 MB). Peak memory consumption was 21.0 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 6090.81 ms. Allocated memory was 127.9 MB in the beginning and 216.0 MB in the end (delta: 88.1 MB). Free memory was 73.8 MB in the beginning and 94.2 MB in the end (delta: -20.4 MB). Peak memory consumption was 113.8 MB. Max. memory is 16.1 GB. * Witness Printer took 66.93 ms. Allocated memory is still 216.0 MB. Free memory was 94.2 MB in the beginning and 91.0 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 11 terminating modules (11 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.11 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 6270 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 6.0s and 12 iterations. TraceHistogramMax:1. Analysis of lassos took 3.4s. Construction of modules took 0.3s. Büchi inclusion checks took 0.5s. Highest rank in rank-based complementation 0. Minimization of det autom 11. Minimization of nondet autom 0. Automata minimization 0.6s AutomataMinimizationTime, 11 MinimizatonAttempts, 2953 StatesRemovedByMinimization, 6 NontrivialMinimizations. Non-live state removal took 0.5s Buchi closure took 0.0s. Biggest automaton had 6270 states and ocurred in iteration 11. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 2719 SDtfs, 3791 SDslu, 3175 SDs, 0 SdLazy, 277 SolverSat, 114 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.3s Time LassoAnalysisResults: nont1 unkn0 SFLI3 SFLT0 conc2 concLT0 SILN1 SILU0 SILI5 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 349]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=14622} State at position 1 is {count=0, NULL=0, \result=0, P_1_pc=0, NULL=14622, C_1_i=1, tmp=0, C_1_st=0, data_0=0, kernel_st=1, tmp___2=1, tmp___0=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@36bb5c4f=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@1072f77b=0, NULL=0, NULL=0, \result=0, i=0, P_1_i=1, e=0, P_2_pc=0, clk=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@26a012ad=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@494a6702=0, tmp___0=0, num=0, NULL=0, P_1_ev=0, tmp=0, C_1_pc=0, P_2_st=0, P_2_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6b6e5390=0, NULL=14625, \result=0, __retres1=0, tmp___0=0, __retres1=0, tmp___1=0, data_1=0, __retres1=1, \result=0, max_loop=8, NULL=14623, NULL=0, tmp=0, NULL=14624, C_1_pr=0, P_1_st=0, P_2_ev=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@39b207b0=0, C_1_ev=0, tmp___1=0, timer=0, __retres2=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@24658d66=0, \result=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@442f29f8=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5a4a38ac=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 349]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L17] int max_loop ; [L18] int clk ; [L19] int num ; [L20] int i ; [L21] int e ; [L22] int timer ; [L23] char data_0 ; [L24] char data_1 ; [L67] int P_1_pc; [L68] int P_1_st ; [L69] int P_1_i ; [L70] int P_1_ev ; [L125] int P_2_pc ; [L126] int P_2_st ; [L127] int P_2_i ; [L128] int P_2_ev ; [L193] int C_1_pc ; [L194] int C_1_st ; [L195] int C_1_i ; [L196] int C_1_ev ; [L197] int C_1_pr ; [L609] int count ; [L610] int __retres2 ; [L614] num = 0 [L615] i = 0 [L616] clk = 0 [L617] max_loop = 8 [L619] timer = 0 [L620] P_1_pc = 0 [L621] P_2_pc = 0 [L622] C_1_pc = 0 [L624] count = 0 [L601] P_1_i = 1 [L602] P_2_i = 1 [L603] C_1_i = 1 [L539] int kernel_st ; [L540] int tmp ; [L541] int tmp___0 ; [L545] kernel_st = 0 [L297] COND TRUE (int )P_1_i == 1 [L298] P_1_st = 0 [L302] COND TRUE (int )P_2_i == 1 [L303] P_2_st = 0 [L307] COND TRUE (int )C_1_i == 1 [L308] C_1_st = 0 [L475] int tmp ; [L476] int tmp___0 ; [L477] int tmp___1 ; [L107] int __retres1 ; [L110] COND FALSE !((int )P_1_pc == 1) [L120] __retres1 = 0 [L122] return (__retres1); [L481] tmp = is_P_1_triggered() [L483] COND FALSE !(\read(tmp)) [L175] int __retres1 ; [L178] COND FALSE !((int )P_2_pc == 1) [L188] __retres1 = 0 [L190] return (__retres1); [L489] tmp___0 = is_P_2_triggered() [L491] COND FALSE !(\read(tmp___0)) [L257] int __retres1 ; [L260] COND FALSE !((int )C_1_pc == 1) [L270] COND FALSE !((int )C_1_pc == 2) [L280] __retres1 = 0 [L282] return (__retres1); [L497] tmp___1 = is_C_1_triggered() [L499] COND FALSE !(\read(tmp___1)) [L553] COND TRUE 1 [L556] kernel_st = 1 [L342] int tmp ; [L343] int tmp___0 ; [L344] int tmp___1 ; [L345] int tmp___2 ; Loop: [L349] COND TRUE 1 [L317] int __retres1 ; [L320] COND TRUE (int )P_1_st == 0 [L321] __retres1 = 1 [L338] return (__retres1); [L352] tmp___2 = exists_runnable_thread() [L354] COND TRUE \read(tmp___2) [L359] COND TRUE (int )P_1_st == 0 [L361] tmp = __VERIFIER_nondet_int() [L363] COND FALSE !(\read(tmp)) [L374] COND TRUE (int )P_2_st == 0 [L376] tmp___0 = __VERIFIER_nondet_int() [L378] COND FALSE !(\read(tmp___0)) [L389] COND TRUE (int )C_1_st == 0 [L391] tmp___1 = __VERIFIER_nondet_int() [L393] COND FALSE !(\read(tmp___1)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-10-28 08:43:39,682 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c6b1071b-4bd0-4c4f-91d5-797c5bdc452d/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...