./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum10.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum10.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/config using search string *Termination*32bit*_Bitvector*.epf No suitable settings file found using Termination*32bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: AssertionError: MapEliminator tries to combine Int and (Array Int Int) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 08:36:56,312 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 08:36:56,315 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 08:36:56,355 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 08:36:56,356 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 08:36:56,358 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 08:36:56,360 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 08:36:56,364 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 08:36:56,367 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 08:36:56,368 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 08:36:56,370 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 08:36:56,372 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 08:36:56,373 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 08:36:56,375 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 08:36:56,377 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 08:36:56,379 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 08:36:56,381 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 08:36:56,383 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 08:36:56,386 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 08:36:56,389 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 08:36:56,392 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 08:36:56,401 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 08:36:56,403 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 08:36:56,406 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 08:36:56,411 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 08:36:56,416 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 08:36:56,416 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 08:36:56,419 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 08:36:56,423 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 08:36:56,425 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 08:36:56,427 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 08:36:56,428 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 08:36:56,431 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 08:36:56,433 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 08:36:56,435 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 08:36:56,435 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 08:36:56,437 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 08:36:56,437 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 08:36:56,437 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 08:36:56,439 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 08:36:56,440 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 08:36:56,441 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-10-28 08:36:56,499 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 08:36:56,499 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 08:36:56,499 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 08:36:56,500 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 08:36:56,501 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 08:36:56,501 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 08:36:56,502 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 08:36:56,502 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-28 08:36:56,502 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-28 08:36:56,502 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-28 08:36:56,503 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-28 08:36:56,503 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-28 08:36:56,503 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-28 08:36:56,503 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 08:36:56,504 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 08:36:56,504 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-28 08:36:56,504 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 08:36:56,504 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 08:36:56,505 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 08:36:56,505 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-28 08:36:56,505 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-28 08:36:56,505 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-28 08:36:56,506 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 08:36:56,506 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 08:36:56,506 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-28 08:36:56,506 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 08:36:56,507 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-28 08:36:56,507 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 08:36:56,507 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 08:36:56,508 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 08:36:56,508 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 08:36:56,508 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 08:36:56,509 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-28 08:36:56,510 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 43671c88cb28f81a53d6c7fbea907e55b0f99c68f8a522c4103c0a12ddf9f652 [2021-10-28 08:36:56,803 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 08:36:56,855 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 08:36:56,859 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 08:36:56,860 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 08:36:56,861 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 08:36:56,862 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/reducercommutativity/rangesum10.i [2021-10-28 08:36:56,974 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/data/b435e7af2/99e27b7dfac2415f9fdd9ee76da9af74/FLAG94617dcbd [2021-10-28 08:36:57,673 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 08:36:57,679 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/sv-benchmarks/c/reducercommutativity/rangesum10.i [2021-10-28 08:36:57,695 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/data/b435e7af2/99e27b7dfac2415f9fdd9ee76da9af74/FLAG94617dcbd [2021-10-28 08:36:58,000 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/data/b435e7af2/99e27b7dfac2415f9fdd9ee76da9af74 [2021-10-28 08:36:58,003 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 08:36:58,005 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 08:36:58,007 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 08:36:58,007 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 08:36:58,011 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 08:36:58,012 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,014 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@73db2891 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58, skipping insertion in model container [2021-10-28 08:36:58,014 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,023 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 08:36:58,043 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 08:36:58,297 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/sv-benchmarks/c/reducercommutativity/rangesum10.i[1465,1478] [2021-10-28 08:36:58,303 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:36:58,319 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 08:36:58,347 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/sv-benchmarks/c/reducercommutativity/rangesum10.i[1465,1478] [2021-10-28 08:36:58,348 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:36:58,367 INFO L208 MainTranslator]: Completed translation [2021-10-28 08:36:58,368 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58 WrapperNode [2021-10-28 08:36:58,368 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 08:36:58,370 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 08:36:58,370 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 08:36:58,370 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 08:36:58,381 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,391 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,429 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 08:36:58,430 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 08:36:58,430 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 08:36:58,431 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 08:36:58,442 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,443 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,447 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,448 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,457 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,463 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,466 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,470 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 08:36:58,471 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 08:36:58,472 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 08:36:58,472 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 08:36:58,473 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (1/1) ... [2021-10-28 08:36:58,486 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:36:58,500 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:36:58,526 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:36:58,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-28 08:36:58,583 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 08:36:58,583 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 08:36:58,583 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-10-28 08:36:58,584 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 08:36:58,584 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 08:36:58,584 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-10-28 08:36:58,584 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-10-28 08:36:59,073 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 08:36:59,074 INFO L299 CfgBuilder]: Removed 17 assume(true) statements. [2021-10-28 08:36:59,076 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:36:59 BoogieIcfgContainer [2021-10-28 08:36:59,077 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 08:36:59,078 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-28 08:36:59,078 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-28 08:36:59,083 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-28 08:36:59,084 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 08:36:59,084 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.10 08:36:58" (1/3) ... [2021-10-28 08:36:59,086 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7fcba4f4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 08:36:59, skipping insertion in model container [2021-10-28 08:36:59,086 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 08:36:59,087 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:36:58" (2/3) ... [2021-10-28 08:36:59,087 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7fcba4f4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 08:36:59, skipping insertion in model container [2021-10-28 08:36:59,088 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 08:36:59,088 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:36:59" (3/3) ... [2021-10-28 08:36:59,090 INFO L389 chiAutomizerObserver]: Analyzing ICFG rangesum10.i [2021-10-28 08:36:59,146 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-28 08:36:59,147 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-28 08:36:59,147 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-28 08:36:59,147 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-28 08:36:59,147 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-28 08:36:59,148 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-28 08:36:59,148 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-28 08:36:59,148 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-28 08:36:59,167 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:36:59,192 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2021-10-28 08:36:59,193 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:36:59,193 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:36:59,201 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 08:36:59,201 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 08:36:59,201 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-28 08:36:59,202 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:36:59,205 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 13 [2021-10-28 08:36:59,206 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:36:59,206 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:36:59,207 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-10-28 08:36:59,207 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 08:36:59,216 INFO L791 eck$LassoCheckResult]: Stem: 16#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 7#L-1true havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 22#L17-3true [2021-10-28 08:36:59,216 INFO L793 eck$LassoCheckResult]: Loop: 22#L17-3true assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 11#L17-2true init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 22#L17-3true [2021-10-28 08:36:59,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:36:59,224 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-10-28 08:36:59,237 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:36:59,238 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077006523] [2021-10-28 08:36:59,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:36:59,240 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:36:59,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:36:59,361 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:36:59,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:36:59,425 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:36:59,437 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:36:59,437 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2021-10-28 08:36:59,438 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:36:59,439 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648848033] [2021-10-28 08:36:59,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:36:59,441 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:36:59,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:36:59,459 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:36:59,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:36:59,478 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:36:59,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:36:59,493 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2021-10-28 08:36:59,493 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:36:59,494 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260056833] [2021-10-28 08:36:59,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:36:59,497 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:36:59,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:36:59,549 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:36:59,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:36:59,603 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:00,430 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 08:37:00,431 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 08:37:00,431 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 08:37:00,431 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 08:37:00,432 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 08:37:00,432 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:00,446 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 08:37:00,447 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 08:37:00,447 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration1_Lasso [2021-10-28 08:37:00,447 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 08:37:00,448 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 08:37:00,490 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,509 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,512 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,517 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,522 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,533 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,852 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,855 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,859 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,863 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,866 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,870 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,875 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,878 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,882 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,890 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,895 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,899 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:00,903 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:01,398 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 08:37:01,408 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 08:37:01,409 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,410 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,416 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,419 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,431 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-10-28 08:37:01,431 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,432 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 08:37:01,432 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,433 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,433 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,441 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 08:37:01,442 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 08:37:01,459 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:01,494 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:01,494 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,495 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,496 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,498 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,507 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-10-28 08:37:01,510 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,511 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 08:37:01,511 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,511 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,511 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,512 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 08:37:01,513 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 08:37:01,548 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:01,580 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:01,580 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,582 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,583 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-10-28 08:37:01,587 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,596 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,597 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 08:37:01,597 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,597 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,597 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,598 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 08:37:01,598 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 08:37:01,599 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:01,624 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2021-10-28 08:37:01,625 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,626 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,629 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,629 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-10-28 08:37:01,638 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,639 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,639 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,639 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,648 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:01,649 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:01,661 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:01,707 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:01,708 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,708 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,709 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,720 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,724 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-10-28 08:37:01,730 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,730 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 08:37:01,730 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,731 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,731 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,732 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 08:37:01,732 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 08:37:01,739 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:01,766 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:01,766 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,767 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,769 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-10-28 08:37:01,770 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,779 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,779 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 08:37:01,780 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,780 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,780 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,781 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 08:37:01,781 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 08:37:01,782 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:01,811 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:01,811 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,811 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,812 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,815 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-10-28 08:37:01,815 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,825 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,825 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,825 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,825 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,829 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:01,829 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:01,855 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:01,894 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:01,895 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:01,895 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:01,896 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:01,908 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-10-28 08:37:01,909 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:01,918 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:01,918 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:01,919 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:01,919 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:01,933 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:01,933 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:01,967 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 08:37:02,002 INFO L443 ModelExtractionUtils]: Simplification made 7 calls to the SMT solver. [2021-10-28 08:37:02,003 INFO L444 ModelExtractionUtils]: 4 out of 25 variables were initially zero. Simplification set additionally 18 variables to zero. [2021-10-28 08:37:02,005 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:02,005 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:02,024 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:02,027 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-10-28 08:37:02,028 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 08:37:02,064 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-10-28 08:37:02,065 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 08:37:02,065 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_init_nondet_~i~0, v_rep(select #length ULTIMATE.start_init_nondet_~x.base)_1) = -8*ULTIMATE.start_init_nondet_~i~0 + 19*v_rep(select #length ULTIMATE.start_init_nondet_~x.base)_1 Supporting invariants [] [2021-10-28 08:37:02,108 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:02,148 INFO L297 tatePredicateManager]: 11 out of 11 supporting invariants were superfluous and have been removed [2021-10-28 08:37:02,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:02,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:02,199 INFO L263 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 08:37:02,200 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:02,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:02,237 WARN L261 TraceCheckSpWp]: Trace formula consists of 10 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 08:37:02,237 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:02,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:02,347 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-10-28 08:37:02,349 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:02,475 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.6296296296296295) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 78 states and 122 transitions. Complement of second has 7 states. [2021-10-28 08:37:02,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-10-28 08:37:02,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:02,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 82 transitions. [2021-10-28 08:37:02,486 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 82 transitions. Stem has 2 letters. Loop has 2 letters. [2021-10-28 08:37:02,487 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:02,487 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 82 transitions. Stem has 4 letters. Loop has 2 letters. [2021-10-28 08:37:02,488 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:02,493 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 82 transitions. Stem has 2 letters. Loop has 4 letters. [2021-10-28 08:37:02,493 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:02,494 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 78 states and 122 transitions. [2021-10-28 08:37:02,510 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:02,516 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 78 states to 22 states and 32 transitions. [2021-10-28 08:37:02,517 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2021-10-28 08:37:02,518 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:02,518 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 32 transitions. [2021-10-28 08:37:02,519 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:02,522 INFO L681 BuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2021-10-28 08:37:02,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 32 transitions. [2021-10-28 08:37:02,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2021-10-28 08:37:02,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:02,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 32 transitions. [2021-10-28 08:37:02,556 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2021-10-28 08:37:02,556 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 32 transitions. [2021-10-28 08:37:02,556 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-28 08:37:02,556 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 32 transitions. [2021-10-28 08:37:02,557 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:02,557 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:02,558 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:02,558 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2021-10-28 08:37:02,558 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:02,558 INFO L791 eck$LassoCheckResult]: Stem: 189#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 190#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 201#L17-3 assume !(init_nondet_~i~0 < 10); 196#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 197#L28-3 [2021-10-28 08:37:02,559 INFO L793 eck$LassoCheckResult]: Loop: 197#L28-3 assume !!(rangesum_~i~1 < 10); 198#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 199#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 197#L28-3 [2021-10-28 08:37:02,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:02,559 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2021-10-28 08:37:02,560 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:02,560 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58884255] [2021-10-28 08:37:02,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:02,560 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:02,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:02,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:02,624 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:02,624 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [58884255] [2021-10-28 08:37:02,625 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [58884255] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:37:02,625 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:37:02,625 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:37:02,626 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2091351872] [2021-10-28 08:37:02,629 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:02,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:02,629 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2021-10-28 08:37:02,630 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:02,630 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450006753] [2021-10-28 08:37:02,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:02,630 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:02,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:02,638 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:02,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:02,646 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:02,726 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:02,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:37:02,731 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:37:02,732 INFO L87 Difference]: Start difference. First operand 22 states and 32 transitions. cyclomatic complexity: 15 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:02,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:02,751 INFO L93 Difference]: Finished difference Result 23 states and 32 transitions. [2021-10-28 08:37:02,751 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:37:02,752 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 32 transitions. [2021-10-28 08:37:02,755 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:02,758 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 32 transitions. [2021-10-28 08:37:02,758 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:02,758 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:02,759 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 32 transitions. [2021-10-28 08:37:02,759 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:02,759 INFO L681 BuchiCegarLoop]: Abstraction has 23 states and 32 transitions. [2021-10-28 08:37:02,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 32 transitions. [2021-10-28 08:37:02,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2021-10-28 08:37:02,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:02,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2021-10-28 08:37:02,764 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2021-10-28 08:37:02,764 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2021-10-28 08:37:02,764 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-28 08:37:02,764 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2021-10-28 08:37:02,765 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:02,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:02,766 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:02,766 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2021-10-28 08:37:02,766 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:02,767 INFO L791 eck$LassoCheckResult]: Stem: 240#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 241#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 253#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 254#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 255#L17-3 assume !(init_nondet_~i~0 < 10); 249#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 250#L28-3 [2021-10-28 08:37:02,767 INFO L793 eck$LassoCheckResult]: Loop: 250#L28-3 assume !!(rangesum_~i~1 < 10); 247#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 248#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 250#L28-3 [2021-10-28 08:37:02,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:02,768 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2021-10-28 08:37:02,769 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:02,770 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1134692052] [2021-10-28 08:37:02,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:02,770 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:02,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:02,833 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:02,833 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:02,834 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1134692052] [2021-10-28 08:37:02,834 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1134692052] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:02,834 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2078188609] [2021-10-28 08:37:02,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:02,835 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:02,835 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:02,836 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:02,875 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-28 08:37:02,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:02,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 66 conjuncts, 3 conjunts are in the unsatisfiable core [2021-10-28 08:37:02,930 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:02,956 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:02,957 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2078188609] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:02,957 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:02,957 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2021-10-28 08:37:02,958 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810271415] [2021-10-28 08:37:02,958 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:02,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:02,959 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 2 times [2021-10-28 08:37:02,959 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:02,960 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309866444] [2021-10-28 08:37:02,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:02,960 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:02,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:02,967 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:02,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:02,975 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:03,100 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:03,101 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:37:03,101 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:37:03,101 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 14 Second operand has 5 states, 5 states have (on average 1.8) internal successors, (9), 5 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:03,109 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:03,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:03,131 INFO L93 Difference]: Finished difference Result 25 states and 34 transitions. [2021-10-28 08:37:03,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:37:03,132 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 34 transitions. [2021-10-28 08:37:03,133 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:03,151 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 34 transitions. [2021-10-28 08:37:03,151 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:03,152 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:03,152 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 34 transitions. [2021-10-28 08:37:03,152 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:03,152 INFO L681 BuchiCegarLoop]: Abstraction has 25 states and 34 transitions. [2021-10-28 08:37:03,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 34 transitions. [2021-10-28 08:37:03,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2021-10-28 08:37:03,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.375) internal successors, (33), 23 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:03,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 33 transitions. [2021-10-28 08:37:03,156 INFO L704 BuchiCegarLoop]: Abstraction has 24 states and 33 transitions. [2021-10-28 08:37:03,156 INFO L587 BuchiCegarLoop]: Abstraction has 24 states and 33 transitions. [2021-10-28 08:37:03,156 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-28 08:37:03,156 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 33 transitions. [2021-10-28 08:37:03,157 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:03,157 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:03,157 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:03,158 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1] [2021-10-28 08:37:03,158 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:03,158 INFO L791 eck$LassoCheckResult]: Stem: 310#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 311#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 322#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 323#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 324#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 325#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 333#L17-3 assume !(init_nondet_~i~0 < 10); 317#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 318#L28-3 [2021-10-28 08:37:03,158 INFO L793 eck$LassoCheckResult]: Loop: 318#L28-3 assume !!(rangesum_~i~1 < 10); 319#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 320#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 318#L28-3 [2021-10-28 08:37:03,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:03,159 INFO L85 PathProgramCache]: Analyzing trace with hash 265236367, now seen corresponding path program 2 times [2021-10-28 08:37:03,159 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:03,159 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763009323] [2021-10-28 08:37:03,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:03,160 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:03,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:03,227 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:03,227 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:03,227 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763009323] [2021-10-28 08:37:03,228 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [763009323] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:03,228 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1783144736] [2021-10-28 08:37:03,228 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 08:37:03,228 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:03,229 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:03,230 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:03,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-28 08:37:03,342 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 08:37:03,343 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:03,344 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 08:37:03,345 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:03,405 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:03,406 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1783144736] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:03,406 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:03,406 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2021-10-28 08:37:03,407 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092646585] [2021-10-28 08:37:03,407 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:03,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:03,408 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 3 times [2021-10-28 08:37:03,408 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:03,408 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [635418545] [2021-10-28 08:37:03,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:03,409 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:03,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:03,420 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:03,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:03,430 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:03,502 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:03,503 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:37:03,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:37:03,503 INFO L87 Difference]: Start difference. First operand 24 states and 33 transitions. cyclomatic complexity: 14 Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:03,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:03,543 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2021-10-28 08:37:03,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:37:03,544 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 36 transitions. [2021-10-28 08:37:03,549 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:03,550 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 36 transitions. [2021-10-28 08:37:03,550 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:03,550 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:03,550 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 36 transitions. [2021-10-28 08:37:03,551 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:03,551 INFO L681 BuchiCegarLoop]: Abstraction has 27 states and 36 transitions. [2021-10-28 08:37:03,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 36 transitions. [2021-10-28 08:37:03,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2021-10-28 08:37:03,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 25 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:03,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2021-10-28 08:37:03,554 INFO L704 BuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2021-10-28 08:37:03,554 INFO L587 BuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2021-10-28 08:37:03,554 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-28 08:37:03,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 35 transitions. [2021-10-28 08:37:03,555 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:03,555 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:03,555 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:03,556 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 1, 1, 1, 1] [2021-10-28 08:37:03,556 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:03,556 INFO L791 eck$LassoCheckResult]: Stem: 391#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 392#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 403#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 404#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 405#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 406#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 416#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 415#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 414#L17-3 assume !(init_nondet_~i~0 < 10); 398#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 399#L28-3 [2021-10-28 08:37:03,557 INFO L793 eck$LassoCheckResult]: Loop: 399#L28-3 assume !!(rangesum_~i~1 < 10); 400#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 401#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 399#L28-3 [2021-10-28 08:37:03,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:03,557 INFO L85 PathProgramCache]: Analyzing trace with hash 1489134225, now seen corresponding path program 3 times [2021-10-28 08:37:03,557 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:03,558 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043550965] [2021-10-28 08:37:03,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:03,558 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:03,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:03,673 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:03,673 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:03,674 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043550965] [2021-10-28 08:37:03,674 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2043550965] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:03,674 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1697417966] [2021-10-28 08:37:03,675 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 08:37:03,675 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:03,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:03,677 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:03,685 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-10-28 08:37:03,758 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2021-10-28 08:37:03,758 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:03,759 INFO L263 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 5 conjunts are in the unsatisfiable core [2021-10-28 08:37:03,760 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:03,823 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:03,824 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1697417966] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:03,824 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:03,824 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2021-10-28 08:37:03,824 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54369294] [2021-10-28 08:37:03,825 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:03,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:03,825 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 4 times [2021-10-28 08:37:03,826 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:03,826 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542719970] [2021-10-28 08:37:03,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:03,826 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:03,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:03,832 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:03,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:03,839 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:03,906 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:03,907 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 08:37:03,910 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:37:03,910 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. cyclomatic complexity: 14 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:03,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:03,940 INFO L93 Difference]: Finished difference Result 29 states and 38 transitions. [2021-10-28 08:37:03,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:37:03,942 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 38 transitions. [2021-10-28 08:37:03,943 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:03,943 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 38 transitions. [2021-10-28 08:37:03,943 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:03,944 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:03,944 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 38 transitions. [2021-10-28 08:37:03,944 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:03,944 INFO L681 BuchiCegarLoop]: Abstraction has 29 states and 38 transitions. [2021-10-28 08:37:03,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 38 transitions. [2021-10-28 08:37:03,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2021-10-28 08:37:03,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.3214285714285714) internal successors, (37), 27 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:03,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 37 transitions. [2021-10-28 08:37:03,948 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 37 transitions. [2021-10-28 08:37:03,948 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 37 transitions. [2021-10-28 08:37:03,948 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-28 08:37:03,948 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 37 transitions. [2021-10-28 08:37:03,949 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:03,949 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:03,949 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:03,950 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2021-10-28 08:37:03,950 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:03,950 INFO L791 eck$LassoCheckResult]: Stem: 483#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 484#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 495#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 496#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 497#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 498#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 503#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 510#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 509#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 508#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 507#L17-3 assume !(init_nondet_~i~0 < 10); 490#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 491#L28-3 [2021-10-28 08:37:03,950 INFO L793 eck$LassoCheckResult]: Loop: 491#L28-3 assume !!(rangesum_~i~1 < 10); 492#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 493#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 491#L28-3 [2021-10-28 08:37:03,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:03,951 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 4 times [2021-10-28 08:37:03,951 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:03,951 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1086246521] [2021-10-28 08:37:03,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:03,952 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:03,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:04,024 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:04,025 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:04,026 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1086246521] [2021-10-28 08:37:04,026 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1086246521] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:04,026 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1084369770] [2021-10-28 08:37:04,026 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 08:37:04,027 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:04,027 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:04,037 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:04,059 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-10-28 08:37:04,117 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 08:37:04,117 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:04,118 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 08:37:04,119 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:04,188 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:04,188 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1084369770] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:04,193 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:04,194 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2021-10-28 08:37:04,194 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817791893] [2021-10-28 08:37:04,195 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:04,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:04,196 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 5 times [2021-10-28 08:37:04,197 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:04,197 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694187433] [2021-10-28 08:37:04,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:04,197 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:04,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:04,207 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:04,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:04,224 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:04,292 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:04,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 08:37:04,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2021-10-28 08:37:04,293 INFO L87 Difference]: Start difference. First operand 28 states and 37 transitions. cyclomatic complexity: 14 Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 8 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:04,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:04,329 INFO L93 Difference]: Finished difference Result 31 states and 40 transitions. [2021-10-28 08:37:04,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:37:04,330 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 40 transitions. [2021-10-28 08:37:04,334 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:04,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 31 states and 40 transitions. [2021-10-28 08:37:04,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:04,335 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:04,335 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 40 transitions. [2021-10-28 08:37:04,336 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:04,336 INFO L681 BuchiCegarLoop]: Abstraction has 31 states and 40 transitions. [2021-10-28 08:37:04,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 40 transitions. [2021-10-28 08:37:04,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2021-10-28 08:37:04,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3) internal successors, (39), 29 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:04,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 39 transitions. [2021-10-28 08:37:04,342 INFO L704 BuchiCegarLoop]: Abstraction has 30 states and 39 transitions. [2021-10-28 08:37:04,342 INFO L587 BuchiCegarLoop]: Abstraction has 30 states and 39 transitions. [2021-10-28 08:37:04,342 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-28 08:37:04,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 39 transitions. [2021-10-28 08:37:04,343 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:04,343 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:04,343 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:04,344 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2021-10-28 08:37:04,344 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:04,344 INFO L791 eck$LassoCheckResult]: Stem: 586#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 587#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 599#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 600#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 601#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 602#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 606#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 615#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 614#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 613#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 612#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 611#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 610#L17-3 assume !(init_nondet_~i~0 < 10); 593#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 594#L28-3 [2021-10-28 08:37:04,345 INFO L793 eck$LassoCheckResult]: Loop: 594#L28-3 assume !!(rangesum_~i~1 < 10); 595#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 596#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 594#L28-3 [2021-10-28 08:37:04,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:04,368 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 5 times [2021-10-28 08:37:04,369 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:04,369 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409901082] [2021-10-28 08:37:04,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:04,370 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:04,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:04,491 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:04,492 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:04,492 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409901082] [2021-10-28 08:37:04,493 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1409901082] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:04,493 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [205265221] [2021-10-28 08:37:04,493 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 08:37:04,493 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:04,494 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:04,500 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:04,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2021-10-28 08:37:04,594 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2021-10-28 08:37:04,594 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:04,595 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 7 conjunts are in the unsatisfiable core [2021-10-28 08:37:04,597 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:04,679 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:04,680 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [205265221] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:04,680 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:04,680 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2021-10-28 08:37:04,681 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1431750892] [2021-10-28 08:37:04,683 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:04,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:04,684 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 6 times [2021-10-28 08:37:04,685 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:04,691 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130613071] [2021-10-28 08:37:04,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:04,692 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:04,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:04,703 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:04,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:04,719 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:04,795 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:04,796 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-10-28 08:37:04,796 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2021-10-28 08:37:04,797 INFO L87 Difference]: Start difference. First operand 30 states and 39 transitions. cyclomatic complexity: 14 Second operand has 9 states, 9 states have (on average 1.8888888888888888) internal successors, (17), 9 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:04,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:04,835 INFO L93 Difference]: Finished difference Result 33 states and 42 transitions. [2021-10-28 08:37:04,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-10-28 08:37:04,836 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 42 transitions. [2021-10-28 08:37:04,837 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:04,838 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 33 states and 42 transitions. [2021-10-28 08:37:04,838 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:04,840 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:04,840 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 42 transitions. [2021-10-28 08:37:04,841 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:04,842 INFO L681 BuchiCegarLoop]: Abstraction has 33 states and 42 transitions. [2021-10-28 08:37:04,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 42 transitions. [2021-10-28 08:37:04,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2021-10-28 08:37:04,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.28125) internal successors, (41), 31 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:04,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 41 transitions. [2021-10-28 08:37:04,848 INFO L704 BuchiCegarLoop]: Abstraction has 32 states and 41 transitions. [2021-10-28 08:37:04,848 INFO L587 BuchiCegarLoop]: Abstraction has 32 states and 41 transitions. [2021-10-28 08:37:04,848 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-28 08:37:04,849 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 41 transitions. [2021-10-28 08:37:04,849 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:04,849 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:04,849 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:04,851 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 1, 1, 1, 1] [2021-10-28 08:37:04,851 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:04,851 INFO L791 eck$LassoCheckResult]: Stem: 700#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 701#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 712#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 713#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 714#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 715#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 720#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 731#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 730#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 729#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 728#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 727#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 726#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 725#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 724#L17-3 assume !(init_nondet_~i~0 < 10); 707#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 708#L28-3 [2021-10-28 08:37:04,851 INFO L793 eck$LassoCheckResult]: Loop: 708#L28-3 assume !!(rangesum_~i~1 < 10); 709#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 710#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 708#L28-3 [2021-10-28 08:37:04,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:04,852 INFO L85 PathProgramCache]: Analyzing trace with hash 1715480727, now seen corresponding path program 6 times [2021-10-28 08:37:04,852 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:04,852 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211814244] [2021-10-28 08:37:04,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:04,853 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:04,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:04,976 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:04,977 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:04,977 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211814244] [2021-10-28 08:37:04,977 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211814244] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:04,977 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1015456053] [2021-10-28 08:37:04,977 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 08:37:04,978 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:04,979 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:04,984 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:05,011 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2021-10-28 08:37:05,101 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2021-10-28 08:37:05,102 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:05,103 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 08:37:05,104 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:05,176 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:05,176 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1015456053] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:05,176 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:05,177 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2021-10-28 08:37:05,177 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198557596] [2021-10-28 08:37:05,177 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:05,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:05,178 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 7 times [2021-10-28 08:37:05,178 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:05,178 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962006556] [2021-10-28 08:37:05,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:05,178 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:05,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:05,191 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:05,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:05,207 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:05,278 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:05,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-28 08:37:05,280 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2021-10-28 08:37:05,280 INFO L87 Difference]: Start difference. First operand 32 states and 41 transitions. cyclomatic complexity: 14 Second operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 10 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:05,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:05,326 INFO L93 Difference]: Finished difference Result 35 states and 44 transitions. [2021-10-28 08:37:05,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-10-28 08:37:05,327 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 44 transitions. [2021-10-28 08:37:05,329 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:05,332 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 44 transitions. [2021-10-28 08:37:05,332 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:05,332 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:05,332 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 44 transitions. [2021-10-28 08:37:05,333 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:05,333 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 44 transitions. [2021-10-28 08:37:05,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 44 transitions. [2021-10-28 08:37:05,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2021-10-28 08:37:05,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:05,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 43 transitions. [2021-10-28 08:37:05,336 INFO L704 BuchiCegarLoop]: Abstraction has 34 states and 43 transitions. [2021-10-28 08:37:05,336 INFO L587 BuchiCegarLoop]: Abstraction has 34 states and 43 transitions. [2021-10-28 08:37:05,336 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-28 08:37:05,336 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 43 transitions. [2021-10-28 08:37:05,337 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:05,337 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:05,337 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:05,338 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 1, 1, 1, 1] [2021-10-28 08:37:05,338 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:05,338 INFO L791 eck$LassoCheckResult]: Stem: 825#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 826#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 837#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 838#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 839#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 840#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 845#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 858#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 857#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 856#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 855#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 854#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 853#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 852#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 851#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 850#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 849#L17-3 assume !(init_nondet_~i~0 < 10); 832#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 833#L28-3 [2021-10-28 08:37:05,338 INFO L793 eck$LassoCheckResult]: Loop: 833#L28-3 assume !!(rangesum_~i~1 < 10); 834#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 835#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 833#L28-3 [2021-10-28 08:37:05,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:05,344 INFO L85 PathProgramCache]: Analyzing trace with hash -690407015, now seen corresponding path program 7 times [2021-10-28 08:37:05,344 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:05,344 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516269855] [2021-10-28 08:37:05,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:05,344 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:05,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:05,483 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:05,483 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:05,483 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [516269855] [2021-10-28 08:37:05,483 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [516269855] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:05,483 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [634595623] [2021-10-28 08:37:05,484 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 08:37:05,484 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:05,484 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:05,486 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:05,512 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2021-10-28 08:37:05,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:05,597 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 08:37:05,598 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:05,682 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:05,682 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [634595623] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:05,683 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:05,683 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2021-10-28 08:37:05,683 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1236029813] [2021-10-28 08:37:05,683 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:05,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:05,684 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 8 times [2021-10-28 08:37:05,684 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:05,684 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107505340] [2021-10-28 08:37:05,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:05,685 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:05,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:05,689 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:05,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:05,694 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:05,763 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:05,764 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-28 08:37:05,764 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2021-10-28 08:37:05,766 INFO L87 Difference]: Start difference. First operand 34 states and 43 transitions. cyclomatic complexity: 14 Second operand has 11 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 11 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:05,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:05,822 INFO L93 Difference]: Finished difference Result 37 states and 46 transitions. [2021-10-28 08:37:05,822 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 08:37:05,822 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 46 transitions. [2021-10-28 08:37:05,823 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:05,826 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 37 states and 46 transitions. [2021-10-28 08:37:05,826 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:05,827 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:05,827 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 46 transitions. [2021-10-28 08:37:05,827 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:05,827 INFO L681 BuchiCegarLoop]: Abstraction has 37 states and 46 transitions. [2021-10-28 08:37:05,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 46 transitions. [2021-10-28 08:37:05,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2021-10-28 08:37:05,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.25) internal successors, (45), 35 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:05,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 45 transitions. [2021-10-28 08:37:05,831 INFO L704 BuchiCegarLoop]: Abstraction has 36 states and 45 transitions. [2021-10-28 08:37:05,831 INFO L587 BuchiCegarLoop]: Abstraction has 36 states and 45 transitions. [2021-10-28 08:37:05,831 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-28 08:37:05,831 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 45 transitions. [2021-10-28 08:37:05,832 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:05,832 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:05,832 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:05,833 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 1, 1, 1, 1] [2021-10-28 08:37:05,833 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:05,833 INFO L791 eck$LassoCheckResult]: Stem: 961#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 962#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 973#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 974#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 975#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 976#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 981#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 996#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 995#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 994#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 993#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 992#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 991#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 990#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 989#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 988#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 987#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 986#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 985#L17-3 assume !(init_nondet_~i~0 < 10); 968#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 969#L28-3 [2021-10-28 08:37:05,833 INFO L793 eck$LassoCheckResult]: Loop: 969#L28-3 assume !!(rangesum_~i~1 < 10); 970#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 971#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 969#L28-3 [2021-10-28 08:37:05,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:05,834 INFO L85 PathProgramCache]: Analyzing trace with hash -2056121829, now seen corresponding path program 8 times [2021-10-28 08:37:05,834 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:05,834 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711467239] [2021-10-28 08:37:05,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:05,834 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:05,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:05,962 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:05,962 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:05,962 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711467239] [2021-10-28 08:37:05,962 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [711467239] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:05,962 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1585141898] [2021-10-28 08:37:05,963 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 08:37:05,963 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:05,963 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:05,969 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:05,972 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2021-10-28 08:37:06,086 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 08:37:06,086 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:06,088 INFO L263 TraceCheckSpWp]: Trace formula consists of 122 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 08:37:06,090 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:06,190 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:06,191 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1585141898] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:06,191 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:06,191 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2021-10-28 08:37:06,191 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738333942] [2021-10-28 08:37:06,192 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:06,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:06,192 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 9 times [2021-10-28 08:37:06,193 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:06,193 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981145118] [2021-10-28 08:37:06,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:06,193 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:06,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,198 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:06,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,203 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:06,272 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:06,272 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-10-28 08:37:06,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2021-10-28 08:37:06,273 INFO L87 Difference]: Start difference. First operand 36 states and 45 transitions. cyclomatic complexity: 14 Second operand has 12 states, 12 states have (on average 1.9166666666666667) internal successors, (23), 12 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:06,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:06,320 INFO L93 Difference]: Finished difference Result 39 states and 48 transitions. [2021-10-28 08:37:06,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 08:37:06,320 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 48 transitions. [2021-10-28 08:37:06,321 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:06,322 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 39 states and 48 transitions. [2021-10-28 08:37:06,322 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:06,322 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:06,323 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 48 transitions. [2021-10-28 08:37:06,323 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:06,323 INFO L681 BuchiCegarLoop]: Abstraction has 39 states and 48 transitions. [2021-10-28 08:37:06,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 48 transitions. [2021-10-28 08:37:06,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 38. [2021-10-28 08:37:06,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.236842105263158) internal successors, (47), 37 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:06,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 47 transitions. [2021-10-28 08:37:06,327 INFO L704 BuchiCegarLoop]: Abstraction has 38 states and 47 transitions. [2021-10-28 08:37:06,327 INFO L587 BuchiCegarLoop]: Abstraction has 38 states and 47 transitions. [2021-10-28 08:37:06,327 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-10-28 08:37:06,327 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 47 transitions. [2021-10-28 08:37:06,328 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:06,328 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:06,328 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:06,329 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 1, 1, 1, 1] [2021-10-28 08:37:06,329 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:06,330 INFO L791 eck$LassoCheckResult]: Stem: 1108#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 1109#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 1120#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1121#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1122#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1123#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1128#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1145#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1144#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1143#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1142#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1141#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1140#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1139#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1138#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1137#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1136#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1135#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1134#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1133#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1132#L17-3 assume !(init_nondet_~i~0 < 10); 1115#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 1116#L28-3 [2021-10-28 08:37:06,330 INFO L793 eck$LassoCheckResult]: Loop: 1116#L28-3 assume !!(rangesum_~i~1 < 10); 1117#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 1118#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1116#L28-3 [2021-10-28 08:37:06,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:06,331 INFO L85 PathProgramCache]: Analyzing trace with hash -248065507, now seen corresponding path program 9 times [2021-10-28 08:37:06,331 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:06,331 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76812779] [2021-10-28 08:37:06,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:06,331 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:06,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:06,448 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:06,449 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:06,449 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [76812779] [2021-10-28 08:37:06,449 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [76812779] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:06,449 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [704879502] [2021-10-28 08:37:06,450 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 08:37:06,450 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:06,450 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:06,455 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:06,477 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2021-10-28 08:37:06,632 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2021-10-28 08:37:06,632 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:06,634 INFO L263 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 11 conjunts are in the unsatisfiable core [2021-10-28 08:37:06,636 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:06,730 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:06,730 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [704879502] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:06,731 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:06,731 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2021-10-28 08:37:06,731 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040500166] [2021-10-28 08:37:06,732 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:06,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:06,732 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 10 times [2021-10-28 08:37:06,732 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:06,733 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131265149] [2021-10-28 08:37:06,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:06,733 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:06,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,738 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:06,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,742 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:06,811 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:06,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 08:37:06,812 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-10-28 08:37:06,812 INFO L87 Difference]: Start difference. First operand 38 states and 47 transitions. cyclomatic complexity: 14 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:06,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:06,861 INFO L93 Difference]: Finished difference Result 40 states and 49 transitions. [2021-10-28 08:37:06,861 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-10-28 08:37:06,862 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 49 transitions. [2021-10-28 08:37:06,862 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:06,863 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 49 transitions. [2021-10-28 08:37:06,863 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-10-28 08:37:06,863 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-10-28 08:37:06,863 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 49 transitions. [2021-10-28 08:37:06,864 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:06,864 INFO L681 BuchiCegarLoop]: Abstraction has 40 states and 49 transitions. [2021-10-28 08:37:06,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 49 transitions. [2021-10-28 08:37:06,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2021-10-28 08:37:06,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.225) internal successors, (49), 39 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:06,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 49 transitions. [2021-10-28 08:37:06,867 INFO L704 BuchiCegarLoop]: Abstraction has 40 states and 49 transitions. [2021-10-28 08:37:06,867 INFO L587 BuchiCegarLoop]: Abstraction has 40 states and 49 transitions. [2021-10-28 08:37:06,868 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-10-28 08:37:06,868 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 49 transitions. [2021-10-28 08:37:06,868 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:06,868 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:06,869 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:06,870 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2021-10-28 08:37:06,870 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:06,870 INFO L791 eck$LassoCheckResult]: Stem: 1265#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 1266#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 1277#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1278#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1279#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1280#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1285#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1304#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1303#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1302#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1301#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1300#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1299#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1298#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1297#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1296#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1295#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1294#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1293#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1292#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1291#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1290#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1289#L17-3 assume !(init_nondet_~i~0 < 10); 1272#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 1273#L28-3 [2021-10-28 08:37:06,870 INFO L793 eck$LassoCheckResult]: Loop: 1273#L28-3 assume !!(rangesum_~i~1 < 10); 1274#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 1275#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1273#L28-3 [2021-10-28 08:37:06,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:06,871 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 10 times [2021-10-28 08:37:06,871 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:06,872 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1069738672] [2021-10-28 08:37:06,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:06,872 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:06,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,888 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:06,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,909 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:06,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:06,914 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 11 times [2021-10-28 08:37:06,915 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:06,915 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922350374] [2021-10-28 08:37:06,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:06,915 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:06,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,920 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:06,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:06,924 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:06,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:06,925 INFO L85 PathProgramCache]: Analyzing trace with hash 1328180093, now seen corresponding path program 1 times [2021-10-28 08:37:06,925 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:06,925 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261136011] [2021-10-28 08:37:06,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:06,926 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:06,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:06,967 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:06,968 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:06,969 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261136011] [2021-10-28 08:37:06,969 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [261136011] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:37:06,969 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:37:06,969 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:37:06,970 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1671107750] [2021-10-28 08:37:07,034 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:07,035 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:37:07,035 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:37:07,035 INFO L87 Difference]: Start difference. First operand 40 states and 49 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:07,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:07,075 INFO L93 Difference]: Finished difference Result 49 states and 58 transitions. [2021-10-28 08:37:07,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:37:07,076 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 58 transitions. [2021-10-28 08:37:07,076 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:07,077 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 49 states and 58 transitions. [2021-10-28 08:37:07,077 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2021-10-28 08:37:07,077 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2021-10-28 08:37:07,078 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 58 transitions. [2021-10-28 08:37:07,078 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:07,078 INFO L681 BuchiCegarLoop]: Abstraction has 49 states and 58 transitions. [2021-10-28 08:37:07,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 58 transitions. [2021-10-28 08:37:07,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2021-10-28 08:37:07,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1956521739130435) internal successors, (55), 45 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:07,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 55 transitions. [2021-10-28 08:37:07,082 INFO L704 BuchiCegarLoop]: Abstraction has 46 states and 55 transitions. [2021-10-28 08:37:07,082 INFO L587 BuchiCegarLoop]: Abstraction has 46 states and 55 transitions. [2021-10-28 08:37:07,082 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-10-28 08:37:07,082 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 55 transitions. [2021-10-28 08:37:07,083 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:07,083 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:07,083 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:07,084 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:07,084 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:07,084 INFO L791 eck$LassoCheckResult]: Stem: 1362#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 1363#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 1375#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1376#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1377#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1378#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1407#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1406#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1405#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1404#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1403#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1402#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1401#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1400#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1399#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1398#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1397#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1396#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1395#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1394#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1393#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1390#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1389#L17-3 assume !(init_nondet_~i~0 < 10); 1368#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 1369#L28-3 assume !!(rangesum_~i~1 < 10); 1370#L29 assume !(rangesum_~i~1 > 5); 1371#L28-2 [2021-10-28 08:37:07,085 INFO L793 eck$LassoCheckResult]: Loop: 1371#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1372#L28-3 assume !!(rangesum_~i~1 < 10); 1392#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 1371#L28-2 [2021-10-28 08:37:07,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:07,085 INFO L85 PathProgramCache]: Analyzing trace with hash -95702812, now seen corresponding path program 1 times [2021-10-28 08:37:07,085 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:07,086 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73837814] [2021-10-28 08:37:07,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:07,086 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:07,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,127 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:07,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,149 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:07,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:07,150 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 12 times [2021-10-28 08:37:07,150 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:07,150 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214593934] [2021-10-28 08:37:07,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:07,151 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:07,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,155 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:07,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,159 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:07,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:07,160 INFO L85 PathProgramCache]: Analyzing trace with hash 775842814, now seen corresponding path program 1 times [2021-10-28 08:37:07,160 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:07,160 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742169109] [2021-10-28 08:37:07,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:07,161 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:07,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:07,198 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:07,199 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:07,199 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742169109] [2021-10-28 08:37:07,199 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [742169109] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:07,199 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1018922030] [2021-10-28 08:37:07,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:07,200 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:07,200 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:07,202 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:07,241 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2021-10-28 08:37:07,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:07,356 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 3 conjunts are in the unsatisfiable core [2021-10-28 08:37:07,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:07,450 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:07,450 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1018922030] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:07,450 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:07,451 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 4 [2021-10-28 08:37:07,451 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1974735078] [2021-10-28 08:37:07,533 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:07,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:37:07,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:37:07,534 INFO L87 Difference]: Start difference. First operand 46 states and 55 transitions. cyclomatic complexity: 14 Second operand has 5 states, 4 states have (on average 3.75) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:07,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:07,619 INFO L93 Difference]: Finished difference Result 58 states and 67 transitions. [2021-10-28 08:37:07,620 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:37:07,620 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 67 transitions. [2021-10-28 08:37:07,621 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:07,622 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 58 states and 67 transitions. [2021-10-28 08:37:07,622 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 38 [2021-10-28 08:37:07,622 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 38 [2021-10-28 08:37:07,622 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 67 transitions. [2021-10-28 08:37:07,623 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:07,623 INFO L681 BuchiCegarLoop]: Abstraction has 58 states and 67 transitions. [2021-10-28 08:37:07,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 67 transitions. [2021-10-28 08:37:07,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 55. [2021-10-28 08:37:07,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.1636363636363636) internal successors, (64), 54 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:07,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 64 transitions. [2021-10-28 08:37:07,628 INFO L704 BuchiCegarLoop]: Abstraction has 55 states and 64 transitions. [2021-10-28 08:37:07,628 INFO L587 BuchiCegarLoop]: Abstraction has 55 states and 64 transitions. [2021-10-28 08:37:07,628 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-10-28 08:37:07,628 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 64 transitions. [2021-10-28 08:37:07,629 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:07,629 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:07,629 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:07,630 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 2, 2, 1, 1, 1, 1, 1] [2021-10-28 08:37:07,631 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:07,631 INFO L791 eck$LassoCheckResult]: Stem: 1560#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 1561#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 1574#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1575#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1576#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1577#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1611#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1609#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1608#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1607#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1606#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1605#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1604#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1602#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1601#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1600#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1599#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1598#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1595#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1594#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1591#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1590#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1589#L17-3 assume !(init_nondet_~i~0 < 10); 1566#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 1567#L28-3 assume !!(rangesum_~i~1 < 10); 1603#L29 assume !(rangesum_~i~1 > 5); 1570#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1571#L28-3 assume !!(rangesum_~i~1 < 10); 1568#L29 assume !(rangesum_~i~1 > 5); 1569#L28-2 [2021-10-28 08:37:07,631 INFO L793 eck$LassoCheckResult]: Loop: 1569#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1596#L28-3 assume !!(rangesum_~i~1 < 10); 1597#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 1569#L28-2 [2021-10-28 08:37:07,632 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:07,632 INFO L85 PathProgramCache]: Analyzing trace with hash 775842816, now seen corresponding path program 1 times [2021-10-28 08:37:07,632 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:07,632 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885737486] [2021-10-28 08:37:07,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:07,633 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:07,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,648 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:07,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,667 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:07,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:07,668 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 13 times [2021-10-28 08:37:07,668 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:07,669 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679965661] [2021-10-28 08:37:07,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:07,669 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:07,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,673 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:07,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:07,677 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:07,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:07,678 INFO L85 PathProgramCache]: Analyzing trace with hash 1914342242, now seen corresponding path program 2 times [2021-10-28 08:37:07,678 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:07,679 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139786563] [2021-10-28 08:37:07,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:07,679 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:07,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:07,724 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:07,724 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:07,724 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139786563] [2021-10-28 08:37:07,724 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2139786563] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:07,725 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [5750089] [2021-10-28 08:37:07,725 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 08:37:07,725 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:07,725 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:07,727 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:07,755 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2021-10-28 08:37:07,885 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 08:37:07,886 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:07,887 INFO L263 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 08:37:07,889 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:07,998 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:07,999 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [5750089] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:07,999 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:07,999 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2021-10-28 08:37:07,999 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724702912] [2021-10-28 08:37:08,075 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:08,076 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:37:08,076 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:37:08,076 INFO L87 Difference]: Start difference. First operand 55 states and 64 transitions. cyclomatic complexity: 14 Second operand has 6 states, 5 states have (on average 3.6) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:08,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:08,151 INFO L93 Difference]: Finished difference Result 67 states and 76 transitions. [2021-10-28 08:37:08,152 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:37:08,152 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 76 transitions. [2021-10-28 08:37:08,153 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:08,154 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 67 states and 76 transitions. [2021-10-28 08:37:08,154 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 47 [2021-10-28 08:37:08,154 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 47 [2021-10-28 08:37:08,154 INFO L73 IsDeterministic]: Start isDeterministic. Operand 67 states and 76 transitions. [2021-10-28 08:37:08,154 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:08,155 INFO L681 BuchiCegarLoop]: Abstraction has 67 states and 76 transitions. [2021-10-28 08:37:08,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states and 76 transitions. [2021-10-28 08:37:08,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 64. [2021-10-28 08:37:08,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.140625) internal successors, (73), 63 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:08,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 73 transitions. [2021-10-28 08:37:08,159 INFO L704 BuchiCegarLoop]: Abstraction has 64 states and 73 transitions. [2021-10-28 08:37:08,159 INFO L587 BuchiCegarLoop]: Abstraction has 64 states and 73 transitions. [2021-10-28 08:37:08,159 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-10-28 08:37:08,159 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 73 transitions. [2021-10-28 08:37:08,159 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:08,160 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:08,160 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:08,161 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 3, 3, 2, 1, 1, 1, 1] [2021-10-28 08:37:08,161 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:08,161 INFO L791 eck$LassoCheckResult]: Stem: 1786#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 1787#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 1800#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1801#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1802#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1803#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1837#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1836#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1835#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1834#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1833#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1832#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1831#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1830#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1829#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1828#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1827#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1826#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1825#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1824#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1823#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 1817#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 1816#L17-3 assume !(init_nondet_~i~0 < 10); 1792#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 1793#L28-3 assume !!(rangesum_~i~1 < 10); 1838#L29 assume !(rangesum_~i~1 > 5); 1796#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1797#L28-3 assume !!(rangesum_~i~1 < 10); 1844#L29 assume !(rangesum_~i~1 > 5); 1843#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1811#L28-3 assume !!(rangesum_~i~1 < 10); 1794#L29 assume !(rangesum_~i~1 > 5); 1795#L28-2 [2021-10-28 08:37:08,161 INFO L793 eck$LassoCheckResult]: Loop: 1795#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 1820#L28-3 assume !!(rangesum_~i~1 < 10); 1821#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 1795#L28-2 [2021-10-28 08:37:08,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:08,162 INFO L85 PathProgramCache]: Analyzing trace with hash 1914342244, now seen corresponding path program 2 times [2021-10-28 08:37:08,162 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:08,162 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642036114] [2021-10-28 08:37:08,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:08,162 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:08,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,192 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:08,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,214 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:08,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:08,215 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 14 times [2021-10-28 08:37:08,215 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:08,215 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471050224] [2021-10-28 08:37:08,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:08,241 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:08,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,246 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:08,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,250 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:08,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:08,251 INFO L85 PathProgramCache]: Analyzing trace with hash 1594065278, now seen corresponding path program 3 times [2021-10-28 08:37:08,251 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:08,251 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209340488] [2021-10-28 08:37:08,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:08,252 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:08,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:08,319 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:08,320 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:08,320 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209340488] [2021-10-28 08:37:08,320 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [209340488] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:08,320 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [50017172] [2021-10-28 08:37:08,320 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 08:37:08,320 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:08,321 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:08,323 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:08,344 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2021-10-28 08:37:08,467 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2021-10-28 08:37:08,467 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:08,468 INFO L263 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 5 conjunts are in the unsatisfiable core [2021-10-28 08:37:08,470 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:08,597 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:08,597 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [50017172] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:08,597 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:08,597 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2021-10-28 08:37:08,598 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [146480292] [2021-10-28 08:37:08,668 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:08,669 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 08:37:08,669 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:37:08,669 INFO L87 Difference]: Start difference. First operand 64 states and 73 transitions. cyclomatic complexity: 14 Second operand has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:08,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:08,783 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2021-10-28 08:37:08,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:37:08,784 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 76 states and 85 transitions. [2021-10-28 08:37:08,786 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:08,787 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 76 states to 76 states and 85 transitions. [2021-10-28 08:37:08,787 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2021-10-28 08:37:08,787 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2021-10-28 08:37:08,787 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 85 transitions. [2021-10-28 08:37:08,788 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:08,788 INFO L681 BuchiCegarLoop]: Abstraction has 76 states and 85 transitions. [2021-10-28 08:37:08,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 85 transitions. [2021-10-28 08:37:08,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 73. [2021-10-28 08:37:08,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.1232876712328768) internal successors, (82), 72 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:08,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 82 transitions. [2021-10-28 08:37:08,793 INFO L704 BuchiCegarLoop]: Abstraction has 73 states and 82 transitions. [2021-10-28 08:37:08,794 INFO L587 BuchiCegarLoop]: Abstraction has 73 states and 82 transitions. [2021-10-28 08:37:08,794 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-10-28 08:37:08,794 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 82 transitions. [2021-10-28 08:37:08,795 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:08,795 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:08,795 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:08,796 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 3, 1, 1, 1, 1] [2021-10-28 08:37:08,797 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:08,797 INFO L791 eck$LassoCheckResult]: Stem: 2040#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 2041#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 2053#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2054#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2055#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2056#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2090#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2089#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2088#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2087#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2086#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2085#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2084#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2083#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2082#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2081#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2080#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2079#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2078#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2077#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2076#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2069#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2068#L17-3 assume !(init_nondet_~i~0 < 10); 2046#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 2047#L28-3 assume !!(rangesum_~i~1 < 10); 2097#L29 assume !(rangesum_~i~1 > 5); 2050#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2051#L28-3 assume !!(rangesum_~i~1 < 10); 2048#L29 assume !(rangesum_~i~1 > 5); 2049#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2095#L28-3 assume !!(rangesum_~i~1 < 10); 2094#L29 assume !(rangesum_~i~1 > 5); 2093#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2092#L28-3 assume !!(rangesum_~i~1 < 10); 2091#L29 assume !(rangesum_~i~1 > 5); 2075#L28-2 [2021-10-28 08:37:08,797 INFO L793 eck$LassoCheckResult]: Loop: 2075#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2072#L28-3 assume !!(rangesum_~i~1 < 10); 2073#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 2075#L28-2 [2021-10-28 08:37:08,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:08,798 INFO L85 PathProgramCache]: Analyzing trace with hash 1594065280, now seen corresponding path program 3 times [2021-10-28 08:37:08,798 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:08,798 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805667324] [2021-10-28 08:37:08,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:08,799 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:08,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,814 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:08,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,835 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:08,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:08,836 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 15 times [2021-10-28 08:37:08,836 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:08,836 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307963514] [2021-10-28 08:37:08,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:08,837 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:08,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,841 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:08,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:08,845 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:08,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:08,846 INFO L85 PathProgramCache]: Analyzing trace with hash -654604830, now seen corresponding path program 4 times [2021-10-28 08:37:08,846 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:08,846 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411272741] [2021-10-28 08:37:08,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:08,847 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:08,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:08,907 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:08,907 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:08,908 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411272741] [2021-10-28 08:37:08,908 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1411272741] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:08,908 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1530795215] [2021-10-28 08:37:08,908 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 08:37:08,909 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:08,909 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:08,915 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:08,916 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2021-10-28 08:37:09,074 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 08:37:09,075 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:09,076 INFO L263 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 08:37:09,078 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:09,196 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:09,197 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1530795215] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:09,197 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:09,197 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2021-10-28 08:37:09,197 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [689007732] [2021-10-28 08:37:09,290 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:09,291 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 08:37:09,291 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2021-10-28 08:37:09,291 INFO L87 Difference]: Start difference. First operand 73 states and 82 transitions. cyclomatic complexity: 14 Second operand has 8 states, 7 states have (on average 3.4285714285714284) internal successors, (24), 8 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:09,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:09,442 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2021-10-28 08:37:09,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:37:09,443 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 94 transitions. [2021-10-28 08:37:09,444 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:09,446 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 85 states and 94 transitions. [2021-10-28 08:37:09,446 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2021-10-28 08:37:09,446 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2021-10-28 08:37:09,446 INFO L73 IsDeterministic]: Start isDeterministic. Operand 85 states and 94 transitions. [2021-10-28 08:37:09,447 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:09,447 INFO L681 BuchiCegarLoop]: Abstraction has 85 states and 94 transitions. [2021-10-28 08:37:09,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states and 94 transitions. [2021-10-28 08:37:09,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 82. [2021-10-28 08:37:09,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.1097560975609757) internal successors, (91), 81 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:09,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 91 transitions. [2021-10-28 08:37:09,453 INFO L704 BuchiCegarLoop]: Abstraction has 82 states and 91 transitions. [2021-10-28 08:37:09,453 INFO L587 BuchiCegarLoop]: Abstraction has 82 states and 91 transitions. [2021-10-28 08:37:09,453 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-10-28 08:37:09,453 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 91 transitions. [2021-10-28 08:37:09,455 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:09,455 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:09,455 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:09,462 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 5, 5, 4, 1, 1, 1, 1] [2021-10-28 08:37:09,463 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:09,463 INFO L791 eck$LassoCheckResult]: Stem: 2322#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 2323#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 2335#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2336#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2337#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2338#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2373#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2372#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2371#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2370#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2369#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2368#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2367#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2366#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2365#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2364#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2363#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2362#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2361#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2360#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2359#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2352#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2351#L17-3 assume !(init_nondet_~i~0 < 10); 2328#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 2329#L28-3 assume !!(rangesum_~i~1 < 10); 2383#L29 assume !(rangesum_~i~1 > 5); 2333#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2334#L28-3 assume !!(rangesum_~i~1 < 10); 2330#L29 assume !(rangesum_~i~1 > 5); 2331#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2381#L28-3 assume !!(rangesum_~i~1 < 10); 2380#L29 assume !(rangesum_~i~1 > 5); 2379#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2378#L28-3 assume !!(rangesum_~i~1 < 10); 2377#L29 assume !(rangesum_~i~1 > 5); 2376#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2375#L28-3 assume !!(rangesum_~i~1 < 10); 2374#L29 assume !(rangesum_~i~1 > 5); 2358#L28-2 [2021-10-28 08:37:09,466 INFO L793 eck$LassoCheckResult]: Loop: 2358#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2355#L28-3 assume !!(rangesum_~i~1 < 10); 2356#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 2358#L28-2 [2021-10-28 08:37:09,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:09,467 INFO L85 PathProgramCache]: Analyzing trace with hash -654604828, now seen corresponding path program 4 times [2021-10-28 08:37:09,467 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:09,468 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235837263] [2021-10-28 08:37:09,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:09,468 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:09,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:09,492 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:09,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:09,519 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:09,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:09,520 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 16 times [2021-10-28 08:37:09,520 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:09,520 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935680920] [2021-10-28 08:37:09,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:09,520 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:09,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:09,531 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:09,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:09,536 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:09,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:09,537 INFO L85 PathProgramCache]: Analyzing trace with hash 2114090750, now seen corresponding path program 5 times [2021-10-28 08:37:09,537 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:09,537 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1604166573] [2021-10-28 08:37:09,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:09,538 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:09,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:09,634 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:09,635 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:09,635 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1604166573] [2021-10-28 08:37:09,635 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1604166573] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:09,636 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1984701002] [2021-10-28 08:37:09,636 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 08:37:09,636 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:09,636 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:09,639 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:09,675 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2021-10-28 08:37:09,900 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2021-10-28 08:37:09,900 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:09,902 INFO L263 TraceCheckSpWp]: Trace formula consists of 168 conjuncts, 7 conjunts are in the unsatisfiable core [2021-10-28 08:37:09,905 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:10,050 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-10-28 08:37:10,051 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1984701002] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:10,051 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:37:10,051 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2021-10-28 08:37:10,052 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [415077717] [2021-10-28 08:37:10,120 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:10,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-10-28 08:37:10,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2021-10-28 08:37:10,122 INFO L87 Difference]: Start difference. First operand 82 states and 91 transitions. cyclomatic complexity: 14 Second operand has 9 states, 8 states have (on average 3.375) internal successors, (27), 9 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:10,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:10,249 INFO L93 Difference]: Finished difference Result 94 states and 103 transitions. [2021-10-28 08:37:10,250 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-10-28 08:37:10,250 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 103 transitions. [2021-10-28 08:37:10,252 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 14 [2021-10-28 08:37:10,253 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 94 states and 103 transitions. [2021-10-28 08:37:10,253 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 74 [2021-10-28 08:37:10,253 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 74 [2021-10-28 08:37:10,253 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 103 transitions. [2021-10-28 08:37:10,253 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 08:37:10,253 INFO L681 BuchiCegarLoop]: Abstraction has 94 states and 103 transitions. [2021-10-28 08:37:10,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 103 transitions. [2021-10-28 08:37:10,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 91. [2021-10-28 08:37:10,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.098901098901099) internal successors, (100), 90 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:10,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2021-10-28 08:37:10,258 INFO L704 BuchiCegarLoop]: Abstraction has 91 states and 100 transitions. [2021-10-28 08:37:10,258 INFO L587 BuchiCegarLoop]: Abstraction has 91 states and 100 transitions. [2021-10-28 08:37:10,258 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-10-28 08:37:10,258 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 100 transitions. [2021-10-28 08:37:10,265 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:10,265 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:10,265 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:10,269 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 5, 1, 1, 1, 1] [2021-10-28 08:37:10,269 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:10,270 INFO L791 eck$LassoCheckResult]: Stem: 2632#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 2633#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 2645#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2646#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2647#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2648#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2682#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2681#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2680#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2679#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2678#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2677#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2676#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2675#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2674#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2673#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2672#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2671#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2670#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2667#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2662#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 2661#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 2660#L17-3 assume !(init_nondet_~i~0 < 10); 2638#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 2639#L28-3 assume !!(rangesum_~i~1 < 10); 2706#L29 assume !(rangesum_~i~1 > 5); 2642#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2643#L28-3 assume !!(rangesum_~i~1 < 10); 2640#L29 assume !(rangesum_~i~1 > 5); 2641#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2705#L28-3 assume !!(rangesum_~i~1 < 10); 2704#L29 assume !(rangesum_~i~1 > 5); 2703#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2702#L28-3 assume !!(rangesum_~i~1 < 10); 2701#L29 assume !(rangesum_~i~1 > 5); 2700#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2699#L28-3 assume !!(rangesum_~i~1 < 10); 2698#L29 assume !(rangesum_~i~1 > 5); 2697#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2696#L28-3 assume !!(rangesum_~i~1 < 10); 2695#L29 assume !(rangesum_~i~1 > 5); 2669#L28-2 [2021-10-28 08:37:10,271 INFO L793 eck$LassoCheckResult]: Loop: 2669#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 2665#L28-3 assume !!(rangesum_~i~1 < 10); 2666#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 2669#L28-2 [2021-10-28 08:37:10,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:10,272 INFO L85 PathProgramCache]: Analyzing trace with hash 2114090752, now seen corresponding path program 5 times [2021-10-28 08:37:10,272 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:10,273 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529573053] [2021-10-28 08:37:10,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:10,273 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:10,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:10,290 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:10,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:10,319 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:10,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:10,320 INFO L85 PathProgramCache]: Analyzing trace with hash 60353, now seen corresponding path program 17 times [2021-10-28 08:37:10,321 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:10,321 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16951137] [2021-10-28 08:37:10,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:10,321 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:10,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:10,326 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:10,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:10,329 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:10,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:10,330 INFO L85 PathProgramCache]: Analyzing trace with hash -522805150, now seen corresponding path program 6 times [2021-10-28 08:37:10,330 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:10,330 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036023302] [2021-10-28 08:37:10,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:10,331 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:10,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:10,360 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:10,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:10,389 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:20,591 WARN L207 SmtUtils]: Spent 10.12 s on a formula simplification. DAG size of input: 296 DAG size of output: 212 [2021-10-28 08:37:21,989 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 08:37:21,989 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 08:37:21,989 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 08:37:21,989 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 08:37:21,989 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 08:37:21,989 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:21,990 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 08:37:21,990 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 08:37:21,990 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration18_Lasso [2021-10-28 08:37:21,990 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 08:37:21,990 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 08:37:21,996 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,602 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,604 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,607 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,610 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,613 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,616 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,619 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,621 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,624 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,626 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,628 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,631 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,634 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,637 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,639 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,642 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,644 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,647 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,649 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,652 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,654 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,657 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:22,660 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:23,095 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 08:37:23,096 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 08:37:23,096 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,096 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,114 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,116 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2021-10-28 08:37:23,128 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,128 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,128 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,128 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,145 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,146 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,161 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,208 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,208 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,208 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,209 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,221 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,233 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,233 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,233 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,233 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,237 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,238 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,241 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2021-10-28 08:37:23,255 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,293 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,293 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,294 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,295 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,305 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,316 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,316 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,316 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,317 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,320 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,320 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,325 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2021-10-28 08:37:23,337 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,383 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,384 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,385 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,397 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2021-10-28 08:37:23,398 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,409 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,409 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,409 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,409 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,411 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,412 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,433 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,479 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,479 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,479 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,481 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,486 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,497 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,497 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,497 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,497 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,499 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,500 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,501 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2021-10-28 08:37:23,503 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,527 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,527 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,527 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,528 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,529 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2021-10-28 08:37:23,530 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,540 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,540 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,540 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,540 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,542 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,543 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,545 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,575 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,575 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,575 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,580 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,634 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2021-10-28 08:37:23,637 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,649 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,649 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,650 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,650 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,660 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,660 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,674 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,722 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,722 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,723 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,724 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,727 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,739 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,739 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,740 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,740 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,742 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,742 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,748 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2021-10-28 08:37:23,751 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,798 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,798 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,798 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,800 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,802 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,814 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,814 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 08:37:23,814 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,814 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,814 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,815 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 08:37:23,815 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 08:37:23,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2021-10-28 08:37:23,827 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,863 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,864 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,864 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,865 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,866 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2021-10-28 08:37:23,867 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,876 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,876 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,877 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,877 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,882 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,882 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,895 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 08:37:23,919 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:23,919 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:23,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:23,924 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:23,925 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2021-10-28 08:37:23,926 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:23,935 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:23,935 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:23,935 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:23,936 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:23,943 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 08:37:23,944 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 08:37:23,958 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 08:37:24,014 INFO L443 ModelExtractionUtils]: Simplification made 20 calls to the SMT solver. [2021-10-28 08:37:24,014 INFO L444 ModelExtractionUtils]: 16 out of 34 variables were initially zero. Simplification set additionally 15 variables to zero. [2021-10-28 08:37:24,014 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:24,015 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:24,015 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:24,016 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2021-10-28 08:37:24,017 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 08:37:24,027 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-10-28 08:37:24,027 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 08:37:24,027 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1) = -2*ULTIMATE.start_rangesum_~i~1 + 17 Supporting invariants [] [2021-10-28 08:37:24,052 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:24,096 INFO L297 tatePredicateManager]: 15 out of 15 supporting invariants were superfluous and have been removed [2021-10-28 08:37:24,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:24,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:24,139 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 08:37:24,141 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:24,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:24,289 INFO L263 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 08:37:24,289 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:24,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:24,340 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2021-10-28 08:37:24,341 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14 Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:24,376 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 91 states and 100 transitions. cyclomatic complexity: 14. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 104 states and 116 transitions. Complement of second has 7 states. [2021-10-28 08:37:24,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-10-28 08:37:24,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:24,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 16 transitions. [2021-10-28 08:37:24,377 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 3 letters. [2021-10-28 08:37:24,379 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:24,379 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 44 letters. Loop has 3 letters. [2021-10-28 08:37:24,379 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:24,379 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 41 letters. Loop has 6 letters. [2021-10-28 08:37:24,380 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:24,380 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 104 states and 116 transitions. [2021-10-28 08:37:24,381 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2021-10-28 08:37:24,382 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 104 states to 93 states and 104 transitions. [2021-10-28 08:37:24,382 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 55 [2021-10-28 08:37:24,382 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2021-10-28 08:37:24,382 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 104 transitions. [2021-10-28 08:37:24,382 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:24,382 INFO L681 BuchiCegarLoop]: Abstraction has 93 states and 104 transitions. [2021-10-28 08:37:24,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 104 transitions. [2021-10-28 08:37:24,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2021-10-28 08:37:24,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.118279569892473) internal successors, (104), 92 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:24,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 104 transitions. [2021-10-28 08:37:24,387 INFO L704 BuchiCegarLoop]: Abstraction has 93 states and 104 transitions. [2021-10-28 08:37:24,387 INFO L587 BuchiCegarLoop]: Abstraction has 93 states and 104 transitions. [2021-10-28 08:37:24,387 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-10-28 08:37:24,387 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 104 transitions. [2021-10-28 08:37:24,388 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2021-10-28 08:37:24,388 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:24,389 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:24,390 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 6, 6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:24,390 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:24,391 INFO L791 eck$LassoCheckResult]: Stem: 3044#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 3045#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 3060#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3061#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3062#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3063#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3070#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3120#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3119#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3118#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3117#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3116#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3115#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3114#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3113#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3112#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3111#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3110#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3109#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3108#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3107#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3077#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3076#L17-3 assume !(init_nondet_~i~0 < 10); 3050#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 3051#L28-3 assume !!(rangesum_~i~1 < 10); 3052#L29 assume !(rangesum_~i~1 > 5); 3053#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3056#L28-3 assume !!(rangesum_~i~1 < 10); 3101#L29 assume !(rangesum_~i~1 > 5); 3057#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3058#L28-3 assume !!(rangesum_~i~1 < 10); 3054#L29 assume !(rangesum_~i~1 > 5); 3055#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3098#L28-3 assume !!(rangesum_~i~1 < 10); 3096#L29 assume !(rangesum_~i~1 > 5); 3094#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3092#L28-3 assume !!(rangesum_~i~1 < 10); 3090#L29 assume !(rangesum_~i~1 > 5); 3088#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3086#L28-3 assume !!(rangesum_~i~1 < 10); 3083#L29 assume !(rangesum_~i~1 > 5); 3078#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3072#L28-3 assume !(rangesum_~i~1 < 10); 3073#L28-4 assume !(0 != rangesum_~cnt~0);rangesum_#res := 0; 3066#L37 main_#t~ret7 := rangesum_#res;main_~ret~1 := main_#t~ret7;havoc main_#t~ret7;call main_#t~mem8 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem8;havoc main_#t~mem8;call main_#t~mem9 := read~int(main_~#x~0.base, 4 + main_~#x~0.offset, 4);call write~int(main_#t~mem9, main_~#x~0.base, main_~#x~0.offset, 4);havoc main_#t~mem9;call write~int(main_~temp~0, main_~#x~0.base, 4 + main_~#x~0.offset, 4);rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 3048#L28-8 assume !!(rangesum_~i~1 < 10); 3049#L29-2 assume !(rangesum_~i~1 > 5); 3064#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3065#L28-8 assume !!(rangesum_~i~1 < 10); 3106#L29-2 assume !(rangesum_~i~1 > 5); 3105#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3104#L28-8 assume !!(rangesum_~i~1 < 10); 3103#L29-2 assume !(rangesum_~i~1 > 5); 3102#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3100#L28-8 assume !!(rangesum_~i~1 < 10); 3099#L29-2 assume !(rangesum_~i~1 > 5); 3097#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3095#L28-8 assume !!(rangesum_~i~1 < 10); 3093#L29-2 assume !(rangesum_~i~1 > 5); 3091#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3089#L28-8 assume !!(rangesum_~i~1 < 10); 3087#L29-2 assume !(rangesum_~i~1 > 5); 3084#L28-7 [2021-10-28 08:37:24,391 INFO L793 eck$LassoCheckResult]: Loop: 3084#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3079#L28-8 assume !!(rangesum_~i~1 < 10); 3080#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 3084#L28-7 [2021-10-28 08:37:24,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:24,392 INFO L85 PathProgramCache]: Analyzing trace with hash -365260545, now seen corresponding path program 1 times [2021-10-28 08:37:24,392 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:24,392 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821660475] [2021-10-28 08:37:24,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:24,392 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:24,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:24,440 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2021-10-28 08:37:24,441 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:24,441 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821660475] [2021-10-28 08:37:24,441 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1821660475] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:37:24,441 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:37:24,441 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:37:24,442 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1354379177] [2021-10-28 08:37:24,442 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:24,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:24,443 INFO L85 PathProgramCache]: Analyzing trace with hash 85178, now seen corresponding path program 1 times [2021-10-28 08:37:24,443 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:24,443 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1530033854] [2021-10-28 08:37:24,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:24,444 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:24,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:24,448 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:24,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:24,451 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:24,529 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:24,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:37:24,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:37:24,530 INFO L87 Difference]: Start difference. First operand 93 states and 104 transitions. cyclomatic complexity: 16 Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:24,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:24,588 INFO L93 Difference]: Finished difference Result 108 states and 123 transitions. [2021-10-28 08:37:24,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:37:24,589 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 108 states and 123 transitions. [2021-10-28 08:37:24,590 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2021-10-28 08:37:24,591 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 108 states to 106 states and 119 transitions. [2021-10-28 08:37:24,592 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2021-10-28 08:37:24,592 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2021-10-28 08:37:24,592 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 119 transitions. [2021-10-28 08:37:24,592 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:24,593 INFO L681 BuchiCegarLoop]: Abstraction has 106 states and 119 transitions. [2021-10-28 08:37:24,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 119 transitions. [2021-10-28 08:37:24,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 95. [2021-10-28 08:37:24,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.0947368421052632) internal successors, (104), 94 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:24,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 104 transitions. [2021-10-28 08:37:24,596 INFO L704 BuchiCegarLoop]: Abstraction has 95 states and 104 transitions. [2021-10-28 08:37:24,597 INFO L587 BuchiCegarLoop]: Abstraction has 95 states and 104 transitions. [2021-10-28 08:37:24,597 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-10-28 08:37:24,597 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 104 transitions. [2021-10-28 08:37:24,598 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 10 [2021-10-28 08:37:24,598 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:24,598 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:24,599 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:24,599 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:24,600 INFO L791 eck$LassoCheckResult]: Stem: 3252#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 3253#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 3268#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3269#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3270#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3271#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3304#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3303#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3302#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3301#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3300#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3299#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3298#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3297#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3296#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3295#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3294#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3293#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3292#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3291#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3290#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 3285#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 3284#L17-3 assume !(init_nondet_~i~0 < 10); 3258#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 3259#L28-3 assume !!(rangesum_~i~1 < 10); 3260#L29 assume !(rangesum_~i~1 > 5); 3261#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3264#L28-3 assume !!(rangesum_~i~1 < 10); 3330#L29 assume !(rangesum_~i~1 > 5); 3265#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3266#L28-3 assume !!(rangesum_~i~1 < 10); 3262#L29 assume !(rangesum_~i~1 > 5); 3263#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3329#L28-3 assume !!(rangesum_~i~1 < 10); 3328#L29 assume !(rangesum_~i~1 > 5); 3327#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3326#L28-3 assume !!(rangesum_~i~1 < 10); 3325#L29 assume !(rangesum_~i~1 > 5); 3324#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3323#L28-3 assume !!(rangesum_~i~1 < 10); 3322#L29 assume !(rangesum_~i~1 > 5); 3307#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3321#L28-3 assume !!(rangesum_~i~1 < 10); 3306#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 3286#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3279#L28-3 assume !(rangesum_~i~1 < 10); 3280#L28-4 assume !(0 != rangesum_~cnt~0);rangesum_#res := 0; 3273#L37 main_#t~ret7 := rangesum_#res;main_~ret~1 := main_#t~ret7;havoc main_#t~ret7;call main_#t~mem8 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem8;havoc main_#t~mem8;call main_#t~mem9 := read~int(main_~#x~0.base, 4 + main_~#x~0.offset, 4);call write~int(main_#t~mem9, main_~#x~0.base, main_~#x~0.offset, 4);havoc main_#t~mem9;call write~int(main_~temp~0, main_~#x~0.base, 4 + main_~#x~0.offset, 4);rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 3274#L28-8 assume !!(rangesum_~i~1 < 10); 3283#L29-2 assume !(rangesum_~i~1 > 5); 3272#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3256#L28-8 assume !!(rangesum_~i~1 < 10); 3257#L29-2 assume !(rangesum_~i~1 > 5); 3320#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3319#L28-8 assume !!(rangesum_~i~1 < 10); 3318#L29-2 assume !(rangesum_~i~1 > 5); 3317#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3316#L28-8 assume !!(rangesum_~i~1 < 10); 3315#L29-2 assume !(rangesum_~i~1 > 5); 3314#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3313#L28-8 assume !!(rangesum_~i~1 < 10); 3312#L29-2 assume !(rangesum_~i~1 > 5); 3311#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3310#L28-8 assume !!(rangesum_~i~1 < 10); 3309#L29-2 assume !(rangesum_~i~1 > 5); 3305#L28-7 [2021-10-28 08:37:24,600 INFO L793 eck$LassoCheckResult]: Loop: 3305#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 3308#L28-8 assume !!(rangesum_~i~1 < 10); 3288#L29-2 assume !(rangesum_~i~1 > 5); 3305#L28-7 [2021-10-28 08:37:24,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:24,601 INFO L85 PathProgramCache]: Analyzing trace with hash 1039890653, now seen corresponding path program 1 times [2021-10-28 08:37:24,601 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:24,601 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1364465364] [2021-10-28 08:37:24,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:24,602 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:24,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:24,651 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2021-10-28 08:37:24,651 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:24,652 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1364465364] [2021-10-28 08:37:24,652 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1364465364] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:24,652 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1945112886] [2021-10-28 08:37:24,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:24,652 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:24,653 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:24,654 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:24,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2021-10-28 08:37:24,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:24,901 INFO L263 TraceCheckSpWp]: Trace formula consists of 226 conjuncts, 3 conjunts are in the unsatisfiable core [2021-10-28 08:37:24,904 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:25,102 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2021-10-28 08:37:25,105 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1945112886] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:37:25,105 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 08:37:25,105 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 5 [2021-10-28 08:37:25,105 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443943632] [2021-10-28 08:37:25,105 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:25,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:25,106 INFO L85 PathProgramCache]: Analyzing trace with hash 85180, now seen corresponding path program 1 times [2021-10-28 08:37:25,106 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:25,106 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19023293] [2021-10-28 08:37:25,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:25,106 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:25,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:25,110 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:25,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:25,113 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:25,133 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 08:37:25,133 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 08:37:25,134 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 08:37:25,134 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 08:37:25,134 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-10-28 08:37:25,134 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:25,134 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 08:37:25,134 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 08:37:25,134 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration20_Loop [2021-10-28 08:37:25,134 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 08:37:25,134 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 08:37:25,135 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:25,141 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:25,162 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 08:37:25,164 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-10-28 08:37:25,165 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:25,166 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:25,168 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:25,191 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 08:37:25,191 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 08:37:25,191 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2021-10-28 08:37:25,240 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2021-10-28 08:37:25,241 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:25,241 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:25,242 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:25,244 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2021-10-28 08:37:25,245 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-10-28 08:37:25,245 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 08:37:25,356 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-10-28 08:37:25,359 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Ended with exit code 0 [2021-10-28 08:37:25,359 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 08:37:25,359 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 08:37:25,359 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 08:37:25,359 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 08:37:25,360 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 08:37:25,360 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:25,360 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 08:37:25,360 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 08:37:25,360 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration20_Loop [2021-10-28 08:37:25,360 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 08:37:25,360 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 08:37:25,361 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:25,371 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:37:25,400 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 08:37:25,401 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 08:37:25,401 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:25,401 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:25,402 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:25,407 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 08:37:25,418 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 08:37:25,418 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 08:37:25,419 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 08:37:25,419 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 08:37:25,419 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 08:37:25,420 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 08:37:25,420 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 08:37:25,423 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2021-10-28 08:37:25,434 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 08:37:25,437 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-10-28 08:37:25,437 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-10-28 08:37:25,437 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:37:25,437 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:25,443 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 08:37:25,447 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 08:37:25,448 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-10-28 08:37:25,448 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 08:37:25,448 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_rangesum_~i~1) = -2*ULTIMATE.start_rangesum_~i~1 + 9 Supporting invariants [] [2021-10-28 08:37:25,473 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2021-10-28 08:37:25,491 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:25,492 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-10-28 08:37:25,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:25,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:25,553 INFO L263 TraceCheckSpWp]: Trace formula consists of 226 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 08:37:25,555 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:25,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:25,799 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 08:37:25,800 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:25,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:37:25,822 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-10-28 08:37:25,822 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 95 states and 104 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:25,862 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 95 states and 104 transitions. cyclomatic complexity: 14. Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 114 states and 126 transitions. Complement of second has 5 states. [2021-10-28 08:37:25,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 08:37:25,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:25,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2021-10-28 08:37:25,864 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 65 letters. Loop has 3 letters. [2021-10-28 08:37:25,865 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:25,865 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 68 letters. Loop has 3 letters. [2021-10-28 08:37:25,866 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:25,866 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 65 letters. Loop has 6 letters. [2021-10-28 08:37:25,867 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 08:37:25,867 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 126 transitions. [2021-10-28 08:37:25,868 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2021-10-28 08:37:25,869 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 99 states and 109 transitions. [2021-10-28 08:37:25,869 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 42 [2021-10-28 08:37:25,870 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2021-10-28 08:37:25,870 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 109 transitions. [2021-10-28 08:37:25,870 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:25,870 INFO L681 BuchiCegarLoop]: Abstraction has 99 states and 109 transitions. [2021-10-28 08:37:25,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 109 transitions. [2021-10-28 08:37:25,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 98. [2021-10-28 08:37:25,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.1020408163265305) internal successors, (108), 97 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:25,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2021-10-28 08:37:25,873 INFO L704 BuchiCegarLoop]: Abstraction has 98 states and 108 transitions. [2021-10-28 08:37:25,874 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:25,874 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:37:25,874 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:37:25,879 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:25,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:25,910 INFO L93 Difference]: Finished difference Result 109 states and 122 transitions. [2021-10-28 08:37:25,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:37:25,910 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 109 states and 122 transitions. [2021-10-28 08:37:25,912 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2021-10-28 08:37:25,913 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 109 states to 109 states and 122 transitions. [2021-10-28 08:37:25,913 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2021-10-28 08:37:25,914 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2021-10-28 08:37:25,914 INFO L73 IsDeterministic]: Start isDeterministic. Operand 109 states and 122 transitions. [2021-10-28 08:37:25,914 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:25,914 INFO L681 BuchiCegarLoop]: Abstraction has 109 states and 122 transitions. [2021-10-28 08:37:25,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states and 122 transitions. [2021-10-28 08:37:25,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 98. [2021-10-28 08:37:25,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.0816326530612246) internal successors, (106), 97 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:25,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 106 transitions. [2021-10-28 08:37:25,918 INFO L704 BuchiCegarLoop]: Abstraction has 98 states and 106 transitions. [2021-10-28 08:37:25,918 INFO L587 BuchiCegarLoop]: Abstraction has 98 states and 106 transitions. [2021-10-28 08:37:25,918 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-10-28 08:37:25,918 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 106 transitions. [2021-10-28 08:37:25,919 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2021-10-28 08:37:25,919 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:25,920 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:25,921 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:25,921 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:25,928 INFO L791 eck$LassoCheckResult]: Stem: 4086#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 4087#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 4103#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4104#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4105#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4106#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4143#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4142#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4141#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4140#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4139#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4138#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4137#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4136#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4135#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4134#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4133#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4132#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4129#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4127#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4126#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4123#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4122#L17-3 assume !(init_nondet_~i~0 < 10); 4094#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 4095#L28-3 assume !!(rangesum_~i~1 < 10); 4096#L29 assume !(rangesum_~i~1 > 5); 4097#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4100#L28-3 assume !!(rangesum_~i~1 < 10); 4098#L29 assume !(rangesum_~i~1 > 5); 4099#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4101#L28-3 assume !!(rangesum_~i~1 < 10); 4118#L29 assume !(rangesum_~i~1 > 5); 4156#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4155#L28-3 assume !!(rangesum_~i~1 < 10); 4154#L29 assume !(rangesum_~i~1 > 5); 4153#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4152#L28-3 assume !!(rangesum_~i~1 < 10); 4151#L29 assume !(rangesum_~i~1 > 5); 4150#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4149#L28-3 assume !!(rangesum_~i~1 < 10); 4148#L29 assume !(rangesum_~i~1 > 5); 4131#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4147#L28-3 assume !!(rangesum_~i~1 < 10); 4130#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 4128#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4116#L28-3 assume !(rangesum_~i~1 < 10); 4117#L28-4 assume 0 != rangesum_~cnt~0;rangesum_#res := (if (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 <= 2147483647 then (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 else (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 - 4294967296); 4110#L37 main_#t~ret7 := rangesum_#res;main_~ret~1 := main_#t~ret7;havoc main_#t~ret7;call main_#t~mem8 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem8;havoc main_#t~mem8;call main_#t~mem9 := read~int(main_~#x~0.base, 4 + main_~#x~0.offset, 4);call write~int(main_#t~mem9, main_~#x~0.base, main_~#x~0.offset, 4);havoc main_#t~mem9;call write~int(main_~temp~0, main_~#x~0.base, 4 + main_~#x~0.offset, 4);rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 4111#L28-8 assume !!(rangesum_~i~1 < 10); 4121#L29-2 assume !(rangesum_~i~1 > 5); 4107#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4092#L28-8 assume !!(rangesum_~i~1 < 10); 4093#L29-2 assume !(rangesum_~i~1 > 5); 4108#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4109#L28-8 assume !!(rangesum_~i~1 < 10); 4167#L29-2 assume !(rangesum_~i~1 > 5); 4166#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4165#L28-8 assume !!(rangesum_~i~1 < 10); 4164#L29-2 assume !(rangesum_~i~1 > 5); 4163#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4162#L28-8 assume !!(rangesum_~i~1 < 10); 4159#L29-2 assume !(rangesum_~i~1 > 5); 4160#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4161#L28-8 assume !!(rangesum_~i~1 < 10); 4146#L29-2 assume !(rangesum_~i~1 > 5); 4144#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4090#L28-8 assume !!(rangesum_~i~1 < 10); 4091#L29-2 [2021-10-28 08:37:25,928 INFO L793 eck$LassoCheckResult]: Loop: 4091#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 4125#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4124#L28-8 assume !!(rangesum_~i~1 < 10); 4091#L29-2 [2021-10-28 08:37:25,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:25,929 INFO L85 PathProgramCache]: Analyzing trace with hash -1815162476, now seen corresponding path program 1 times [2021-10-28 08:37:25,930 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:25,930 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413144884] [2021-10-28 08:37:25,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:25,931 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:25,960 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-10-28 08:37:25,960 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [289945538] [2021-10-28 08:37:25,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:25,961 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:25,961 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:25,962 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:25,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2021-10-28 08:37:26,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:26,267 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 08:37:26,269 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:26,566 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2021-10-28 08:37:26,566 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:26,566 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413144884] [2021-10-28 08:37:26,567 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-10-28 08:37:26,567 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [289945538] [2021-10-28 08:37:26,567 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [289945538] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:26,567 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2021-10-28 08:37:26,567 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2021-10-28 08:37:26,568 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490844649] [2021-10-28 08:37:26,569 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:26,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:26,569 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 2 times [2021-10-28 08:37:26,569 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:26,571 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1806876975] [2021-10-28 08:37:26,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:26,571 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:26,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:26,576 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:26,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:26,594 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:26,666 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:26,667 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-28 08:37:26,667 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2021-10-28 08:37:26,667 INFO L87 Difference]: Start difference. First operand 98 states and 106 transitions. cyclomatic complexity: 14 Second operand has 10 states, 10 states have (on average 3.3) internal successors, (33), 10 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:26,808 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:26,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:26,889 INFO L93 Difference]: Finished difference Result 126 states and 141 transitions. [2021-10-28 08:37:26,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 08:37:26,889 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 126 states and 141 transitions. [2021-10-28 08:37:26,891 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2021-10-28 08:37:26,894 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 126 states to 124 states and 139 transitions. [2021-10-28 08:37:26,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2021-10-28 08:37:26,895 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2021-10-28 08:37:26,895 INFO L73 IsDeterministic]: Start isDeterministic. Operand 124 states and 139 transitions. [2021-10-28 08:37:26,895 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:26,895 INFO L681 BuchiCegarLoop]: Abstraction has 124 states and 139 transitions. [2021-10-28 08:37:26,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states and 139 transitions. [2021-10-28 08:37:26,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 104. [2021-10-28 08:37:26,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 104 states have (on average 1.0865384615384615) internal successors, (113), 103 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:26,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 113 transitions. [2021-10-28 08:37:26,900 INFO L704 BuchiCegarLoop]: Abstraction has 104 states and 113 transitions. [2021-10-28 08:37:26,900 INFO L587 BuchiCegarLoop]: Abstraction has 104 states and 113 transitions. [2021-10-28 08:37:26,900 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-10-28 08:37:26,900 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 104 states and 113 transitions. [2021-10-28 08:37:26,901 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2021-10-28 08:37:26,901 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:26,902 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:26,903 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 8, 8, 8, 7, 6, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:26,903 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:26,903 INFO L791 eck$LassoCheckResult]: Stem: 4521#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 4522#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 4539#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4540#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4541#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4542#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4580#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4579#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4578#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4577#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4576#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4575#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4574#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4573#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4572#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4571#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4570#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4569#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4568#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4567#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4566#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 4561#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 4560#L17-3 assume !(init_nondet_~i~0 < 10); 4529#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 4530#L28-3 assume !!(rangesum_~i~1 < 10); 4531#L29 assume !(rangesum_~i~1 > 5); 4532#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4535#L28-3 assume !!(rangesum_~i~1 < 10); 4554#L29 assume !(rangesum_~i~1 > 5); 4536#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4537#L28-3 assume !!(rangesum_~i~1 < 10); 4533#L29 assume !(rangesum_~i~1 > 5); 4534#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4599#L28-3 assume !!(rangesum_~i~1 < 10); 4598#L29 assume !(rangesum_~i~1 > 5); 4597#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4596#L28-3 assume !!(rangesum_~i~1 < 10); 4595#L29 assume !(rangesum_~i~1 > 5); 4594#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4593#L28-3 assume !!(rangesum_~i~1 < 10); 4592#L29 assume !(rangesum_~i~1 > 5); 4585#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4591#L28-3 assume !!(rangesum_~i~1 < 10); 4590#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 4584#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4589#L28-3 assume !!(rangesum_~i~1 < 10); 4583#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 4565#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4552#L28-3 assume !(rangesum_~i~1 < 10); 4553#L28-4 assume 0 != rangesum_~cnt~0;rangesum_#res := (if (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 <= 2147483647 then (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 else (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 - 4294967296); 4546#L37 main_#t~ret7 := rangesum_#res;main_~ret~1 := main_#t~ret7;havoc main_#t~ret7;call main_#t~mem8 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem8;havoc main_#t~mem8;call main_#t~mem9 := read~int(main_~#x~0.base, 4 + main_~#x~0.offset, 4);call write~int(main_#t~mem9, main_~#x~0.base, main_~#x~0.offset, 4);havoc main_#t~mem9;call write~int(main_~temp~0, main_~#x~0.base, 4 + main_~#x~0.offset, 4);rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 4547#L28-8 assume !!(rangesum_~i~1 < 10); 4557#L29-2 assume !(rangesum_~i~1 > 5); 4543#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4544#L28-8 assume !!(rangesum_~i~1 < 10); 4607#L29-2 assume !(rangesum_~i~1 > 5); 4545#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4527#L28-8 assume !!(rangesum_~i~1 < 10); 4528#L29-2 assume !(rangesum_~i~1 > 5); 4602#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4606#L28-8 assume !!(rangesum_~i~1 < 10); 4605#L29-2 assume !(rangesum_~i~1 > 5); 4604#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4603#L28-8 assume !!(rangesum_~i~1 < 10); 4558#L29-2 assume !(rangesum_~i~1 > 5); 4559#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4608#L28-8 assume !!(rangesum_~i~1 < 10); 4588#L29-2 assume !(rangesum_~i~1 > 5); 4586#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4525#L28-8 assume !!(rangesum_~i~1 < 10); 4526#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 4582#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4581#L28-8 assume !!(rangesum_~i~1 < 10); 4563#L29-2 [2021-10-28 08:37:26,904 INFO L793 eck$LassoCheckResult]: Loop: 4563#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 4564#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 4562#L28-8 assume !!(rangesum_~i~1 < 10); 4563#L29-2 [2021-10-28 08:37:26,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:26,904 INFO L85 PathProgramCache]: Analyzing trace with hash 2012858871, now seen corresponding path program 1 times [2021-10-28 08:37:26,904 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:26,905 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335584773] [2021-10-28 08:37:26,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:26,905 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:26,922 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-10-28 08:37:26,922 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1367455426] [2021-10-28 08:37:26,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:26,923 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:26,923 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:26,924 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:26,943 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2021-10-28 08:37:27,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:37:27,233 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 08:37:27,235 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:27,543 INFO L134 CoverageAnalysis]: Checked inductivity of 262 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 170 trivial. 0 not checked. [2021-10-28 08:37:27,543 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:27,543 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [335584773] [2021-10-28 08:37:27,543 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-10-28 08:37:27,543 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1367455426] [2021-10-28 08:37:27,544 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1367455426] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:27,544 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2021-10-28 08:37:27,544 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2021-10-28 08:37:27,544 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [704098459] [2021-10-28 08:37:27,544 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:27,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:27,545 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 3 times [2021-10-28 08:37:27,545 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:27,545 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317363145] [2021-10-28 08:37:27,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:27,545 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:27,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:27,552 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:27,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:27,556 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:27,629 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:27,630 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-28 08:37:27,630 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2021-10-28 08:37:27,630 INFO L87 Difference]: Start difference. First operand 104 states and 113 transitions. cyclomatic complexity: 15 Second operand has 11 states, 11 states have (on average 3.3636363636363638) internal successors, (37), 11 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:27,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:27,845 INFO L93 Difference]: Finished difference Result 138 states and 156 transitions. [2021-10-28 08:37:27,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 08:37:27,845 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 138 states and 156 transitions. [2021-10-28 08:37:27,847 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 18 [2021-10-28 08:37:27,849 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 138 states to 136 states and 154 transitions. [2021-10-28 08:37:27,849 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 62 [2021-10-28 08:37:27,849 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 62 [2021-10-28 08:37:27,849 INFO L73 IsDeterministic]: Start isDeterministic. Operand 136 states and 154 transitions. [2021-10-28 08:37:27,849 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:27,850 INFO L681 BuchiCegarLoop]: Abstraction has 136 states and 154 transitions. [2021-10-28 08:37:27,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states and 154 transitions. [2021-10-28 08:37:27,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 110. [2021-10-28 08:37:27,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.0909090909090908) internal successors, (120), 109 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:27,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 120 transitions. [2021-10-28 08:37:27,856 INFO L704 BuchiCegarLoop]: Abstraction has 110 states and 120 transitions. [2021-10-28 08:37:27,857 INFO L587 BuchiCegarLoop]: Abstraction has 110 states and 120 transitions. [2021-10-28 08:37:27,857 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-10-28 08:37:27,857 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 120 transitions. [2021-10-28 08:37:27,858 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2021-10-28 08:37:27,858 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:27,858 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:27,866 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 9, 9, 9, 8, 6, 6, 3, 2, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:27,866 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:27,867 INFO L791 eck$LassoCheckResult]: Stem: 4993#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 4994#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 5012#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5013#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5014#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5015#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5052#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5051#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5050#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5049#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5048#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5047#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5046#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5045#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5044#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5043#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5042#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5041#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5040#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5039#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5038#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5033#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5032#L17-3 assume !(init_nondet_~i~0 < 10); 5001#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 5002#L28-3 assume !!(rangesum_~i~1 < 10); 5003#L29 assume !(rangesum_~i~1 > 5); 5004#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5007#L28-3 assume !!(rangesum_~i~1 < 10); 5027#L29 assume !(rangesum_~i~1 > 5); 5008#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5009#L28-3 assume !!(rangesum_~i~1 < 10); 5005#L29 assume !(rangesum_~i~1 > 5); 5006#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5078#L28-3 assume !!(rangesum_~i~1 < 10); 5077#L29 assume !(rangesum_~i~1 > 5); 5076#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5075#L28-3 assume !!(rangesum_~i~1 < 10); 5074#L29 assume !(rangesum_~i~1 > 5); 5073#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5072#L28-3 assume !!(rangesum_~i~1 < 10); 5071#L29 assume !(rangesum_~i~1 > 5); 5055#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5070#L28-3 assume !!(rangesum_~i~1 < 10); 5069#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5068#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5067#L28-3 assume !!(rangesum_~i~1 < 10); 5066#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5054#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5058#L28-3 assume !!(rangesum_~i~1 < 10); 5053#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5037#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5025#L28-3 assume !(rangesum_~i~1 < 10); 5026#L28-4 assume 0 != rangesum_~cnt~0;rangesum_#res := (if (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 <= 2147483647 then (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 else (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 - 4294967296); 5019#L37 main_#t~ret7 := rangesum_#res;main_~ret~1 := main_#t~ret7;havoc main_#t~ret7;call main_#t~mem8 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem8;havoc main_#t~mem8;call main_#t~mem9 := read~int(main_~#x~0.base, 4 + main_~#x~0.offset, 4);call write~int(main_#t~mem9, main_~#x~0.base, main_~#x~0.offset, 4);havoc main_#t~mem9;call write~int(main_~temp~0, main_~#x~0.base, 4 + main_~#x~0.offset, 4);rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 4997#L28-8 assume !!(rangesum_~i~1 < 10); 4998#L29-2 assume !(rangesum_~i~1 > 5); 5016#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5017#L28-8 assume !!(rangesum_~i~1 < 10); 5082#L29-2 assume !(rangesum_~i~1 > 5); 5081#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5079#L28-8 assume !!(rangesum_~i~1 < 10); 5080#L29-2 assume !(rangesum_~i~1 > 5); 5087#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5086#L28-8 assume !!(rangesum_~i~1 < 10); 5085#L29-2 assume !(rangesum_~i~1 > 5); 5084#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5083#L28-8 assume !!(rangesum_~i~1 < 10); 5030#L29-2 assume !(rangesum_~i~1 > 5); 5031#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5088#L28-8 assume !!(rangesum_~i~1 < 10); 5065#L29-2 assume !(rangesum_~i~1 > 5); 5064#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5063#L28-8 assume !!(rangesum_~i~1 < 10); 5061#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5062#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5060#L28-8 assume !!(rangesum_~i~1 < 10); 5059#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5057#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5056#L28-8 assume !!(rangesum_~i~1 < 10); 5035#L29-2 [2021-10-28 08:37:27,867 INFO L793 eck$LassoCheckResult]: Loop: 5035#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5036#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5034#L28-8 assume !!(rangesum_~i~1 < 10); 5035#L29-2 [2021-10-28 08:37:27,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:27,867 INFO L85 PathProgramCache]: Analyzing trace with hash 1646097460, now seen corresponding path program 2 times [2021-10-28 08:37:27,867 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:27,868 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237617312] [2021-10-28 08:37:27,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:27,868 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:27,902 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-10-28 08:37:27,902 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [79367541] [2021-10-28 08:37:27,903 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 08:37:27,903 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:27,903 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:27,905 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:27,915 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2021-10-28 08:37:28,213 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 08:37:28,213 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:28,216 INFO L263 TraceCheckSpWp]: Trace formula consists of 276 conjuncts, 11 conjunts are in the unsatisfiable core [2021-10-28 08:37:28,218 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:28,483 INFO L134 CoverageAnalysis]: Checked inductivity of 309 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 192 trivial. 0 not checked. [2021-10-28 08:37:28,483 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:28,483 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [237617312] [2021-10-28 08:37:28,483 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-10-28 08:37:28,483 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [79367541] [2021-10-28 08:37:28,483 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [79367541] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:37:28,483 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2021-10-28 08:37:28,484 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2021-10-28 08:37:28,484 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588830711] [2021-10-28 08:37:28,484 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 08:37:28,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:28,484 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 4 times [2021-10-28 08:37:28,484 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:28,484 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157547267] [2021-10-28 08:37:28,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:28,485 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:28,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:28,489 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:28,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:28,491 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:28,553 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:28,554 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-10-28 08:37:28,554 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2021-10-28 08:37:28,554 INFO L87 Difference]: Start difference. First operand 110 states and 120 transitions. cyclomatic complexity: 16 Second operand has 12 states, 12 states have (on average 3.3333333333333335) internal successors, (40), 12 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:28,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:28,712 INFO L93 Difference]: Finished difference Result 141 states and 158 transitions. [2021-10-28 08:37:28,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-10-28 08:37:28,712 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 158 transitions. [2021-10-28 08:37:28,713 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 19 [2021-10-28 08:37:28,714 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 139 states and 156 transitions. [2021-10-28 08:37:28,714 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2021-10-28 08:37:28,715 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2021-10-28 08:37:28,715 INFO L73 IsDeterministic]: Start isDeterministic. Operand 139 states and 156 transitions. [2021-10-28 08:37:28,715 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:28,715 INFO L681 BuchiCegarLoop]: Abstraction has 139 states and 156 transitions. [2021-10-28 08:37:28,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states and 156 transitions. [2021-10-28 08:37:28,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 116. [2021-10-28 08:37:28,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.0948275862068966) internal successors, (127), 115 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:28,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 127 transitions. [2021-10-28 08:37:28,718 INFO L704 BuchiCegarLoop]: Abstraction has 116 states and 127 transitions. [2021-10-28 08:37:28,718 INFO L587 BuchiCegarLoop]: Abstraction has 116 states and 127 transitions. [2021-10-28 08:37:28,718 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-10-28 08:37:28,718 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 127 transitions. [2021-10-28 08:37:28,719 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 8 [2021-10-28 08:37:28,719 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:28,719 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:28,720 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 9, 6, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:28,720 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-10-28 08:37:28,720 INFO L791 eck$LassoCheckResult]: Stem: 5493#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 5494#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 5515#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5516#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5517#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5518#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5568#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5567#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5566#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5565#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5564#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5562#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5560#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5558#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5556#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5554#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5552#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5550#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5548#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5546#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5544#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 5541#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 5540#L17-3 assume !(init_nondet_~i~0 < 10); 5505#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 5506#L28-3 assume !!(rangesum_~i~1 < 10); 5501#L29 assume !(rangesum_~i~1 > 5); 5502#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5507#L28-3 assume !!(rangesum_~i~1 < 10); 5527#L29 assume !(rangesum_~i~1 > 5); 5508#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5509#L28-3 assume !!(rangesum_~i~1 < 10); 5503#L29 assume !(rangesum_~i~1 > 5); 5504#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5584#L28-3 assume !!(rangesum_~i~1 < 10); 5583#L29 assume !(rangesum_~i~1 > 5); 5582#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5581#L28-3 assume !!(rangesum_~i~1 < 10); 5580#L29 assume !(rangesum_~i~1 > 5); 5579#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5578#L28-3 assume !!(rangesum_~i~1 < 10); 5577#L29 assume !(rangesum_~i~1 > 5); 5537#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5576#L28-3 assume !!(rangesum_~i~1 < 10); 5575#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5574#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5573#L28-3 assume !!(rangesum_~i~1 < 10); 5572#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5571#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5570#L28-3 assume !!(rangesum_~i~1 < 10); 5569#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5536#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5539#L28-3 assume !!(rangesum_~i~1 < 10); 5535#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5532#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5525#L28-3 assume !(rangesum_~i~1 < 10); 5526#L28-4 assume 0 != rangesum_~cnt~0;rangesum_#res := (if (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 <= 2147483647 then (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 else (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 - 4294967296); 5519#L37 main_#t~ret7 := rangesum_#res;main_~ret~1 := main_#t~ret7;havoc main_#t~ret7;call main_#t~mem8 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem8;havoc main_#t~mem8;call main_#t~mem9 := read~int(main_~#x~0.base, 4 + main_~#x~0.offset, 4);call write~int(main_#t~mem9, main_~#x~0.base, main_~#x~0.offset, 4);havoc main_#t~mem9;call write~int(main_~temp~0, main_~#x~0.base, 4 + main_~#x~0.offset, 4);rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 5497#L28-8 assume !!(rangesum_~i~1 < 10); 5498#L29-2 assume !(rangesum_~i~1 > 5); 5512#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5513#L28-8 assume !!(rangesum_~i~1 < 10); 5588#L29-2 assume !(rangesum_~i~1 > 5); 5587#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5585#L28-8 assume !!(rangesum_~i~1 < 10); 5586#L29-2 assume !(rangesum_~i~1 > 5); 5593#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5592#L28-8 assume !!(rangesum_~i~1 < 10); 5591#L29-2 assume !(rangesum_~i~1 > 5); 5590#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5589#L28-8 assume !!(rangesum_~i~1 < 10); 5530#L29-2 assume !(rangesum_~i~1 > 5); 5531#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5594#L28-8 assume !!(rangesum_~i~1 < 10); 5563#L29-2 assume !(rangesum_~i~1 > 5); 5561#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5559#L28-8 assume !!(rangesum_~i~1 < 10); 5557#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5555#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5553#L28-8 assume !!(rangesum_~i~1 < 10); 5551#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5549#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5547#L28-8 assume !!(rangesum_~i~1 < 10); 5545#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5543#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5542#L28-8 assume !!(rangesum_~i~1 < 10); 5534#L29-2 [2021-10-28 08:37:28,721 INFO L793 eck$LassoCheckResult]: Loop: 5534#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 5538#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 5533#L28-8 assume !!(rangesum_~i~1 < 10); 5534#L29-2 [2021-10-28 08:37:28,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:28,721 INFO L85 PathProgramCache]: Analyzing trace with hash -1484601769, now seen corresponding path program 3 times [2021-10-28 08:37:28,721 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:28,721 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834439631] [2021-10-28 08:37:28,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:28,721 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:28,748 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-10-28 08:37:28,748 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1118713192] [2021-10-28 08:37:28,748 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 08:37:28,748 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:28,748 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:28,787 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:28,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2021-10-28 08:37:28,971 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2021-10-28 08:37:29,301 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2021-10-28 08:37:29,301 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2021-10-28 08:37:29,301 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:29,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:29,423 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:29,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:29,425 INFO L85 PathProgramCache]: Analyzing trace with hash 81548, now seen corresponding path program 5 times [2021-10-28 08:37:29,426 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:29,426 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634584333] [2021-10-28 08:37:29,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:29,426 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:29,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:29,430 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:29,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:29,433 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:29,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:29,433 INFO L85 PathProgramCache]: Analyzing trace with hash 1801965686, now seen corresponding path program 4 times [2021-10-28 08:37:29,434 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:29,434 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948808246] [2021-10-28 08:37:29,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:29,434 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:29,446 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-10-28 08:37:29,446 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2057329575] [2021-10-28 08:37:29,446 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 08:37:29,446 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:29,446 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:29,447 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:29,450 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2021-10-28 08:37:29,825 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 08:37:29,825 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 08:37:29,827 INFO L263 TraceCheckSpWp]: Trace formula consists of 268 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 08:37:29,828 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:37:30,026 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 302 trivial. 0 not checked. [2021-10-28 08:37:30,026 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:37:30,027 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948808246] [2021-10-28 08:37:30,027 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-10-28 08:37:30,027 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2057329575] [2021-10-28 08:37:30,027 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2057329575] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:37:30,027 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:37:30,027 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:37:30,028 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631490647] [2021-10-28 08:37:30,086 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:37:30,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 08:37:30,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:37:30,087 INFO L87 Difference]: Start difference. First operand 116 states and 127 transitions. cyclomatic complexity: 17 Second operand has 7 states, 6 states have (on average 4.666666666666667) internal successors, (28), 7 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:30,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:37:30,185 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2021-10-28 08:37:30,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:37:30,185 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 139 states and 143 transitions. [2021-10-28 08:37:30,187 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2021-10-28 08:37:30,188 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 139 states to 115 states and 119 transitions. [2021-10-28 08:37:30,188 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2021-10-28 08:37:30,188 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2021-10-28 08:37:30,188 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 119 transitions. [2021-10-28 08:37:30,188 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 08:37:30,188 INFO L681 BuchiCegarLoop]: Abstraction has 115 states and 119 transitions. [2021-10-28 08:37:30,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 119 transitions. [2021-10-28 08:37:30,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 96. [2021-10-28 08:37:30,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 96 states have (on average 1.0416666666666667) internal successors, (100), 95 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:37:30,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 100 transitions. [2021-10-28 08:37:30,191 INFO L704 BuchiCegarLoop]: Abstraction has 96 states and 100 transitions. [2021-10-28 08:37:30,191 INFO L587 BuchiCegarLoop]: Abstraction has 96 states and 100 transitions. [2021-10-28 08:37:30,191 INFO L425 BuchiCegarLoop]: ======== Iteration 25============ [2021-10-28 08:37:30,191 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 96 states and 100 transitions. [2021-10-28 08:37:30,192 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2021-10-28 08:37:30,192 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 08:37:30,192 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 08:37:30,193 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 10, 10, 6, 6, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:37:30,193 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 08:37:30,193 INFO L791 eck$LassoCheckResult]: Stem: 6021#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string0.base, #t~string0.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string0.base, #t~string0.offset, 1);call write~init~int(0, #t~string0.base, 1 + #t~string0.offset, 1);call #t~string1.base, #t~string1.offset := #Ultimate.allocOnStack(13); 6022#L-1 havoc main_#res;havoc main_#t~ret7, main_#t~mem8, main_#t~mem9, main_#t~ret10, main_#t~mem11, main_#t~mem13, main_#t~post12, main_~i~2, main_#t~ret14, main_~#x~0.base, main_~#x~0.offset, main_~temp~0, main_~ret~1, main_~ret2~0, main_~ret5~0;call main_~#x~0.base, main_~#x~0.offset := #Ultimate.allocOnStack(40);init_nondet_#in~x.base, init_nondet_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc init_nondet_#t~nondet4, init_nondet_#t~post3, init_nondet_~x.base, init_nondet_~x.offset, init_nondet_~i~0;init_nondet_~x.base, init_nondet_~x.offset := init_nondet_#in~x.base, init_nondet_#in~x.offset;havoc init_nondet_~i~0;init_nondet_~i~0 := 0; 6038#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6039#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6040#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6041#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6105#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6104#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6103#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6101#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6099#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6097#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6095#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6093#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6091#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6089#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6087#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6085#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6083#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6082#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6080#L17-3 assume !!(init_nondet_~i~0 < 10);call write~int(init_nondet_#t~nondet4, init_nondet_~x.base, init_nondet_~x.offset + 4 * init_nondet_~i~0, 4);havoc init_nondet_#t~nondet4; 6056#L17-2 init_nondet_#t~post3 := init_nondet_~i~0;init_nondet_~i~0 := 1 + init_nondet_#t~post3;havoc init_nondet_#t~post3; 6055#L17-3 assume !(init_nondet_~i~0 < 10); 6029#L15 havoc main_~temp~0;havoc main_~ret~1;havoc main_~ret2~0;havoc main_~ret5~0;rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 6030#L28-3 assume !!(rangesum_~i~1 < 10); 6031#L29 assume !(rangesum_~i~1 > 5); 6032#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6035#L28-3 assume !!(rangesum_~i~1 < 10); 6033#L29 assume !(rangesum_~i~1 > 5); 6034#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6036#L28-3 assume !!(rangesum_~i~1 < 10); 6102#L29 assume !(rangesum_~i~1 > 5); 6100#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6098#L28-3 assume !!(rangesum_~i~1 < 10); 6096#L29 assume !(rangesum_~i~1 > 5); 6094#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6092#L28-3 assume !!(rangesum_~i~1 < 10); 6090#L29 assume !(rangesum_~i~1 > 5); 6088#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6086#L28-3 assume !!(rangesum_~i~1 < 10); 6084#L29 assume !(rangesum_~i~1 > 5); 6079#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6081#L28-3 assume !!(rangesum_~i~1 < 10); 6078#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6077#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6076#L28-3 assume !!(rangesum_~i~1 < 10); 6075#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6073#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6071#L28-3 assume !!(rangesum_~i~1 < 10); 6069#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6067#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6065#L28-3 assume !!(rangesum_~i~1 < 10); 6063#L29 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6061#L28-2 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6059#L28-3 assume !(rangesum_~i~1 < 10); 6051#L28-4 assume 0 != rangesum_~cnt~0;rangesum_#res := (if (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 <= 2147483647 then (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 else (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 - 4294967296); 6045#L37 main_#t~ret7 := rangesum_#res;main_~ret~1 := main_#t~ret7;havoc main_#t~ret7;call main_#t~mem8 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem8;havoc main_#t~mem8;call main_#t~mem9 := read~int(main_~#x~0.base, 4 + main_~#x~0.offset, 4);call write~int(main_#t~mem9, main_~#x~0.base, main_~#x~0.offset, 4);havoc main_#t~mem9;call write~int(main_~temp~0, main_~#x~0.base, 4 + main_~#x~0.offset, 4);rangesum_#in~x.base, rangesum_#in~x.offset := main_~#x~0.base, main_~#x~0.offset;havoc rangesum_#res;havoc rangesum_#t~mem6, rangesum_#t~post5, rangesum_~x.base, rangesum_~x.offset, rangesum_~i~1, rangesum_~ret~0, rangesum_~cnt~0;rangesum_~x.base, rangesum_~x.offset := rangesum_#in~x.base, rangesum_#in~x.offset;havoc rangesum_~i~1;havoc rangesum_~ret~0;rangesum_~ret~0 := 0;rangesum_~cnt~0 := 0;rangesum_~i~1 := 0; 6046#L28-8 assume !!(rangesum_~i~1 < 10); 6106#L29-2 assume !(rangesum_~i~1 > 5); 6042#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6043#L28-8 assume !!(rangesum_~i~1 < 10); 6116#L29-2 assume !(rangesum_~i~1 > 5); 6044#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6027#L28-8 assume !!(rangesum_~i~1 < 10); 6028#L29-2 assume !(rangesum_~i~1 > 5); 6054#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6115#L28-8 assume !!(rangesum_~i~1 < 10); 6114#L29-2 assume !(rangesum_~i~1 > 5); 6113#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6112#L28-8 assume !!(rangesum_~i~1 < 10); 6111#L29-2 assume !(rangesum_~i~1 > 5); 6110#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6108#L28-8 assume !!(rangesum_~i~1 < 10); 6109#L29-2 assume !(rangesum_~i~1 > 5); 6107#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6025#L28-8 assume !!(rangesum_~i~1 < 10); 6026#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6053#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6074#L28-8 assume !!(rangesum_~i~1 < 10); 6072#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6070#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6068#L28-8 assume !!(rangesum_~i~1 < 10); 6066#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6064#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6062#L28-8 assume !!(rangesum_~i~1 < 10); 6060#L29-2 assume rangesum_~i~1 > 5;call rangesum_#t~mem6 := read~int(rangesum_~x.base, rangesum_~x.offset + 4 * rangesum_~i~1, 4);rangesum_~ret~0 := rangesum_~ret~0 + rangesum_#t~mem6;havoc rangesum_#t~mem6;rangesum_~cnt~0 := 1 + rangesum_~cnt~0; 6058#L28-7 rangesum_#t~post5 := rangesum_~i~1;rangesum_~i~1 := 1 + rangesum_#t~post5;havoc rangesum_#t~post5; 6057#L28-8 assume !(rangesum_~i~1 < 10); 6050#L28-9 assume 0 != rangesum_~cnt~0;rangesum_#res := (if (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 <= 2147483647 then (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 else (if rangesum_~ret~0 < 0 && 0 != rangesum_~ret~0 % rangesum_~cnt~0 then (if rangesum_~cnt~0 < 0 then rangesum_~ret~0 / rangesum_~cnt~0 - 1 else 1 + rangesum_~ret~0 / rangesum_~cnt~0) else rangesum_~ret~0 / rangesum_~cnt~0) % 4294967296 - 4294967296); 6047#L37-1 main_#t~ret10 := rangesum_#res;main_~ret2~0 := main_#t~ret10;havoc main_#t~ret10;call main_#t~mem11 := read~int(main_~#x~0.base, main_~#x~0.offset, 4);main_~temp~0 := main_#t~mem11;havoc main_#t~mem11;main_~i~2 := 0; 6048#L54-3 [2021-10-28 08:37:30,193 INFO L793 eck$LassoCheckResult]: Loop: 6048#L54-3 assume !!(main_~i~2 < 9);call main_#t~mem13 := read~int(main_~#x~0.base, main_~#x~0.offset + 4 * (1 + main_~i~2), 4);call write~int(main_#t~mem13, main_~#x~0.base, main_~#x~0.offset + 4 * main_~i~2, 4);havoc main_#t~mem13; 6049#L54-2 main_#t~post12 := main_~i~2;main_~i~2 := 1 + main_#t~post12;havoc main_#t~post12; 6048#L54-3 [2021-10-28 08:37:30,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:30,194 INFO L85 PathProgramCache]: Analyzing trace with hash 817204024, now seen corresponding path program 1 times [2021-10-28 08:37:30,194 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:30,194 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539494632] [2021-10-28 08:37:30,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:30,194 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:30,233 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-10-28 08:37:30,234 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1834925365] [2021-10-28 08:37:30,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:30,234 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:30,234 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:30,270 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:30,272 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2021-10-28 08:37:30,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:30,676 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:30,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:30,788 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:30,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:30,789 INFO L85 PathProgramCache]: Analyzing trace with hash 3331, now seen corresponding path program 1 times [2021-10-28 08:37:30,789 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:30,789 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223056438] [2021-10-28 08:37:30,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:30,790 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:30,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:30,794 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:30,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:30,796 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:37:30,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:37:30,797 INFO L85 PathProgramCache]: Analyzing trace with hash -645945734, now seen corresponding path program 1 times [2021-10-28 08:37:30,797 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:37:30,797 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1856203580] [2021-10-28 08:37:30,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:30,797 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:37:30,833 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-10-28 08:37:30,833 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1657484243] [2021-10-28 08:37:30,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:37:30,834 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:37:30,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:37:30,843 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:37:30,859 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2021-10-28 08:37:31,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:31,213 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:37:31,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:37:31,447 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:38:52,728 WARN L207 SmtUtils]: Spent 1.35 m on a formula simplification. DAG size of input: 585 DAG size of output: 405 [2021-10-28 08:42:04,578 WARN L207 SmtUtils]: Spent 19.19 s on a formula simplification that was a NOOP. DAG size: 239 [2021-10-28 08:42:04,582 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 08:42:04,582 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 08:42:04,582 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 08:42:04,582 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 08:42:04,582 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 08:42:04,582 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 08:42:04,583 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 08:42:04,583 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 08:42:04,583 INFO L133 ssoRankerPreferences]: Filename of dumped script: rangesum10.i_Iteration25_Lasso [2021-10-28 08:42:04,583 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 08:42:04,583 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 08:42:04,599 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:42:04,601 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:42:04,603 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:42:04,606 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:42:04,608 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 08:42:09,856 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer has thrown an exception: java.lang.AssertionError: MapEliminator tries to combine Int and (Array Int Int) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.indexEqualityInequalityImpliesValueEquality(MapEliminator.java:850) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.replaceSelectStoreTerm(MapEliminator.java:592) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.replaceStoreTerms(MapEliminator.java:542) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.getRewrittenTransFormula(MapEliminator.java:330) at de.uni_freiburg.informatik.ultimate.lassoranker.preprocessors.MapEliminationLassoPreprocessor.process(MapEliminationLassoPreprocessor.java:109) at de.uni_freiburg.informatik.ultimate.lassoranker.variables.LassoBuilder.applyPreprocessor(LassoBuilder.java:154) at de.uni_freiburg.informatik.ultimate.lassoranker.variables.LassoBuilder.preprocess(LassoBuilder.java:262) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.preprocess(LassoAnalysis.java:280) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.(LassoAnalysis.java:229) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.synthesize(LassoCheck.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkLassoTermination(LassoCheck.java:953) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.(LassoCheck.java:862) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.(LassoCheck.java:252) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiCegarLoop.iterate(BuchiCegarLoop.java:457) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:143) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:398) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-10-28 08:42:09,863 INFO L168 Benchmark]: Toolchain (without parser) took 311858.69 ms. Allocated memory was 90.2 MB in the beginning and 192.9 MB in the end (delta: 102.8 MB). Free memory was 58.6 MB in the beginning and 61.6 MB in the end (delta: -2.9 MB). Peak memory consumption was 141.7 MB. Max. memory is 16.1 GB. [2021-10-28 08:42:09,864 INFO L168 Benchmark]: CDTParser took 0.34 ms. Allocated memory is still 90.2 MB. Free memory is still 46.4 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 08:42:09,864 INFO L168 Benchmark]: CACSL2BoogieTranslator took 361.97 ms. Allocated memory was 90.2 MB in the beginning and 125.8 MB in the end (delta: 35.7 MB). Free memory was 58.3 MB in the beginning and 101.9 MB in the end (delta: -43.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-28 08:42:09,864 INFO L168 Benchmark]: Boogie Procedure Inliner took 59.24 ms. Allocated memory is still 125.8 MB. Free memory was 101.9 MB in the beginning and 100.2 MB in the end (delta: 1.6 MB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 08:42:09,865 INFO L168 Benchmark]: Boogie Preprocessor took 40.42 ms. Allocated memory is still 125.8 MB. Free memory was 100.2 MB in the beginning and 98.6 MB in the end (delta: 1.7 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 08:42:09,865 INFO L168 Benchmark]: RCFGBuilder took 605.76 ms. Allocated memory is still 125.8 MB. Free memory was 98.6 MB in the beginning and 85.9 MB in the end (delta: 12.7 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. [2021-10-28 08:42:09,866 INFO L168 Benchmark]: BuchiAutomizer took 310784.37 ms. Allocated memory was 125.8 MB in the beginning and 192.9 MB in the end (delta: 67.1 MB). Free memory was 85.5 MB in the beginning and 61.6 MB in the end (delta: 24.0 MB). Peak memory consumption was 136.5 MB. Max. memory is 16.1 GB. [2021-10-28 08:42:09,868 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34 ms. Allocated memory is still 90.2 MB. Free memory is still 46.4 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 361.97 ms. Allocated memory was 90.2 MB in the beginning and 125.8 MB in the end (delta: 35.7 MB). Free memory was 58.3 MB in the beginning and 101.9 MB in the end (delta: -43.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 59.24 ms. Allocated memory is still 125.8 MB. Free memory was 101.9 MB in the beginning and 100.2 MB in the end (delta: 1.6 MB). There was no memory consumed. Max. memory is 16.1 GB. * Boogie Preprocessor took 40.42 ms. Allocated memory is still 125.8 MB. Free memory was 100.2 MB in the beginning and 98.6 MB in the end (delta: 1.7 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 605.76 ms. Allocated memory is still 125.8 MB. Free memory was 98.6 MB in the beginning and 85.9 MB in the end (delta: 12.7 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 310784.37 ms. Allocated memory was 125.8 MB in the beginning and 192.9 MB in the end (delta: 67.1 MB). Free memory was 85.5 MB in the beginning and 61.6 MB in the end (delta: 24.0 MB). Peak memory consumption was 136.5 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: AssertionError: MapEliminator tries to combine Int and (Array Int Int) de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: AssertionError: MapEliminator tries to combine Int and (Array Int Int): de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.indexEqualityInequalityImpliesValueEquality(MapEliminator.java:850) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2021-10-28 08:42:09,912 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Forceful destruction successful, exit code 0 [2021-10-28 08:42:10,101 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Ended with exit code 0 [2021-10-28 08:42:10,300 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Ended with exit code 0 [2021-10-28 08:42:10,502 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Ended with exit code 0 [2021-10-28 08:42:10,700 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Ended with exit code 0 [2021-10-28 08:42:10,900 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Ended with exit code 0 [2021-10-28 08:42:11,100 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Ended with exit code 0 [2021-10-28 08:42:11,303 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Ended with exit code 0 [2021-10-28 08:42:11,505 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2021-10-28 08:42:11,706 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2021-10-28 08:42:11,904 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2021-10-28 08:42:12,111 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2021-10-28 08:42:12,307 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2021-10-28 08:42:12,507 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2021-10-28 08:42:12,707 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2021-10-28 08:42:12,905 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2021-10-28 08:42:13,107 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2021-10-28 08:42:13,308 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2021-10-28 08:42:13,508 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2021-10-28 08:42:13,708 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2021-10-28 08:42:13,908 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2021-10-28 08:42:14,108 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2021-10-28 08:42:14,483 WARN L435 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forcibly destroying the process [2021-10-28 08:42:14,512 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f3c7d8c-98b2-4edf-89f9-31c9909c02ea/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 137 Received shutdown request...